Dmitry Baryshkov [Tue, 30 Jan 2024 16:48:08 +0000 (18:48 +0200)]
arm64: dts: qcom: qrb2210-rb1: disable cluster power domains
If cluster domain idle state is enabled on the RB1, the board becomes
significantly less responsive. Under certain circumstances (if some of
the devices are disabled in kernel config) the board can even lock up.
It seems this is caused by the MPM not updating wakeup timer during CPU
idle (in the same way the RPMh updates it when cluster idle state is
entered).
Disable cluster domain idle for the RB1 board until MPM driver is fixed
to cooperate with the CPU idle states.
Vladimir Lypak [Thu, 25 Jan 2024 21:56:26 +0000 (22:56 +0100)]
arm64: dts: qcom: msm8953: Add GPU
Add the GPU node for the Adreno 506 found on this family of SoCs. The
clock speeds are a bit different per SoC variant, SDM450 maxes out at
600MHz while MSM8953 (= SDM625) goes up to 650MHz and SDM632 goes up to
725MHz.
To achieve this, create a new sdm450.dtsi to hold the 600MHz OPP and
use the new dtsi for sdm450-motorola-ali.
Neil Armstrong [Thu, 25 Jan 2024 16:42:41 +0000 (17:42 +0100)]
arm64: dts: qcom: sm8650-qrd: add Audio nodes
Add the remaining Audio nodes on the SM8650-QRD board including:
- Qualcomm Aqstic WCD9395 audio codec on the RX & TX Soundwire interfaces
- WSA8845 Left & Right Speakers
- Link the WCD9395 Codec node to the WCD9395 USB SubSystem node to handle
the USB-C Audio Accessory Mode events & lane swapping
- Sound card with routing for Speakers and Microphones
Add dma-coherent property to fastRPC context bank nodes to pass dma
sequence test in fastrpc sanity test, ensure that data integrity is
maintained during DMA operations.
Add dma-coherent property to fastRPC context bank nodes to pass dma
sequence test in fastrpc sanity test, ensure that data integrity is
maintained during DMA operations.
Add proper audio routes for onboard analogue microphones AMIC[1345] -
MIC biases and route from TX macro codec to WCD9385 audio codec.
This finally brings AMIC1, AMIC3, AMIC4 and AMIC5 onboard microphones to
work. AMIC2 (headphones) should be fine well, however it didn't work
during tests, probably because of incomplete USB switch.
Luca Weiss [Wed, 24 Jan 2024 15:31:43 +0000 (16:31 +0100)]
arm64: dts: qcom: sm6350: Add tsens thermal zones
Add the definitions for the various thermal zones found on the SM6350
SoC. Hooking up GPU and CPU cooling can limit the clock speeds there to
reduce the temperature again to good levels.
Most thermal zones only have one critical temperature configured at
125°C which can be mostly considered a placeholder until those zones can
be hooked up to cooling.
The USB3 PHY on the SM6115 platform doesn't have built-in
PCS_MISC_CLAMP_ENABLE register. Instead clamping is handled separately
via the register in the TCSR space. Declare corresponding register.
Fixes: 9dd5f6dba729 ("arm64: dts: qcom: sm6115: Add USB SS qmp phy node") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240117-usbc-phy-vls-clamp-v2-6-a950c223f10f@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The USB3 PHY on the QCM2290 platform doesn't have built-in
PCS_MISC_CLAMP_ENABLE register. Instead clamping is handled separately
via the register in the TCSR space. Declare corresponding register.
The USB3 PHY on the MSM8998 platform doesn't have built-in
PCS_MISC_CLAMP_ENABLE register. Instead clamping is handled separately
via the register in the TCSR space. Declare corresponding register.
Maulik Shah [Tue, 9 Jan 2024 15:58:52 +0000 (21:28 +0530)]
arm64: dts: qcom: sc7280: Update domain-idle-states for cluster sleep
QCM6490 uses Trustzone as firmware whereas SC7280 uses arm trusted firmware.
The PSCI suspend param and the number of domain-idle-states supported is
different in Trustzone for cluster sleep.
Move the arm trusted firmware supported domain-idle-states in chrome specific
sc7280-chrome-common.dtsi and add the Trustzone supported sleep states as default
domain-idle-states in sc7280.dtsi
Marijn Suijten [Sun, 4 Feb 2024 17:35:22 +0000 (18:35 +0100)]
arm64: dts: qcom: sdm630-nile: Enable and configure PM660L WLED
The board-specific (electrical) configuration was removed from PM660L in 90ba636e40cb ("arm64: dts: qcom: pm660l: Remove board-specific WLED
configuration") as it is platform-dependent. We reintroduce it here in
the Nile board configuration (with a slightly lower current limit, as
per downstream DT sources) and enable it for use in the dsi0 node.
Dmitry Baryshkov [Sun, 4 Feb 2024 16:56:35 +0000 (18:56 +0200)]
dt-bindings: arm: qcom: drop the superfluous device compatibility schema
The idea impressed in the commit b32e592d3c28 ("devicetree: bindings:
Document qcom board compatible format") never got actually adopted. As
can be seen from the existing board DT files, no device actually used
the PMIC / foundry / version parts of the compatible string. Drop this
compatibility string description to avoid possible confusion and keep
just the generic terms and the SoC list.
Add nodes for four WSA8845 speakers. Unlike previous boards like
SM8550-QRD, this board has four speakers spread over two Soundwire buses
instead of two speakers on one bus. Each pair of speakers shares the
reset GPIO thus pinctrl property is only in one of them.
Add nodes for LPASS Soundwire v2.0.0 controllers. Difference against
SM8550:
1. Update port configs to match reference implementation,
2. LPASS TLMM GPIO14 is not used as WCD_SR_TX_DATA2 pin but as GPIO
(camera).
Isaev Ruslan [Wed, 15 Nov 2023 15:38:53 +0000 (18:38 +0300)]
arm64: dts: qcom: ipq6018: add QUP5 I2C node
Add node to support this bus inside of IPQ6018.
For example, this bus is used to work with the
voltage regulator (mp5496) on the Yuncore AX840 wireless AP.
Ninad Naik [Thu, 25 Jan 2024 05:51:34 +0000 (11:21 +0530)]
arm64: dts: qcom: sa8775p: Add new memory map updates to SA8775P
New memory map layout changes (by Qualcomm firmware) have brought
in updates to base addresses and/or size for different memory regions
like cpcucp_fw, tz-stat, and also introduces new memory regions for
resource manager firmware. The updated memory map also fixes existing
issues pertaining to boot up failure while running memtest, thus
improving stability.
This change brings in these corresponding memory map updates to the
device tree for SA8775P SoC platform, which currently is in its
development stage.
Neil Armstrong [Thu, 25 Jan 2024 16:55:04 +0000 (17:55 +0100)]
arm64: dts: qcom: sm8650: Use GIC-ITS for PCIe0 and PCIe1
Both PCIe0 and PCIe1 controllers are capable of signalling the MSIs
received from endpoint devices to the CPU using GIC-ITS MSI controller.
Add support for it.
The GIC-ITS MSI implementation provides an advantage over internal MSI
implementation using Locality-specific Peripheral Interrupts (LPI) that
would allow MSIs to be targeted for each CPU core.
Like SM8450 & SM8550, the IDs are swapped, but works fine on PCIe0 and PCIe1.
Neil Armstrong [Tue, 23 Jan 2024 13:21:15 +0000 (14:21 +0100)]
arm64: dts: qcom: sm8650-qrd: add USB-C Altmode Support
Add the necessary nodes to support the USB-C Altmode path by
adding the following
- WCD939x USBSS Mux I2C device
- nb7vpq904m Redriver I2C device
- Port/Endpoint graph links bettween PMIC-Glink, Mux, Redriver and USB PHY nodes.
WCD939x USBSS port 2 Path to Codec will be added later when Audio support
is added.
Dmitry Baryshkov [Tue, 16 Jan 2024 01:10:57 +0000 (03:10 +0200)]
arm64: dts: qcom: sdm630: add USB QMP PHY support
Define USB3 QMP PHY presend on the SDM630 / SDM660 platforms. Enable it by
default in the USB3 host, but (for compatibility), force USB 2.0 mode
for all defined boards. The boards should opt-in to enable USB 3.0
support.
Bjorn Andersson [Thu, 25 Jan 2024 21:05:13 +0000 (13:05 -0800)]
arm64: dts: qcom: sa8295p-adp: Enable GPU
With the necessary support in place for supplying VDD_GFX from the
MAX20411 regulator, enable the GPU clock controller, GMU, Adreno SMMU
and the GPU on the SA8295P ADP.
Bjorn Andersson [Thu, 25 Jan 2024 21:05:11 +0000 (13:05 -0800)]
arm64: dts: qcom: sa8540p: Drop gfx.lvl as power-domain for gpucc
The SA8295P and SA8540P uses an external regulator (max20411), and
gfx.lvl is not provided by rpmh. Drop the power-domains property of the
gpucc node to reflect this.
Luca Weiss [Wed, 10 Jan 2024 15:21:19 +0000 (16:21 +0100)]
arm64: dts: qcom: sm7225-fairphone-fp4: Switch firmware ext to .mbn
Specify the file name for the squashed/non-split firmware with the .mbn
extension instead of the split .mdt. The kernel can load both but the
squashed version is preferred in dts nowadays.
Dmitry Baryshkov [Sun, 28 Jan 2024 01:32:45 +0000 (03:32 +0200)]
arm64: dts: qcom: rename PM2250 to PM4125
It seems, the only actual mentions of PM2250 can be found are related to
the Qualcomm RB1 platform. However even RB1 schematics use PM4125 as a
PMIC name. Rename PM2250 to PM4125 to follow the documentation.
Note, this doesn't change the compatible strings. There was a previous
argument regarding renaming of compat strings.
Via the PMIC GLINK driver we can get info about fuel gauge, charger and
USB connector events. Add the node to the dts and configure USB so that
role switching works.
David Heidelberg [Fri, 29 Dec 2023 20:02:33 +0000 (21:02 +0100)]
arm64: dts: qcom: sdm845-oneplus-common: improve DAI node naming
Make it easier to understand what the reg in those nodes is by using the
constants provided by qcom,q6dsp-lpass-ports.h.
Name nodes according to dt-binding expectations.
Fix for
```
arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dtb: service@4: dais: Unevaluated properties are not allowed ('qi2s@22', 'qi2s@23' were unexpected)
```
Luca Weiss [Fri, 29 Dec 2023 08:51:37 +0000 (09:51 +0100)]
arm64: dts: qcom: sc7280: Add static properties to cryptobam
When the properties num-channels & qcom,num-ees are not specified, the
driver tries to read the values from registers, but this read fails and
resets the device if the interconnect from the qcom,qce node is not
already active when that happens.
Add the static properties to not touch any registers during probe, the
rest of the time when the BAM is used by QCE then the interconnect will
be active already.
Stephan Gerhold [Fri, 22 Sep 2023 15:11:56 +0000 (17:11 +0200)]
arm64: dts: qcom: apq8016-sbc-d3-camera: Use more generic node names
Add "regulator" to the node names of the fixed regulators, and drop the
"_rear" part of the camera node name since it is not part of the class
of the device (which is simply "camera").
Krzysztof Kozlowski [Fri, 26 Jan 2024 09:38:35 +0000 (10:38 +0100)]
arm64: dts: qcom: sm8650: describe all PCI MSI interrupts
Each group of MSI interrupts is mapped to the separate host interrupt.
Describe each of interrupts in the device tree for PCIe hosts. Not
tested on hardware.
Krzysztof Kozlowski [Fri, 26 Jan 2024 09:38:34 +0000 (10:38 +0100)]
arm64: dts: qcom: sm8550: describe all PCI MSI interrupts
Each group of MSI interrupts is mapped to the separate host interrupt.
Describe each of interrupts in the device tree for PCIe hosts. Only
boot tested on hardware.
Krzysztof Kozlowski [Fri, 26 Jan 2024 09:38:33 +0000 (10:38 +0100)]
arm64: dts: qcom: sm8450: describe all PCI MSI interrupts
Each group of MSI interrupts is mapped to the separate host interrupt.
Describe each of interrupts in the device tree for PCIe hosts. Only
boot tested on hardware.
Krzysztof Kozlowski [Fri, 26 Jan 2024 09:38:32 +0000 (10:38 +0100)]
arm64: dts: qcom: sm8350: describe all PCI MSI interrupts
Each group of MSI interrupts is mapped to the separate host interrupt.
Describe each of interrupts in the device tree for PCIe hosts. Not
tested on hardware.
Krzysztof Kozlowski [Fri, 26 Jan 2024 09:38:31 +0000 (10:38 +0100)]
arm64: dts: qcom: sm8250: describe all PCI MSI interrupts
Each group of MSI interrupts is mapped to the separate host interrupt.
Describe each of interrupts in the device tree for PCIe hosts. Not
tested on hardware.
PCIe0 was done already in commit f2819650aab5 ("arm64: dts: qcom:
sm8250: provide additional MSI interrupts").
Krzysztof Kozlowski [Fri, 26 Jan 2024 09:38:30 +0000 (10:38 +0100)]
arm64: dts: qcom: sm8150: describe all PCI MSI interrupts
Each group of MSI interrupts is mapped to the separate host interrupt.
Describe each of interrupts in the device tree for PCIe hosts. Not
tested on hardware.
Krzysztof Kozlowski [Wed, 24 Jan 2024 12:18:55 +0000 (13:18 +0100)]
arm64: dts: qcom: sm8450-hdk: correct AMIC4 and AMIC5 microphones
Due to lack of documentation the AMIC4 and AMIC5 analogue microphones
were never actually working, so the audio routing for them was added
hoping it is correct. It turned out not correct - their routing should
point to SWR_INPUT0 (so audio mixer TX SMIC MUX0 = SWR_MIC0) and
SWR_INPUT1 (so audio mixer TX SMIC MUX0 = SWR_MIC1), respectively. With
proper mixer settings and fixed LPASS TX macr codec TX SMIC MUXn
widgets, this makes all microphones working on HDK8450.
Konrad Dybcio [Tue, 2 Jan 2024 13:34:15 +0000 (14:34 +0100)]
arm64: dts: qcom: sm8550: Hook up GPU cooling device
In order to allow for throttling the GPU, hook up the cooling device
to the respective thermal zones. Also, unify the naming scheme of the
thermal zones across the tree while at it.
Konrad Dybcio [Tue, 2 Jan 2024 13:34:14 +0000 (14:34 +0100)]
arm64: dts: qcom: sm8450: Hook up GPU cooling device
In order to allow for throttling the GPU, hook up the cooling device
to the respective thermal zones. Also, update the trip point label
to be more telling, while at it.
Konrad Dybcio [Tue, 2 Jan 2024 13:34:13 +0000 (14:34 +0100)]
arm64: dts: qcom: sm8350: Hook up GPU cooling device
In order to allow for throttling the GPU, hook up the cooling device
to the respective thermal zones. Also, update the trip point label
to be more telling, while at it.
Konrad Dybcio [Tue, 2 Jan 2024 13:34:12 +0000 (14:34 +0100)]
arm64: dts: qcom: sm8250: Hook up GPU cooling device
In order to allow for throttling the GPU, hook up the cooling device
to the respective thermal zones. Also, update the trip point label
to be more telling, while at it.
Konrad Dybcio [Tue, 2 Jan 2024 13:34:11 +0000 (14:34 +0100)]
arm64: dts: qcom: sm8150: Hook up GPU cooling device
In order to allow for throttling the GPU, hook up the cooling device
to the respective thermal zones. Also, update the trip point label
to be more telling, while at it.
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