Evan Quan [Thu, 4 Jun 2020 03:50:39 +0000 (11:50 +0800)]
drm/amd/powerplay: better namings
And some minor changes as dropping unused parameter and label
internal used API as static.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Thu, 4 Jun 2020 03:42:08 +0000 (11:42 +0800)]
drm/amd/powerplay: sort those operations performed in hw setup
Those common operations(for all ASICs) are placed first and followed
by ASIC specific ones. While the display related are placed at the last.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Thu, 4 Jun 2020 03:35:45 +0000 (11:35 +0800)]
drm/amd/powerplay: maximize code sharing between .hw_init and .resume
Then redundant code can be dropped.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Thu, 4 Jun 2020 03:25:28 +0000 (11:25 +0800)]
drm/amd/powerplay: move those operations not needed for resume out
Since smu_smc_table_hw_init() is needed for both .hw_init and .resume.
By doing this, we can drop unnecessary operations on resume.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Thu, 4 Jun 2020 03:15:12 +0000 (11:15 +0800)]
drm/amd/powerplay: postpone operations not required for hw setup to late_init
So that we do not need to perform those unnecessary operations again on
resume.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Fri, 29 May 2020 06:07:41 +0000 (14:07 +0800)]
drm/amd/powerplay: clean up the overdrive settings
Eliminate the buffer allocation and drop the unnecessary
overdrive table uploading.
Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Thu, 28 May 2020 10:50:00 +0000 (18:50 +0800)]
drm/amd/powerplay: clean up the APIs for pptable setup
Combine and simplify the logics for setup pptable.
Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Thu, 28 May 2020 10:41:28 +0000 (18:41 +0800)]
drm/amd/powerplay: clean up the APIs for bootup clocks
Combine and simplify the logics for retrieving bootup
clocks.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Thu, 28 May 2020 08:55:08 +0000 (16:55 +0800)]
drm/amd/powerplay: centralize all buffer allocation in sw_init phase
To fit common design. And this can simplify the buffer deallocation.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Wed, 3 Jun 2020 10:09:01 +0000 (18:09 +0800)]
drm/amd/powerplay: implement a common API for dpms disablement
So that code can be shared between .hw_fini and .suspend.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Wed, 3 Jun 2020 10:06:02 +0000 (18:06 +0800)]
drm/amd/powerplay: drop unused APIs and unnecessary checks
Minor code cleanups.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Mon, 8 Jun 2020 22:05:34 +0000 (18:05 -0400)]
drm/amd/powerplay: eliminate asic type check
The macros check if the asic has the callback.
So no need to explicitly check.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 2 Jun 2020 21:22:48 +0000 (17:22 -0400)]
drm/amdgpu/display: use blanked rather than plane state for sync groups
We may end up with no planes set yet, depending on the ordering, but we
should have the proper blanking state which is either handled by either
DPG or TG depending on the hardware generation. Check both to determine
the proper blanked state.
Bug: https://gitlab.freedesktop.org/drm/amd/issues/781 Fixes: 5fc0cbfad45648 ("drm/amd/display: determine if a pipe is synced by plane state") Cc: nicholas.kazlauskas@amd.com Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nicholas Kazlauskas [Wed, 3 Jun 2020 00:42:33 +0000 (20:42 -0400)]
drm/amd/display: Revalidate bandwidth before commiting DC updates
[Why]
Whenever we switch between tiled formats without also switching pixel
formats or doing anything else that recreates the DC plane state we
can run into underflow or hangs since we're not updating the
DML parameters before committing to the hardware.
[How]
If the update type is FULL then call validate_bandwidth again to update
the DML parmeters before committing the state.
This is basically just a workaround and protective measure against
update types being added DC where we could run into this issue in
the future.
We can only fully validate the state in advance before applying it to
the hardware if we recreate all the plane and stream states since
we can't modify what's currently in use.
The next step is to update DM to ensure that we're creating the plane
and stream states for whatever could potentially be a full update in
DC to pre-emptively recreate the state for DC global validation.
The workaround can stay until this has been fixed in DM.
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Hersen Wu <hersenxs.wu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nicholas Kazlauskas [Wed, 3 Jun 2020 13:32:10 +0000 (09:32 -0400)]
drm/amd/display: Only actually breakpoint if DEBUG_KERNEL_DC is enabled
To match previous behavior and to not hang the kernel if someone
accidentally builds with KGDB enabled.
Fixes: 1aad7078191116f ("drm/amd/display: Make BREAK_TO_DEBUGGER() a debug print") Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Mon, 1 Jun 2020 02:51:34 +0000 (10:51 +0800)]
drm/amd/powerplay: use existed smu_dpm_set* interfaces to implement powergate functions
Abstract powergate_vcn/jpeg functions, using smu_dpm_set* to implement it.
Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Likun Gao [Fri, 22 May 2020 06:42:35 +0000 (14:42 +0800)]
drm/amdgpu: remove unnecessary check for mem train
a.Check whether mem train support when try to reserve related memory.
b.Remove ASIC check and atom firmware table version check as the check
of firmware capability is enough to achieve that purpose.
Likun Gao [Thu, 21 May 2020 02:33:15 +0000 (10:33 +0800)]
drm/amdgpu: reserve fb according to return value from vbios
Query reserved tmr size through atom firmwareinfo for Sienna_Cichlid and onwards
for all the use cases (IP discovery/G6 memory
training/profiling/diagnostic data.etc), otherwise, fallback to legacy
approach to check and reserve tmr block for ip discovery data and G6
memory training data respectively
Likun Gao [Mon, 18 May 2020 10:44:10 +0000 (18:44 +0800)]
drm/amd/powerplay: drop sienna_cichlid hardcode of using pptable
Drop the hardcode of sienna_cichlid which will force to use softpptable,
so that it can use pptable on vbios once the value of pp_table_id get
from vbios is 0.
drm/amdgpu/sriov : Use kiq to do tlb invalidation for gfx10 on sriov
On SRIOV run time, driver shouldn't directly access invalidation registers through MMIO.
Use kiq to submit wait_reg_mem package for the invalidation
Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Boyuan Zhang [Mon, 30 Mar 2020 15:05:02 +0000 (11:05 -0400)]
drm/amdgpu: rename macro for VCN2.0 2.5 and 3.0
Rename SOC15_DPG_MODE_OFFSET_2_0, RREG32_SOC15_DPG_MODE_2_0 and
WREG32_SOC15_DPG_MODE_2_0 for VCN2.0, VCN2.5 and VCN3.0.
These three macros are used VCN2.0, VCN2.5 and VCN3.0, therefore rename
it to be a general name.
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: James Zhu <james.zhu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Boyuan Zhang [Fri, 27 Mar 2020 18:11:59 +0000 (14:11 -0400)]
drm/amdgpu: rename macro for VCN1.0
Rename RREG32_SOC15_DPG_MODE and WREG32_SOC15_DPG_MODE for VCN1.0
These two macros are used specifically for VCN1.0, therefore rename
it from general name to VCN1.0 specific name.
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: James Zhu <james.zhu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kenneth Feng [Fri, 27 Mar 2020 06:17:41 +0000 (14:17 +0800)]
drm/amd/powerplay: enable GPO
GPO is graphics power optimizer.
SMU calculates the 16 gfxclk V/F points according to the CU numbers
and memory activity.RLC picks one of them according to the memory
speed requirements for the data transmission.
Le Ma [Fri, 20 Mar 2020 07:22:37 +0000 (15:22 +0800)]
drm/amdgpu/mes: update mes fw api
Update mes_api_def.h to match the latest mes fw.
v2: clean up coding style based on kernel standards:
- fix indentation and alignment
- break long lines
- put the opening brace last on the line
- remove unnecessary blank line and space
- replace uint(32|64) with standard uint(32|64)_t
Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
projects / users / jedix / linux-maple.git / log