Konrad Dybcio [Thu, 6 Mar 2025 18:11:20 +0000 (19:11 +0100)]
arm64: dts: qcom: sc8180x: Rename AOSS_QMP to power-management
The node is currently named power-controller, which requires the device
underneath is a power domain provider. Rename it to align with other
SoCs and resolve this sort of warnings:
power-controller@c310000: '#power-domain-cells' is a required property
Konrad Dybcio [Thu, 6 Mar 2025 18:11:19 +0000 (19:11 +0100)]
arm64: dts: qcom: qcs615: Rename AOSS_QMP to power-management
The node is currently named power-controller, which requires the device
underneath is a power domain provider. Rename it to align with other
SoCs and resolve this sort of warnings:
power-controller@c300000: '#power-domain-cells' is a required property
Konrad Dybcio [Thu, 6 Mar 2025 18:11:18 +0000 (19:11 +0100)]
arm64: dts: qcom: sdx75: Rename AOSS_QMP to power-management
The node is currently named power-controller, which requires the device
underneath is a power domain provider. Rename it to align with other
SoCs and resolve this sort of warnings:
power-controller@c310000: '#power-domain-cells' is a required property
Vikash Garodia [Mon, 3 Mar 2025 12:37:01 +0000 (18:07 +0530)]
arm64: dts: qcom: sc7280: drop video decoder and encoder nodes
Decoder and encoder nodes are already deprecated from bindings. Update
the venus node to align with bindings. The nodes were deprecated with
commit 459997e8990d9 ("media: dt-bindings: qcom-venus: Deprecate
video-decoder and video-encoder where applicable") and is part of
v6.14-rc1 and onwards.
Neil Armstrong [Fri, 28 Feb 2025 08:40:26 +0000 (09:40 +0100)]
arm64: dts: qcom: sm8650: add PPI interrupt partitions for the ARM PMUs
The PMUs shares the same per-cpu (PPI) interrupt, so declare the proper
interrupt partition maps and use the 4th interrupt cell to pass the
partition phandle for each ARM PMU node.
Neil Armstrong [Fri, 28 Feb 2025 08:40:25 +0000 (09:40 +0100)]
arm64: dts: qcom: sm8650: switch to interrupt-cells 4 to add PPI partitions
The ARM PMUs shares the same per-cpu (PPI) interrupt, so we need to switch
to interrupt-cells = <4> in the GIC node to allow adding an interrupt
partition map phandle as the 4th cell value for GIC_PPI interrupts.
Maulik Shah [Wed, 26 Feb 2025 06:51:27 +0000 (12:21 +0530)]
arm64: dts: qcom: sm8750: Fix cluster hierarchy for idle states
SM8750 have two different clusters. cluster0 have CPU 0-5 as child and
cluster1 have CPU 6-7 as child. Each cluster requires its own idle state
and power domain in order to achieve complete domain sleep state.
However only single cluster idle state is added mapping CPU 0-7 to the
same power domain. Fix this by correctly mapping each CPU to respective
cluster power domain and make cluster1 power domain use same domain idle
state as cluster0 since both use same idle state parameters.
Manikanta Mylavarapu [Thu, 13 Mar 2025 07:14:22 +0000 (12:44 +0530)]
arm64: dts: qcom: ipq9574: fix the msi interrupt numbers of pcie3
The MSI interrupt numbers of the PCIe3 controller are incorrect. Due
to this, the functional bring up of the QDSP6 processor on the PCIe
endpoint has failed. Correct the MSI interrupt numbers to properly
bring up the QDSP6 processor on the PCIe endpoint.
Stephan Gerhold [Wed, 12 Feb 2025 17:03:52 +0000 (18:03 +0100)]
arm64: dts: qcom: ipq9574: Add missing properties for cryptobam
num-channels and qcom,num-ees are required for BAM nodes without clock,
because the driver cannot ensure the hardware is powered on when trying to
obtain the information from the hardware registers. Specifying the node
without these properties is unsafe and has caused early boot crashes for
other SoCs before [1, 2].
Add the missing information from the hardware registers to ensure the
driver can probe successfully without causing crashes.
Stephan Gerhold [Wed, 12 Feb 2025 17:03:51 +0000 (18:03 +0100)]
arm64: dts: qcom: sa8775p: Add missing properties for cryptobam
num-channels and qcom,num-ees are required for BAM nodes without clock,
because the driver cannot ensure the hardware is powered on when trying to
obtain the information from the hardware registers. Specifying the node
without these properties is unsafe and has caused early boot crashes for
other SoCs before [1, 2].
Add the missing information from the hardware registers to ensure the
driver can probe successfully without causing crashes.
Stephan Gerhold [Wed, 12 Feb 2025 17:03:50 +0000 (18:03 +0100)]
arm64: dts: qcom: sm8650: Add missing properties for cryptobam
num-channels and qcom,num-ees are required for BAM nodes without clock,
because the driver cannot ensure the hardware is powered on when trying to
obtain the information from the hardware registers. Specifying the node
without these properties is unsafe and has caused early boot crashes for
other SoCs before [1, 2].
Add the missing information from the hardware registers to ensure the
driver can probe successfully without causing crashes.
Stephan Gerhold [Wed, 12 Feb 2025 17:03:49 +0000 (18:03 +0100)]
arm64: dts: qcom: sm8550: Add missing properties for cryptobam
num-channels and qcom,num-ees are required for BAM nodes without clock,
because the driver cannot ensure the hardware is powered on when trying to
obtain the information from the hardware registers. Specifying the node
without these properties is unsafe and has caused early boot crashes for
other SoCs before [1, 2].
Add the missing information from the hardware registers to ensure the
driver can probe successfully without causing crashes.
Stephan Gerhold [Wed, 12 Feb 2025 17:03:48 +0000 (18:03 +0100)]
arm64: dts: qcom: sm8450: Add missing properties for cryptobam
num-channels and qcom,num-ees are required for BAM nodes without clock,
because the driver cannot ensure the hardware is powered on when trying to
obtain the information from the hardware registers. Specifying the node
without these properties is unsafe and has caused early boot crashes for
other SoCs before [1, 2].
Add the missing information from the hardware registers to ensure the
driver can probe successfully without causing crashes.
When num-channels and qcom,num-ees is not provided in devicetree, the
driver will try to read these values from the registers during probe but
this fails if the interconnect is not on and then crashes the system.
So we can provide these properties in devicetree (queried after patching
BAM driver to enable the necessary interconnect) so we can probe
cryptobam without reading registers and then also use the QCE as
expected.
Krzysztof Kozlowski [Wed, 8 Jan 2025 12:05:30 +0000 (13:05 +0100)]
arm64: dts: qcom: Use recommended MBN firmware path
All Qualcomm firmwares uploaded to linux-firmware are in MBN format,
instead of split MDT. Firmware for boards here is not yet in
linux-firmware, but if it gets accepted it will be MBN, not MDT.
Change might affect users of DTS which rely on manually placed firmware
files, not coming from linux-firmware package.
Abel Vesa [Tue, 4 Mar 2025 10:57:49 +0000 (12:57 +0200)]
arm64: dts: qcom: x1e80100-t14s: Enable external DisplayPort support
The Lenovo ThinkPad T14s Gen6 provides external DisplayPort on all
2 USB Type-C ports. Each one of this ports is connected to a dedicated
DisplayPort controller.
Due to support missing in the USB/DisplayPort combo PHY driver,
the external DisplayPort is limited to 2 lanes.
So enable the first and second DisplayPort controllers and limit their
data lanes number to 2.
Abel Vesa [Tue, 4 Mar 2025 10:57:48 +0000 (12:57 +0200)]
arm64: dts: qcom: x1e80100-t14s: Describe the Parade PS8830 retimers
The Lenovo ThinkPad T14s Gen6 laptop comes with 3 Parade PS8830 retimers,
one for each Type-C port. These handle the orientation and altmode
switching and are controlled over I2C. In the connection chain, they sit
between the USB/DisplayPort combo PHY and the Type-C connector.
Describe the retimers and all gpio controlled voltage regulators used by
each retimer. Also, modify the pmic glink graph to include the retimers in
between the SuperSpeed/Sideband in endpoints and the QMP PHY out
endpoints.
Abel Vesa [Tue, 4 Mar 2025 10:57:46 +0000 (12:57 +0200)]
arm64: dts: qcom: x1e80100-crd: Describe the Parade PS8830 retimers
The X Elite CRD board comes with 3 Parade PS8830 retimers, one for each
Type-C port. These handle the orientation and altmode switching and are
controlled over I2C. In the connection chain, they sit between the
USB/DisplayPort combo PHY and the Type-C connector.
Describe the retimers and all gpio controlled voltage regulators used by
each retimer. Also, modify the pmic glink graph to include the retimers in
between the SuperSpeed/Sideband in endpoints and the QMP PHY out endpoints.
Konrad Dybcio [Tue, 4 Mar 2025 17:10:46 +0000 (18:10 +0100)]
arm64: dts: qcom: x1e80100-romulus: Keep L12B and L15B always on
These regulators power some electronic components onboard. They're
most likely kept online by other pieces of firmware, but you can never
be sure enough.
Fixes: 09d77be56093 ("arm64: dts: qcom: Add support for X1-based Surface Laptop 7 devices") Reported-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20250304-topic-sl7_vregs_aon-v1-1-b2dc706e4157@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add the WiFi/BT nodes for QCP and describe the regulators for the WCN7850
combo chip using the new power sequencing bindings. All voltages are
derived from chained fixed regulators controlled using a single GPIO.
The same setup also works for CRD (and likely most of the other X1E80100
laptops). However, unlike the QCP they use soldered or removable M.2 cards
supplied by a single 3.3V fixed regulator. The other necessary voltages are
then derived inside the M.2 card. Describing this properly requires
new bindings, so this commit only adds QCP for now.
Krzysztof Kozlowski [Wed, 19 Feb 2025 09:07:51 +0000 (10:07 +0100)]
arm64: dts: qcom: Correct white-space style
There should be exactly one space before and after '=', and one space
before '{'. No functional impact. Verified with comparing decompiled
DTB (dtx_diff and fdtdump+diff).
Lijuan Gao [Fri, 21 Feb 2025 07:39:57 +0000 (15:39 +0800)]
arm64: dts: qcom: qcs615: Add Command DB support
Command DB is a database in the shared memory of QCOM SoCs, that
provides a mapping between resource key and the resource address for a
system resource managed by a remote processor. The data is stored in a
shared memory region and is loaded by the remote processor. Therefore,
enabling Command DB ensures that those resources function properly.
Krzysztof Kozlowski [Tue, 25 Feb 2025 09:59:10 +0000 (10:59 +0100)]
arm64: dts: qcom: sm8250-elish: Switch to undeprecated qcom,calibration-variant
The property qcom,ath11k-calibration-variant was deprecated in favor of
recently introduced generic qcom,calibration-variant, common to all
Qualcomm Atheros WiFi bindings.
Change will affect out of tree users, like other projects, of this DTS.
Krzysztof Kozlowski [Tue, 25 Feb 2025 09:59:09 +0000 (10:59 +0100)]
arm64: dts: qcom: sc8280xp: Switch to undeprecated qcom,calibration-variant
The property qcom,ath11k-calibration-variant was deprecated in favor of
recently introduced generic qcom,calibration-variant, common to all
Qualcomm Atheros WiFi bindings.
Change will affect out of tree users, like other projects, of this DTS.
Krzysztof Kozlowski [Tue, 25 Feb 2025 09:59:08 +0000 (10:59 +0100)]
arm64: dts: qcom: sa8775p-ride: Switch to undeprecated qcom,calibration-variant
The property qcom,ath11k-calibration-variant was deprecated in favor of
recently introduced generic qcom,calibration-variant, common to all
Qualcomm Atheros WiFi bindings.
Change will affect out of tree users, like other projects, of this DTS.
Krzysztof Kozlowski [Tue, 25 Feb 2025 09:59:07 +0000 (10:59 +0100)]
arm64: dts: qcom: qcm6490: Switch to undeprecated qcom,calibration-variant
The property qcom,ath11k-calibration-variant was deprecated in favor of
recently introduced generic qcom,calibration-variant, common to all
Qualcomm Atheros WiFi bindings.
Change will affect out of tree users, like other projects, of this DTS.
Krzysztof Kozlowski [Tue, 25 Feb 2025 09:59:06 +0000 (10:59 +0100)]
arm64: dts: qcom: sm8150-hdk: Switch to undeprecated qcom,calibration-variant
The property qcom,ath10k-calibration-variant was deprecated in favor of
recently introduced generic qcom,calibration-variant, common to all
Qualcomm Atheros WiFi bindings.
Change will affect out of tree users, like other projects, of this DTS.
Krzysztof Kozlowski [Tue, 25 Feb 2025 09:59:05 +0000 (10:59 +0100)]
arm64: dts: qcom: sm6115: Switch to undeprecated qcom,calibration-variant
The property qcom,ath10k-calibration-variant was deprecated in favor of
recently introduced generic qcom,calibration-variant, common to all
Qualcomm Atheros WiFi bindings.
Change will affect out of tree users, like other projects, of this DTS.
Krzysztof Kozlowski [Tue, 25 Feb 2025 09:59:04 +0000 (10:59 +0100)]
arm64: dts: qcom: sda660-ifc6560: Switch to undeprecated qcom,calibration-variant
The property qcom,ath10k-calibration-variant was deprecated in favor of
recently introduced generic qcom,calibration-variant, common to all
Qualcomm Atheros WiFi bindings.
Change will affect out of tree users, like other projects, of this DTS.
Krzysztof Kozlowski [Tue, 25 Feb 2025 09:59:03 +0000 (10:59 +0100)]
arm64: dts: qcom: sdm845: Switch to undeprecated qcom,calibration-variant
The property qcom,ath10k-calibration-variant was deprecated in favor of
recently introduced generic qcom,calibration-variant, common to all
Qualcomm Atheros WiFi bindings.
Change will affect out of tree users, like other projects, of this DTS.
Krzysztof Kozlowski [Tue, 25 Feb 2025 09:59:02 +0000 (10:59 +0100)]
arm64: dts: qcom: sc7180: Switch to undeprecated qcom,calibration-variant
The property qcom,ath10k-calibration-variant was deprecated in favor of
recently introduced generic qcom,calibration-variant, common to all
Qualcomm Atheros WiFi bindings.
Change will affect out of tree users, like other projects, of this DTS.
Krzysztof Kozlowski [Tue, 25 Feb 2025 09:59:01 +0000 (10:59 +0100)]
arm64: dts: qcom: qrb4210-rb2: Switch to undeprecated qcom,calibration-variant
The property qcom,ath10k-calibration-variant was deprecated in favor of
recently introduced generic qcom,calibration-variant, common to all
Qualcomm Atheros WiFi bindings.
Change will affect out of tree users, like other projects, of this DTS.
Krzysztof Kozlowski [Tue, 25 Feb 2025 09:59:00 +0000 (10:59 +0100)]
arm64: dts: qcom: qrb2210-rb1: Switch to undeprecated qcom,calibration-variant
The property qcom,ath10k-calibration-variant was deprecated in favor of
recently introduced generic qcom,calibration-variant, common to all
Qualcomm Atheros WiFi bindings.
Change will affect out of tree users, like other projects, of this DTS.
Krzysztof Kozlowski [Tue, 25 Feb 2025 09:58:59 +0000 (10:58 +0100)]
arm64: dts: qcom: msm8998: Switch to undeprecated qcom,calibration-variant
The property qcom,ath10k-calibration-variant was deprecated in favor of
recently introduced generic qcom,calibration-variant, common to all
Qualcomm Atheros WiFi bindings.
Change will affect out of tree users, like other projects, of this DTS.
Aleksandrs Vinarskis [Wed, 26 Feb 2025 23:12:12 +0000 (00:12 +0100)]
arm64: dts: qcom: x1e80100-qcp: Enable HBR3 on external DPs
When no link frequencies are set, msm/dp driver defaults to HBR2 speed.
Explicitly list supported frequencies including HBR3/8.1Gbps for all
external DisplayPort(s).
Aleksandrs Vinarskis [Wed, 26 Feb 2025 23:12:11 +0000 (00:12 +0100)]
arm64: dts: qcom: x1e80100-hp-x14: Enable HBR3 on external DPs
When no link frequencies are set, msm/dp driver defaults to HBR2 speed.
Explicitly list supported frequencies including HBR3/8.1Gbps for all
external DisplayPort(s).
Aleksandrs Vinarskis [Wed, 26 Feb 2025 23:12:10 +0000 (00:12 +0100)]
arm64: dts: qcom: x1e001de-devkit: Enable HBR3 on external DPs
When no link frequencies are set, msm/dp driver defaults to HBR2 speed.
Explicitly list supported frequencies including HBR3/8.1Gbps for all
external DisplayPort(s).
Aleksandrs Vinarskis [Wed, 26 Feb 2025 23:12:09 +0000 (00:12 +0100)]
arm64: dts: qcom: x1e80100-dell-xps13-9345: Enable external DP support
Particular laptops comes with two USB Type-C ports, both supporting DP
alt mode. Enable output on both of them. Explicitly list supported
frequencies including HBR3/8.1Gbps for all external DisplayPort(s).
Due to support missing in the USB/DisplayPort combo PHY driver,
the external DisplayPort is limited to 2 lanes.
Derived from:
arm64: dts: qcom: x1e80100-t14s: Add external DP support
Nikita Travkin [Thu, 27 Feb 2025 14:26:49 +0000 (19:26 +0500)]
arm64: dts: qcom: sdm845-db845c-navigation-mezzanine: Drop CMA heap
Initially added, the cma heap was supposed to help with libcamera swisp,
however a mistake was made such that the node was never applied as part
of the overlay since the change was added to the overlay root ("/") and
not with a reference to the target dtb root ("&{/}"). Moveover libcamera
doesn't require CMA heap on Qualcomm platforms anymore as it can now use
UDMA buffers instead.
Drop the CMA heap node. This change has no effect on the final dtb.
Nikita Travkin [Thu, 27 Feb 2025 14:26:48 +0000 (19:26 +0500)]
arm64: dts: qcom: qrb5165-rb5-vision-mezzanine: Drop CMA heap
Initially added, the cma heap was supposed to help with libcamera swisp,
however a mistake was made such that the node was never applied as part
of the overlay since the change was added to the overlay root ("/") and
not with a reference to the target dtb root ("&{/}"). Moveover libcamera
doesn't require CMA heap on Qualcomm platforms anymore as it can now use
UDMA buffers instead.
Drop the CMA heap node. This change has no effect on the final dtb.
Stephan Gerhold [Wed, 19 Feb 2025 11:36:21 +0000 (12:36 +0100)]
arm64: dts: qcom: x1e80100: Drop unused passive thermal trip points for CPU
There are currently two passive trip points defined for the CPU, but no
cooling devices are attached to the thermal zones. We don't have support
for cpufreq upstream yet, but actually this is redundant anyway because the
CPU is throttled automatically when reaching high temperatures.
Drop the passive trip points and keep just the critical shutdown as safety
measure in case the throttling fails.
Stephan Gerhold [Wed, 19 Feb 2025 11:36:20 +0000 (12:36 +0100)]
arm64: dts: qcom: x1e80100: Add GPU cooling
Unlike the CPU, the GPU does not throttle its speed automatically when it
reaches high temperatures. With certain high GPU loads it is possible to
reach the critical hardware shutdown temperature of 120°C, endangering the
hardware and making it impossible to run certain applications.
Set up GPU cooling similar to the ACPI tables, by throttling the GPU speed
when reaching 95°C and polling every 200ms.
Cc: stable@vger.kernel.org Fixes: 721e38301b79 ("arm64: dts: qcom: x1e80100: Add gpu support") Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250219-x1e80100-thermal-fixes-v1-3-d110e44ac3f9@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The firmware configures the TSENS controller with a maximum temperature of
120°C. When reaching that temperature, the hardware automatically triggers
a reset of the entire platform. Some of the thermal zones in x1e80100.dtsi
use a critical trip point of 125°C. It's impossible to reach those.
It's preferable to shut down the system cleanly before reaching the
hardware trip point. Make the critical temperature trip points consistent
by setting all of them to 115°C and apply a consistent hysteresis.
The ACPI tables also specify 115°C as critical shutdown temperature.
Cc: stable@vger.kernel.org Fixes: 4e915987ff5b ("arm64: dts: qcom: x1e80100: Enable tsens and thermal zone nodes") Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250219-x1e80100-thermal-fixes-v1-2-d110e44ac3f9@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Stephan Gerhold [Wed, 19 Feb 2025 11:36:18 +0000 (12:36 +0100)]
arm64: dts: qcom: x1e80100: Fix video thermal zone
A passive trip point at 125°C is pretty high, this is usually the
temperature for the critical shutdown trip point. Also, we don't have any
passive cooling devices attached to the video thermal zone.
Change this to be a critical trip point, and add a "hot" trip point at
90°C for consistency with the other thermal zones.
Cc: stable@vger.kernel.org Fixes: 4e915987ff5b ("arm64: dts: qcom: x1e80100: Enable tsens and thermal zone nodes") Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250219-x1e80100-thermal-fixes-v1-1-d110e44ac3f9@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Neil Armstrong [Thu, 27 Feb 2025 09:00:33 +0000 (10:00 +0100)]
arm64: dts: qcom: sm8650: add missing cpu-cfg interconnect path in the mdss node
The bindings requires the mdp0-mem and the cpu-cfg interconnect path,
add the missing cpu-cfg path to fix the dtbs check error and also to ensure
that MDSS has enough bandwidth to let HLOS write config registers.
Neil Armstrong [Thu, 27 Feb 2025 09:00:32 +0000 (10:00 +0100)]
arm64: dts: qcom: sm8550: add missing cpu-cfg interconnect path in the mdss node
The bindings requires the mdp0-mem and the cpu-cfg interconnect path,
add the missing cpu-cfg path to fix the dtbs check error and also to ensure
that MDSS has enough bandwidth to let HLOS write config registers.
Partially revert commit a86d84409947 ("arm64: dts: qcom: qcs8300: add
QCrypto nodes") by dropping the untested QCE device node. Devicetree
bindings test failures were reported on mailing list on 16th of January
and after two weeks still no fixes:
qcs8300-ride.dtb: crypto@1dfa000: compatible: 'oneOf' conditional failed, one must be fixed:
...
'qcom,qcs8300-qce' is not one of ['qcom,ipq4019-qce', 'qcom,sm8150-qce']
Reported-by: Rob Herring <robh@kernel.org> Closes: https://lore.kernel.org/all/CAL_JsqL0HzzGXnCD+z4GASeXNsBxrdw8-qyfHj8S+C2ucK6EPQ@mail.gmail.com/ Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250128115333.95021-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Partially revert commit 7ff3da43ef44 ("arm64: dts: qcom: sa8775p: add
QCrypto nodes") by dropping the untested QCE device node. Devicetree
bindings test failures were reported on mailing list on 16th of January
and after two weeks still no fixes:
sa8775p-ride.dtb: crypto@1dfa000: compatible: 'oneOf' conditional failed, one must be fixed:
...
'qcom,sa8775p-qce' is not one of ['qcom,ipq4019-qce', 'qcom,sm8150-qce']
Reported-by: Rob Herring <robh@kernel.org> Closes: https://lore.kernel.org/all/CAL_JsqJG_w9jyWjVR=QnPuJganG4uj9+9cEXZ__UAiCw2ZYZZA@mail.gmail.com/ Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250128115333.95021-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Neil Armstrong [Wed, 15 Jan 2025 13:44:01 +0000 (14:44 +0100)]
arm64: dts: qcom: sm8650: add QUP serial engines OPP tables
The QUP Serial Engines requires different power domain level
depending on their working frequency, add the required OPP
table with the level associated with all possible frequencies.
For the "I2C Hub" serial engines, sinse they only support a
single Operating Point, only add a single power domain level
property.
Neil Armstrong [Wed, 15 Jan 2025 13:44:00 +0000 (14:44 +0100)]
arm64: dts: qcom: sm8650: add OPP table support to PCIe
The PCIe bus interconnect path can be scaled depending on the
PCIe link established, add the OPP table with all the possible
link speeds and the associated power domain level.
Neil Armstrong [Wed, 15 Jan 2025 13:43:58 +0000 (14:43 +0100)]
arm64: dts: qcom: sm8650: set CPU interconnect paths as ACTIVE_ONLY
In all interconnect paths involving the cpu (MASTER_APPSS_PROC), use
the QCOM_ICC_TAG_ACTIVE_ONLY which will only retain the vote if
the CPU is online, leaving the firmware disabling the path when the
CPUs goes in suspend-idle.
Neil Armstrong [Wed, 15 Jan 2025 13:43:56 +0000 (14:43 +0100)]
arm64: dts: qcom: sm8550: add QUP serial engines OPP tables
The QUP Serial Engines requires different power domain level
depending on their working frequency, add the required OPP
table with the level associated with all possible frequencies.
For the "I2C Hub" serial engines, sinse they only support a
single Operating Point, only add a single power domain level
property.
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