BALATON Zoltan [Fri, 28 Oct 2022 11:56:20 +0000 (13:56 +0200)]
mac_{old|new}world: Avoid else branch by setting default value
Several variables are set in if-else branches where the else branch
can be removed by setting a default value at the variable declaration
which leads to simlpler code that is easier to follow.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <8dac3515b29976a61dacda07752175d7531dca3c.1666957578.git.balaton@eik.bme.hu> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
BALATON Zoltan [Fri, 28 Oct 2022 11:56:17 +0000 (13:56 +0200)]
mac_newworld: Drop some variables
Values not used frequently enough may not worth putting in a local
variable, especially with names almost as long as the original value
because that does not improve readability, to the contrary it makes it
harder to see what value is used. Drop a few such variables. This is
the same clean up that was done for mac_oldworld in commit b8df32555ce5.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <a3ee09dea27af9685fd2ccd2f7ab40a813d6812f.1666957578.git.balaton@eik.bme.hu> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Peter Maydell [Mon, 31 Oct 2022 13:29:01 +0000 (13:29 +0000)]
net/vhost-vdpa.c: Fix clang compilation failure
Commit 8801ccd0500437 introduced a compilation failure with clang
version 10.0.0-4ubuntu1:
../../net/vhost-vdpa.c:654:16: error: variable 'vdpa_device_fd' is
used uninitialized whenever 'if' condition is false
[-Werror,-Wsometimes-uninitialized]
} else if (opts->has_vhostfd) {
^~~~~~~~~~~~~~~~~
../../net/vhost-vdpa.c:662:33: note: uninitialized use occurs here
r = vhost_vdpa_get_features(vdpa_device_fd, &features, errp);
^~~~~~~~~~~~~~
../../net/vhost-vdpa.c:654:12: note: remove the 'if' if its condition
is always true
} else if (opts->has_vhostfd) {
^~~~~~~~~~~~~~~~~~~~~~~
../../net/vhost-vdpa.c:629:23: note: initialize the variable
'vdpa_device_fd' to silence this warning
int vdpa_device_fd;
^
= 0
1 error generated.
It's a false positive -- the compiler doesn't manage to figure out
that the error checks further up mean that there's no code path where
vdpa_device_fd isn't initialized. Put another way, the problem is
that we check "if (opts->has_vhostfd)" when in fact that condition
must always be true. A cleverer static analyser would probably warn
that we were checking an always-true condition.
Fix the compilation failure by removing the unnecessary if().
Fixes: 8801ccd0500437 ("vhost-vdpa: allow passing opened vhostfd to vhost-vdpa") Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20221031132901.1277150-1-peter.maydell@linaro.org> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Mon, 31 Oct 2022 17:01:12 +0000 (13:01 -0400)]
Merge tag 'pull-qemu-20221031' of https://gitlab.com/stweil/qemu into staging
Patches for Windows
# -----BEGIN PGP SIGNATURE-----
#
# iQIzBAABCAAdFiEESSNv6nXJXWmOwreK4Iwh1Wd0UK0FAmNfkC0ACgkQ4Iwh1Wd0
# UK2tEw//QQapqOnJQmjiGVWJ3xUEVoDUmZbhXlPaLKOzSkAnrnIdIO2p4jsXrITi
# LfL8PF7wCg1+oldPsKmhh+ZD6XiUyNBpTt61atXRJS/TybKAGjI33XC+/Hliwity
# 4A0+WxJ960ExLwZzaE/ANTYM86Jo5SqhzACosGh8txRbL1rkmqlrCU1DwnhU6vq1
# 5ph1HFgpqkii43Eiq+v1nmkbh5MWVuMap6MOoQzgwVTkaUU0cTmR8/KqhSHrIryj
# xFPH2wY8pA3vFgMv5OSOjq5Lg197kiWUyhJa6eBBsi4MKnQgRzAxE6yHhpyYZ5EA
# dMW9iLhPVFRDAoQOiSRLj/NA1nl2gwDdjs5WhKqF6AtxMck5IDqltLKFvLlXIxiK
# BYi3ghVeA5LUarcxuAOHse8rCXxBaIJI3aSolO5fDe0mcpNIb7CgCleBKlnBWEsP
# GtRhr1AkoKHcetO5iEfg1QG71/XWdWWy3hfW39GJeBl9C7/AxzoLC7yStI7Iv3b4
# tv/Tylt+Js1KadA9z/tof4wm4NkGf2Q9aFoSbm4pSZH+7b4ZI5LVLlDKYCnjT37v
# LekyJgkU3wRjKdLkM1n6qhsa5Ey2D7STw9ANWQwqOImoj5Dkix2FIqfaydctgrxq
# zmdQpJhOzIO8b9vVSRLn2xYtae5LNlxiAx85r5l11jwfqDOWTts=
# =ZJqu
# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 31 Oct 2022 05:06:53 EDT
# gpg: using RSA key 49236FEA75C95D698EC2B78AE08C21D5677450AD
# gpg: Good signature from "Stefan Weil <sw@weilnetz.de>" [unknown]
# gpg: aka "Stefan Weil (Universitätsbibliothek Mannheim) <stefan.weil@uni-mannheim.de>" [unknown]
# gpg: aka "Stefan Weil <stefan.weil@bib.uni-mannheim.de>" [unknown]
# gpg: aka "Stefan Weil <stefan.weil@weilnetz.de>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 4923 6FEA 75C9 5D69 8EC2 B78A E08C 21D5 6774 50AD
* tag 'pull-qemu-20221031' of https://gitlab.com/stweil/qemu:
block/nfs: Fix 32-bit Windows build
scripts/nsis.py: Automatically package required DLLs of QEMU executables
scripts/nsis.py: Fix destination directory name when invoked on Windows
scripts/nsis.py: Drop the unnecessary path separator
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Mon, 31 Oct 2022 10:36:15 +0000 (06:36 -0400)]
Merge tag 'mips-20221030' of https://github.com/philmd/qemu into staging
MIPS patches queue
- Convert nanoMIPS disassembler from C++ to C (Milica Lazarevic)
- Consolidate VT82xx/PIIX south bridges (Bernhard Beschow)
- Remove unused MAX_IDE_BUS definition (Zoltan Balaton)
- Fix branch displacement for BEQZC/BNEZC (David Daney)
- Don't set link_up for Boston's xilinx-pcie (Jiaxun Yang)
- Use bootloader API to set BAR registers in Malta (Jiaxun Yang)
* tag 'mips-20221030' of https://github.com/philmd/qemu: (55 commits)
hw/mips/malta: Use bootloader helper to set BAR registers
hw/mips: Use bl_gen_kernel_jump to generate bootloaders
hw/mips/bootloader: Allow bl_gen_jump_kernel to optionally set register
hw/mips/boston: Don't set link_up for xilinx-pcie
hw/isa/piix4: Move pci_ide_create_devs() call to board code
hw/isa/piix4: Add missing initialization
hw/isa/Kconfig: Fix dependencies of piix4 southbridge
hw/mips/malta: Reuse dev variable
hw/isa/piix3: Remove unused include
hw/ide/piix: Introduce TYPE_ macros for PIIX IDE controllers
hw/isa/piix4: Rename wrongly named method
hw/isa/piix3: Prefer pci_address_space() over get_system_memory()
hw/isa/piix3: Modernize reset handling
hw/isa/piix3: Add size constraints to rcr_ops
hw/isa/piix3: Remove extra ';' outside of functions
hw/i386/pc: Create DMA controllers in south bridges
disas/mips: Fix branch displacement for BEQZC and BNEZC
disas/nanomips: Rename nanomips.cpp to nanomips.c
disas/nanomips: Remove argument passing by ref
disas/nanomips: Replace Cpp enums for C enums
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Jiaxun Yang [Wed, 26 Oct 2022 19:18:20 +0000 (21:18 +0200)]
hw/mips: Use bl_gen_kernel_jump to generate bootloaders
Replace embedded binary with generated code.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20210127065424.114125-3-jiaxun.yang@flygoat.com>
[PMD: Pass semihosting_get_argc() to bl_gen_jump_kernel()] Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221026191821.28167-3-philmd@linaro.org>
Philippe Mathieu-Daudé [Wed, 26 Oct 2022 19:18:19 +0000 (21:18 +0200)]
hw/mips/bootloader: Allow bl_gen_jump_kernel to optionally set register
When one of the $sp/$a[0..3] register is already set, we might
want bl_gen_jump_kernel() to NOT set it again. Pass a boolean
argument for each register, to allow to optionally set them.
Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221026191821.28167-2-philmd@linaro.org>
Jiaxun Yang [Mon, 24 Oct 2022 14:35:40 +0000 (15:35 +0100)]
hw/mips/boston: Don't set link_up for xilinx-pcie
PCIe port 0 and 1 had link_up set as false previously,
that makes those two ports effectively useless. It can
be annoying for users to find that the device they plug
on those buses won't work at all.
As link_up is true by default, just don't set it again in
boston platform code.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20221024143540.97545-1-jiaxun.yang@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Bernhard Beschow [Sat, 22 Oct 2022 15:04:53 +0000 (17:04 +0200)]
hw/isa/piix4: Move pci_ide_create_devs() call to board code
For the VIA south bridges there was a comment to have the call in board code.
Move it there for PIIX4 as well for consistency.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20221022150508.26830-29-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Bernhard Beschow [Sat, 22 Oct 2022 15:04:52 +0000 (17:04 +0200)]
hw/isa/piix4: Add missing initialization
PIIX3 clears its reset control register, so do the same in PIIX4.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20221022150508.26830-28-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Bernhard Beschow [Sat, 22 Oct 2022 15:04:51 +0000 (17:04 +0200)]
hw/isa/Kconfig: Fix dependencies of piix4 southbridge
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20221022150508.26830-27-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Bernhard Beschow [Sat, 22 Oct 2022 15:04:50 +0000 (17:04 +0200)]
hw/mips/malta: Reuse dev variable
While at it, move the assignments closer to where they are used.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221022150508.26830-26-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221022150508.26830-19-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Bernhard Beschow [Sat, 22 Oct 2022 15:04:33 +0000 (17:04 +0200)]
hw/ide/piix: Introduce TYPE_ macros for PIIX IDE controllers
Suggested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221022150508.26830-9-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Bernhard Beschow [Sat, 22 Oct 2022 15:04:32 +0000 (17:04 +0200)]
hw/isa/piix4: Rename wrongly named method
This method post-loads the southbridge, not the IDE device.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20221022150508.26830-8-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Bernhard Beschow [Sat, 22 Oct 2022 15:04:31 +0000 (17:04 +0200)]
hw/isa/piix3: Prefer pci_address_space() over get_system_memory()
get_system_memory() accesses global state while pci_address_space() uses
whatever has been passed to the device instance, so avoid the global.
Moreover, PIIX4 uses pci_address_space() here as well.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20221022150508.26830-7-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Bernhard Beschow [Sat, 22 Oct 2022 15:04:30 +0000 (17:04 +0200)]
hw/isa/piix3: Modernize reset handling
Rather than registering the reset handler via a function which
appends the handler to a global list, prefer to implement it as
a virtual method - PIIX4 does the same already.
Note that this means that piix3_reset can now also be called writing to
the relevant configuration space register on a PCI bridge.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20221022150508.26830-6-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Bernhard Beschow [Sat, 22 Oct 2022 15:04:29 +0000 (17:04 +0200)]
hw/isa/piix3: Add size constraints to rcr_ops
According to the PIIX3 datasheet, the reset control register is one byte in size.
Moreover, PIIX4 has it, so add it to PIIX3 as well.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20221022150508.26830-5-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Bernhard Beschow [Sat, 22 Oct 2022 15:04:28 +0000 (17:04 +0200)]
hw/isa/piix3: Remove extra ';' outside of functions
Fixes the "extra-semi" clang-tidy check.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20221022150508.26830-4-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Bernhard Beschow [Sat, 22 Oct 2022 15:04:26 +0000 (17:04 +0200)]
hw/i386/pc: Create DMA controllers in south bridges
Just like in the real hardware (and in PIIX4), create the DMA
controllers in the south bridges.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20221022150508.26830-2-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
David Daney [Fri, 14 Oct 2022 11:23:22 +0000 (13:23 +0200)]
disas/mips: Fix branch displacement for BEQZC and BNEZC
disas/mips.c got added in commit 6643d27ea0 ("MIPS disas support")
apparently based on binutils tag 'gdb_6_1-branchpoint' [1].
Back then, MIPSr6 was not supported (added in binutils commit 7361da2c952 during 2014 [2]).
Binutils codebase diverged so much over the last 18 years, it is
not possible to simply cherry-pick their changes, so fix it BEQZC /
BNEZC 21-bit signed branch displacement locally.
Since there's no support for exception handling in C, the try-catch
blocks have been deleted, and throw clauses are replaced. When a runtime
error happens, we're printing out the error message. Disassembling of
the current instruction interrupts. This behavior is achieved by adding
sigsetjmp() to discard further disassembling after the error message
prints and by adding the siglongjmp() function to imitate throwing an
error. The goal was to maintain the same output as it was.
Signed-off-by: Milica Lazarevic <milica.lazarevic@syrmia.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220912122635.74032-22-milica.lazarevic@syrmia.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
This patch expands the Dis_info struct, which should hold the
necessary data for handling runtime errors. Fields fprintf_func and
stream are in charge of error printing. Field buf enables the use of
sigsetjmp() and siglongjmp() functions. Support for runtime error
handling will be added later.
We're filling Dis_info at the entrance of the nanoMIPS disassembler,
i.e. print_insn_nanomips. Next, we're adding that information as an
argument wherever we need to.
Signed-off-by: Milica Lazarevic <milica.lazarevic@syrmia.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220912122635.74032-21-milica.lazarevic@syrmia.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Before this patch, we'd been calling img_format twice, the first time
through the CPR function to get an appropriate string and the second
time to print that formatted string. There's no more need for that.
Therefore, calls to CPR are removed, and now we're directly printing
"CP" and integer value instead.
Signed-off-by: Milica Lazarevic <milica.lazarevic@syrmia.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220912122635.74032-18-milica.lazarevic@syrmia.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Both versions of IMMEDIATE functions have been removed.
Before this patch, we'd been calling img_format twice, the first time
through the IMMEDIATE to get an appropriate string and the second time
to print that string. There's no more need for that. Therefore, calls to
IMMEDIATE are removed, and now we're directly printing the integer
values instead.
Signed-off-by: Milica Lazarevic <milica.lazarevic@syrmia.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220912122635.74032-17-milica.lazarevic@syrmia.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
The return type of typedef disassembly_function is changed to char *
instead of std::string. Therefore, for every particular
disassembly_function function signature is changed.
For example:
- static std::string ABS_D(uint64 instruction, img_address m_pc) {...}
is replaced with
- static char *ABS_D(uint64 instruction, img_address m_pc) {...}
Every helper function used to return std::string is changed to return
const char * or char *. Where the return value points to a static string
that the caller must not free, the return type is const char *. If a
function allocates memory and the caller is required to free it, the
return type is a char *. This applies to the following functions:
img_format, to_string, GPR, save_restore_list, FPR, etc.
Now that we replaced every std::string for const char * or char *, it is
possible to delete multiple versions of the img_format function. The
general version:
- static char *img_format(const char *format, ...) {...}
can handle all string formatting, so others have been deleted.
Where necessary, strings are dynamically allocated with g_strjoinv,
g_strdup, g_strdup_vprintf, and g_strdup_printf. Memory leaking will be
prevented later.
String concatenation in the save_restore_list() function is handled
using g_strjoinv() function instead of += operator.
The type of the "dis" parameter in the Disassemble function is changed
- from std::string &
- to char **
Without applying all of these changes, the nanomips disassembler may be
buildable but can't produce the appropriate output, so all of them are
made together.
Signed-off-by: Milica Lazarevic <milica.lazarevic@syrmia.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220912122635.74032-16-milica.lazarevic@syrmia.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Following functions just wrap the decode_gpr_gpr3() function:
- encode_rs3_and_check_rs3_ge_rt3()
- encode_rs3_and_check_rs3_lt_rt3()
Therefore those have been deleted. Calls to these two functions have
been replaced with calls to decode_gpr_gpr3.
Signed-off-by: Milica Lazarevic <milica.lazarevic@syrmia.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220912122635.74032-15-milica.lazarevic@syrmia.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Header file nanomips.h has been deleted for the nanomips disassembler to
stay consistent with the rest of the disassemblers which don't include
extra header files.
Signed-off-by: Milica Lazarevic <milica.lazarevic@syrmia.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220912122635.74032-12-milica.lazarevic@syrmia.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
The following is moved from the nanomips.h to nanomips.cpp file:
- #include line
- typedefs
- enums
- definition of the Pool struct.
Header file nanomips.h will be deleted to be consistent with the rest of
the disas/ code.
Signed-off-by: Milica Lazarevic <milica.lazarevic@syrmia.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220912122635.74032-11-milica.lazarevic@syrmia.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
NMD class has been deleted. The following methods are now declared as
static functions:
- public NMD::Disassemble method
- private NMD::Disassemble method
- private NMD::extract_op_code_value helper method
Also, the implementation of the print_insn_nanomips function and
nanomips_dis function is moved to the end of the nanomips.cpp file,
right after the implementation of the Disassemble function.
Signed-off-by: Milica Lazarevic <milica.lazarevic@syrmia.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220912122635.74032-10-milica.lazarevic@syrmia.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Pool tables are no longer declared as static fields of the NMD
class but as global static const variables. Pool struct is defined
outside of the class.
The NMD::Disassemble method is using the MAJOR Pool table variable, so
its implementation is moved to the end of the nanomips.cpp file,
right after the initialization of the MAJOR Pool table.
Signed-off-by: Milica Lazarevic <milica.lazarevic@syrmia.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220912122635.74032-9-milica.lazarevic@syrmia.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
NMD class methods with the disassembly_function type like
NMD::ABS_D, NMD::ABS_S, etc. are removed from the class. They're now
declared global static functions. Therefore, typedef of the function
pointer, disassembly_function is defined outside of the class.
Now that disassembly_function type functions are not part of the NMD
class we can't access them using the this pointer. Thus, the use of
the this pointer has been deleted.
Signed-off-by: Milica Lazarevic <milica.lazarevic@syrmia.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220912122635.74032-8-milica.lazarevic@syrmia.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
NMD class methods with the conditional_function type like
NMD::ADDIU_32__cond, NMD::ADDIU_RS5__cond, etc. are removed from the NMD
class. They're now declared global static functions. Therefore, typedef
of the function pointer, conditional_function is defined outside of the
class.
Now that conditional_function type functions are not part of the NMD
class we can't access them using the this pointer. Thus, the use of
the this pointer has been deleted.
Signed-off-by: Milica Lazarevic <milica.lazarevic@syrmia.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220912122635.74032-7-milica.lazarevic@syrmia.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Helper methods from NMD class like NMD::renumber_registers,
NMD::decode_gpr_gpr4... etc. are removed from the class. They're now
declared global static functions.
Following helper methods have been deleted because they're not used by
the nanomips disassembler:
- NMD::encode_msbd_from_pos_and_size,
- NMD::encode_s_from_s_hi,
- NMD::neg_copy
Global functions used by those methods:
- nanomips_dis
- sign_extend
- extract_bits
have also been defined as static global functions.
Signed-off-by: Milica Lazarevic <milica.lazarevic@syrmia.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220912122635.74032-6-milica.lazarevic@syrmia.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
We're deleting the m_pc field of the NMD class. It's now part of the
Dis_info struct that this patch introduces. Currently, the Dis_info
struct has just one field, m_pc, which we need for address calculation
in the ADDRESS function.
We're filling Dis_info at the entrance of the nanoMIPS disassembler.
I.e. print_insn_nanomips. Next, we're adding that information as an
argument wherever we need to.
Since NMD class now has no more fields, the NMD constructor is
also deleted.
Signed-off-by: Milica Lazarevic <milica.lazarevic@syrmia.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220912122635.74032-5-milica.lazarevic@syrmia.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
The m_requested_instruction_categories field always has the same value,
ALL_ATTRIBUTES. The only use of that field is within the if statement.
When replaced with a specific value, the if statement is always false,
so it has been removed.
Now, when the only use of the m_requested_instruction_categories field
is removed, we can delete the field declaration and initialization in
the NMD class. Also, we're changing the way of the construction of the
NMD object in the nanomips_dis function.
Signed-off-by: Milica Lazarevic <milica.lazarevic@syrmia.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220912122635.74032-4-milica.lazarevic@syrmia.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Since there's no namespace feature in C, namespace img has been replaced
with adding the prefix "img" to the namespace members.
Prefix "img" has been added to the function names of functions that used
to be wrapped in namespace img. Those are img::format() functions.
I.e. replaced img::format with the img_format.
Typedef address that used to belong to namespace img now is called
img_address.
Signed-off-by: Milica Lazarevic <milica.lazarevic@syrmia.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220912122635.74032-2-milica.lazarevic@syrmia.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Bernhard Beschow [Thu, 1 Sep 2022 11:41:27 +0000 (13:41 +0200)]
hw/isa/vt82c686: Create rtc-time alias in boards instead
According to good QOM practice, an object should only deal with objects
of its own sub tree. Having devices create an alias on the machine
object doesn't respect this good practice. To resolve this, create the
alias in the machine's code.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220901114127.53914-14-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Bernhard Beschow [Thu, 1 Sep 2022 11:41:26 +0000 (13:41 +0200)]
hw/isa/vt82c686: Embed RTCState in host device
Embed the rtc in the host device, analoguous to the other child devices
and analoguous to PIIX4.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220901114127.53914-13-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Bernhard Beschow [Thu, 1 Sep 2022 11:41:24 +0000 (13:41 +0200)]
hw/isa/vt82c686: Instantiate AC97 and MC97 functions in host device
The AC97 function's wakeup status is wired to the PM function and both
the AC97 and MC97 interrupt routing is determined by the ISA function.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220901114127.53914-11-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Bernhard Beschow [Thu, 1 Sep 2022 11:41:23 +0000 (13:41 +0200)]
hw/isa/vt82c686: Instantiate PM function in host device
The PM controller has activity bits which monitor activity of other
built-in devices in the host device.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220901114127.53914-10-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Bernhard Beschow [Thu, 1 Sep 2022 11:41:22 +0000 (13:41 +0200)]
hw/isa/vt82c686: Instantiate USB functions in host device
The USB functions can be enabled/disabled through the ISA function. Also
its interrupt routing can be influenced there.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220901114127.53914-9-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Bernhard Beschow [Mon, 13 Jun 2022 17:24:55 +0000 (19:24 +0200)]
hw/isa/vt82c686: Instantiate IDE function in host device
The IDE function is closely tied to the ISA function (e.g. the IDE
interrupt routing happens there), so it makes sense that the IDE
function is instantiated within the south bridge itself.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220901114127.53914-7-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Bernhard Beschow [Thu, 1 Sep 2022 11:41:19 +0000 (13:41 +0200)]
hw/isa/vt82c686: Introduce TYPE_VIA_IDE define
Establishes consistency with other (VIA) devices.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220901114127.53914-6-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Bernhard Beschow [Thu, 1 Sep 2022 11:41:18 +0000 (13:41 +0200)]
hw/isa/vt82c686: Reuse errp
Rather than terminating abruptly, make use of the already present errp and
propagate the error to the caller.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220901114127.53914-5-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Bernhard Beschow [Thu, 1 Sep 2022 11:41:17 +0000 (13:41 +0200)]
hw/isa/vt82c686: Prefer pci_address_space() over get_system_memory()
Unlike get_system_memory(), pci_address_space() respects the memory tree
available to the parent device.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220901114127.53914-4-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Bernhard Beschow [Thu, 1 Sep 2022 11:41:16 +0000 (13:41 +0200)]
hw/isa/vt82c686: Resolve unneeded attribute
Now that also the super io device is realized in the common realize method,
the isa_bus attribute can be turned into a temporary.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220901114127.53914-3-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
The object creation now happens in chip-specific init methods which
allows the realize methods to be consolidated into one method. Shifting
the logic into the init methods has the addidional advantage that the
parent object's init methods are called implicitly - like constructors
in object-oriented languages.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220901114127.53914-2-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Stefan Hajnoczi [Mon, 31 Oct 2022 10:28:43 +0000 (06:28 -0400)]
Merge tag 'pull-ppc-20221029' of https://gitlab.com/danielhb/qemu into staging
ppc patch queue for 2022-10-29:
This queue has the second part of the ppc4xx_sdram cleanups, doorbell
instructions for POWER8, new pflash handling for the e500 machine and a
Radix MMU regression fix.
It also has a lot of performance optimizations in the PowerPC emulation
done by the researchers of the Eldorado institute. Between using gvec
for VMX/VSX instructions, a full rework of the interrupt model and PMU
optimizations, they managed to drastically speed up the emulation of
powernv8/9/10 machines. Here's an example with avocado tests:
Other ppc machines, like pseries, also had a noticeable performance
boost.
# -----BEGIN PGP SIGNATURE-----
#
# iHUEABYKAB0WIQQX6/+ZI9AYAK8oOBk82cqW3gMxZAUCY10J/gAKCRA82cqW3gMx
# ZAbjAPwKNbE1wE2POJbMALBQAM5MewwLMV/UKGjE6jA7HAbb/AEA9e3o11FoUmSJ
# rZkmTvMzBQZ81mMGRlS0cnqbrr4ADgc=
# =gnKY
# -----END PGP SIGNATURE-----
# gpg: Signature made Sat 29 Oct 2022 07:09:50 EDT
# gpg: using EDDSA key 17EBFF9923D01800AF2838193CD9CA96DE033164
# gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 17EB FF99 23D0 1800 AF28 3819 3CD9 CA96 DE03 3164
* tag 'pull-ppc-20221029' of https://gitlab.com/danielhb/qemu: (63 commits)
target/ppc: Fix regression in Radix MMU
hw/ppc/e500: Implement pflash handling
hw/sd/sdhci: Rename ESDHC_* defines to USDHC_*
hw/sd/sdhci-internal: Unexport ESDHC defines
hw/block/pflash_cfi0{1, 2}: Error out if device length isn't a power of two
docs/system/ppc/ppce500: Use qemu-system-ppc64 across the board(s)
target/ppc: Increment PMC5 with inline insns
target/ppc: Add new PMC HFLAGS
ppc4xx_sdram: Add errp parameter to ppc4xx_sdram_banks()
ppc4xx_sdram: Convert DDR SDRAM controller to new bank handling
ppc4xx_sdram: Generalise bank setup
ppc4xx_sdram: Rename local state variable for brevity
ppc4xx_sdram: Use hwaddr for memory bank size
ppc4xx_sdram: Move ppc4xx_sdram_banks() to ppc4xx_sdram.c
ppc4xx_devs.c: Move DDR SDRAM controller model to ppc4xx_sdram.c
ppc440_uc.c: Move DDR2 SDRAM controller model to ppc4xx_sdram.c
target/ppc: move the p*_interrupt_powersave methods to excp_helper.c
target/ppc: unify cpu->has_work based on cs->interrupt_request
target/ppc: introduce ppc_maybe_interrupt
target/ppc: remove ppc_store_lpcr from CONFIG_USER_ONLY builds
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Mon, 31 Oct 2022 10:19:53 +0000 (06:19 -0400)]
Merge tag 'pull-request-2022-10-28' of https://gitlab.com/thuth/qemu into staging
* Fix and test the VISTR instruction on s390x
* Some more small s390x fixes and maintainer updates
* Make sure to remove all temporary files from qtests
* OpenBSD VM test update to version 7.2
* Add sndio to FreeBSD tests
* More patches to enable the qtests on Windows
* tag 'pull-request-2022-10-28' of https://gitlab.com/thuth/qemu: (21 commits)
tests/qtest: libqtest: Correct the timeout unit of blocking receive calls for win32
tests/qtest: libqos: Do not build virtio-9p unconditionally
tests/qtest: migration-test: Make sure QEMU process "to" exited after migration is canceled
tests/qtest: libqtest: Introduce qtest_wait_qemu()
tests/qtest: Use EXIT_FAILURE instead of magic number
tests/qtest: device-plug-test: Reverse the usage of double/single quotes
tests/qtest: Support libqtest to build and run on Windows
tests/qtest: Use send/recv for socket communication
accel/qtest: Support qtest accelerator for Windows
tests: Add sndio to the FreeBSD CI containers / VM
tests/vm: update openbsd to release 7.2
tests/qtest/libqos/e1000e: Use e1000_regs.h
tests/qtest/cxl-test: Remove temporary directories after testing
tests/qtest/tpm: Clean up remainders of swtpm
MAINTAINERS: target/s390x/: add Ilya as reviewer
tests/tcg/s390x: Add a test for the vistr instruction
target/s390x: Fix emulation of the VISTR instruction
tests/tcg/s390x: Test compiler flags only once, not every time
s390x/tod-kvm: don't save/restore the TOD in PV guests
s390x: step down as general arch maintainer
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Bin Meng [Thu, 8 Sep 2022 13:28:15 +0000 (21:28 +0800)]
block/nfs: Fix 32-bit Windows build
libnfs.h declares nfs_fstat() as the following for win32:
int nfs_fstat(struct nfs_context *nfs, struct nfsfh *nfsfh,
struct __stat64 *st);
The 'st' parameter should be of type 'struct __stat64'. The
codes happen to build successfully for 64-bit Windows, but it
does not build for 32-bit Windows.
Fixes: 6542aa9c75bc ("block: add native support for NFS") Fixes: 18a8056e0bc7 ("block/nfs: cache allocated filesize for read-only files") Signed-off-by: Bin Meng <bin.meng@windriver.com>
Message-Id: <20220908132817.1831008-6-bmeng.cn@gmail.com> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Stefan Weil <sw@weilnetz.de>
Bin Meng [Thu, 8 Sep 2022 13:28:13 +0000 (21:28 +0800)]
scripts/nsis.py: Automatically package required DLLs of QEMU executables
At present packaging the required DLLs of QEMU executables is a
manual process, and error prone.
Actually build/config-host.mak contains a GLIB_BINDIR variable
which is the directory where glib and other DLLs reside. This
works for both Windows native build and cross-build on Linux.
We can use it as the search directory for DLLs and automate
the whole DLL packaging process.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Message-Id: <20220908132817.1831008-4-bmeng.cn@gmail.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Tested-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Stefan Weil <sw@weilnetz.de>
Bin Meng [Thu, 8 Sep 2022 13:28:12 +0000 (21:28 +0800)]
scripts/nsis.py: Fix destination directory name when invoked on Windows
"make installer" on Windows fails with the following message:
Traceback (most recent call last):
File "G:\msys64\home\foo\git\qemu\scripts\nsis.py", line 89, in <module>
main()
File "G:\msys64\home\foo\git\qemu\scripts\nsis.py", line 34, in main
with open(
OSError: [Errno 22] Invalid argument:
'R:/Temp/tmpw83xhjquG:/msys64/qemu/system-emulations.nsh'
ninja: build stopped: subcommand failed.
Use os.path.splitdrive() to form a canonical path without the drive
letter on Windows. This works with cross-build on Linux too.
Fixes: 8adfeba953e0 ("meson: add NSIS building") Signed-off-by: Bin Meng <bin.meng@windriver.com>
Message-Id: <20220908132817.1831008-3-bmeng.cn@gmail.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Stefan Weil <sw@weilnetz.de>
Bin Meng [Thu, 8 Sep 2022 13:28:11 +0000 (21:28 +0800)]
scripts/nsis.py: Drop the unnecessary path separator
There is no need to append a path separator to the destination
directory that is passed to "make install".
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Message-Id: <20220908132817.1831008-2-bmeng.cn@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Stefan Weil <sw@weilnetz.de>
Stefan Hajnoczi [Sun, 30 Oct 2022 22:31:59 +0000 (18:31 -0400)]
Merge tag 'mem-2022-10-28' of https://github.com/davidhildenbrand/qemu into staging
Hi,
"Host Memory Backends" and "Memory devices" queue ("mem"):
- Fix NVDIMM error message
- Add ThreadContext user-creatable object and wire it up for NUMA-aware
hostmem preallocation
# -----BEGIN PGP SIGNATURE-----
#
# iQJFBAABCAAvFiEEG9nKrXNcTDpGDfzKTd4Q9wD/g1oFAmNbpHARHGRhdmlkQHJl
# ZGhhdC5jb20ACgkQTd4Q9wD/g1pDpw//bG9cyIlzTzDnU5pbQiXyLm0nF9tW/tli
# npGPSbFFYz/72XD9VJSVLhbNHoQSmFcMK5m/DA4WAMdOc5zF7lP3XdZcj72pDyxu
# 31hJRvuRhxNb09jhEdWRfX5+Jg9UyYXuIvtKXHSWgrtaYDtHBdTXq/ojZlvlo/rr
# 36v0jaVaTNRs7dKQL2oaN+DSMiPXHxBzA6FABqYmJNNwuMJT0kkX8pfz0OFwkRn+
# iqf9uRhM6b/fNNB0+ReA7FfGL+hzU6Uv8AvAL3orXUqjwPMRe9Fz2gE7HpFnE6DD
# dOP4Xk2iSSJ5XQA8HwtvrQfrGPh4gPYE80ziK/+8boy3alVeGYbYbvWVtdsNju41
# Cq9kM1wDyjZf6SSUIAbjOrNPdbhwyK4GviVBR1zh+/gA3uF5MhrDtZh4h3mWX2if
# ijmT9mfte4NwF3K1MvckAl7IHRb8nxmr7wjjhJ26JwpD+76lfAcmXC2YOlFGHCMi
# 028mjvThf3HW7BD2LjlQSX4UkHmM2vUBrgMGQKyeMham1VmMfSK32wzvUNfF7xSz
# o9k0loBh7unGcUsv3EbqUGswV5F6AgjK3vWRkDql8dNrdIoapDfaejPCd58kVM98
# 5N/aEoha4bAeJ6NGIKzD+4saiMxUqJ0y2NjSrE8iO4HszXgZW5e1Gbkn4Ae6d37D
# QSSqyfasVHY=
# =bLuc
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 28 Oct 2022 05:44:16 EDT
# gpg: using RSA key 1BD9CAAD735C4C3A460DFCCA4DDE10F700FF835A
# gpg: issuer "david@redhat.com"
# gpg: Good signature from "David Hildenbrand <david@redhat.com>" [unknown]
# gpg: aka "David Hildenbrand <davidhildenbrand@gmail.com>" [full]
# gpg: aka "David Hildenbrand <hildenbr@in.tum.de>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 1BD9 CAAD 735C 4C3A 460D FCCA 4DDE 10F7 00FF 835A
* tag 'mem-2022-10-28' of https://github.com/davidhildenbrand/qemu:
vl: Allow ThreadContext objects to be created before the sandbox option
hostmem: Allow for specifying a ThreadContext for preallocation
util: Make qemu_prealloc_mem() optionally consume a ThreadContext
util: Add write-only "node-affinity" property for ThreadContext
util: Introduce ThreadContext user-creatable object
util: Introduce qemu_thread_set_affinity() and qemu_thread_get_affinity()
util: Cleanup and rename os_mem_prealloc()
hw/mem/nvdimm: fix error message for 'unarmed' flag
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* tag 'pull-error-2022-10-28' of https://repo.or.cz/qemu/armbru:
qerror: QERR_PERMISSION_DENIED is no longer used, drop
qtest: Improve error messages when property can not be set right now
backends: Improve error messages when property can no longer be set
qom: Improve error messages when property has no getter or setter
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Sun, 30 Oct 2022 22:30:00 +0000 (18:30 -0400)]
Merge tag 'net-pull-request' of https://github.com/jasowang/qemu into staging
# -----BEGIN PGP SIGNATURE-----
# Version: GnuPG v1
#
# iQEcBAABAgAGBQJjW2i1AAoJEO8Ells5jWIR5HMIAIvDEmWQ2eZ1R+CfsefXkD5H
# W3RSZbMrOHR6sb9cbYpqK/vWmH8E/jZkKY4n/q7vQ3QerFMeDPgxu0Qn43iElLXS
# iGHhC51fa5IwJNDomjUGI8oJzyk0sxAbgwOjXZ4qbAkk9KeQYWU+JqYghvOrBYbd
# VaIwEiBlECuBy0DKx2gBTfxgeuw3V3WvtjpKeZVRlR+4vLQtI9Goga78qIPfjpH2
# sN/lFhZGaX1FT8DSft0oCCBxCK8ZaNzmMpmr39a8+e4g/EJZC9xbgNkl3fN0yYa5
# P0nluv/Z6e1TZ4FBDaiVFysTS5WnS0KRjUrodzctiGECE3sQiAvkWbKZ+QdGrlw=
# =0/b/
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 28 Oct 2022 01:29:25 EDT
# gpg: using RSA key EF04965B398D6211
# gpg: Good signature from "Jason Wang (Jason Wang on RedHat) <jasowang@redhat.com>" [full]
# Primary key fingerprint: 215D 46F4 8246 689E C77F 3562 EF04 965B 398D 6211
* tag 'net-pull-request' of https://github.com/jasowang/qemu: (26 commits)
net: stream: add QAPI events to report connection state
net: stream: move to QIO to enable additional parameters
qemu-sockets: update socket_uri() and socket_parse() to be consistent
qemu-sockets: move and rename SocketAddress_to_str()
net: dgram: add unix socket
net: dgram: move mcast specific code from net_socket_fd_init_dgram()
net: dgram: make dgram_dst generic
net: stream: add unix socket
net: stream: Don't ignore EINVAL on netdev socket connection
net: socket: Don't ignore EINVAL on netdev socket connection
qapi: net: add stream and dgram netdevs
net: introduce qemu_set_info_str() function
qapi: net: introduce a way to bypass qemu_opts_parse_noisily()
net: simplify net_client_parse() error management
net: remove the @errp argument of net_client_inits()
net: introduce convert_host_port()
vhost: Accept event idx flag
vhost: use avail event idx on vhost_svq_kick
vhost: toggle device callbacks using used event idx
vhost: allocate event_idx fields on vring
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Sun, 30 Oct 2022 19:15:12 +0000 (15:15 -0400)]
Merge tag 'for-upstream' of https://repo.or.cz/qemu/kevin into staging
Block layer patches
- Cleanup bs->backing and bs->file handling
- Refactor bdrv_try_set_aio_context using transactions
- Changes for improved coroutine_fn consistency
- vhost-user-blk: fix the resize crash
- io_uring: Use of io_uring_register_ring_fd() led to breakage, revert
- vvfat: Fix some problems with r/w mode
- Code cleanup
- MAINTAINERS: Fold "Block QAPI, monitor, ..." into "Block layer core"
* tag 'misc-next-pull-request' of https://gitlab.com/berrange/qemu:
crypto: add test cases for many malformed LUKS header scenarios
crypto: ensure LUKS tests run with GNUTLS crypto provider
crypto: quote algorithm names in error messages
crypto: split off helpers for converting LUKS header endianess
crypto: split LUKS header definitions off into file
crypto: check that LUKS PBKDF2 iterations count is non-zero
crypto: strengthen the check for key slots overlapping with LUKS header
crypto: validate that LUKS payload doesn't overlap with header
crypto: enforce that key material doesn't overlap with LUKS header
crypto: enforce that LUKS stripes is always a fixed value
crypto: sanity check that LUKS header strings are NUL-terminated
tests: avoid DOS line endings in PSK file
crypto: check for and report errors setting PSK credentials
scripts: check if .git exists before checking submodule status
seccomp: Get actual errno value from failed seccomp functions
io/channel-watch: Fix socket watch on Windows
io/channel-watch: Drop the unnecessary cast
io/channel-watch: Drop a superfluous '#ifdef WIN32'
util/qemu-sockets: Use g_get_tmp_dir() to get the directory for temporary files
crypto/luks: Support creating LUKS image on Darwin
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* tag 'block-pull-request' of https://gitlab.com/stefanha/qemu:
virtio-blk: use BDRV_REQ_REGISTERED_BUF optimization hint
blkio: implement BDRV_REQ_REGISTERED_BUF optimization
stubs: add qemu_ram_block_from_host() and qemu_ram_get_fd()
exec/cpu-common: add qemu_ram_get_fd()
block: add BlockRAMRegistrar
numa: use QLIST_FOREACH_SAFE() for RAM block notifiers
block: return errors from bdrv_register_buf()
block: add BDRV_REQ_REGISTERED_BUF request flag
block: use BdrvRequestFlags type for supported flag fields
block: pass size to bdrv_unregister_buf()
numa: call ->ram_block_removed() in ram_block_notifer_remove()
blkio: add libblkio block driver
coroutine: add flag to re-queue at front of CoQueue
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Sun, 30 Oct 2022 19:07:14 +0000 (15:07 -0400)]
Merge tag 'qga-pull-2022-10-26' of https://github.com/kostyanf14/qemu into staging
qga-pull-2022-10-26
# -----BEGIN PGP SIGNATURE-----
#
# iQIzBAABCgAdFiEEwsLBCepDxjwUI+uE711egWG6hOcFAmNZcDMACgkQ711egWG6
# hOdRPQ/8D5T9GpkC+Ar9GLlx/DZFZx0+FxdolV06TcuSXTz3SXYtVKJUSaLjW3SF
# ZRMbBYxqO1NKXWfe8kPKzSR7lJY9fBdn75AUbN88iYW7xu2x+A8LNskVOanu8vbo
# eqcjO1x3sStzdZHfA4uFUsF7J9A2zqflmZxTMWm1UDt1HTklAJLPkb/E6DnVc3Rp
# WhI89JWvAZBOZoVBq7MyfBPEyf3KibHHMWENVY7vGmmXaw9EJQYpXNEMTeBP1VI3
# tTLxrr8WoGr5w2K4a3Kku2ixD+IOPPWXbZXmSjAGgOwiVSkORwMbUVHnN/A11O3O
# b8XOGZ5LkFjgORTsm9ePxXJvcHlsxWZIb80ZnZA9oGF/33S7RbW1Kcl6OAVGdm0S
# ZzysqPLPJStxuUvesqmFfGkvZ29EHNlWjrIfXQz5mnlDsnOi/0Bus0vNjc/kBNPF
# KfHW6MNw4A2gmVcrNg2f2rlYveHa6e+4XsS5xJJ74WDMHWxMZRaFXyO+qU6p7lEJ
# I5pLD9oEM856y2CpQJpoJnZ6ddLEag652x08WpCFMI76x5XLN8D0lszlgJghR7M7
# 84TKSF6HBvrMS+jQc3xZZlK7ELSluKtUFnSTkNZg9WiuQC/FS+7XRcC6lek1qBAL
# WVsKL5UwM/Eyq+O/B8R7w6TEWFxnEFmjddq1rD6kH8LYx1Lmt4M=
# =h41f
# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 26 Oct 2022 13:36:51 EDT
# gpg: using RSA key C2C2C109EA43C63C1423EB84EF5D5E8161BA84E7
# gpg: Good signature from "Kostiantyn Kostiuk (Upstream PR sign) <kkostiuk@redhat.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: C2C2 C109 EA43 C63C 1423 EB84 EF5D 5E81 61BA 84E7
* tag 'qga-pull-2022-10-26' of https://github.com/kostyanf14/qemu:
qga: add channel path to error messages
qga: Add HW address getting for FreeBSD
qga: Move HW address getting to a separate function
qga: Add support for user password setting in FreeBSD
qga: Add shutdown/halt/reboot support for FreeBSD
qga: Add UFS freeze/thaw support for FreeBSD
qga: Move Linux-specific FS freeze/thaw code to a separate file
qga: Add initial FreeBSD support
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Leandro Lupori [Fri, 28 Oct 2022 18:36:17 +0000 (15:36 -0300)]
target/ppc: Fix regression in Radix MMU
Commit 47e83d9107 ended up unintentionally changing the control flow
of ppc_radix64_process_scoped_xlate(). When guest_visible is false,
it must not raise an exception, even if the radix configuration is
not valid.
This regression prevented Linux boot in a nested environment with
L1 using TCG and emulating KVM (cap-nested-hv=on) and L2 using
KVM. L2 would hang on Linux's futex_init(), when it tested how a
futex_atomic_cmpxchg_inatomic() handled a fault, because L1 would
start a loop of trying to perform partition scoped translations
and raising exceptions.
Fixes: 47e83d9107 ("target/ppc: Improve Radix xlate level validation") Reported-by: Victor Colombo <victor.colombo@eldorado.org.br> Signed-off-by: Leandro Lupori <leandro.lupori@eldorado.org.br> Tested-by: Víctor Colombo <victor.colombo@eldorado.org.br> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20221028183617.121786-1-leandro.lupori@eldorado.org.br>
[danielhb: use %"PRIu64" to print 'nls'] Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Bernhard Beschow [Tue, 18 Oct 2022 21:01:44 +0000 (23:01 +0200)]
hw/ppc/e500: Implement pflash handling
Allows e500 boards to have their root file system reside on flash using
only builtin devices located in the eLBC memory region.
Note that the flash memory area is only created when a -pflash argument is
given, and that the size is determined by the given file. The idea is to
put users into control.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221018210146.193159-6-shentey@gmail.com>
[danielhb: use memory_region_size() in mmio_size] Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Bernhard Beschow [Tue, 18 Oct 2022 21:01:43 +0000 (23:01 +0200)]
hw/sd/sdhci: Rename ESDHC_* defines to USDHC_*
The device model's functions start with "usdhc_", so rename the defines
accordingly for consistency.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-Id: <20221018210146.193159-5-shentey@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Bernhard Beschow [Tue, 18 Oct 2022 21:01:42 +0000 (23:01 +0200)]
hw/sd/sdhci-internal: Unexport ESDHC defines
These defines aren't used outside of sdhci.c, so can be defined there.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20221018210146.193159-4-shentey@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Bernhard Beschow [Tue, 18 Oct 2022 21:01:41 +0000 (23:01 +0200)]
hw/block/pflash_cfi0{1, 2}: Error out if device length isn't a power of two
According to the JEDEC standard the device length is communicated to an
OS as an exponent (power of two).
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20221018210146.193159-3-shentey@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Bernhard Beschow [Tue, 18 Oct 2022 21:01:40 +0000 (23:01 +0200)]
docs/system/ppc/ppce500: Use qemu-system-ppc64 across the board(s)
The documentation suggests that there is a qemu-system-ppc32 binary
while the 32 bit version is actually just named qemu-system-ppc. Settle
on qemu-system-ppc64 which also works for 32 bit machines and causes
less clutter in the documentation.
Found-by: BALATON Zoltan <balaton@eik.bme.hu> Suggested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20221018210146.193159-2-shentey@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Leandro Lupori [Tue, 25 Oct 2022 20:24:24 +0000 (17:24 -0300)]
target/ppc: Increment PMC5 with inline insns
Profiling QEMU during Fedora 35 for PPC64 boot revealed that
6.39% of total time was being spent in helper_insns_inc(), on a
POWER9 machine. To avoid calling this helper every time PMCs had
to be incremented, an inline implementation of PMC5 increment and
check for overflow was developed. This led to a reduction of
about 12% in Fedora's boot time.
Signed-off-by: Leandro Lupori <leandro.lupori@eldorado.org.br> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20221025202424.195984-4-leandro.lupori@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
BALATON Zoltan [Wed, 19 Oct 2022 16:02:58 +0000 (18:02 +0200)]
ppc4xx_sdram: Convert DDR SDRAM controller to new bank handling
Use the generic bank handling introduced in previous patch in the DDR
SDRAM controller too. This also fixes previously broken region unmap
due to sdram_ddr_unmap_bcr() ignoring container region so it crashed
with an assert when the guest tried to disable the controller.
BALATON Zoltan [Wed, 19 Oct 2022 16:02:57 +0000 (18:02 +0200)]
ppc4xx_sdram: Generalise bank setup
Currently only base and size are set on initial bank creation and bcr
value is computed on mapping the region. Set bcr at init so the bcr
encoding method becomes local to the controller model and mapping and
unmapping can operate on the bank so it can be shared between
different controller models. This patch converts the DDR2 controller.
BALATON Zoltan [Wed, 19 Oct 2022 16:02:56 +0000 (18:02 +0200)]
ppc4xx_sdram: Rename local state variable for brevity
Rename the sdram local state variable to s in dcr read/write functions
and reset methods for better readability and to match realize methods.
Other places not converted will be changed or removed in subsequent
patches.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <8e7539cb1fccd7556b68351c4dcf62534c3a69cf.1666194485.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Matheus Ferst [Fri, 21 Oct 2022 14:21:55 +0000 (11:21 -0300)]
target/ppc: unify cpu->has_work based on cs->interrupt_request
Now that cs->interrupt_request indicates if there is any unmasked
interrupt, checking if the CPU has work to do can be simplified to a
single check that works for all CPU models.
Matheus Ferst [Fri, 21 Oct 2022 14:21:54 +0000 (11:21 -0300)]
target/ppc: introduce ppc_maybe_interrupt
This new method will check if any pending interrupt was unmasked and
then call cpu_interrupt/cpu_reset_interrupt accordingly. Code that
raises/lowers or masks/unmasks interrupts should call this method to
keep CPU_INTERRUPT_HARD coherent with env->pending_interrupts.
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20221021142156.4134411-2-matheus.ferst@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
projects / qemu-nvme.git / log