Ben Skeggs [Tue, 21 Jul 2020 01:34:07 +0000 (11:34 +1000)]
drm/nouveau/kms/nv50-: implement proper push buffer control logic
We had a, what was supposed to be temporary, hack in the KMS code where we'd
completely drain an EVO/NVD channel's push buffer when wrapping to the start
again, instead of treating it as a ring buffer.
Ben Skeggs [Fri, 19 Jun 2020 21:52:26 +0000 (07:52 +1000)]
drm/nouveau/kms/nv50-: wrap existing command submission in nvif_push interface
This commit pulls in a bunch of new push buffer macros which are able to
support NVIDIA's class headers, and provide more useful debug output and
error checking (compile-time, where possible) than we had previously.
Will incrementally transition each function over to the unified interfaces.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
Gustavo A. R. Silva [Tue, 7 Jul 2020 17:36:28 +0000 (12:36 -0500)]
drm/nouveau: Use fallthrough pseudo-keyword
Replace the existing /* fall through */ comments and its variants with
the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary
fall-through markings when it is the case.
The nvif_object_ioctl() method NVIF_VMM_V0_PFNMAP wasn't correctly
setting the hardware specific GPU page table entries for 2MB sized
pages. Fix this by adding functions to set and clear PD0 GPU page
table entries.
Signed-off-by: Ralph Campbell <rcampbell@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Aditya Pakki [Sun, 14 Jun 2020 01:48:37 +0000 (20:48 -0500)]
drm/nouveau: fix reference count leak in nouveau_debugfs_strap_peek
nouveau_debugfs_strap_peek() calls pm_runtime_get_sync() that
increments the reference count. In case of failure, decrement the
ref count before returning the error.
Signed-off-by: Aditya Pakki <pakki001@umn.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Aditya Pakki [Sun, 14 Jun 2020 01:22:23 +0000 (20:22 -0500)]
drm/nouveau: Fix reference count leak in nouveau_connector_detect
nouveau_connector_detect() calls pm_runtime_get_sync and in turn
increments the reference count. In case of failure, decrement the
ref count before returning the error.
Signed-off-by: Aditya Pakki <pakki001@umn.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Aditya Pakki [Sun, 14 Jun 2020 01:29:18 +0000 (20:29 -0500)]
drm/nouveau: fix reference count leak in nv50_disp_atomic_commit
nv50_disp_atomic_commit() calls calls pm_runtime_get_sync and in turn
increments the reference count. In case of failure, decrement the
ref count before returning the error.
Signed-off-by: Aditya Pakki <pakki001@umn.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Aditya Pakki [Sun, 14 Jun 2020 01:41:56 +0000 (20:41 -0500)]
drm/nouveau: fix multiple instances of reference count leaks
On calling pm_runtime_get_sync() the reference count of the device
is incremented. In case of failure, decrement the
ref count before returning the error.
Signed-off-by: Aditya Pakki <pakki001@umn.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Aditya Pakki [Sun, 14 Jun 2020 01:33:42 +0000 (20:33 -0500)]
drm/nouveau/drm/noveau: fix reference count leak in nouveau_fbcon_open
nouveau_fbcon_open() calls calls pm_runtime_get_sync() that
increments the reference count. In case of failure, decrement the
ref count before returning the error.
Signed-off-by: Aditya Pakki <pakki001@umn.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 16 Jun 2020 05:15:58 +0000 (15:15 +1000)]
drm/nouveau/pmu/gm20x: don't pretend we support loading with our custom FW
It technically loads, and runs, but is ultimately pointless outside of
a very narrow window (fanless systems where one wants to attempt using
the, broken for a lot of gm20x, memory reclocking code).
It's also potentially dangerous to override the VBIOS-provided "Pre-OS"
PMU, which would be responsible for fan control otherwise.
Ben Skeggs [Tue, 16 Jun 2020 04:57:31 +0000 (14:57 +1000)]
drm/nouveau/acr: store a mask of LS falcons the controlling LSFW can bootstrap
This will prevent some pain with broken firmware trees, as under some
circumstances the HSFW can fail and leave the GPU in a state we don't
know how to recover from.
This causes us to invalidate MMU only at the level we made modifications -
ie: if we've only modified PTEs, there's no need to have MMU dump the PDs
it's fetched into L2.
Timur Tabi [Tue, 9 Jun 2020 12:52:04 +0000 (07:52 -0500)]
drm/nouveau/nvfw: firmware structures should begin with nvfw_
Rename all structures that are used directly by firmware to have a nvfw_
prefix.
This makes it easier to identify structures that have a fixed, specific
layout. A future patch will define several more such structures, so it's
important to be consistent now.
Signed-off-by: Timur Tabi <ttabi@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
nvkm_timer_wait_init() takes a u64 as a duration parameter, but the
expression "(m) * 1000" will be promoted only to a 32-bit integer,
if 'm' is also an integer. Changing the 1000 to 1000ULL ensures that
the expression will be 64 bits.
This change currently has no effect as there are no callers of
nvkm_msec() that exceed 2000ms.
Signed-off-by: Timur Tabi <ttabi@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Dave Airlie [Thu, 23 Jul 2020 23:38:44 +0000 (09:38 +1000)]
Merge tag 'drm/tegra/for-5.9-rc1' of ssh://git.freedesktop.org/git/tegra/linux into drm-next
drm/tegra: Changes for v5.9-rc1
This set of patches contains a few preparatory patches to enable video
capture support from external camera modules. This is a dependency for
the V4L2 driver patches that will likely be merged in v5.9 or v5.10.
On top of that there are a couple of fixes across the board as well as
some improvements.
From a feature point of view this also adds support for horizontal
reflection and 180° rotation of planes.
Dave Airlie [Thu, 23 Jul 2020 05:38:10 +0000 (15:38 +1000)]
Merge tag 'amd-drm-next-5.9-2020-07-17' of git://people.freedesktop.org/~agd5f/linux into drm-next
amd-drm-next-5.9-2020-07-17:
amdgpu:
- SI UVD/VCE clock support
- Updates for Sienna Cichlid
- Expose drm rotation property
- Atomfirmware updates for renoir
- updates to GPUVM hub handling for different register layouts
- swSMU restructuring and cleanups
- RAS fixes
- DC fixes
- mode1 reset support for Sienna Cichlid
- Add support for Navy Flounder GPUs
amdkfd:
- Add SMI events watch interface
UAPI:
- Add amdkfd SMI events watch interface
Userspace which uses this interface:
https://github.com/RadeonOpenCompute/rocm_smi_lib/commit/2235ede34c456f1c7d3490f6fe74825d442d272e
projects / users / jedix / linux-maple.git / log