It seems that clock-output-names for the USB3 QMP PHY-s where set without
actually checking what is the GCC clock driver expecting, so clock core
could never actually find the parents for usb0_pipe_clk_src and
usb1_pipe_clk_src clocks in the GCC driver.
So, correct the names to be what the driver expects so that parenting
works.
Before:
gcc_usb0_pipe_clk_src 0 0 0 125000000 0 0 50000 Y
gcc_usb1_pipe_clk_src 0 0 0 125000000 0 0 50000 Y
After:
usb3phy_0_cc_pipe_clk 1 1 0 125000000 0 0 50000 Y
usb0_pipe_clk_src 1 1 0 125000000 0 0 50000 Y
gcc_usb0_pipe_clk 1 1 0 125000000 0 0 50000 Y
usb3phy_1_cc_pipe_clk 1 1 0 125000000 0 0 50000 Y
usb1_pipe_clk_src 1 1 0 125000000 0 0 50000 Y
gcc_usb1_pipe_clk 1 1 0 125000000 0 0 50000 Y
Fixes: 5e09bc51d07b ("arm64: dts: ipq8074: enable USB support") Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230108130440.670181-2-robimarko@gmail.com
Jasper Korten [Sat, 7 Jan 2023 14:19:10 +0000 (19:19 +0500)]
arm64: dts: qcom: Add device tree for Samsung Galaxy Tab A 9.7 (2015)
The Galaxy Tab A 9.7 (2015) is a Snapdragon 410 based tablet.
This commit introduces basic support for the tablet including the
following features:
- SDHCI (internal and external storage)
- USB Device Mode
- UART
- Regulators
- WCNSS (WiFi/BT)
- GPIO keys
- Fuel gauge
- Touchscreen
- Accelerometer
Part of the DT is split out into a common dtsi since the tablet shares
majority of the design with another variant having a different screen
size.
Brian Masney [Tue, 3 Jan 2023 18:22:29 +0000 (13:22 -0500)]
arm64: dts: qcom: sc8280xp: add rng device tree node
Add the necessary device tree node for qcom,prng-ee so we can use the
hardware random number generator. This functionality was tested on a
SA8540p automotive development board using kcapi-rng from libkcapi.
Brian Masney [Tue, 3 Jan 2023 18:22:28 +0000 (13:22 -0500)]
arm64: dts: qcom: sc8280xp: add aliases for i2c4 and i2c21
Add aliases for i2c4 and i2c21 to the crd and x13s DTS files so that
what's exposed to userspace doesn't change in the future if additional
i2c buses are enabled on these platforms.
Brian Masney [Tue, 3 Jan 2023 18:22:27 +0000 (13:22 -0500)]
arm64: dts: qcom: sa8540p-ride: add i2c nodes
Add the necessary nodes in order to get i2c0, i2c1, i2c12, i2c15, and
i2c18 functioning on the automotive board and exposed to userspace.
This work was derived from various patches that Qualcomm delivered
to Red Hat in a downstream kernel. This change was validated by using
i2c-tools 4.3.3 on CentOS Stream 9:
Brian Masney [Tue, 3 Jan 2023 18:22:24 +0000 (13:22 -0500)]
arm64: dts: qcom: sc8280xp: rename qup0_i2c4 to i2c4
In preparation for adding the missing SPI and I2C nodes to
sc8280xp.dtsi, it was decided to rename all of the existing qupX_
uart, spi, and i2c nodes to drop the qupX_ prefix. Let's go ahead
and rename qup0_i2c4 to i2c4.
Note that some nodes are moved in the file by this patch to preserve
the expected sort order in the file. Additionally, the properties
within the pinctrl state node are sorted to match the expected order
that's typically done in other DTs.
Brian Masney [Tue, 3 Jan 2023 18:22:23 +0000 (13:22 -0500)]
arm64: dts: qcom: sc8280xp: rename qup2_i2c5 to i2c21
In preparation for adding the missing SPI and I2C nodes to
sc8280xp.dtsi, it was decided to rename all of the existing qupX_
uart, spi, and i2c nodes to drop the qupX_ prefix. Let's go ahead
and rename qup2_i2c5 to i2c21. Under the old name, this was the 5th
index under qup2, which starts at index 16.
Note that some nodes are moved in the file by this patch to preserve
the expected sort order in the file. Additionally, the properties
within the pinctrl state node are sorted to match the expected order
that's typically done in other DTs.
Brian Masney [Tue, 3 Jan 2023 18:22:22 +0000 (13:22 -0500)]
arm64: dts: qcom: sc8280xp: rename qup2_uart17 to uart17
In preparation for adding the missing SPI and I2C nodes to
sc8280xp.dtsi, it was decided to rename all of the existing qupX_
uart, spi, and i2c nodes to drop the qupX_ prefix. Let's go ahead
and rename qup2_uart17 to uart17. Note that some nodes are moved in the
file by this patch to preserve the expected sort order in the file.
Konrad Dybcio [Mon, 2 Jan 2023 09:46:29 +0000 (10:46 +0100)]
arm64: dts: qcom: ipq6018: Add/remove some newlines
Some lines were broken very aggresively, presumably to fit under 80 chars
and some places could have used a newline, particularly between subsequent
nodes. Address all that and remove redundant comments near PCIe ranges
while at it so as not to exceed 100 chars needlessly.
Abel Vesa [Wed, 18 Jan 2023 23:05:26 +0000 (01:05 +0200)]
arm64: dts: qcom: sm8550-mtp: Add PCIe PHYs and controllers nodes
Enable PCIe controllers and PHYs nodes on SM8550 MTP board.
Co-developed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230118230526.1499328-3-abel.vesa@linaro.org
This adds support for the aDSP, cDSP and MPSS Subsystems found in
the SM8550 SoC.
The aDSP, cDSP and MPSS needs:
- smp2p nodes to get event back from the subsystems
- remoteproc nodes with glink-edge subnodes providing all needed
resources to start and run the subsystems
In addition, the MPSS Subsystem needs a rmtfs_mem dedicated
memory zone.
Pavankumar Kondeti [Tue, 17 Jan 2023 09:35:33 +0000 (15:05 +0530)]
arm64: dts: qcom: sm8550: fix xo clock source in cpufreq-hw node
Currently, available frequencies for all CPUs are appearing as 2x
of the actual frequencies. Use xo clock source as bi_tcxo in the
cpufreq-hw node to fix this.
Lin, Meng-Bo [Fri, 6 Jan 2023 14:31:19 +0000 (14:31 +0000)]
arm64: dts: qcom: msm8916-samsung-j5-common: Add new device trees
After moving msm8916-samsung-j5.dts to msm8916-samsung-j5-common.dtsi,
Add new J5 2016 device tree.
[Add j5x device tree]
Co-developed-by: Josef W Menad <JosefWMenad@protonmail.ch> Signed-off-by: Josef W Menad <JosefWMenad@protonmail.ch>
[Use &pm8916_usbin as USB extcon and add chassis-type for j5x] Co-developed-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
[Use common init device tree] Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230106143024.547194-1-linmengbo0689@protonmail.com
Move msm8916-samsung-j5.dts to msm8916-samsung-j5-common.dtsi, and add
a common device tree for with initial support for:
- GPIO keys
- SDHCI (internal and external storage)
- USB Device Mode
- UART (on USB connector via the SM5703 MUIC)
- WCNSS (WiFi/BT)
- Regulators
The two devices (all other variants of J5 released in 2015 and J5X
released in 2016) are very similar, with some differences in display and
GPIO pins. The common parts are shared in msm8916-samsung-j5-common.dtsi
to reduce duplication.
This patch rewrites J5 2015 devices, later patches will add support for
other models.
Konrad Dybcio [Wed, 4 Jan 2023 17:16:42 +0000 (18:16 +0100)]
arm64: dts: qcom: sm6350: Set up DDR & L3 scaling
Add the CPU OPP tables including core frequency and L3 bus frequency.
The L3 throughput values were chosen by studying the frequencies
available in HW LUT and picking the highest one that's less than the
CPU frequency. DDR clock rates come from the vendor kernel.
Alex Elder [Sat, 31 Dec 2022 00:27:16 +0000 (18:27 -0600)]
arm64: dts: qcom: use qcom,gsi-loader for IPA
Depending on the platform, either the modem or the AP must load GSI
firmware for IPA before it can be used. To date, this has been
indicated by the presence or absence of a "modem-init" property.
That mechanism has been deprecated. Instead, we indicate how GSI
firmware should be loaded by the value of the "qcom,gsi-loader"
property.
Update all arm64 platforms that use IPA to use the "qcom,gsi-loader"
property to specify how the GSI firmware is loaded.
Update the affected nodes so the status property is last.
Signed-off-by: Alex Elder <elder@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
[bjorn: Moved sc7280 change herobrine-lte-sku] Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221231002716.2367375-3-elder@linaro.org
Krzysztof Kozlowski [Fri, 30 Dec 2022 13:56:45 +0000 (14:56 +0100)]
arm64: dts: qcom: sc7280-idp: add amp pin config function
Bindings expect each pin config to come with a "function" property:
sc7280-crd-r3.dtb: pinctrl@f100000: amp-en-state: 'oneOf' conditional failed, one must be fixed:
'function' is a required property
'bias-pull-down', 'drive-strength', 'pins' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+'
Fixes: 976d321f32dc ("arm64: dts: qcom: msm8992: Make the DT an overlay on top of 8994") Signed-off-by: Petr Vorel <petr.vorel@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221226185440.440968-3-pevik@seznam.cz
Original google firmware reports 12 MiB:
[ 0.000000] cma: Found cont_splash_mem@0, memory base 0x0000000003400000, size 12 MiB, limit 0xffffffffffffffff
which is actually 12*1024*1024 = 0xc00000.
This matches the aosp source [1]:
&cont_splash_mem {
reg = <0 0x03400000 0 0xc00000>;
};
Fixes: 3cb6a271f4b0 ("arm64: dts: qcom: msm8992-bullhead: Fix cont_splash_mem mapping") Fixes: 976d321f32dc ("arm64: dts: qcom: msm8992: Make the DT an overlay on top of 8994")
[1] https://android.googlesource.com/kernel/msm.git/+/android-7.0.0_r0.17/arch/arm64/boot/dts/lge/msm8992-bullhead.dtsi#141
Bjorn Andersson [Wed, 18 Jan 2023 22:59:11 +0000 (16:59 -0600)]
Merge tag 'qcom-arm64-fixes-for-6.2' into arm64-for-6.3
Qualcomm ARM64 DTS fixes for 6.2
The cluster idle issue was resolved on SM8250, so the change disabling
the cluster state is being reverted.
Issues where identified with the QMP PHY binding, that would prevent
enablement of Displayport and it was decided not to support the old
binding for the recently introduced SC8280XP, which broke USB. This
adjusts the USB PHY nodes to the new binding. The reset signal for the
first QMP PHY is corrected as well.
The reserved memory map is updated on Xiaomi Mi 4C and Huawei Nexus 6P,
to avoid instabilities caused by use of protected memory regions.
The compatible for the MSM8992 TCSR mutex is corrected as well.
Lastly SDHCI interconnects on SM8350 are corrected to match the
providers #interconnect-cells.
Growing the CMA region and querying /proc/meminfo indicates that a newly
booted system (currently) uses 64MB CMA.
Define a memory region sufficiently large for the current use cases, to
avoid forcing users to add this themselves, through command line
parameters etc.
While fixing the CRD define the same region for the X13s.
Johan Hovold [Tue, 3 Jan 2023 10:31:36 +0000 (11:31 +0100)]
arm64: dts: qcom: sc8280xp: disable sound nodes
The sound nodes in the SoC dtsi should be disabled by default.
Note that the lpass-tlmm and macro blocks depend on having the board dts
enable the adsp and specifying an appropriate firmware to enable the
q6prm clock controller.
Krzysztof Kozlowski [Wed, 18 Jan 2023 09:42:23 +0000 (10:42 +0100)]
arm64: dts: qcom: sc8280xp: drop bogus clock-controller property
There is no "clock-controller" property:
sa8295p-adp.dtb: service@2: clock-controller: 'clock-controller' does not match any of the regexes: 'pinctrl-[0-9]+'
From schema: Documentation/devicetree/bindings/sound/qcom,q6prm.yaml
Kuogee Hsieh [Tue, 27 Dec 2022 17:44:59 +0000 (09:44 -0800)]
arm64: dts: qcom: add data-lanes and link-freuencies into dp_out endpoint
Move data-lanes property from mdss_dp node to dp_out endpoint. Also
add link-frequencies property into dp_out endpoint as well. The last
frequency specified at link-frequencies will be the max link rate
supported by DP.
Krzysztof Kozlowski [Tue, 27 Dec 2022 16:31:57 +0000 (17:31 +0100)]
arm64: dts: qcom: sm8350: drop unused dispcc power-domain-names
Display clock controller bindings do not allow power-domain-names:
sm8350-hdk.dtb: clock-controller@af00000: 'power-domain-names' does not match any of the regexes: 'pinctrl-[0-9]+'
From schema: Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml
Bjorn Andersson [Thu, 12 Jan 2023 13:50:55 +0000 (05:50 -0800)]
arm64: dts: qcom: sc8280xp: Use MMCX for all DP controllers
While MDSS_GDSC is a subdomain of MMCX, Linux does not respect this
relationship and sometimes invokes sync_state on the rpmhpd (MMCX)
before the DisplayPort controller has had a chance to probe.
The result when this happens is that the power is lost to the multimedia
subsystem between the probe of msm_drv and the DisplayPort controller -
which results in an irrecoverable state.
While this is an implementation problem, this aligns the power domain
setting of the one DP instance with that of all the others.
Fixes: 57d6ef683a15 ("arm64: dts: qcom: sc8280xp: Define some of the display blocks") Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230112135055.3836555-1-quic_bjorande@quicinc.com
Johan Hovold [Thu, 12 Jan 2023 07:45:03 +0000 (08:45 +0100)]
arm64: dts: qcom: sc8280xp-crd: allow vreg_l3b to be disabled
The vreg_l3b supply is used by the eDP, UFS and USB1 PHYs which are now
described by the devicetree so that the regulator no longer needs to be
marked always-on.
Bjorn Andersson [Thu, 12 Jan 2023 13:51:17 +0000 (05:51 -0800)]
arm64: dts: qcom: sc8280xp: Vote for CX in USB controllers
Running GCC_USB30_*_MASTER_CLK at 200MHz requires CX at nominal level,
not doing so results in occasional lockups. This was previously hidden
by the fact that the display stack incorrectly voted for CX (instead of
MMCX).
Stephan Gerhold [Sat, 7 Jan 2023 11:09:58 +0000 (12:09 +0100)]
arm64: dts: qcom: msm8916: Add DMA for all I2C controllers
i2c-qup allows using DMA to speed up larger transfers. In msm8916.dtsi
the DMA channels are already assigned to the SPI controllers but
missing for I2C. Add them there as well.
This also fixes confusing errors in dmesg for each I2C controller:
i2c_qup 78b6000.i2c: tx channel not available
Stephan Gerhold [Sat, 7 Jan 2023 11:09:57 +0000 (12:09 +0100)]
arm64: dts: qcom: msm8916: Enable blsp_dma by default
Adding the "dmas" to the I2C controllers prevents probing them if
blsp_dma is disabled (infinite probe deferral). Avoid this by enabling
blsp_dma by default - it's an integral part of the SoC that is almost
always used (even if just for UART).
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