Remove regulator-always-on property where not necessary and mark regulators
that are not supposed to be voted active on boot with regulator-boot-on.
While at it, reorder the load properties to make it look more decent.
Reorder PMICs to fix a probe defer caused by messy dependencies and Linux's
inability to handle them (at least for now).
Konrad Dybcio [Sat, 19 Mar 2022 17:46:39 +0000 (18:46 +0100)]
arm64: dts: qcom: msm8992-libra: Fix up the framebuffer
Make sure the necessary clocks are kept on after clk_cleanup (until MDSS
is properly handled by its own driver) and touch up the fb address to
prevent some weird shifting. It's still not perfect, but at least the
kernel log doesn't start a third deep into your screen..
Dmitry Baryshkov [Wed, 2 Mar 2022 22:54:10 +0000 (01:54 +0300)]
arm64: dts: qcom: sm8250: Drop flags for mdss irqs
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.
Dmitry Baryshkov [Wed, 2 Mar 2022 22:54:09 +0000 (01:54 +0300)]
arm64: dts: qcom: sdm845: Drop flags for mdss irqs
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.
Dmitry Baryshkov [Wed, 2 Mar 2022 22:54:08 +0000 (01:54 +0300)]
arm64: dts: qcom: sdm660: Drop flags for mdss irqs
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.
Dmitry Baryshkov [Wed, 2 Mar 2022 22:54:07 +0000 (01:54 +0300)]
arm64: dts: qcom: sdm630: Drop flags for mdss irqs
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.
Dmitry Baryshkov [Wed, 2 Mar 2022 22:54:06 +0000 (01:54 +0300)]
arm64: dts: qcom: msm8996: Drop flags for mdss irqs
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.
Taniya Das [Wed, 23 Feb 2022 17:22:47 +0000 (22:52 +0530)]
dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280
The LPASS(Low Power Audio Subsystem) clock provider have a bunch of generic
properties that are needed in a device tree. Also add clock ids for
LPASS core clocks and audio clock IDs for LPASS client to request for
the clocks.
The huawei-g7 uses the msm8916-wcd-digital/analog audio codecs similar
to apq8016-sbc, so we can mostly copy paste it from there to make audio
work correctly. The main difference is the hphl-jack-type-normally-open
property, which is needed to avoid inverted audio jack detection.
Note that at least on my device the jack detection is not fully
reliable: sometimes headphones are detected as headsets (with
microphone). However, this is not a big problem for typical usage.
The comment with installation instructions in the huawei-g7 device tree
is a bit misleading and does not describe the recommended installation
steps very well. The bootloader is actually not patched; to avoid all
trouble with the vendor bootloader it is easier to bypass it completely
by jumping to a custom bootloader (e.g. based on the open-source LK
released by Qualcomm).
To avoid confusion, simplify the comment to state only the problem
and then refer to the wiki article which contains detailed suggested
installation instructions. This will also make it easier to keep it
up to date with new developments in the future.
Fixes: 55056b229189 ("arm64: dts: qcom: msm8916: Add device tree for Huawei Ascend G7") Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220410195113.13646-2-stephan@gerhold.net
arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dt.yaml: phy@627000:
'vdda-phy-max-microamp', 'vddp-ref-clk-always-on', 'vddp-ref-clk-max-microamp'
do not match any of the regexes: '^phy@[0-9a-f]+$', 'pinctrl-[0-9]+'
Drop them from QMP PHY nodes for 'msm8996-xiaomi' dts.
Stephan Gerhold [Mon, 28 Feb 2022 22:54:00 +0000 (23:54 +0100)]
arm64: dts: qcom: msm8916: Add BAM-DMUX for WWAN network interfaces
The BAM Data Multiplexer provides access to the network data channels
of modems integrated into many older Qualcomm SoCs, including MSM8916.
Add the nodes for the BAM DMA engine and BAM-DMUX to enable using WWAN
on smartphones/tablets based on MSM8916. This should work out of the box
with open-source WWAN userspace such as ModemManager.
The nodes are disabled by default to avoid loading unnecessary drivers
on devices that cannot use BAM-DMUX (e.g. DragonBoard 410c). However,
strictly speaking the nodes could be enabled by default since both the
bam_dma and bam_dmux driver will simply do nothing if the modem does
not announce any BAM-DMUX channels.
Dmitry Baryshkov [Sat, 26 Feb 2022 20:50:31 +0000 (23:50 +0300)]
arm64: dts: qcom: pmr735b: add temp sensor and thermal zone config
Add temp-alarm device tree node and a default configuration for the
corresponding thermal zone for this PMIC. Temperatures are based on
downstream values.
Dmitry Baryshkov [Sat, 26 Feb 2022 20:50:30 +0000 (23:50 +0300)]
arm64: dts: qcom: pm8350b: add temp sensor and thermal zone config
Add temp-alarm device tree node and a default configuration for the
corresponding thermal zone for this PMIC. Temperatures are based on
downstream values.
Dmitry Baryshkov [Sat, 26 Feb 2022 20:50:29 +0000 (23:50 +0300)]
arm64: dts: qcom: pm8350: add temp sensor and thermal zone config
Add temp-alarm device tree node and a default configuration for the
corresponding thermal zone for this PMIC. Temperatures are based on
downstream values.
Jami Kettunen [Fri, 25 Feb 2022 21:56:42 +0000 (23:56 +0200)]
arm64: dts: qcom: msm8998-oneplus-common: Add NFC
The OnePlus 5/5T both have an NXP PN553 which is supported by the
nxp-nci-i2c driver in mainline. It detects/reads NFC tags using
"nfctool" and with the NearD test scripts data can also be written
to be received by another device.
Sankeerth Billakanti [Wed, 16 Mar 2022 17:35:46 +0000 (23:05 +0530)]
arm64: dts: qcom: sc7280: rename edp_out label to mdss_edp_out
Rename the edp_out label in the sc7280 platform to mdss_edp_out
so that the nodes related to mdss are all grouped together in
the board specific files.
Dmitry Baryshkov [Tue, 15 Mar 2022 14:11:04 +0000 (17:11 +0300)]
arm64: dts: qcom: sdm845: correct dynamic power coefficients
Following sm8150/sm8250 update sdm845 capacity-dmips-mhz and
dynamic-power-coefficient based on the measurements [1], [2].
The energy model dynamic-power-coefficient values were calculated with
DPC = µW / MHz / V^2
for each OPP, and averaged across all OPPs within each cluster for the
final coefficient. Voltages were obtained from the qcom-cpufreq-hw
driver that reads voltages from the OSM LUT programmed into the SoC.
Normalized DMIPS/MHz capacity scale values for each CPU were calculated
from CoreMarks/MHz (CoreMark iterations per second per MHz), which
serves the same purpose. For each CPU, the final capacity-dmips-mhz
value is the C/MHz value of its maximum frequency normalized to
SCHED_CAPACITY_SCALE (1024) for the fastest CPU in the system.
For more details on measurement process see the commit message for the
commit 6aabed5526ee ("arm64: dts: qcom: sm8250: Add CPU capacities and
energy model").
Bhupesh Sharma [Sat, 26 Feb 2022 18:40:28 +0000 (00:10 +0530)]
arm64: dts: qcom: sm8150: Add PDC as the interrupt parent for tlmm
Several wakeup gpios supported by the Top Level Mode Multiplexer (TLMM)
block on sm8150 can be used as interrupt sources and these interrupts
are routed to the PDC interrupt controller.
So, specify PDC as the interrupt parent for the TLMM block.
On MSM8996 PCI controller bindings are not compatible with snps,dw-pcie
binding. The platform doesn't provide second (global) IRQ, it requires
additional glue code. To prevent it from probing against the dw-pcie
driver, remove corresponding compatible.
On SDM845 PCI controller bindings are not compatible with snps,dw-pcie
binding. The platform doesn't provide second (global) IRQ, it requires
additional glue code. To prevent it from probing against the dw-pcie
driver, remove corresponding compatible.
Fixes: 5c538e09cb19 ("arm64: dts: qcom: sdm845: Add first PCIe controller and PHY") Fixes: 42ad231338c1 ("arm64: dts: qcom: sdm845: Add second PCIe PHY and controller") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220411115808.1976500-1-dmitry.baryshkov@linaro.org
Rename smp2p-modem to smp2p-mpss, and make the subnode labels of smp2p_adsp
and smp2p_slpi follow the <name>_smp2p_<out/in> layout.
Also move smp2p_slpi_out above smp2p_slpi_in to make it match mpss and adsp
where master-kernel is the first subnode.
Fix a total overlap between zap_shader_region and slpi_region, and rename
all regions to match the naming convention in other Qualcomm SoC device trees.
Dragonboard845c doesn't have board-specific board-id programmed, it uses
generic 0xff. Thus add the property with the 'variant' of the
calibration data.
Note: the driver will check for the calibration data for the following
IDs, so older board-2.bin files that were distributed as a part of
Linaro releases will continue to work.
Krzysztof Kozlowski [Thu, 7 Apr 2022 09:27:23 +0000 (11:27 +0200)]
arm64: dts: qcom: msm8996: drop unsupported UFS vddp-ref-clk-max-microamp
The property vddp-ref-clk-max-microamp (for VDDP ref clk supply which is
l25 regulator) is not documented in MSM8996 UFS PHY bindings
(qcom,msm8996-qmp-ufs-phy). It is mentioned in the other UFS PHY
bindings for qcom,msm8996-ufs-phy-qmp-14nm.
The MSM8996-based Xiaomi devices configure l25 regulator in a
conflicting way:
1. with maximum 100 uAmp for VDDP ref clk supply of UFS PHY,
2. with maximum 450 mAmp for VCCQ supply of UFS.
Since the vddp-ref-clk-max-microamp property is basically not
documented for that UFS PHY and has a conflicting values, drop it
entirely as it looks like not tested and not used ever.
Rob Herring [Thu, 7 Apr 2022 22:52:54 +0000 (17:52 -0500)]
arm64: dts: qcom: sdm845: shift6mq: Fix boolean properties with values
Boolean properties in DT are present or not present and don't take a value.
A property such as 'foo = <0>;' evaluated to true. IOW, the value doesn't
matter.
It may have been intended that 0 values are false, but there is no change
in behavior with this patch.
Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org> Cc: linux-arm-msm@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
[bjorn: Updated subject prefix] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220407225254.2178644-1-robh@kernel.org
Stephen Boyd [Fri, 25 Mar 2022 21:16:40 +0000 (14:16 -0700)]
arm64: dts: qcom: sc7180-trogdor: Simplify SAR sensor enabling
The SAR node, ap_sar_sensor, needs to be enabled in addition to the i2c
bus it resides on. Let's simplify this by leaving the sensor node
enabled by default while leaving the i2c bus disabled by default. On
boards that use the sensor, we already enable the i2c bus so we can
simply remove the extra bit that enables the sar sensor node. This saves
some lines but is otherwise a non-functional change.
Cc: Douglas Anderson <dianders@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220325211640.54228-1-swboyd@chromium.org
Stephen Boyd [Thu, 17 Mar 2022 01:06:39 +0000 (18:06 -0700)]
arm64: dts: qcom: sc7280-herobrine: Drop outputs on fpmcu pins
Having these pins with outputs is good on a fresh boot because it puts
the boot and reset pins in a known "good" state. Unfortunately, that
conflicts with the fingerprint firmware flashing code. The firmware
flashing process binds and unbinds the cros-ec and spidev drivers and
that reapplies the pin output values after the flashing code has
overridden the gpio values. This causes a problem because we try to put
the device into bootloader mode, bind the spidev driver and that
inadvertently puts it right back into normal boot mode, breaking the
flashing process.
Fix this by removing the outputs. We'll introduce a binding for
fingerprint cros-ec specifically to set the gpios properly via gpio APIs
during cros-ec driver probe instead.
Cc: Douglas Anderson <dianders@chromium.org> Cc: Matthias Kaehlcke <mka@chromium.org> Cc: Alexandru M Stan <amstan@chromium.org> Fixes: 116f7cc43d28 ("arm64: dts: qcom: sc7280: Add herobrine-r1") Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220317010640.2498502-2-swboyd@chromium.org
Douglas Anderson [Tue, 8 Mar 2022 20:52:35 +0000 (12:52 -0800)]
arm64: dts: qcom: sc7280: Delete herobrine-r0
As talked about in commit 61a6262f95e0 ("arm64: dts: qcom: sc7280:
Move herobrine-r0 to its own dts"), herobrine evolved pretty
significantly after -r0 and newer revisions are pretty
different. Nobody needs the old boards to keep working, so let's
delete to avoid the maintenance burden.
Douglas Anderson [Thu, 10 Mar 2022 21:04:34 +0000 (13:04 -0800)]
arm64: dts: qcom: sc7280-herobrine: Fix PCIe regulator glitch at bootup
While scoping signals, we found that the PCIe signals weren't
compliant at bootup. Specifically, the bootloader was setting up PCIe
and leaving it configured, then jumping to the kernel. The kernel was
turning off the regulator while leaving the PCIe clock running, which
was a violation.
In the regulator bindings (and the Linux kernel driver that uses
them), there's currently no way to specify that a GPIO-controlled
regulator should keep its state at bootup. You've got to pick either
"on" or "off". Let's switch it so that the PCIe regulator defaults to
"on" instead of "off". This should be a much safer way to go and
avoids the timing violation. The regulator will still be turned off
later if there are no users.
Matthias Kaehlcke [Thu, 17 Mar 2022 00:28:19 +0000 (17:28 -0700)]
arm64: dts: qcom: sc7280: herobrine: disable some regulators by default
Not all herobrine boards have a world facing camera or a fingerprint
sensor, disable the regulators that feed these devices by default and
only enable them for the boards that use them.
Similarly the audio configuration can vary between boards, not all
boards have the regulator pp3300_codec, disable it by default.
Matthias Kaehlcke [Thu, 17 Mar 2022 00:28:18 +0000 (17:28 -0700)]
arm64: dts: qcom: sc7280: Add 'piglin' to the crd-r3 compatible strings
With newer bootloader versions the crd-r3 (aka CRD 1.0 and 2.0) is
identified as a 'piglin' board (like the IDP2 board), instead of 'hoglin'
Add the compatible strings 'google,piglin-rev{3,4}'. The hoglin entries
are kept to make sure the board keeps booting with older bootloader
versions.
The compatible string 'google,piglin' (without revision information) is
still used by the IDP2 board, which is not expected to evolve further.
Matthias Kaehlcke [Thu, 17 Mar 2022 00:28:17 +0000 (17:28 -0700)]
arm64: dts: qcom: sc7280: Rename crd to crd-r3
There are multiple revisions of CRD boards. The current sc7280-crd.dts
describes revision 3 and 4 (aka CRD 1.0 and 2.0). Support for a newer
version will be added by another patch. Add the revision number to
distinguish it from the versionn. Also add the revision numbers to
the compatible string.
Stephen Boyd [Thu, 24 Mar 2022 22:33:31 +0000 (15:33 -0700)]
arm64: dts: qcom: sc7280: Fix sar1_irq_odl node name
This node should be named sar1-irq-odl, not sar0-irq-odl. Otherwise
we'll overwrite the settings for sar0 with what is intended for sar1,
leading to probe failures for sar1 that are quite confusing.
Fixes: 116f7cc43d28 ("arm64: dts: qcom: sc7280: Add herobrine-r1") Cc: Douglas Anderson <dianders@chromium.org> Cc: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Tested-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220324223331.876199-1-swboyd@chromium.org