Ben Skeggs [Mon, 18 Sep 2023 20:21:33 +0000 (06:21 +1000)]
drm/nouveau/nvenc/tu102-: prepare for GSP-RM
- (temporarily) disable if GSP-RM detected, will be added later
- provide empty class list for non-GSP paths
- split tu102 from gm107, it will provide host classes later
Ben Skeggs [Mon, 18 Sep 2023 20:21:32 +0000 (06:21 +1000)]
drm/nouveau/nvdec/tu102-: prepare for GSP-RM
- (temporarily) disable if GSP-RM detected, will be added later
- provide empty class list for non-GSP paths
- split tu102- from gm107, they will provide host classes later
- fixup HW engine instance masks
Ben Skeggs [Mon, 18 Sep 2023 20:21:30 +0000 (06:21 +1000)]
drm/nouveau/fifo/tu102-: prepare for GSP-RM
- (temporarily) disable if GSP-RM detected, will be added later
- add dtor() so GSP-RM paths can cleanup properly
- add alternate engine context mapping interface for RM engines
- add alternate chid interfaces to handle RM USERD oddities
Ben Skeggs [Mon, 18 Sep 2023 20:21:15 +0000 (06:21 +1000)]
drm/nouveau/fb/tu102-: prepare for GSP-RM
- add (initial) R535 implementation of FB, need VRAM size etc for boot
- expose a way to "wrap" vram at a specific address/size as a standard
nvkm_memory allocation, which will be used to write PTEs etc for RM-
defined memory regions
Ben Skeggs [Mon, 18 Sep 2023 20:21:09 +0000 (06:21 +1000)]
drm/nouveau/gsp: prepare for GSP-RM
- move TOP after GSP, so we can disable TOP if GSP is in use
- provide plumbing to support falcon-only and GSP-RM paths
- provide a method for subdevs to detect GSP-RM paths
- split tu102/tu116/ga100 paths from gv100, which can't support GSP-RM
Dave Airlie [Tue, 31 Oct 2023 00:47:49 +0000 (10:47 +1000)]
Merge tag 'drm-misc-next-2023-10-27' of git://anongit.freedesktop.org/drm/drm-misc into drm-next
drm-misc-next for v6.7-rc1:
drm-misc-next-2023-10-19 + following:
UAPI Changes:
Cross-subsystem Changes:
- Convert fbdev drivers to use fbdev i/o mem helpers.
Core Changes:
- Use cross-references for macros in docs.
- Make drm_client_buffer_addb use addfb2.
- Add NV20 and NV30 YUV formats.
- Documentation updates for create_dumb ioctl.
- CI fixes.
- Allow variable number of run-queues in scheduler.
Driver Changes:
- Rename drm/ast constants.
- Make ili9882t its own driver.
- Assorted fixes in ivpu, vc4, bridge/synopsis, amdgpu.
- Add planar formats to rockchip.
Umio Yasuno [Thu, 26 Oct 2023 22:05:57 +0000 (22:05 +0000)]
drm/amdgpu: Remove unused variables from amdgpu_show_fdinfo
Remove unused variables from amdgpu_show_fdinfo
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Umio Yasuno <coelacanth_dream@protonmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rob Clark [Thu, 26 Oct 2023 22:05:49 +0000 (22:05 +0000)]
drm/amdgpu: Remove duplicate fdinfo fields
Some of the fields that are handled by drm_show_fdinfo() crept back in
when rebasing the patch. Remove them again.
Fixes: 376c25f8ca47 ("drm/amdgpu: Switch to fdinfo helper") Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: <alexander.deucher@amd.com> Co-developed-by: Umio Yasuno <coelacanth_dream@protonmail.com> Signed-off-by: Umio Yasuno <coelacanth_dream@protonmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
David Francis [Thu, 12 Oct 2023 14:35:20 +0000 (10:35 -0400)]
drm/amdgpu: Add EXT_COHERENT support for APU and NUMA systems
On gfx943 APU, EXT_COHERENT should give MTYPE_CC for local and
MTYPE_UC for nonlocal memory.
On NUMA systems, local memory gets the local mtype, set by an
override callback. If EXT_COHERENT is set, memory will be set as
MTYPE_UC by default, with local memory MTYPE_CC.
Add an option in the override function for this case, and
add a check to ensure it is not used on UNCACHED memory.
V2: Combined APU and NUMA code into one patch
V3: Fixed a potential nullptr in amdgpu_vm_bo_update
Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Candice Li [Wed, 25 Oct 2023 09:27:16 +0000 (17:27 +0800)]
drm/amdgpu: Identify data parity error corrected in replay mode
Use ErrorCodeExt field to identify data parity error in replay mode.
Signed-off-by: Candice Li <candice.li@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hamza Mahfooz [Thu, 26 Oct 2023 15:50:45 +0000 (11:50 -0400)]
drm/amd/display: fix S/G display enablement
An assignment statement was reversed during a refactor which effectively
disabled S/G display outright. Since, we use
adev->mode_info.gpu_vm_support to indicate to the rest of the driver
that S/G display should be enabled and currently it is always set to
false. So, to fix this set adev->mode_info.gpu_vm_support's value to
that of init_data.flags.gpu_vm_support (and not vice versa).
Fixes: 098c13079c6f ("drm/amd/display: enable S/G display for for recent APUs by default") Reported-by: Mark Broadworth <mark.broadworth@amd.com> Tested-by: Mark Broadworth <mark.broadworth@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Thu, 7 Sep 2023 14:41:00 +0000 (10:41 -0400)]
drm/amdxcp: fix amdxcp unloads incompletely
amdxcp unloads incompletely, and below error will be seen during load/unload,
sysfs: cannot create duplicate filename '/devices/platform/amdgpu_xcp.0'
devres_release_group will free xcp device at first, platform device will be
unregistered later in platform_device_unregister.
Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yifan Zhang [Tue, 24 Oct 2023 13:16:26 +0000 (21:16 +0800)]
drm/amd/pm: call smu_cmn_get_smc_version in is_mode1_reset_supported.
is_mode1_reset_supported may be called before smu init, when smu_context
is unitialized in driver load/unload test. Call smu_cmn_get_smc_version
explicitly in is_mode1_reset_supported.
v2: apply to aldebaran in case is_mode1_reset_supported will be
uncommented (Candice Li)
Fixes: 710d9caec70c ("drm/amd/pm: drop most smu_cmn_get_smc_version in smu") Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by: Candice Li <candice.li@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aric Cyr [Mon, 9 Oct 2023 17:11:32 +0000 (13:11 -0400)]
drm/amd/display: 3.2.256
DC v3.2.256
Summary:
* Fixes null-deref regression after
"drm/amd/display: Update OPP counter from new interface"
* Fixes display flashing when VSR and HDR enabled on dcn32
* Fixes dcn3x intermittent hangs due to FPO
* Fixes MST Multi-Stream light up on dcn35
* Fixes green screen on DCN31x when DVI and HDMI monitors attached
* Adds DML2 improvements
* Adds idle power optimization improvements
* Accommodates panels with lower nit backlight
* Updates SDP VSC colorimetry from DP test automation request
* Reverts "drm/amd/display: allow edp updates for virtual signal"
Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aurabindo Pillai [Tue, 10 Oct 2023 20:32:23 +0000 (16:32 -0400)]
drm/amd/display: add interface to query SubVP status
[Why&How]
To enable automated testing through IGT, expose an API that is
accessible through debugfs to query current status of SubVP feature.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Read before writing Backlight Mode Set Register
[HOW&WHY]
Reading the value from
DP_EDP_BACKLIGHT_MODE_SET_REGISTER, DPCD 0x721
before setting the
BP_EDP_PANEL_LUMINANC_CONTROL_ENABLE bit
to ensure there are no accidental overwrites.
Reviewed-by: Sreeja Golui <sreeja.golui@amd.com> Reviewed-by: Harry Vanzylldejong <harry.vanzylldejong@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Iswara Nagulendran <iswara.nagulendran@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Michael Strauss [Tue, 10 Oct 2023 14:47:55 +0000 (10:47 -0400)]
drm/amd/display: Disable SYMCLK32_SE RCO on DCN314
[WHY]
Currently causes some DP link layer failures, backing out until
the failures are root caused.
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Michael Strauss <michael.strauss@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ilya Bakoulin [Fri, 6 Oct 2023 19:57:28 +0000 (15:57 -0400)]
drm/amd/display: Fix shaper using bad LUT params
[Why]
LUT params are not cleared after setting blend TF, which can lead to
same params being used for the shaper, if the shaper func is bypassed.
[How]
Set lut_params to NULL after program_1dlut.
Reviewed-by: Krunoslav Kovac <krunoslav.kovac@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Ilya Bakoulin <ilya.bakoulin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Samson Tam [Fri, 6 Oct 2023 21:36:16 +0000 (17:36 -0400)]
drm/amd/display: add null check for invalid opps
[Why]
In cases where number of pipes available is less
than num_opp, there will opp instances that are
null
[How]
Add null check to skip over these opp instances
Fixes: 40de8403b998 ("drm/amd/display: Update OPP counter from new interface") Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Samson Tam <samson.tam@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alvin Lee [Fri, 6 Oct 2023 22:01:24 +0000 (18:01 -0400)]
drm/amd/display: Update FAMS sequence for DCN30 & DCN32
Provide DCN32 specific sequence and update DCN30 sequence
Reviewed-by: Samson Tam <samson.tam@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Samson Tam [Thu, 5 Oct 2023 05:31:12 +0000 (01:31 -0400)]
drm/amd/display: fix num_ways overflow error
[Why]
Helper function calculates num_ways using 32-bit. But is
returned as 8-bit. If num_ways exceeds 8-bit, then it
reports back the incorrect num_ways and erroneously
uses MALL when it should not
[How]
Make returned value 32-bit and convert after it checks
against caps.cache_num_ways, which is under 8-bit
Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Samson Tam <samson.tam@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rodrigo Siqueira [Thu, 5 Oct 2023 16:41:33 +0000 (10:41 -0600)]
drm/amd/display: Add prefix for plane functions
This commit adds the amdgpu_dm_plane_ prefix for all functions in the
amdgpu_dm_plane.c. This change enables an easy way to filter code paths
via ftrace.
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rodrigo Siqueira [Thu, 5 Oct 2023 14:27:45 +0000 (08:27 -0600)]
drm/amd/display: Add prefix to amdgpu crtc functions
The ftrace debug feature allows filtering functions based on a prefix,
which can be helpful in some complex debug scenarios. The driver can
benefit more from this feature if the function name follows some
patterns; for this reason, this commit adds the prefix amdgpu_dm_crtc_
to all the functions that do not have it in the amdgpu_dm_crtc.c file.
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rodrigo Siqueira [Thu, 5 Oct 2023 16:58:51 +0000 (10:58 -0600)]
drm/amd/display: Correct enum typo
This commit just replaces dc_interrupt_po*r*larity with its correct
name, which is dc_interrupt_polarity.
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Hung [Tue, 3 Oct 2023 21:25:30 +0000 (15:25 -0600)]
drm/amd/display: Set emulated sink type to HDMI accordingly.
[WHY & HOW]
Virtual sink is not audio-capable and this causes kms_hdmi_inject's
inject-audio to fail. Set it to HDMI according to EDID.
Reviewed-by: Chao-kai Wang <stylon.wang@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY & HOW]
Virtual signal is not supported as audio capable by DC.
Reviewed-by: Chao-kai Wang <stylon.wang@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sung Joon Kim [Thu, 5 Oct 2023 18:56:24 +0000 (14:56 -0400)]
drm/amd/display: Fix HDMI framepack 3D test issue
[why]
Bandwidth validation failure on framepack tests.
Need to double pixel clock when 3D format is
framepack. Also for HDMI displays, we need to
keep the ITC flag to 1 by default.
[how]
Double the pixel clock when using framepack 3D format.
Set hdmi ITC bit to 1.
Reviewed-by: Charlene Liu <charlene.liu@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Sung Joon Kim <sungkim@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nicholas Kazlauskas [Thu, 5 Oct 2023 15:48:44 +0000 (11:48 -0400)]
drm/amd/display: Fix IPS handshake for idle optimizations
[Why]
Intermittent reboot hangs are observed introduced by
"Improve x86 and dmub ips handshake".
[How]
Bring back the commit but fix the polling.
Avoid hanging in place forever by bounding the delay and ensure that
we still message DMCUB on IPS2 exit to notify driver idle has been
cleared.
Reviewed-by: Duncan Ma <duncan.ma@amd.com> Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wenjing Liu [Wed, 4 Oct 2023 18:30:30 +0000 (14:30 -0400)]
drm/amd/display: implement map dc pipe with callback in DML2
[why]
Unify pipe resource management logic in dc resource layer.
V2:
Add default case for switch.
CC: Hamza Mahfooz <hamza.mahfooz@amd.com> Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wenjing Liu [Wed, 4 Oct 2023 16:12:57 +0000 (12:12 -0400)]
drm/amd/display: add pipe resource management callbacks to DML2
[why]
Need DML2 to support new pipe resource management APIs.
Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Swapnil Patel [Wed, 4 Oct 2023 19:58:57 +0000 (15:58 -0400)]
drm/amd/display: Reduce default backlight min from 5 nits to 1 nits
[Why & How]
Currently set_default_brightness_aux function uses 5 nits as lower limit
to check for valid default_backlight setting. However some newer panels
can support even lower default settings
Reviewed-by: Agustin Gutierrez <agustin.gutierrez@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Swapnil Patel <swapnil.patel@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
George Shen [Mon, 2 Oct 2023 19:31:16 +0000 (15:31 -0400)]
drm/amd/display: Update SDP VSC colorimetry from DP test automation request
[Why]
Certain test equipment vendors check the SDP VSC for colorimetry against
the value from the test request during certain DP link layer tests for
YCbCr test cases.
[How]
Update SDP VSC with colorimetry from test automation request.
Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: George Shen <george.shen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Add a check for idle power optimization
[why]
Need a helper function to check idle power is allowed
so that dc doesn't access any registers that are power-gated.
[how]
Implement helper function to check idle power optimization.
Enable a hook to check if detection is allowed.
V2:
Add function hooks for set and get idle states.
Check if function hook was properly initialized.
Reviewed-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Nicholas Choi <nicholas.choi@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Sung Joon Kim <sungkim@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Causes intermittent hangs during reboot stress testing.
Reviewed-by: Duncan Ma <duncan.ma@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Fangzhi Zuo [Mon, 2 Oct 2023 20:38:02 +0000 (16:38 -0400)]
drm/amd/display: Fix MST Multi-Stream Not Lighting Up on dcn35
dcn35 misses .enable_symclk_se hook that makes MST DSC
not functional when having multiple FE clk to be enabled.
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mario Limonciello [Mon, 23 Oct 2023 20:50:05 +0000 (15:50 -0500)]
drm/amd: Explicitly disable ASPM when dynamic switching disabled
Currently there are separate but related checks:
* amdgpu_device_should_use_aspm()
* amdgpu_device_aspm_support_quirk()
* amdgpu_device_pcie_dynamic_switching_supported()
Simplify into checking whether DPM was enabled or not in the auto
case. This works because amdgpu_device_pcie_dynamic_switching_supported()
populates that value.
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mario Limonciello [Mon, 23 Oct 2023 20:47:43 +0000 (15:47 -0500)]
drm/amd: Move AMD_IS_APU check for ASPM into top level function
There is no need for every ASIC driver to perform the same check.
Move the duplicated code into amdgpu_device_should_use_aspm().
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mario Limonciello [Mon, 23 Oct 2023 20:42:00 +0000 (15:42 -0500)]
drm/amd: Disable PP_PCIE_DPM_MASK when dynamic speed switching not supported
Rather than individual ASICs checking for the quirk, set the quirk at the
driver level.
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
The change prevents migrating the entire range to VRAM because retry
fault restore_pages map the remaining system memory range to GPUs. It
will work correctly to submit together with partial mapping to GPU
patch later.
Signed-off-by: Philip Yang <Philip.Yang@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Philip Yang <Philip.Yang@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Stylon Wang [Thu, 19 Oct 2023 14:49:15 +0000 (22:49 +0800)]
drm/amd/display: Fix copyright notice in DC code
[Why & How]
Fix incomplete copyright notice in DC code.
Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Stylon Wang <stylon.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Stylon Wang [Thu, 19 Oct 2023 14:46:51 +0000 (22:46 +0800)]
drm/amd/display: Fix copyright notice in DML2 code
[Why & How]
Fix incomplete copyright notice in DML2 code.
Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Stylon Wang <stylon.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Stylon Wang [Thu, 19 Oct 2023 14:43:05 +0000 (22:43 +0800)]
drm/amd/display: Add missing copyright notice in DMUB
[Why & How]
Add missing/incomplete copyright notice in DMUB files
Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Stylon Wang <stylon.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Srinivasan Shanmugam [Mon, 23 Oct 2023 16:05:30 +0000 (21:35 +0530)]
drm/amdkfd: Address 'remap_list' not described in 'svm_range_add'
Fixes the below:
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_svm.c:2073: warning: Function parameter or member 'remap_list' not described in 'svm_range_add'
Cc: Felix Kuehling <Felix.Kuehling@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Qu Huang [Mon, 23 Oct 2023 12:56:37 +0000 (12:56 +0000)]
drm/amdgpu: Fix a null pointer access when the smc_rreg pointer is NULL
In certain types of chips, such as VEGA20, reading the amdgpu_regs_smc file could result in an abnormal null pointer access when the smc_rreg pointer is NULL. Below are the steps to reproduce this issue and the corresponding exception log:
Rodrigo Siqueira [Fri, 20 Oct 2023 16:06:50 +0000 (10:06 -0600)]
drm/amd/display: Fix DMUB errors introduced by DML2
When DML 2 was introduced, it changed part of the generic sequence of
DC, which caused issues on previous DCNs with DMUB support. This commit
ensures the new sequence only works for new DCNs from 3.5 and above.
Changes since V1:
- Harry: Use the attribute using_dml2 instead of check the DCN version.
Cc: Vitaly Prosyak <vprosyak@amd.com> Cc: Roman Li <roman.li@amd.com> Cc: Qingqing Zhuo <Qingqing.Zhuo@amd.com> Cc: Daniel Wheeler <daniel.wheeler@amd.com> Cc: Alex Deucher <Alexander.Deucher@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Fixes: 7966f319c66d ("drm/amd/display: Introduce DML2") Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rodrigo Siqueira [Fri, 20 Oct 2023 21:17:09 +0000 (15:17 -0600)]
drm/amd/display: Set the DML2 attribute to false in all DCNs older than version 3.5
When DML2 was introduced, it targeted only new DCN versions. For
controlling which ASIC should use this new version of DML, it was
introduced the using_dml2 attribute. To avoid ambiguities, this commit
explicitly sets using_dml2 to false in all ASICs that do not support
DML2.
Cc: Vitaly Prosyak <vprosyak@amd.com> Cc: Roman Li <roman.li@amd.com> Cc: Qingqing Zhuo <Qingqing.Zhuo@amd.com> Cc: Daniel Wheeler <daniel.wheeler@amd.com> Cc: Alex Deucher <Alexander.Deucher@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Li Ma [Wed, 18 Oct 2023 05:34:29 +0000 (13:34 +0800)]
drm/amdgpu: modify if condition in nbio_v7_7.c
remove unnecessary "enable" in if condition.
Signed-off-by: Li Ma <li.ma@amd.com> Reviewed-by: Tim Huang <Tim.Huang@amd.com> Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yang Wang [Thu, 19 Oct 2023 10:16:14 +0000 (18:16 +0800)]
drm/amdgpu: refine ras error kernel log print
refine ras error kernel log to avoid user-ridden ambiguity.
Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hugo Hu [Tue, 22 Aug 2023 09:01:39 +0000 (17:01 +0800)]
drm/amd/display: reprogram det size while seamless boot
[Why]
During system boot in second screen only mode on a seamless boot system,
there is a chance that the pipe's det size might not be reset.
[How]
Reset the det size while resetting the pipe during seamless boot.
Reviewed-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Hugo Hu <hugo.hu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 25 Oct 2023 17:19:28 +0000 (13:19 -0400)]
drm/amdgpu: move buffer funcs setting up a level
Rather than doing this in the IP code for the SDMA paging
engine, move it up to the core device level init level.
This should fix the scheduler init ordering.
v2: drop extra parens
v3: drop SDMA helpers
v4: Added a Fixes tag because amdgpu dereferences an uninitialized
scheduler without this patch, and this patch fixes this. (Luben)
Tested-by: Luben Tuikov <luben.tuikov@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Link: https://lore.kernel.org/r/20231025171928.3318505-1-alexander.deucher@amd.com Acked-by: Christian König <christian.koenig@amd.com> Fixes: 56e449603f0ac5 ("drm/sched: Convert the GPU scheduler to variable number of run-queues") Signed-off-by: Luben Tuikov <ltuikov89@gmail.com>
Luben Tuikov [Thu, 26 Oct 2023 16:37:30 +0000 (12:37 -0400)]
MAINTAINERS: Update the GPU Scheduler email
Update the GPU Scheduler maintainer email.
Cc: Alex Deucher <Alexander.Deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Dave Airlie <airlied@gmail.com> Cc: AMD Graphics <amd-gfx@lists.freedesktop.org> Cc: Direct Rendering Infrastructure - Development <dri-devel@lists.freedesktop.org> Signed-off-by: Luben Tuikov <ltuikov89@gmail.com> Acked-by: Alex Deucher <Alexander.Deucher@amd.com> Link: https://lore.kernel.org/r/20231026174438.18427-2-ltuikov89@gmail.com
Luben Tuikov [Sun, 15 Oct 2023 01:15:35 +0000 (21:15 -0400)]
drm/sched: Convert the GPU scheduler to variable number of run-queues
The GPU scheduler has now a variable number of run-queues, which are set up at
drm_sched_init() time. This way, each driver announces how many run-queues it
requires (supports) per each GPU scheduler it creates. Note, that run-queues
correspond to scheduler "priorities", thus if the number of run-queues is set
to 1 at drm_sched_init(), then that scheduler supports a single run-queue,
i.e. single "priority". If a driver further sets a single entity per
run-queue, then this creates a 1-to-1 correspondence between a scheduler and
a scheduled entity.
Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Russell King <linux+etnaviv@armlinux.org.uk> Cc: Qiang Yu <yuq825@gmail.com> Cc: Rob Clark <robdclark@gmail.com> Cc: Abhinav Kumar <quic_abhinavk@quicinc.com> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Cc: Danilo Krummrich <dakr@redhat.com> Cc: Matthew Brost <matthew.brost@intel.com> Cc: Boris Brezillon <boris.brezillon@collabora.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Emma Anholt <emma@anholt.net> Cc: etnaviv@lists.freedesktop.org Cc: lima@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Cc: nouveau@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Link: https://lore.kernel.org/r/20231023032251.164775-1-luben.tuikov@amd.com
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