Antonio Borneo [Sun, 25 Aug 2024 13:38:07 +0000 (15:38 +0200)]
binarybuffer: str_to_buf(): align prefix to TCL syntax
Integer values are interpreted by TCL as decimal, binary, octal
or hexadecimal if prepended with '0d', '0b', '0o' or '0x'
respectively.
The case of '0' prefix has been interpreted as octal till TCL 8.6
but is interpreted as part of a decimal number by JimTCL and from
TCL 9.
Align str_to_buf() to latest TCL syntax by:
- addding support for '0d', '0b' and '0o' prefix;
- dropping support for '0' prefix.
Change-Id: I708ef72146d75b7bf429df329a0269cf48700a44 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8465 Tested-by: jenkins Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Richard Allen [Wed, 15 May 2024 17:29:05 +0000 (12:29 -0500)]
target: fix profiler output on Windows
Open output file in binary mode to disable EOL
conversion on Windows (and sometimes cygwin depending
on installation settings and path).
Change-Id: I38276dd1af011ce5781b0264b7cbb08c32a1a2ad Signed-off-by: Richard Allen <rsaxvc@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8278 Reviewed-by: Karl Palsson <karlp@tweak.au> Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Antonio Borneo [Thu, 1 Aug 2024 08:43:41 +0000 (10:43 +0200)]
checkpatch: only report error on hit
The Linux checkpatch script used by OpenOCD reports hits either as
error, warning and check.
Such classification is meaningful for Linux maintainers, but for
OpenOCD Jenkins they are all considered as errors.
Having such classification in the checkpatch report by Jenkins is
misleading for developers that expect 'warnings' to be probably
ignored by maintainers, while having no idea what 'checks' means.
This patch flattens all the checkpatch reports to 'error' only.
Checkpatch can trigger false positives. OpenOCD uses the tag
Checkpatch-ignore:
in the commit message to prevent Jenkins to report the error, as
described in HACKING.
Change-Id: I1d3164ba1f725c0763dfe362192ffa669b3856e6 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8424 Reviewed-by: Karl Palsson <karlp@tweak.au> Tested-by: jenkins
Antonio Borneo [Sun, 14 Jul 2024 12:59:34 +0000 (14:59 +0200)]
binarybuffer: str_to_buf(): simplify it and fix scan-build error
The function str_to_buf() can be simplified by writing directly
the intermediate results in the output buffer.
Such simplification improves the readability and also makes
scan-build happy, as it does not trigger anymore the warning:
src/helper/binarybuffer.c:328:8: warning: Use of memory
allocated with size zero [unix.Malloc]
if ((b256_buf[(buf_len / 8)] & mask) != 0x0) {
Change-Id: I1cef9a1ec5ff0e5841ba582610f273e89e7a81da Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8396 Reviewed-by: Jan Matyas <jan.matyas@codasip.com> Tested-by: jenkins
Antonio Borneo [Sun, 14 Jul 2024 10:09:15 +0000 (12:09 +0200)]
binarybuffer: simplify the prototype of str_to_buf()
With 'radix' always zero and '_detected_radix' always NULL, drop
the two parameters and simplify str_to_buf().
While there:
- drop some redundant assert(),
- drop the re-check for the base prefix,
- simplify str_strip_number_prefix_if_present() and rename it, as
the prefix MUST be present,
- fix a minor typo,
- update the doxygen description of str_to_buf().
Change-Id: I1abdc8ec0587b23881953d3094101c04d5bb1c58 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8394 Tested-by: jenkins Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Antonio Borneo [Sun, 14 Jul 2024 09:28:49 +0000 (11:28 +0200)]
helper: command: drop radix parameter from command_parse_str_to_buf()
Commit 53b94fad58ab ("binarybuffer: Fix str_to_buf() parsing
function") introduces the helper command_parse_str_to_buf() to
parse as number a string on TCL command-line.
The parameter 'radix' can specify the base (decimal, octal,
hexadecimal, or auto-detected).
TCL is supposed to use decimal numbers by default, while octal and
hexadecimal numbers must be prefixed respectively with '0' and
'0x' (or '0X').
This would require the helper to always run auto-detection of the
base, thus always set the 'radix' parameter to zero. This makes
the parameter useless.
Keeping the 'radix' parameter can open the door to future abuse of
TCL syntax, E.g. a command can require an octal value without the
mandatory TCL '0' prefix; the octal value cannot be the result of
TCL expression.
To prevent any future abuse of the 'radix' parameter, drop it.
Change-Id: I88855bd83b4e08e8fdcf86a2fa5ef3269dd4ad57 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8393 Tested-by: jenkins Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Marc Schink [Mon, 24 Jun 2024 14:26:46 +0000 (16:26 +0200)]
server/telnet: Always allow 'exit' command
The telnet 'exit' command is only available in the execution phase of
OpenOCD. Thus, a telnet session cannot be closed via 'exit' if OpenOCD
is started with 'noinit'. Make the 'exit' command always available.
Change-Id: I14447ecde63e579f1c523d606f048ad29cc84a35 Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8379 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
Marc Schink [Mon, 15 Apr 2024 19:02:43 +0000 (21:02 +0200)]
transport: Remove echo in transport selection
Do not echo the selected transport to avoid stray and confusing
messages in the output of OpenOCD. For example, the "swd" line here:
Open On-Chip Debugger 0.12.0+dev-00559-ge02f6c1b9-dirty
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
swd
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
While at it, fix some small documentation style issues.
Change-Id: Ie85426c441289bbaa35615dbb7b53f0b5c46cfc0 Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8217 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
Marc Schink [Sun, 21 Apr 2024 18:00:28 +0000 (20:00 +0200)]
target/breakpoints: Fix 'orig_instr' output
The 'orig_instr' information of software breakpoints is incorrect
because buf_to_hex_str() expects the length of the buffer to be
converted in bits and not bytes.
Change-Id: I9a9ed383a8c25200d461b899749d5259ee4c6e3d Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8218 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
Marc Schink [Mon, 22 Jul 2024 07:30:42 +0000 (09:30 +0200)]
jtag: Use 'unsigned int' data type
This patch modifies as little code as possible in order to simplify the
review. Data types that are affected by these changes will be addresses
in following patches.
While at it, apply coding style fixes if these are not too extensive.
Change-Id: I364467b88f193f8387623a19e6994ef77899d117 Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8414 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Marc Schink [Sun, 21 Jul 2024 18:28:17 +0000 (20:28 +0200)]
jtag: Use 'unsigned int' for 'scan_field.num_bits'
This patch modifies as little code as possible in order to simplify the
review. Data types that are affected by these changes will be addresses
in following patches.
While at it, apply coding style fixes if these are not too extensive.
Change-Id: Idcbbbbbea2705512201eb326c3e6cef110dbc674 Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8413 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Marc Schink [Wed, 17 Jul 2024 15:35:42 +0000 (17:35 +0200)]
jtag/commands: Use 'unsigned int' data type
This patch modifies as little code as possible in order to simplify the
review. Data types that are affected by these changes will be addresses
in following patches.
While at it, apply coding style fixes if these are not too extensive.
Change-Id: Ie048b3d472f546fecb6733f17f9d0f17fda40187 Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8404 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Marc Schink [Wed, 17 Jul 2024 14:59:51 +0000 (16:59 +0200)]
jtag: Use 'unsigned int' for 'ir_length'
This patch modifies as little code as possible in order to simplify the
review. Data types that are affected by these changes will be modified
in following patches.
Change-Id: I83921d70e017095d63547e0bc9fe61779191d9d0 Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8403 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Antonio Borneo [Sun, 21 Jul 2024 11:00:08 +0000 (13:00 +0200)]
checkpatch: extend checks to TCL, Makefile.am and configure.ac files
The script, originally written for Linux code, skips several tests
on files whose name's extension is not in Perl list
'(h|c|s|S|sh|dtsi|dts)$'.
This causes such tests to not be executed on OpenOCD TCL files and
on Makefile.am and configure.ac.
Modify the script to include the OpenOCD files in the list.
Change-Id: I17c96bf32ee40d9390e60996e176e4e927c00197 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8408 Reviewed-by: Marek Kraus <gamelaster@outlook.com> Tested-by: jenkins
Marek Kraus [Sat, 20 Jul 2024 14:29:19 +0000 (16:29 +0200)]
tcl/target: add initial Bouffalo Lab BL702 chip series support
Adds initial support for the BL702 series of chips, BL702, BL704 and BL706.
No flash bank support yet.
File name bl702.tcl was chosen over bl70x.tcl, because Bouffalo Lab
uses bl702 to mark the whole series in many of their tools.
The ndmreset bit in the RISC-V Debug Module isn't implemented correctly,
so it doesn't trigger a system reset as it should.
To solve this problem, the software reset is implemented
in the reset-assert-pre hook, which uses best reset method I could find.
What is not reset is the GLB core, which handles GPIOs, pinmux, etc.
The reset mechanism has been extensively tested, and works correctly
for both "reset run" and "reset halt", which the latter
halts very early in the BootROM.
Change-Id: I5ced6eb3902d1b9d9c1bba56f817ec5dc3493cb0 Signed-off-by: Marek Kraus <gamelaster@outlook.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8407 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Marc Schink [Tue, 2 Jul 2024 15:14:22 +0000 (17:14 +0200)]
configure: Use pkg-config for jimtcl
The jimtcl project supports pkg-config, use it for a simpler
configuration of compiler and linker flags and to enforce the minimum
required package version.
Since the jimtcl pkg-config file is not available on all systems, use
AC_CHECK_HEADER() as fallback.
Change-Id: I6fdcc818a8fdd205a126b0a46356434dbe890226 Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8383 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
Antonio Borneo [Sat, 13 Jul 2024 17:14:39 +0000 (19:14 +0200)]
cortex_m: fix scan-build false positive
Scan-build is unable to detect that 'target->dbg_msg_enabled' does
not change across the function cortex_m_fast_read_all_regs().
It incorrectly assumes that it can be false at the first check (so
'dcrdr' get not assigned) and it is true later on (when 'dcrdr'
get used).
This triggers a false positive:
src/target/cortex_m.c:338:12: warning:
3rd function call argument is an uninitialized value
[core.CallAndMessage]
retval = mem_ap_write_atomic_u32(armv7m->debug_ap, DCB_DCRDR, dcrdr);
Use a local variable for 'target->dbg_msg_enabled' so scan-build
can track it as not modified.
While there, change the type of 'target->dbg_msg_enabled' to
boolean as there is no reason to use uint32_t.
Change-Id: Icaf1a1b2dea8bc55108182ea440708ab76396cd7 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8391 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Evgeniy Naydanov [Tue, 31 Oct 2023 17:51:48 +0000 (20:51 +0300)]
rtos/hwthread: derive threadid from SMP index
As defined in `target/target.h`, `coreid` is the index of the target on
the TAP, so, if an SMP group includes targets from multiple TAPs, it can
not be used as the base for `threadid`.
Change-Id: Ied7cfa42197aaf4908ef6628c6436f28d4856ebe Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7957 Tested-by: jenkins Reviewed-by: Mark Zhuang <mark.zhuang@spacemit.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Direct memory driver swd native configuration for am62a7, am62p and
J722S SoCs. All three share common memory map for the debug address
map, so there is a strong reuse. However, introduce board file
specific to the board to allow users to directly get started.
Change-Id: I5609925a2e9918fd4c91d9fd40fbee98de27fdbc Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8283 Tested-by: jenkins Reviewed-by: Vaishnav M A <vaishnav@beagleboard.org> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Jonathan Forrest [Wed, 1 May 2024 04:25:32 +0000 (14:25 +1000)]
jtag/drivers/mpsse: Added FT4232HA
Added FT4232HA varianet of FTDI's FT4232H which has a different bcd.
Also added default PID/VID for the FT4243HA to contrib/60-openocd.rules.
And added default PID/VIDs for FTDI's HP ICs to contrib/60-openocd.rules
as this wasn't done previously.
BugLink: https://sourceforge.net/p/openocd/tickets/410/
Change-Id: Ia84b566aa004332d3f7815a3d22ac37eee4f522a Signed-off-by: Jonathan Forrest <jonyscathe@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8225 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
- Rewriting str_to_buf() to add the missing checks.
- Adding function command_parse_str_to_buf() which can
be used in command handlers. It parses the input
numbers and provides user-readable error messages
in case of parsing errors.
Examples:
jtag drscan 10 huh10
- Old behavior: The string "huh10" is silently
converted to 10 and the command is then executed.
No warning error or warning is shown to the user.
- New behavior: Error message is shown:
"'huh10' is not a valid number"
reg pc 0x123456789
Assuming the "pc" is 32 bits wide:
- Old behavior: The register value is silently
truncated to 0x23456789 and the command is performed.
- New behavior: Error message is shown to the user:
"Number 0x123456789 exceeds 32 bits"
Change-Id: I079e19cd153aec853a3c2eb66953024b8542d0f4 Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8315 Tested-by: jenkins Reviewed-by: Marek Vrbka <marek.vrbka@codasip.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tomas Vanek [Sat, 8 Jun 2024 09:33:35 +0000 (11:33 +0200)]
flash/nor/nrf5: split chip and bank probes
nrf5_auto_probe() always re-probed chip hardware to
get flash geometry.
Introduce nrf5_probe_chip() and move chip related probing to it.
Save all flash parameters needed for bank setup to struct nrf5_info.
Introduce nrf5_setup_bank() and move bank setup code to it.
Call both chip probe and bank setup unconditionally from nrf5_probe():
in case of manual issuing 'flash probe' command, we should refresh actual
values from the device.
Call chip probe and bank setup only if not done before from
nrf5_auto_probe().
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: Ib090a97fd7a41579b3d4f6e6634a5fdf93836c83
Reviewed-on: https://review.openocd.org/c/openocd/+/8322 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Antonio Borneo [Tue, 4 Jun 2024 09:11:25 +0000 (11:11 +0200)]
target: cortex_m: add detection for Cortex-M52
Add Cortex-M52 to the list of known Cortex-M implementations to
allow detection of the core.
Values checked against the ARM document "Arm China Cortex®-M52
Processor Technical Reference Manual" 102776_0002_06_en.
Reported-by: Joseph Yiu <Joseph.Yiu@arm.com>
Change-Id: Id0bde8a0476f76799b7274835db9690f975e2dd6 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8317 Tested-by: jenkins
Antonio Borneo [Tue, 4 Jun 2024 08:30:20 +0000 (10:30 +0200)]
target: cortex_m: fix detection of STAR-MC1 device
The detection of Cortex-M STAR-MC1 was introduced with [1], at a
time when OpenOCD was only checking the field PartNo of the CPUID
register.
Later-on [2], OpenOCD extended the check to the field implementer
of CPUID register. The value for ARM (0x41) implementer was used
to all the Cortex-M, but no feedback for STAR-MC1 was available. A
comment reporting the possible mismatch was added.
As reported on OpenOCD mailing-list, the technical reference manual
for STAR-MC1 is now available [3] and it reports the implementer
as ARM China (0x63) [3].
Fix the STAR-MC1 implementer accordingly.
Reported-by: Joseph Yiu <Joseph.Yiu@arm.com>
Change-Id: I8ed1064a847b73065528ee7032be967b5c58b431 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Link: [1] 7dc4be3157d6 ("target/arm: Add support with identify STAR-MC1") Fixes: [2] 05ee88915520 ("target/cortex_m: check core implementor field")
Link: [3] https://www.armchina.com/download/Documents/Application-Notes/Technical-Reference-Manual?infoId=160
Reviewed-on: https://review.openocd.org/c/openocd/+/8316 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Antonio Borneo [Fri, 21 Jun 2024 12:32:45 +0000 (14:32 +0200)]
openocd: build: prevent old clone to fail on git submodules
Working on an old local git repository, the git sub-modules could
have been set before last changes in .gitmodules.
The script 'bootstrap' does not update the url of the repositories
and this can cause the script to fail.
Add 'git submodule sync' to the script to update the url of the
repositories.
While there, fuse 'git submodule init' and git submodule update'
in a single command.
Reported-by: Karl Hammar <karl@aspodata.se>
Change-Id: I61412f804dbbb7a843aa009139ddb4b8e71beefb Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8375 Tested-by: jenkins
Marc Schink [Tue, 18 Jun 2024 09:03:11 +0000 (11:03 +0200)]
AUTHORS: Refer to source code and Git history
The list of authors and contributors is not maintained and outdated for
years now. Refer to the source code and Git history instead of keeping a
separate list.
Change-Id: I9a92e8e0d5073b56030bc36086b76e28de96389f Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8346 Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li> Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Antonio Borneo [Sat, 3 Feb 2024 13:29:57 +0000 (14:29 +0100)]
flash: psoc6: drop use of 'coreid' to identify the CPU
The flag '-coreid' is used by the command 'target create' to
specify the debug controller of the target, either in case of a
single debug controller for multiple CPU (e.g. RISC-V harts) or
in case of multiple CPU on a DAP access port (e.g. Cortex-A SMP
cluster).
It is also currently used to specify the CPU ID in a SMP cluster,
but this is going to be reworked.
This flag has no effects on Cortex-M; ARM specifies that only one
CPU Cortex-M can occupy the DAP access port by using hardcoded
addresses.
The flash driver 'psoc6' uses the flag '-coreid' to detect if the
current target is the Cortex-M0 on AP#1 or the Cortex-M4 on AP#2
in the SoC.
There are other ways to run such detection, without using such
unrelated '-coreid' flag, e.g. using the AP number or the arch
type of the target.
Use the arch type to detect Cortex-M0 (ARM_ARCH_V6M) vs Cortex-M4
(ARM_ARCH_V7M).
Drop the flags '-coreid' from the psoc6 configuration file.
Change-Id: I0b9601c160dd4f2421a03ce6e3e7c55c6212f714 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8128 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Antonio Borneo [Sat, 3 Feb 2024 18:25:21 +0000 (19:25 +0100)]
doc: document 'target create' flags '-dbgbase' and '-coreid'
Add to the command 'target create' the description for the flags
'-dbgbase' and '-coreid'.
Report that '-coreid' is currently used for purposes other than
CPU detection/examination, and that such uses are going to be
re-considered.
Change-Id: I25c839e3653101234c5862ce9da77019a5bb3249 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8129 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
When an asynchronous exception occurs at the same time
as a breakpoint event (either hardware breakpoint or software breakpoint),
it is possible for the processor to halt at the beginning of the
exception handler instead of the instruction address pointed
by the breakpoint.
During debug entry in exception handler state and with BKPT bit set
as the only break reason in DFSR, check if there is a breakpoint, which
have triggered the debug halt. If there is no such breakpoint,
resume execution. The processor services the interrupt and
halts again at the correct breakpoint address.
The workaround is not needed during target algo run (debug_execution)
because interrupts are disabled in PRIMASK register.
Also after single step the workaround resume never takes place:
the situation is treated as error.
Link: https://developer.arm.com/documentation/SDEN1068427/latest/ Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: I8b23f39cedd7dccabe7e7066d616fb972b69f769
Reviewed-on: https://review.openocd.org/c/openocd/+/8332 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Liviu Ionescu
Tomas Vanek [Tue, 11 Jun 2024 14:40:29 +0000 (16:40 +0200)]
tcl/interface: support for Raspberry Pi 5
Make sure raspberrypi-native.cfg cannot be used on RPi5.
Add raspberrypi5-gpiod.cfg which uses linuxgpiod adapter driver.
Issue a warning if PCIe is in power save mode.
While on it, re-format warnings issued from Tcl to look similar
to LOG_WARNING() output.
Change-Id: If19b0350bd5fff83d9a0c65999e33b161fb6957a Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/8333 Tested-by: jenkins Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
Timur Golubovich [Fri, 7 Jun 2024 13:42:16 +0000 (16:42 +0300)]
remote_bitbang: fix assertion failure for the cases when connection is abruptly terminated
Changes affect the function remote_bitbang_fill_buf.
When read_socket returns 0, socket reached EOF and there is
no data to read. But if request was blocking, the caller
expected some data. Such situations should be treated as ERROR.
Change-Id: I02ed484e61fb776c1625f6e36ab14c85891939b2 Signed-off-by: Timur Golubovich <timur.golubovich@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8325 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Antonio Borneo [Sun, 17 Sep 2023 09:15:22 +0000 (11:15 +0200)]
itm: fix default initialization
Commit f9509c92dba3 ("itm: rework itm commands before 'init'")
ignores the default enable of ITM channel 0, that is applied when
no 'itm port[s]' is issued.
Call armv7m_trace_itm_config() unconditionally to handle it.
Change-Id: I3e85d0b063ed38c1552f6af9ea9eea2e76aa9025 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reported-by: Paul Fertser <fercerpav@gmail.com> Fixes: f9509c92dba3 ("itm: rework itm commands before 'init'")
Reviewed-on: https://review.openocd.org/c/openocd/+/7900 Reviewed-by: <post@frankplowman.com> Tested-by: jenkins
Antonio Borneo [Tue, 14 May 2024 12:40:07 +0000 (14:40 +0200)]
target: aarch64: access reg SPSR_EL1 only in EL1, EL2 and EL3
The register SPSR_EL1 is accessible and it's content is relevant
only when the target is in EL1 or EL2 or EL3.
Plus, the register is 64 bits wide.
Without this patch, an error:
Error: Opcode 0xd5384000, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
x/p $SPSR_EL1
or through OpenOCD command
reg SPSR_EL1
Detect the EL and return error if the register cannot be accessed.
Handle the register as 64 bits.
Change-Id: Ia0f984d52920cc32b8ee31157d62c13dea616a3a Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8276 Tested-by: jenkins
Antonio Borneo [Tue, 14 May 2024 12:23:07 +0000 (14:23 +0200)]
target: aarch64: access reg ESR_EL1 only in EL1, EL2 and EL3
The register ESR_EL1 is accessible and it's content is relevant
only when the target is in EL1 or EL2 or EL3.
Plus, the register is 64 bits wide.
Without this patch, an error:
Error: Opcode 0xd5385200, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
x/p $ESR_EL1
or through OpenOCD command
reg ESR_EL1
Detect the EL and return error if the register cannot be accessed.
Handle the register as 64 bits.
Change-Id: Icd65470c279e5cfd03091db6435cdaa1c447644c Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8275 Tested-by: jenkins
Antonio Borneo [Tue, 14 May 2024 12:17:39 +0000 (14:17 +0200)]
target: aarch64: access reg ELR_EL1 only in EL1, EL2 and EL3
The register ELR_EL1 is accessible and it's content is relevant
only when the target is in EL1 or EL2 or EL3.
Without this patch, an error:
Error: Opcode 0xd5384020, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
x/p $ELR_EL1
or through OpenOCD command
reg ELR_EL1
Detect the EL and return error if the register cannot be accessed.
Change-Id: I402dda4cd9dae502b05572fc6c1a8f0edf349bb1 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8274 Tested-by: jenkins
Antonio Borneo [Tue, 14 May 2024 10:16:13 +0000 (12:16 +0200)]
target: aarch64: access reg SPSR_EL2 only in EL2 and EL3
The register SPSR_EL2 is accessible and it's content is relevant
only when the target is in EL2 or EL3.
Virtualization SW in EL1 can also access it, but this either
triggers a trap to EL2 or returns SPSR_EL1. Debugger should not
mix the real SPSR_EL2 with the virtual register.
Plus, the register is 64 bits wide.
Without this patch, an error:
Error: Opcode 0xd53c4000, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
x/p $SPSR_EL2
or through OpenOCD command
reg SPSR_EL2
Detect the EL and return error if the register cannot be accessed.
Handle the register as 64 bits.
Change-Id: If3792296b36282c08d597dd46cfe044d6b8288ea Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8273 Tested-by: jenkins
Antonio Borneo [Tue, 14 May 2024 10:07:58 +0000 (12:07 +0200)]
target: aarch64: access reg ESR_EL2 only in EL2 and EL3
The register ESR_EL2 is accessible and it's content is relevant
only when the target is in EL2 or EL3.
Virtualization SW in EL1 can also access it, but this either
triggers a trap to EL2 or returns ESR_EL1. Debugger should not mix
the real ESR_EL2 with the virtual register.
Plus, the register is 64 bits wide.
Without this patch, an error:
Error: Opcode 0xd53c5200, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
x/p $ESR_EL2
or through OpenOCD command
reg ESR_EL2
Detect the EL and return error if the register cannot be accessed.
Handle the register as 64 bits.
Change-Id: Icb32b44886d50907f29b068ce61e4be8bed10208 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8272 Tested-by: jenkins
Antonio Borneo [Tue, 14 May 2024 09:03:45 +0000 (11:03 +0200)]
target: aarch64: access reg ELR_EL2 only in EL2 and EL3
The register ELR_EL2 is accessible and it's content is relevant
only when the target is in EL2 or EL3.
Virtualization SW in EL1 can also access it, but this either
triggers a trap to EL2 or returns ELR_EL1. Debugger should not mix
the real ELR_EL2 with the virtual register.
Without this patch, an error:
Error: Opcode 0xd53c4020, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
x/p $ELR_EL2
or through OpenOCD command
reg ELR_EL2
Detect the EL and return error if the register cannot be accessed.
Change-Id: Idf02b42a7339df83260c1e44ceabbb05fbf392b9 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8271 Tested-by: jenkins
Antonio Borneo [Tue, 14 May 2024 08:40:32 +0000 (10:40 +0200)]
target: aarch64: access reg SPSR_EL3 only in EL3
The register SPSR_EL3 is accessible and it's content is relevant
only when the target is in EL3.
Plus, the register is 64 bits wide.
Without this patch, an error:
Error: Opcode 0xd53e4000, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
x/p $SPSR_EL3
or through OpenOCD command
reg SPSR_EL3
Detect the EL and return error if the register cannot be accessed.
Handle the register as 64 bits.
Change-Id: I00849d99feeb96589c426fcafda98127dbd19a67 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8270 Tested-by: jenkins
Antonio Borneo [Tue, 14 May 2024 08:03:09 +0000 (10:03 +0200)]
target: aarch64: access reg ESR_EL3 only in EL3
The register ESR_EL3 is accessible and it's content is relevant
only when the target is in EL3.
Plus, the register is 64 bits wide.
Without this patch, an error:
Error: Opcode 0xd53e5200, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
x/p $ESR_EL3
or through OpenOCD command
reg ESR_EL3
Detect the EL and return error if the register cannot be accessed.
Handle the register as 64 bits.
Drop the FIXME comment on Aarch32 case, as the register exists in
Aarch64 only.
Change-Id: Ie8c69dc7b50ae81a52506cf151c8e64e15752d0d Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8269 Tested-by: jenkins
Antonio Borneo [Mon, 13 May 2024 16:19:55 +0000 (18:19 +0200)]
target: aarch64: access reg ELR_EL3 only in EL3
The register ELR_EL3 is accessible and it's content is relevant
only when the target is in EL3.
Without this patch, an error:
Error: Opcode 0xd53e4020, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
x/p $ELR_EL3
or through OpenOCD command
reg ELR_EL3
Detect the EL and return error if the register cannot be accessed.
Change-Id: I545abb196e5c34e462c7e5d5d3ec952e588642da Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8268 Tested-by: jenkins
Antonio Borneo [Mon, 13 May 2024 15:20:52 +0000 (17:20 +0200)]
target: armv8_dpm: silence error on register R/W
The command 'gdb_report_register_access_error' is used to silence
errors while reading registers and not reporting them to GDB.
Nevertheless, the error is printed by a LOG_ERROR() in armv8_dpm.
Change the message to LOG_DEBUG().
It will still cause the error to be propagated and eventually
printed by the caller (e.g. by the command 'reg').
Change-Id: Ic0db74fa28235d686ddd21a5960c52ae003e0931 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8267 Tested-by: jenkins
Antonio Borneo [Mon, 13 May 2024 13:40:15 +0000 (15:40 +0200)]
target: aarch64: align armv8_read_reg() and armv8_read_reg32()
These functions are today always called with non-NULL parameter
regval, so the actual check is not needed.
Anyway, for any future code change, check the parameter at the
entry of the functions and return error if it is not valid.
Simplify the check to assign the result value and align the code
of the two functions.
Change-Id: Ie4d98063006d70d9e2bcfc00bc930133caf33515 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8266 Tested-by: jenkins
Tomas Vanek [Fri, 17 May 2024 19:27:24 +0000 (21:27 +0200)]
target/cortex_m: allow poll quickly get out of TARGET_RESET state
cortex_m_poll_one() detects reset testing S_RESET_ST sticky bit.
If the signal comes unexpectedly, poll must return TARGET_RESET state.
On the contrary in case of polling inside of an OpenOCD reset command,
TARGET_RESET has been has already been set and we need to get out of
it as quickly as possible.
The original code needs 2 polls: the first clears S_RESET_ST
and keeps TARGET_RESET state, the current TARGET_RUNNING or TARGET_HALTED
is reflected as late as the second poll is done.
Change the logic to keep in TARGET_RESET only when necessary.
See also [1]
Link: [1] 8284: tcl/target: ti_cc3220sf: Use halt for CC3320SF targets | https://review.openocd.org/c/openocd/+/8284 Fixes: https://sourceforge.net/p/openocd/tickets/360/ Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: I759461e5f89ca48a6e16e4b4101570260421dba1
Reviewed-on: https://review.openocd.org/c/openocd/+/8285 Tested-by: jenkins Reviewed-by: Dhruva Gole <d-gole@ti.com>
Antonio Borneo [Sun, 26 May 2024 10:38:43 +0000 (12:38 +0200)]
target/arm_tpiu_swo: Fix memory leak on error
In case of fail to allocate 'obj->name', the memory allocated for
'obj->out_filename' is not freed, thus leaking.
Since 'obj' is allocated with calloc(), thus zeroed, switch to use
the common error exit path for both allocations of 'obj->name' and
'obj->out_filename'.
Fixes: 2506ccb50915 ("target/arm_tpiu_swo: Fix division by zero")
Change-Id: I412f66ddd7bf7d260cee495324058482b26ff0c5 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8300 Tested-by: jenkins Reviewed-by: zapb <dev@zapb.de>
Evgeniy Naydanov [Mon, 27 May 2024 11:54:05 +0000 (14:54 +0300)]
fix GCC's `-Wcalloc-transposed-args` warning
GCC 14.1.0 warns about calls to `calloc()` with element size as the
first argument. Link: https://gcc.gnu.org/onlinedocs/gcc-14.1.0/gcc/Warning-Options.html#index-Wcalloc-transposed-args
Change-Id: I7d44a74a003ee6ec49d165f91727972478214587 Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8301 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tomas Vanek [Mon, 22 Jan 2024 20:09:31 +0000 (21:09 +0100)]
flash/nor/nrf5: handle ERROR_WAIT during nRF91 flash erase
Erase is initiated by write to a flash address. Due to the
silicon errata of nRF91 the write stalls the bus until the page erase
is finished (takes up to 87ms).
If the adapter does not handle SWD WAIT properly, the following read
in nrf5_wait_for_nvmc() returns ERROR_WAIT.
Wait for fixed time before accessing AP. Not nice, but the only
working solution until all adapters handle SWD WAIT.
If the fixed wait does not suffice, continue the wait loop after a delay.
It makes some unnecessary noise however erase works.
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: I63faf38dad79440a0117ed79930442bd2843c6db
Reviewed-on: https://review.openocd.org/c/openocd/+/8115 Reviewed-by: Tomáš Beneš <tomas@dronetag.cz> Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tomas Vanek [Mon, 22 Jan 2024 11:45:49 +0000 (12:45 +0100)]
flash/nor/nrf5: add basic nRF53 and nRF91 support
Probes all flash and UICR areas.
Flash erase and write tested.
On nRF53 mass erase works on the application core flash bank only.
The Tcl script nrf53_recover can serve as the workaround on the
network core.
TODO: mass erase of the nRF53 network core flash.
Some ideas taken from [1] and [2].
Change-Id: I8e27a780f4d82bcabf029f79b87ac46cf6a531c7
Link: [1] 7404: flash: nor: add support for Nordic nRF9160 | https://review.openocd.org/c/openocd/+/7404
Link: [2] 8062: flash: nor: add support for Nordic nRF9160 | https://review.openocd.org/c/openocd/+/8062 Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/8112 Reviewed-by: Tomáš Beneš <tomas@dronetag.cz> Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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