Olof Johansson [Sat, 26 Sep 2020 16:46:29 +0000 (09:46 -0700)]
Merge tag 'hisi-arm32-dt-for-5.10' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM: DT: Hisilicon ARM32 SoCs DT updates for 5.10
- Update the SP804 nodes to have the correct clocks and
clock names for the hi3620 SoC
- Update the SP805 nodes to have the correct clocks and
clock names for the hix5hd2 SoC
* tag 'hisi-arm32-dt-for-5.10' of git://github.com/hisilicon/linux-hisi:
ARM: dts: hisilicon: Fix SP805 clocks
ARM: dts: hisilicon: Fix SP804 users
Olof Johansson [Sat, 26 Sep 2020 16:46:09 +0000 (09:46 -0700)]
Merge tag 'hisi-arm64-dt-for-5.10' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM64: DT: Hisilicon ARM64 SoCs DT updates for 5.10
- Change the status properties from "ok" to "okay" for
all the hisilicon SoCs
- Update the SP805 nodes to have the correct clocks and
clock names for the hi3660 and hi6220 SoCs
* tag 'hisi-arm64-dt-for-5.10' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hisilicon: Fix SP805 clocks
arm64: dts: hisilicon: replace status value "ok" by "okay"
Lars Povlsen [Mon, 24 Aug 2020 20:30:07 +0000 (22:30 +0200)]
arm64: dts: sparx5: Add SPI controller and associated mmio-mux
This adds a SPI controller to the Microchip Sparx5 SoC, as well as the
mmio-mux that is required to select the right SPI interface for a
given SPI device.
Andre Przywara [Mon, 7 Sep 2020 12:18:31 +0000 (13:18 +0100)]
ARM: dts: hisilicon: Fix SP805 clocks
The SP805 DT binding requires two clocks to be specified, but
Hisilicon platform DTs currently only specify one clock.
In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency.
Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Andre Przywara [Mon, 7 Sep 2020 12:18:26 +0000 (13:18 +0100)]
ARM: dts: hisilicon: Fix SP804 users
The SP804 binding only specifies one or three clocks, but does not allow
just two clocks.
The HiSi 3620 .dtsi specified two clocks for the two timers, plus gave
one "apb_pclk" clock-name to appease the primecell bus driver.
Extend the clocks by duplicating the first clock to the end of the clock
list, and add two dummy clock-names to make the primecell driver happy.
I don't know what the real APB clock for the IP is, but with the current
DT the first timer clock was used for that, so this change keeps the
current status.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Andre Przywara [Mon, 7 Sep 2020 12:18:29 +0000 (13:18 +0100)]
arm64: dts: hisilicon: Fix SP805 clocks
The SP805 DT binding requires two clocks to be specified, but
Hisilicon platform DTs currently only specify one clock.
In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency.
Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Adrian Schmutzler [Sun, 30 Aug 2020 20:05:51 +0000 (22:05 +0200)]
arm64: dts: hisilicon: replace status value "ok" by "okay"
While the DT parser recognizes "ok" as a valid value for the
"status" property, it is actually mentioned nowhere. Use the
proper value "okay" instead, as done in the majority of files
already.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Olof Johansson [Sun, 13 Sep 2020 18:36:10 +0000 (11:36 -0700)]
Merge tag 'arm-soc/for-5.10/devicetree-arm64' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM64-based SoCs changes for 5.10,
please pull the following:
- Adrian changes the status properties from "ok" to "okay"
- Andre fixes the SP805 watchdog nodes to have the correct clock names
and binding for the Northstar 2 platform
* tag 'arm-soc/for-5.10/devicetree-arm64' of https://github.com/Broadcom/stblinux:
arm64: dts: broadcom: Fix SP805 clock-names
arm64: dts: broadcom: replace status value "ok" by "okay"
Olof Johansson [Sun, 13 Sep 2020 18:34:24 +0000 (11:34 -0700)]
Merge tag 'arm-soc/for-5.10/devicetree' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoCs changes for 5.10,
please pull the following:
- Christian adds support for the Cisco Meraki MR32 which is based on the
BCM53016 SoC, this requires specifying the PWM, second UART and third
PCIe controller in Device Tree before finally adding support for the
board.
- Adrian updates the status properties from "ok" to "okay".
- Andre fixes the SP805 watchdog nodes to have the correct clock names
and binding for both the Cygnus and Northstar Plus (NSP). He does the
same thing with the SP804 timer node which was missing an
"arm,primecell" compatible string.
- Maxime enables the BCM2711 (Raspberry Pi 4) display pipeline since all
DRM changes are ready.
* tag 'arm-soc/for-5.10/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: broadcom: Fix SP804 node
ARM: dts: NSP: Fix SP805 clock-names
ARM: dts: Cygnus: Fix SP805 clocks
ARM: dts: NSP: replace status value "ok" by "okay"
ARM: BCM5301X: Add DT for Meraki MR32
ARM: dts: bcm2711: Enable the display pipeline
ARM: dts: BCM5301X: Specify pcie2 in the DT
ARM: dts: BCM5301X: Specify uart2 in the DT
ARM: dts: BCM5301X: Specify PWM in the DT
dt-bindings: ARM: add bindings for the Meraki MR32
Olof Johansson [Sun, 13 Sep 2020 18:32:36 +0000 (11:32 -0700)]
Merge tag 'dt64-schema-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Various minor cleanups for arm64 Amazon DTS
Cleanup arm64 DTS to remove dtschema validation errors.
* tag 'dt64-schema-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: alpine: Fix GIC unit address
arm64: dts: alpine: Align GIC nodename with dtschema
Olof Johansson [Sun, 13 Sep 2020 18:22:56 +0000 (11:22 -0700)]
Merge tag 'samsung-dt64-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM64 changes for v5.10
Cleanup of Exynos DTS to fix as many dtschema warnings as possible.
This includes adding missing compatibles and using non-deprecated
properties. Changes should not have a visible impact.
* tag 'samsung-dt64-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Add compatibles to sysreg nodes
arm64: dts: exynos: Replace deprecated "gpios" i2c-gpio property in Exynos5433
Olof Johansson [Sun, 13 Sep 2020 18:22:36 +0000 (11:22 -0700)]
Merge tag 'samsung-dt-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.10
1. Add sound support to Galaxy S3/Midas family (Exynos4412).
2. Add sound support to Galaxy S/Aries family (S5Pv210).
3. Configure L2C-310 cache controller via DTS on Exynos4.
4. Big cleanup of Exynos DTS to fix as many dtschema warnings as
possible. This includes adding missing properties (thus e.g.
enabling S3C RTC clock), correcting existing nodes, renaming of
nodes and using non-deprecated properties or compatibles. Except
mentioned bring up of S3C RTC, this should not have visible
effect.
* tag 'samsung-dt-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (49 commits)
ARM: dts: exynos: Silence SATA PHY warning in Exynos5250
ARM: dts: exynos: Remove I2C9 samsung, i2c-slave-addr from Exynos5250 boards
ARM: dts: samsung: odroid-xu3: Move assigned-clock* properties to i2s0 node
ARM: dts: exynos: Use S2MPS11 clock in S3C RTC in SMDK5420
ARM: dts: exynos: Silence DP HPD pinctrl dtschema warning in Exynos5250 Spring
ARM: dts: exynos: Use S5M8767 clock in S3C RTC in Exynos5250 Spring
ARM: dts: exynos: Add max77686 clocks for S3C RTC in SMDK5250
ARM: dts: exynos: Override thermal by label in Exynos5250
ARM: dts: exynos: Correct whitespace and indentation issues in Exynos5
ARM: dts: exynos: Silence i2c-gpio dtschema warning in Exynos5250 Arndale
ARM: dts: exynos: Correct S3C RTC bindings in SMDK5410
ARM: dts: exynos: Remove unneeded address/size cells in Exynos5260 GIC
ARM: dts: exynos: Correct compatible for Exynos5260 GIC
ARM: dts: exynos: Correct compatible for Exynos5 GIC
ARM: dts: s5pv210: Enable audio on Aries boards
ARM: dts: exynos: Correct whitespace and indentation issues
ARM: dts: exynos: Correct S3C RTC bindings in Tiny4412
ARM: dts: exynos: Correct S3C RTC bindings in SMDK4412
ARM: dts: exynos: Add CPU cooling in Tiny4412
ARM: dts: exynos: Add CPU cooling in SMDK4412
...
Olof Johansson [Sun, 13 Sep 2020 18:21:22 +0000 (11:21 -0700)]
Merge tag 'renesas-arm-dt-for-v5.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.10
- Increase support for the RZ/G2H SoC on the HopeRun HiHope RZ/G2H
board, and its display panel expansion board,
- Increase support for the RZ/G1H SoC on the iWave RainboW SoM (G21M)
and Qseven board (G21D),
- SATA support for the HopeRun HiHope RZ/G2N board,
- PCIe endpoint support for the RZ/G2M, RZ/G2E, and RZ/G2H SoCs,
- Audio support for the R-Car M3-W+ SoC.
- Minor fixes and improvements.
* tag 'renesas-arm-dt-for-v5.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (39 commits)
arm64: dts: renesas: Add HiHope RZ/G2H board with idk-1110wr display
arm64: dts: renesas: r8a774e1: Add cpuidle support for CA5x cores
arm64: dts: renesas: r8a774e1: Add FDP1 device nodes
ARM: dts: r8a7742-iwg21d-q7: Enable PCIe Controller
ARM: dts: r8a7742: Add IPMMU DT nodes
arm64: dts: renesas: r8a77961: Enable Sound / Audio-DMAC
arm64: dts: renesas: r8a774e1: Add PWM device nodes
ARM: dts: r8a7742-iwg21m: Add SPI NOR support
arm64: dts: renesas: r8a774e1-hihope-rzg2h: Enable HS400 mode
ARM: dts: r8a7742-iwg21m: Add RTC support
ARM: dts: r8a7742-iwg21m: Sort the nodes alphabetically
ARM: dts: r8a7742: Add CAN support
arm64: dts: renesas: r8a774c0: Add PCIe EP node
arm64: dts: renesas: r8a774b1: Add PCIe EP nodes
arm64: dts: renesas: r8a774a1: Add PCIe EP nodes
ARM: dts: r8a7742: Add QSPI support
arm64: dts: renesas: r8a774e1-hihope-rzg2h: Setup DU clocks
arm64: dts: renesas: r8a774e1: Add LVDS device node
arm64: dts: renesas: r8a774e1: Populate HDMI encoder node
arm64: dts: renesas: r8a774e1: Populate DU device node
...
Krzysztof Kozlowski [Fri, 26 Jun 2020 07:56:10 +0000 (09:56 +0200)]
ARM: dts: zx: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
l2-cache-controller@c00000: $nodename:0:
'l2-cache-controller@c00000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Jun Nie <jun.nie@linaro.org>
Krzysztof Kozlowski [Fri, 26 Jun 2020 07:54:52 +0000 (09:54 +0200)]
ARM: dts: tango: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
l2-cache-controller@20100000: $nodename:0:
'l2-cache-controller@20100000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Mans Rullgard <mans@mansr.com>
Krzysztof Kozlowski [Fri, 26 Jun 2020 07:52:31 +0000 (09:52 +0200)]
ARM: dts: prima: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
l2-cache-controller@80040000: $nodename:0:
'l2-cache-controller@80040000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Barry Song <baohua@kernel.org>
Andre Przywara [Wed, 26 Aug 2020 18:38:01 +0000 (19:38 +0100)]
ARM: dts: broadcom: Fix SP804 node
The DT binding for SP804 requires to have an "arm,primecell" compatible
string.
Add this string so that the Linux primecell bus driver picks the device
up and activates the clock.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Florian Fainelli <f.fainelli@gmail.com>
[florian: added compatible to ccbtimer1] Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Andre Przywara [Fri, 28 Aug 2020 13:06:01 +0000 (14:06 +0100)]
ARM: dts: NSP: Fix SP805 clock-names
The SP805 binding sets the name for the actual watchdog clock to
"wdog_clk" (with an underscore).
Change the name in the DTs for the Broadcom NSP platform to match that.
The Linux and U-Boot driver use the *first* clock for this purpose
anyway, so it does not break anything.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Ray Jui <ray.jui@broadcom.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Andre Przywara [Fri, 28 Aug 2020 13:06:00 +0000 (14:06 +0100)]
ARM: dts: Cygnus: Fix SP805 clocks
The SP805 DT binding requires two clocks to be specified, but the
Broadcom Cygnus DT currently only specifies one clock.
In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency.
Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Ray Jui <ray.jui@broadcom.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Adrian Schmutzler [Sun, 30 Aug 2020 19:54:41 +0000 (21:54 +0200)]
ARM: dts: NSP: replace status value "ok" by "okay"
While the DT parser recognizes "ok" as a valid value for the
"status" property, it is actually mentioned nowhere. Use the
proper value "okay" instead, as done in the majority of files
already.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
BLE: Broadcom BCM20732 (ttyS1)
LEDS: 1 x Programmable RGB Status LED (driven by a PWM)
1 x White LED (GPIO)
1 x Orange LED Fault Indicator (GPIO)
2 x LAN Activity / Speed LEDs (On the RJ45 Port)
BUTTON: one Reset button
MISC: AT24C64 8KiB EEPROM (i2c - stores Ethernet MAC)
ina219 hardware monitor (i2c)
Kensington Lock
SERIAL:
WARNING: The serial port needs a TTL/RS-232 3V3 level converter!
The Serial setting is 115200-8-N-1. The board has a populated
right angle 1x4 0.1" pinheader.
The pinout is: VCC, RX, TX, GND.
Odd stuff:
- uart0 clock frequency is 62.5 MHz.
- The LEDs are labeled as SYS-LED1 through SYS-LED3
because of the silkscreen on the PCB.
- the original u-boot has been compiled with most functions
and commands disabled. The u-boot env isn't setup properly
either and as a result, the bcm47xxpart probing is not
working. Hence, the nand partitions are specified through a
"fixed-partition" binding.
- The "WICED SMART(TM)" Bluetooth LE 4.0 BCM20732 chip is
connected to uart2 of the SoC. The BCM20732 does not
provide a HCI. So the linux' bluetooth stack is useless.
The mock-up node with the compatible binding and
enable-gpios property is provided solely as documentation.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Joel Stanley [Wed, 12 Aug 2020 11:24:00 +0000 (20:54 +0930)]
ARM: aspeed: g5: Do not set sirq polarity
A feature was added to the aspeed vuart driver to configure the vuart
interrupt (sirq) polarity according to the LPC/eSPI strapping register.
Systems that depend on a active low behaviour (sirq_polarity set to 0)
such as OpenPower boxes also use LPC, so this relationship does not
hold. Jeremy confirms that the s2600st which is strapped for eSPI also
does not have this relationship.
The property was added for a Tyan S7106 system which is not supported
in the kernel tree. Should this or other systems wish to use this
feature of the driver they should add it to the machine specific device
tree.
Fixes: c791fc76bc72 ("arm: dts: aspeed: Add vuart aspeed,sirq-polarity-sense...") Signed-off-by: Joel Stanley <joel@jms.id.au> Tested-by: Jeremy Kerr <jk@ozlabs.org> Reviewed-by: Jeremy Kerr <jk@ozlabs.org> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20200812112400.2406734-1-joel@jms.id.au Signed-off-by: Joel Stanley <joel@jms.id.au>
Andre Przywara [Fri, 28 Aug 2020 13:05:54 +0000 (14:05 +0100)]
arm64: dts: arm: Fix SP805 clock-names
The SP805 binding sets the name for the actual watchdog clock to
"wdog_clk" (with an underscore).
Change the name in the DTs for ARM Ltd. platforms to match that. The
Linux and U-Boot driver use the *first* clock for this purpose anyway,
so it does not break anything.
Andre Przywara [Fri, 28 Aug 2020 13:05:59 +0000 (14:05 +0100)]
ARM: dts: arm: Fix SP805 clocks
The SP805 binding sets the name for the actual watchdog clock to
"wdog_clk" (with an underscore).
Change the name in the DTs for ARM Ltd. platforms to match that. The
Linux and U-Boot driver use the *first* clock for this purpose anyway,
so it does not break anything.
For MPS2 we only specify one clock so far, but the binding requires
two clocks to be named.
In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency. So since currently both
are the very same clock, we can just double the clock reference, and add
the correct clock-names, to match the binding.
Andre Przywara [Fri, 28 Aug 2020 14:20:14 +0000 (15:20 +0100)]
ARM: dts: arm: Fix SP804 users
The SP804 DT nodes for Realview, MPS2 and VExpress were not complying
with the binding: it requires either one or three clocks, but does not
allow exactly two clocks.
Simply duplicate the first clock to satisfy the binding requirement.
For MPS2, we triple the clock, and add the clock-names property, as this
is required by the Linux primecell driver.
Try to make the clock-names more consistent on the way.
Krzysztof Kozlowski [Wed, 2 Sep 2020 15:57:33 +0000 (17:57 +0200)]
ARM: dts: exynos: Silence SATA PHY warning in Exynos5250
The SATA PHY in Exynos5250 SoCs has two interfaces and two device nodes:
1. sata-phy@12170000
2. i2c-9/i2c@38
The first node represents the actual SATA PHY device with phy-cells.
The second represents an additional I2C interface, needed by the driver
to communicate with the SATA PHY device. It is not a PHY-provider in
the terms of dtschema so rename it to silence dtbs_check warning:
arch/arm/boot/dts/exynos5250-arndale.dt.yaml: sata-phy@38: '#phy-cells' is a required property
From schema: lib/python3.6/site-packages/dtschema/schemas/phy/phy-provider.yaml
This second device node is also a property of SoC, not a board so move
it there.
Krzysztof Kozlowski [Wed, 2 Sep 2020 15:57:32 +0000 (17:57 +0200)]
ARM: dts: exynos: Remove I2C9 samsung, i2c-slave-addr from Exynos5250 boards
The property samsung,i2c-slave-addr in I2C9 controller on Exynos5250
Arndale and SMDK5250 boards, is not actually needed. There is only one
master on this bus. It's not clear why this property was added at first
place.
Krzysztof Kozlowski [Tue, 1 Sep 2020 07:54:17 +0000 (09:54 +0200)]
ARM: dts: exynos: Use S2MPS11 clock in S3C RTC in SMDK5420
Use the 32 kHz clock from S2MPS11 PMIC in the S3C RTC node. Except
making the S3C RTC working, this also fixes dtbs_check warnings:
arch/arm/boot/dts/exynos5420-smdk5420.dt.yaml: rtc@101e0000: clocks: [[2, 317]] is too short
arch/arm/boot/dts/exynos5420-smdk5420.dt.yaml: rtc@101e0000: clock-names: ['rtc'] is too short
Lad Prabhakar [Thu, 27 Aug 2020 18:19:18 +0000 (19:19 +0100)]
arm64: dts: renesas: Add HiHope RZ/G2H board with idk-1110wr display
The HiHope RZ/G2H is advertised as compatible with panel idk-1110wr from
Advantech, however the panel isn't sold alongside the board. New dts,
enabling the lvds node to get the panel to work with HiHope RZ/G2H.
Krzysztof Kozlowski [Tue, 1 Sep 2020 07:54:14 +0000 (09:54 +0200)]
ARM: dts: exynos: Silence DP HPD pinctrl dtschema warning in Exynos5250 Spring
The pin configuration of Display Port HPD GPIO emds with '-gpio' which
confuses dtschema:
arch/arm/boot/dts/exynos5250-spring.dt.yaml: pinctrl@11400000: dp-hpd-gpio:
{'samsung,pins': ['gpc3-0'], ... 'samsung,pin-drv': [[0]], 'phandle': [[23]]} is not of type 'array'
From schema: lib/python3.6/site-packages/dtschema/schemas/gpio/gpio-consumer.yaml
Krzysztof Kozlowski [Tue, 1 Sep 2020 07:54:13 +0000 (09:54 +0200)]
ARM: dts: exynos: Use S5M8767 clock in S3C RTC in Exynos5250 Spring
Use the 32 kHz clock from S5M8767 PMIC in the S3C RTC node. Except
making the S3C RTC working, this also fixes dtbs_check warnings:
arch/arm/boot/dts/exynos5250-spring.dt.yaml: rtc@101e0000: clocks: [[2, 337]] is too short
arch/arm/boot/dts/exynos5250-spring.dt.yaml: rtc@101e0000: clock-names: ['rtc'] is too short
Krzysztof Kozlowski [Tue, 1 Sep 2020 07:54:12 +0000 (09:54 +0200)]
ARM: dts: exynos: Add max77686 clocks for S3C RTC in SMDK5250
Add clock-cells to max77686 PMIC node so its 32 kHz clocks could be used
later in the S3C RTC node. Except making the S3C RTC working, this also
fixes dtbs_check warnings:
arch/arm/boot/dts/exynos5250-smdk5250.dt.yaml: rtc@101e0000: clocks: [[2, 337]] is too short
arch/arm/boot/dts/exynos5250-smdk5250.dt.yaml: rtc@101e0000: clock-names: ['rtc'] is too short
Krzysztof Kozlowski [Tue, 1 Sep 2020 07:54:11 +0000 (09:54 +0200)]
ARM: dts: exynos: Override thermal by label in Exynos5250
Using full paths to extend or override a device tree node is error prone
since if there was a typo error, a new node will be created instead of
extending the node as it was desired. This will lead to run-time errors
that could be hard to detect.
A mistyped label on the other hand, will cause a dtc compile error
(during build time).
Krzysztof Kozlowski [Tue, 1 Sep 2020 07:54:09 +0000 (09:54 +0200)]
ARM: dts: exynos: Silence i2c-gpio dtschema warning in Exynos5250 Arndale
The name of I2C controller over GPIO lines node ends with '-gpio' which
confuses dtschema:
arch/arm/boot/dts/exynos5250-arndale.dt.yaml: soc: i2c-gpio:
{'pinctrl-names': ['default'], ... 'phandle': [[65]]} is not of type 'array'
From schema: lib/python3.6/site-packages/dtschema/schemas/gpio/gpio-consumer.yaml
Add a '-10' (there are already 0-9 I2C controllers on the SoC) suffix to
silence it. This pattern on naming i2c-gpio is already present in many
other dts. No functional change.
Krzysztof Kozlowski [Tue, 1 Sep 2020 07:54:08 +0000 (09:54 +0200)]
ARM: dts: exynos: Correct S3C RTC bindings in SMDK5410
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However the PMIC is not described in DTS at all so at least add
a workaround to model its clock with a fixed-clock. This fixes S3C RTC
and silences dtbs_check warnings like:
arch/arm/boot/dts/exynos5410-smdk5410.dt.yaml: rtc@101e0000: clocks: [[5, 317]] is too short
arch/arm/boot/dts/exynos5410-smdk5410.dt.yaml: rtc@101e0000: clock-names: ['rtc'] is too short
Krzysztof Kozlowski [Tue, 1 Sep 2020 07:54:07 +0000 (09:54 +0200)]
ARM: dts: exynos: Remove unneeded address/size cells in Exynos5260 GIC
The Exynos5260 GIC node does not have any children so remove the address
and size cells as they are not needed by DT bindings. The size-cells of
'0' were also incorrect. This fixes dtbs_check warning:
arch/arm/boot/dts/exynos5260-xyref5260.dt.yaml: interrupt-controller@10481000: #size-cells:0:0: 1 was expected
Krzysztof Kozlowski [Tue, 1 Sep 2020 07:54:06 +0000 (09:54 +0200)]
ARM: dts: exynos: Correct compatible for Exynos5260 GIC
Exynos5260 SoCs have ARM GIC 400. Correct the compatibles to match
dtschema and fix the dtbs_check warnings like:
arch/arm/boot/dts/exynos5260-xyref5260.dt.yaml: interrupt-controller@10481000:
compatible: ['arm,cortex-a15-gic', 'arm,cortex-a9-gic'] is not valid under any of the given schemas
Krzysztof Kozlowski [Tue, 1 Sep 2020 07:54:05 +0000 (09:54 +0200)]
ARM: dts: exynos: Correct compatible for Exynos5 GIC
Exynos5250 and Exynso54xx SoCs have ARM GIC 400. Correct the
compatibles to match dtschema and fix the dtbs_check warnings like:
arch/arm/boot/dts/exynos5420-peach-pit.dt.yaml: interrupt-controller@10481000:
compatible: ['arm,gic-400', 'arm,cortex-a15-gic', 'arm,cortex-a9-gic']
is not valid under any of the given schemas
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:59 +0000 (15:51 +0200)]
ARM: dts: exynos: Correct S3C RTC bindings in Tiny4412
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However the PMIC is not described in DTS at all so at least add a
workaround to model its clock with fixed-clock. This fixes S3C RTC and
silences dtbs_check warnings like:
arch/arm/boot/dts/exynos4412-tiny4412.dt.yaml: rtc@10070000: clocks: [[7, 346]] is too short
arch/arm/boot/dts/exynos4412-tiny4412.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:58 +0000 (15:51 +0200)]
ARM: dts: exynos: Correct S3C RTC bindings in SMDK4412
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However the PMIC is not described in DTS at all so at least add a
workaround to model its clock with fixed-clock and silence dtbs_check
warnings like:
arch/arm/boot/dts/exynos4412-smdk4412.dt.yaml: rtc@10070000: clocks: [[7, 346]] is too short
arch/arm/boot/dts/exynos4412-smdk4412.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:57 +0000 (15:51 +0200)]
ARM: dts: exynos: Add CPU cooling in Tiny4412
Add missing cooling devices for CPU thermal zones in Exynos4412 Tiny4412
board. This allows to scale down CPU frequency (and voltage) in case of
thermal pressure.
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:56 +0000 (15:51 +0200)]
ARM: dts: exynos: Add CPU cooling in SMDK4412
Add missing cooling devices for CPU thermal zones in Exynos4412 SMDK4412
board. This allows to scale down CPU frequency (and voltage) in case of
thermal pressure.
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:55 +0000 (15:51 +0200)]
ARM: dts: exynos: Add CPU cooling in Exynos4412 Origen
Add missing cooling devices for CPU thermal zones in Exynos4412 Origen
board. This allows to scale down CPU frequency (and voltage) in case of
thermal pressure.
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:54 +0000 (15:51 +0200)]
ARM: dts: exynos: Override thermal by label in Exynos4412 Odroids
Using full paths to extend or override a device tree node is error prone
since if there was a typo error, a new node will be created instead of
extending the node as it was desired. This will lead to run-time errors
that could be hard to detect.
A mistyped label on the other hand, will cause a dtc compile error
(during build time).
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:53 +0000 (15:51 +0200)]
ARM: dts: exynos: Override thermal by label in Midas
Using full paths to extend or override a device tree node is error prone
since if there was a typo error, a new node will be created instead of
extending the node as it was desired. This will lead to run-time errors
that could be hard to detect.
A mistyped label on the other hand, will cause a dtc compile error
(during build time).
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:52 +0000 (15:51 +0200)]
ARM: dts: exynos: Add S5M8767 clocks for RTC in Exynos4412 Origen
Add node for clock controller of Samsung S5M8767 PMIC. This provides
the 32768 Hz clock required by S3C RTC. Except making the S3C RTC
working, this also fixes dtbs_check warnings:
arch/arm/boot/dts/exynos4412-origen.dt.yaml: rtc@10070000: clocks: [[7, 346]] is too short
arch/arm/boot/dts/exynos4412-origen.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:51 +0000 (15:51 +0200)]
ARM: dts: exynos: Correct compatible of fixed clocks in Midas boards
The fixed clocks implemented by Samsung clock drivers use only one
compatible so drop the additional "fixed-clock" to fix dtbs_check
warnings like:
arch/arm/boot/dts/exynos4412-i9300.dt.yaml: xxti: compatible:0: 'fixed-clock' was expected
From schema: Documentation/devicetree/bindings/clock/fixed-clock.yaml
arch/arm/boot/dts/exynos4412-i9300.dt.yaml: xxti: compatible: ['samsung,clock-xxti', 'fixed-clock'] is too long
arch/arm/boot/dts/exynos4412-i9300.dt.yaml: xxti: compatible: Additional items are not allowed ('fixed-clock' was unexpected)
arch/arm/boot/dts/exynos4412-i9300.dt.yaml: xxti: '#clock-cells' is a required property
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:49 +0000 (15:51 +0200)]
ARM: dts: exynos: Align MHL GPIO pin configuration with dtschema on Galaxy I9100
Align the name of mag-mhl-gpio node to avoid dtschema confusion and
dtbs_check warning:
arch/arm/boot/dts/exynos4210-i9100.dt.yaml: pinctrl@11000000: mag-mhl-gpio:
{'samsung,pins': ['gpd0-2'], 'samsung,pin-function': [[3]], 'samsung,pin-pud': [[0]]} is not of type 'array'
From schema: dtschema/schemas/gpio/gpio-consumer.yaml
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:48 +0000 (15:51 +0200)]
ARM: dts: exynos: Add CPU cooling in Universal C210
Add missing cooling devices for CPU thermal zones in Exynos4210
Universal C310 board. This allows to scale down CPU frequency (and
voltage) in case of thermal pressure.
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:47 +0000 (15:51 +0200)]
ARM: dts: exynos: Add CPU cooling in SMDKv310
Add missing cooling devices for CPU thermal zones in Exynos4210 SMDKv310
board. This allows to scale down CPU frequency (and voltage) in case of
thermal pressure.
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:46 +0000 (15:51 +0200)]
ARM: dts: exynos: Add CPU cooling in Exynos4210 Origen
Add missing cooling devices for CPU thermal zones in Exynos4210 Origen
board. This allows to scale down CPU frequency (and voltage) in case of
thermal pressure.
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:45 +0000 (15:51 +0200)]
ARM: dts: exynos: Override thermal by label in Trats
Using full paths to extend or override a device tree node is error prone
since if there was a typo error, a new node will be created instead of
extending the node as it was desired. This will lead to run-time errors
that could be hard to detect.
A mistyped label on the other hand, will cause a dtc compile error
(during build time).
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:44 +0000 (15:51 +0200)]
ARM: dts: exynos: Override thermal by label in Galaxy I9000
Using full paths to extend or override a device tree node is error prone
since if there was a typo error, a new node will be created instead of
extending the node as it was desired. This will lead to run-time errors
that could be hard to detect.
A mistyped label on the other hand, will cause a dtc compile error
(during build time).
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:43 +0000 (15:51 +0200)]
ARM: dts: exynos: Override thermal by label in Exynos4210
Using full paths to extend or override a device tree node is error prone
since if there was a typo error, a new node will be created instead of
extending the node as it was desired. This will lead to run-time errors
that could be hard to detect.
A mistyped label on the other hand, will cause a dtc compile error
(during build time).
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:34 +0000 (15:51 +0200)]
ARM: dts: exynos: Correct S3C RTC bindings in SMDKv310
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However there is no clock provided for the PMIC and the driver registers
the clock as regulator. This is an old driver which will not be updated
so add a workaround - a fixed-clock to fill missing clock phandle
reference in S3C RTC.
This allows to enable the S3C RTC and fixes dtbs_check warnings:
arch/arm/boot/dts/exynos4210-smdkv310.dt.yaml: rtc@10070000: clocks: [[5, 346]] is too short
arch/arm/boot/dts/exynos4210-smdkv310.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:33 +0000 (15:51 +0200)]
ARM: dts: exynos: Correct S3C RTC bindings and enable it in Universal C210
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However there is no clock provided for the PMIC and the driver registers
the clock as regulator. This is an old driver which will not be updated
so add a workaround - add a fixed-clock to fill missing clock phandle
reference in S3C RTC. The "clock" regulator in PMIC is already present
and enabled.
This allows to enable the S3C RTC and fixes dtbs_check warnings:
arch/arm/boot/dts/exynos4210-universal_c210.dt.yaml: rtc@10070000: clocks: [[5, 346]] is too short
arch/arm/boot/dts/exynos4210-universal_c210.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:32 +0000 (15:51 +0200)]
ARM: dts: exynos: Correct S3C RTC bindings and enable it in Trats
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC
(Maxim MAX8997). However there is no clock provided for the PMIC and
the driver registers the clock as regulator. This is an old driver
which will not be updated so add a workaround:
1. Enable the "clock" regulator in PMIC,
2. Add a fixed-clock to fill missing clock phandle reference in S3C RTC.
This allows to enable the S3C RTC and fixes dtbs_check warnings:
arch/arm/boot/dts/exynos4210-trats.dt.yaml: rtc@10070000: clocks: [[5, 346]] is too short
arch/arm/boot/dts/exynos4210-trats.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:31 +0000 (15:51 +0200)]
ARM: dts: exynos: Correct S3C RTC bindings and enable it in Origen
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC
(Maxim MAX8997). However there is no clock provided for the PMIC and
the driver registers the clock as regulator. This is an old driver
which will not be updated so add a workaround:
1. Enable the "clock" regulator in PMIC,
2. Add a fixed-clock to fill missing clock phandle reference in S3C RTC.
This allows to enable the S3C RTC and fixes dtbs_check warnings:
arch/arm/boot/dts/exynos4210-origen.dt.yaml: rtc@10070000: clocks: [[5, 346]] is too short
arch/arm/boot/dts/exynos4210-origen.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:30 +0000 (15:51 +0200)]
ARM: dts: exynos: Correct S3C RTC bindings and enable it in Galaxy I9100
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC
(Maxim MAX8997). However there is no clock provided for the PMIC and
the driver registers the clock as regulator. This is an old driver
which will not be updated so add a workaround:
1. Enable the "clock" regulator in PMIC,
2. Add a fixed-clock to fill missing clock phandle reference in S3C RTC.
This allows to enable the S3C RTC and fixes dtbs_check warnings:
arch/arm/boot/dts/exynos4210-i9100.dt.yaml: rtc@10070000: clocks: [[5, 346]] is too short
arch/arm/boot/dts/exynos4210-i9100.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:28 +0000 (15:51 +0200)]
ARM: dts: exynos: Silence i2c-gpio dtschema warning in Galaxy I9100
The name of I2C controller over GPIO lines node ends with '-gpio' which
confuses dtschema:
/arch/arm/boot/dts/exynos4210-i9100.dt.yaml: /: i2c-gpio:
{'compatible': ['i2c-gpio'], ... 'maxim,over-volt': [[4500]]}} is not of type 'array'
From schema: lib/python3.6/site-packages/dtschema/schemas/gpio/gpio-consumer.yaml
Add a '-0' suffix to silence it. This pattern on naming i2c-gpio is
already present in many other dts. No functional change.
Krzysztof Kozlowski [Sat, 29 Aug 2020 17:25:32 +0000 (19:25 +0200)]
ARM: dts: exynos: Remove snps, dwc2 compatible in Exynos3250
The binding for DesignWare HS OTG USB 2.0 in Samsung SoCs take only one
compatible. This fixes dtbs_check warnings like:
arch/arm/boot/dts/exynos3250-artik5-eval.dt.yaml: hsotg@12480000:
compatible: ['samsung,s3c6400-hsotg', 'snps,dwc2'] is not valid under any of the given schemas (Possible causes of the failure):
Krzysztof Kozlowski [Sat, 29 Aug 2020 17:25:30 +0000 (19:25 +0200)]
ARM: dts: exynos: Move fixed clocks under root node in Exynos3250
The fixed clocks are kept under dedicated node fixed-rate-clocks, thus a
fake "reg" was added. This is not correct with dtschema as fixed-clock
binding does not have a "reg" property:
arch/arm/boot/dts/exynos3250-artik5-eval.dt.yaml: clock@0: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+'
Krzysztof Kozlowski [Sat, 29 Aug 2020 14:24:58 +0000 (16:24 +0200)]
arm64: dts: exynos: Replace deprecated "gpios" i2c-gpio property in Exynos5433
"gpios" property is deprecated. Update the Exynos5433 DTS to fix
dtbs_checks warnings like:
arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml: i2c-gpio-0: 'sda-gpios' is a required property
arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml: i2c-gpio-0: 'scl-gpios' is a required property
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