Olof Johansson [Thu, 11 Apr 2013 11:02:34 +0000 (04:02 -0700)]
Merge branch 'omap/fixes-non-critical' into next/dt2
Merging in dependencies for the omap/dt branch.
* omap/fixes-non-critical:
ARM: OMAP2+: fix typo "CONFIG_BRIDGE_DVFS"
ARM: OMAP1: remove "config MACH_OMAP_HTCWIZARD"
ARM: OMAP: dpll: enable bypass clock only when attempting dpll bypass
ARM: OMAP2+: powerdomain: avoid testing whether an unsigned char is less than 0
ARM: OMAP2+: hwmod: Remove unused _HWMOD_WAKEUP_ENABLED flag
ARM: OMAP2+: am335x: Change the wdt1 func clk src to per_32k clk
ARM: OMAP2+: AM33xx: hwmod: Add missing sysc definition to wdt1 entry
ARM: OMAP: fix typo "CONFIG_SMC91x_MODULE"
ARM: OMAP5: clock: No Freqsel on OMAP5 devices too
ARM: OMAP5: Make errata i688 workaround available
ARM: OMAP5: Update SAR memory layout for WakeupGen
ARM: OMAP5: Update SAR RAM base address
ARM: OMAP5: Reuse prm read_inst/write_inst
ARM: OMAP5: prm: Allow prm init to succeed
ARM: OMAP5: timer: Update the clocksource name as per clock data
ARM: OMAP5: Update SOC id detection code for ES2
Merge tag 'tegra-for-3.10-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dt2
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: tegra: device tree changes
This branch contains the majority of the device tree changes for Tegra.
Highlights include:
* Many changes for Tegra114, and the Dalmore board, to enable pinctrl,
SDHCI/MMC, PWM, DMA, I2C, KBC, SPI, battery, regulators.
* Adding or enabling suspend wakeup sources on many boards, and adding
suspend timing parameters, to support the system suspend patches.
* Adding clocks to the audio-related nodes, so that in 3.11, the audio
driver can pull these clocks from device tree rather than hard-coding
clock names.
* Some small DT fixes/cleanup.
This branch is based on the previous clk pull request.
* tag 'tegra-for-3.10-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (25 commits)
clk: tegra: Fix cdev1 and cdev2 IDs
ARM: dts: tegra: add the PM configurations of PMC
ARM: tegra: add non-removable and keep-power-in-suspend property for MMC
ARM: tegra: whistler: add wakeup source for KBC
ARM: tegra: add power gpio keys to DT
ARM: tegra: keep power on to SD slot on Dalmore
ARM: tegra: add clocks property to AC'97 sound nodes
ARM: tegra: add clocks property to sound nodes
ARM: tegra: dalmore: add fixed regulator node
ARM: tegra: dalmore: add TPS65090 node
ARM: tegra: dalmore: add cpu regulator node
ARM: tegra: Add sbs-battery node to Dalmore
ARM: tegra: add DT binding for i2c-tegra
ARM: tegra: add SPI nodes to Tegra114 DT
ARM: tegra: add KBC nodes to Tegra114 DT
ARM: tegra: add aliases and DMA requestor for serial nodes of Tegra114
ARM: tegra: add I2C nodes to Tegra114 DT
ARM: tegra: add APB DMA nodes to Tegra114 DT
ARM: tegra: add PWM nodes to Tegra114 DT
ARM: tegra: fix the status of PWM DT nodes
...
Merge tag 'mxs-dt-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt2
From Shawn Guo <shawn.guo@linaro.org>:
The mxs device tree changes for 3.10:
* Move enet_out clk into device tree and have fec driver handle it.
* Convert mxsfb driver to generic display timings bindings, and remove
the mxsfb auxdata from platform code.
* Add generic DMA device tree binding for mxs-dma, and convert the most
of client device drivers to it.
* Change mxsfb driver to use regulator for controlling power of panel.
* A few device tree source updates
* tag 'mxs-dt-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6: (23 commits)
video: mxsfb: Introduce regulator support
ARM: dts: cfa10036: Add touchscreen support to the CFA-10049
ARM: dts: imx23-olinuxino: mark sdcard cd as broken
serial: mxs-auart: move to use generic DMA helper
mtd: gpmi: move to use generic DMA helper
i2c: i2c-mxs: move to use generic DMA helper
spi: mxs-spi: move to use generic DMA helper
mmc: mxs-mmc: move to use generic DMA helper
dma: mxs-dma: move to generic device tree binding
dma: mxs-dma: use devm_* managed functions
ARM: dts: add generic DMA device tree binding for mxs-dma
pinctrl: pinctrl-mxs: document the missing pull-ups
ARM: cfa10036: add one wire bitbanging to the cfa10049
video: mxsfb: remove mxsfb_platform_data
ARM: mxs: move display timing configurations into device tree
video: mxsfb: get display timings from device tree
video: mxsfb: remove dotclk_delay from platform_data
video: mxsfb: remove fb_phys/fb_size from platform_data
video: mxsfb: use devm_* managed functions
ARM: mxs: remove unneeded enet_out clk initialization
...
Instead of using a custom binding for retrieving the GPIO that activates the
LCD from devicetree, use a standard regulator.
This approach has the advantage to be more generic.
For example: in the case of a board that has a PMIC supplying the LCD voltage,
the current approach would not work, as it only searches for a GPIO pin.
Correct IDs for cdev1 and cdev2 are 94 and 93 respectively.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: split into separate driver and device-tree patches] Signed-off-by: Stephen Warren <swarren@nvidia.com>
Joseph Lo [Wed, 3 Apr 2013 11:31:48 +0000 (19:31 +0800)]
ARM: tegra: add power gpio keys to DT
This adds the power gpio key to DT and enable the wakeup of the gpio key
for the device. The Seaboard and paz00 already had the power gpio key
binding and the power key of Whistler was on KBC. So these boards' device
tree didn't include in this patch.
Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Thu, 28 Mar 2013 19:22:30 +0000 (13:22 -0600)]
ARM: tegra: keep power on to SD slot on Dalmore
Set "regulator-always-on" for the SD slot on Dalmore, so that SD cards
work. This used to work, since this regulator is on by default, but was
broken by commit "ARM: tegra: dalmore: add TPS65090 node", since that
didn't specify always-on for this regulator.
In the long run, the regulators should all be hooked up to the SDHCI
device nodes. However, we haven't done that for any of the Tegra boards
yet, so to be consistent, this patch simply forces the regulator on,
rather than hooking it up and making it work differently to other boards.
Reported-by: Rhyland Klein <rklein@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Thu, 28 Mar 2013 18:11:30 +0000 (12:11 -0600)]
ARM: tegra: add clocks property to AC'97 sound nodes
Audio-related clocks need to be represented in the device tree. Update
bindings to describe which clocks are needed, and DT files to include
those clocks.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Tue, 26 Mar 2013 22:45:52 +0000 (16:45 -0600)]
ARM: tegra: add clocks property to sound nodes
Audio-related clocks need to be represented in the device tree. Update
bindings to describe which clocks are needed, and DT files to include
those clocks.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Laxman Dewangan [Thu, 21 Mar 2013 13:47:41 +0000 (19:17 +0530)]
ARM: tegra: dalmore: add TPS65090 node
NVIDIA's Tegra114 reference platform, Dalmore, uses the TPS65090 as
secondary PMICs which is mainly act as voltage switch regulator
controlled by i2c communication.
Add DT node for TPS65090.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
[swarren: remove unit-address from node name since it's unique already] Signed-off-by: Stephen Warren <swarren@nvidia.com>
Rhyland Klein [Wed, 20 Mar 2013 15:31:32 +0000 (11:31 -0400)]
ARM: tegra: Add sbs-battery node to Dalmore
This patch adds the node for the bq20z45 I2C gas gauge which is
compatible with the sbs-battery power supply driver.
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
[swarren: remove unit-address from node name since it's unique already] Signed-off-by: Stephen Warren <swarren@nvidia.com>
Laxman Dewangan [Wed, 13 Mar 2013 19:49:52 +0000 (01:19 +0530)]
ARM: tegra: add aliases and DMA requestor for serial nodes of Tegra114
Add APB DMA requestor and serial aliases for serial controller.
There are two serial drivers i.e. 8250 based simple serial driver
and APB DMA based serial driver for higher baudrate and performace.
The simple serial driver is selected by compatible value
"nvidia,tegra114-uart", "nvidia,tegra20-uart", and the APB DMA based
driver is selected by compatible value "nvidia,tegra114-hsuart",
"nvidia,tegra30-hsuart".
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Laxman Dewangan [Wed, 13 Mar 2013 19:49:51 +0000 (01:19 +0530)]
ARM: tegra: add I2C nodes to Tegra114 DT
NVIDIA's Tegra114 has 5 I2C controllers. These controllers have the
following changes which makes incompatible with previous hardware:
- Single clock source to I2C controller.
- Interrupt support for per packet transfer.
Add DT entry for I2C controllers and make it compatible with
"nvidia,tegra114-i2c".
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
[swarren: fixed location of status property for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
Laxman Dewangan [Wed, 13 Mar 2013 19:49:50 +0000 (01:19 +0530)]
ARM: tegra: add APB DMA nodes to Tegra114 DT
NVIDIA's Tegra114 has 32 channels APB DMA controller. Add DT entry for
APB DMA controllers and make it compatible with "nvidia,tegra114-apbdma".
Tegra114 DMA controller is not compatible with Tegra30/Tegra20 DMA
controller driver as in Tegra114, the global pause also clock gate the
DMA register and hence it iw not possible to write the DMA register
with global pause.
Andrew Chew [Tue, 12 Mar 2013 23:40:51 +0000 (16:40 -0700)]
ARM: tegra: fix the status of PWM DT nodes
We should be defining the PWM nodes with status as "disabled" in the
chip-specific dtsi file, since we don't know whether specific boards
will use the PWM or not. This patch fixes the PWM node status for
Tegra20 and Tegra30.
Also fixed the one user of PWM, which is the Tegra20 medcom-wide board,
so that PWM is set to "okay" in the board-specific dts file.
Signed-off-by: Andrew Chew <achew@nvidia.com>
[swarren: in medcom-wide: fixed node sort order, removed duplicate pwm:
label, fixed syntax error] Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Thu, 4 Apr 2013 23:13:54 +0000 (17:13 -0600)]
clk: tegra: fix enum tegra114_clk to match binding
A gap exists in the binding's clock ID definitions. Fix the clock driver
to be consistent. This allows pclk to be looked up through device tree
and prevents:
ERROR: could not get clock /pmc:pclk(0)
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Peter De Schrijver [Wed, 3 Apr 2013 14:40:49 +0000 (17:40 +0300)]
clk: tegra: Remove forced clk_enable of uartd
The UART driver enables the console uart clock, so we don't need to do that
anymore in this file.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Peter De Schrijver [Wed, 3 Apr 2013 14:40:48 +0000 (17:40 +0300)]
ARM: dt: Add references to tegra_car clocks
Add references to tegra_car clocks for the basic device nodes. Also remove
the clock-frequency property of the serial node as the UART driver can now
use the clock framework to obtain the frequency.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Peter De Schrijver [Wed, 3 Apr 2013 14:40:46 +0000 (17:40 +0300)]
clk: tegra: devicetree match for nvidia,tegra114-car
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Peter De Schrijver [Wed, 3 Apr 2013 14:40:45 +0000 (17:40 +0300)]
clk: tegra: Implement clocks for Tegra114
Implement clocks for Tegra114.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Peter De Schrijver [Thu, 4 Apr 2013 17:48:28 +0000 (20:48 +0300)]
ARM: tegra: Define Tegra114 CAR binding
The device tree binding models Tegra114 CAR (Clock And Reset) as a single
monolithic clock provider.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Peter De Schrijver [Wed, 3 Apr 2013 14:40:44 +0000 (17:40 +0300)]
clk: tegra: Workaround for Tegra114 MSENC problem
Workaround a hardware bug in MSENC during clock enable.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Peter De Schrijver [Wed, 3 Apr 2013 14:40:42 +0000 (17:40 +0300)]
clk: tegra: Add flags to tegra_clk_periph()
We will need some tegra peripheral clocks with the CLK_IGNORE_UNUSED flag,
most notably mselect, which is a bridge between AXI and most peripherals.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Peter De Schrijver [Wed, 3 Apr 2013 14:40:41 +0000 (17:40 +0300)]
clk: tegra: Add new fields and PLL types for Tegra114
Tegra114 introduces new PLL types. This requires new clocktypes as well
as some new fields in the pll structure.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Peter De Schrijver [Wed, 3 Apr 2013 14:40:40 +0000 (17:40 +0300)]
clk: tegra: move from a lock bit idx to a lock mask
PLLC2 and PLLC3 on Tegra114 have separate phaselock and frequencylock bits.
So switch to a lock mask to be able to test both at the same time.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Peter De Schrijver [Wed, 3 Apr 2013 14:40:39 +0000 (17:40 +0300)]
clk: tegra: Add PLL post divider table
Some PLLs in Tegra114 don't use a power of 2 mapping for the post divider.
Introduce a table based approach and switch PLLU to it.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Peter De Schrijver [Wed, 3 Apr 2013 14:40:38 +0000 (17:40 +0300)]
clk: tegra: introduce TEGRA_PLL_HAS_LOCK_ENABLE
Tegra114 PLLC2 and PLLC3 don't have a lock enable bit. The lock bits are
always functional.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Peter De Schrijver [Wed, 3 Apr 2013 14:40:37 +0000 (17:40 +0300)]
clk: tegra: Add TEGRA_PLL_BYPASS flag
Not all PLLs in Tegra114 have a bypass bit. Adapt the common code to only use
this bit when available.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Peter De Schrijver [Wed, 3 Apr 2013 14:40:36 +0000 (17:40 +0300)]
clk: tegra: Refactor PLL programming code
Refactor the PLL programming code to make it useable by the new PLL types
introduced by Tegra114.
The following changes were done:
* Split programming the PLL into updating m,n,p and updating cpcon
* Move locking from _update_pll_cpcon() to clk_pll_set_rate()
* Introduce _get_pll_mnp() helper
* Move check for identical m,n,p values to clk_pll_set_rate()
* struct tegra_clk_pll_freq_table will always contain the values as defined
by the hardware.
* Simplify the arguments to clk_pll_wait_for_lock()
* Split _tegra_clk_register_pll()
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Peter De Schrijver [Wed, 3 Apr 2013 14:40:35 +0000 (17:40 +0300)]
clk: tegra: provide dummy cpu car ops
tegra_boot_secondary() relies on some of the car ops. This means having an
uninitialized tegra_cpu_car_ops will lead to an early boot panic.
Providing a dummy struct avoids this and makes adding Tegra114 clock support
in a bisectable way a lot easier.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Mon, 25 Mar 2013 19:22:24 +0000 (13:22 -0600)]
clk: tegra: defer application of init table
The Tegra clock driver is initialized during the ARM machine descriptor's
.init_irq() hook. It can't be initialized earlier, since dynamic memory
usage is required. It can't be initialized later, since the .init_timer()
hook needs the clocks initialized. However, at this time, udelay()
doesn't work.
The Tegra clock initialization table may enable some PLLs. Enabling a PLL
may require usage of udelay(). Hence, this can't happen right when the
clock driver is initialized.
To solve this, separate the clock driver initialization from the clock
table processing, so they can execute at separate times.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Correct IDs for cdev1 and cdev2 are 94 and 93 respectively.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: split into separate driver and device-tree patches] Signed-off-by: Stephen Warren <swarren@nvidia.com>
clk: tegra: Make gr2d and gr3d clocks children of pll_c
By default these clocks are children of pll_m, but in downstream kernels
they are reparented to pll_c. While at it, decrease their frequencies to
300 MHz because the defaults aren't in the specified range.
gr2d can reportedly run at much higher frequencies, but 300 MHz works
and is a more conservative default.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Thierry Reding [Thu, 28 Mar 2013 20:31:27 +0000 (21:31 +0100)]
clk: tegra: Export peripheral reset functions
The tegra_periph_reset_assert() and tegra_periph_reset_deassert()
functions can be used by drivers to reset peripherals. In order to allow
such drivers to be built as modules, export the functions.
Note that this restores the status quo as the functions were exported
before the move to the drivers/clk tree.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Yen Lin [Wed, 6 Mar 2013 11:47:24 +0000 (11:47 +0000)]
clk: tegra: Fix periph_clk_to_bit macro
The parameter name should be "gate", not "periph". This worked, however,
because it happens that everywhere periph_clk_to_bit is called, "gate" was
in the local scope.
Signed-off-by: Yen Lin <yelin@nvidia.com> Signed-off-by: Andrew Chew <achew@nvidia.com> Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Shawn Guo [Tue, 26 Feb 2013 05:47:41 +0000 (13:47 +0800)]
serial: mxs-auart: move to use generic DMA helper
With the generic DMA device tree helper supported by mxs-dma driver,
client devices only need to call dma_request_slave_channel() for
requesting a DMA channel from dmaengine.
Shawn Guo [Tue, 26 Feb 2013 03:44:28 +0000 (11:44 +0800)]
mtd: gpmi: move to use generic DMA helper
With the generic DMA device tree helper supported by mxs-dma driver,
client devices only need to call dma_request_slave_channel() for
requesting a DMA channel from dmaengine.
Shawn Guo [Tue, 26 Feb 2013 03:20:22 +0000 (11:20 +0800)]
i2c: i2c-mxs: move to use generic DMA helper
With the generic DMA device tree helper supported by mxs-dma driver,
client devices only need to call dma_request_slave_channel() for
requesting a DMA channel from dmaengine.
Shawn Guo [Tue, 26 Feb 2013 03:07:32 +0000 (11:07 +0800)]
spi: mxs-spi: move to use generic DMA helper
With the generic DMA device tree helper supported by mxs-dma driver,
client devices only need to call dma_request_slave_channel() for
requesting a DMA channel from dmaengine.
Since mxs is a DT only platform now, along with the changes, the non-DT
case handling in probe function also gets removed.
Shawn Guo [Tue, 26 Feb 2013 02:10:38 +0000 (10:10 +0800)]
mmc: mxs-mmc: move to use generic DMA helper
With the generic DMA device tree helper supported by mxs-dma driver,
client devices only need to call dma_request_slave_channel() for
requesting a DMA channel from dmaengine.
Since mxs is a DT only platform now, along with the changes, the non-DT
case checking in probe function also gets cleaned up.
Shawn Guo [Tue, 26 Feb 2013 01:42:09 +0000 (09:42 +0800)]
dma: mxs-dma: move to generic device tree binding
Update mxs-dma driver to adopt generic DMA device tree binding. It
calls of_dma_controller_register() with mxs specific of_dma_xlate to
get the generic DMA device tree helper support. Then DMA clients only
need to call dma_request_slave_channel() for requesting a DMA channel
from dmaengine.
The existing way of requesting channel, clients directly call
dma_request_channel(), still work there, and will be removed after
all mxs-dma clients get converted to generic DMA device tree helper.
Shawn Guo [Mon, 25 Feb 2013 13:56:56 +0000 (21:56 +0800)]
ARM: dts: add generic DMA device tree binding for mxs-dma
Add generic DMA device tree binding for mxs-dma. The changes include:
* Add channel interrupts into DMA controller nodes
* Add properties '#dma-cells' and 'dma-channels' for DMA controller nodes
* And properties 'dmas' and 'dma-names' for DMA client nodes
* Update mxs-dma device tree binding doc
Shawn Guo [Thu, 14 Mar 2013 05:21:56 +0000 (13:21 +0800)]
video: mxsfb: remove mxsfb_platform_data
None of mxsfb users uses mxsfb_platform_data now. Let's remove it
from mxsfb driver.
As the result, include/linux/mxsfb.h gets deleted with a few macros
moved into mxsfb.c. Along with the change, the typo "FAILING" in macro
name is fixed to be "FALLING".
Shawn Guo [Wed, 13 Mar 2013 06:28:19 +0000 (14:28 +0800)]
video: mxsfb: remove dotclk_delay from platform_data
There is no in-tree mxsfb users using mxsfb_platform_data dotclk_delay.
Let's remove it from mxsfb_platform_data to ease full device tree
adoption of mxsfb driver. If later we have platform/board need to
configure this parameter, we can add it into device tree bindings.
Shawn Guo [Wed, 13 Mar 2013 06:03:12 +0000 (14:03 +0800)]
video: mxsfb: remove fb_phys/fb_size from platform_data
There is no in-tree users of mxsfb_platform_data fb_phys/fb_size.
With CMA support in the kernel, there is no real need for platform to
reserve memory and pass address and size into driver via platform_data.
So let's remove fb_phys/fb_size from mxsfb_platform_data to ease full
device tree adoption.
Wolfram Sang [Tue, 29 Jan 2013 14:46:12 +0000 (15:46 +0100)]
ARM: dts: mxs: add enet_out clock to devicetree
Put the clock to the devicetree, so the driver can take care of it
later. Then, we don't have to do the enabling as a workaround in board
init.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
[shawn.guo: add enet_out into imx28.dtsi and overwrite it for m28evk] Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Shawn Guo [Mon, 18 Mar 2013 07:33:39 +0000 (15:33 +0800)]
net: fec: handle optional clk_ptp more gracefully
When the optional clk_ptp is absent, we can just set it to NULL, and
clk API will just handle it gracefully. It saves us from checking
clk_ptp whenever calling into clk API.
Also since clk_ptp is optional, the "ret" variable shouldn't be set
in case that the clock is absent.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: David S. Miller <davem@davemloft.net>
Joseph Lo [Wed, 3 Apr 2013 11:31:46 +0000 (19:31 +0800)]
ARM: dt: tegra: add bindings of power management configurations for PMC
The PMC mostly controls the entry and exit of the system from different
sleep modes. Different platform or system may have different configurations.
The power management configurations of PMC is represented as some properties.
The system needs to define the properties when the system supports deep sleep
mode (i.e. suspend).
Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: devicetree-discuss@lists.ozlabs.org Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Joseph Lo [Wed, 3 Apr 2013 11:31:44 +0000 (19:31 +0800)]
gpio: tegra: add gpio wakeup source handling
This patch add the gpio wakeup source handling for the Tegra platform. It
was be done by enabling the irq for the gpio in the gpio controller and
enabling the bank irq of the gpio in the Tegra legacy irq controller when
the system going to suspend.
Based on the work by:
Varun Wadekar <vwadekar@nvidia.com>
Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Joseph Lo <josephl@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Mike Turquette [Thu, 28 Mar 2013 20:59:02 +0000 (13:59 -0700)]
clk: allow reentrant calls into the clk framework
Reentrancy into the clock framework is necessary for clock operations
that result in nested calls to the clk api. A common example is a clock
that is prepared via an i2c transaction, such as a clock inside of a
discrete audio chip or a power management IC. The i2c subsystem itself
will use the clk api resulting in a deadlock:
The ability to reenter the clock framework prevents this deadlock.
Other use cases exist such as allowing .set_rate callbacks to call
clk_set_parent to achieve the best rate, or to save power in certain
configurations. Yet another example is performing pinctrl operations
from a clk_ops callback. Calls into the pinctrl subsystem may call
clk_{un}prepare on an unrelated clock. Allowing for nested calls to
reenter the clock framework enables both of these use cases.
Reentrancy is implemented by two global pointers that track the owner
currently holding a global lock. One pointer tracks the owner during
sleepable, mutex-protected operations and the other one tracks the owner
during non-interruptible, spinlock-protected operations.
When the clk framework is entered we try to hold the global lock. If it
is held we compare the current task against the current owner; a match
implies a nested call and we reenter. If the values do not match then
we block on the lock until it is released.
Signed-off-by: Mike Turquette <mturquette@linaro.org> Cc: Rajagopal Venkat <rajagopal.venkat@linaro.org> Cc: David Brown <davidb@codeaurora.org> Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Mike Turquette [Thu, 28 Mar 2013 20:59:01 +0000 (13:59 -0700)]
clk: abstract locking out into helper functions
Create locking helpers for the global mutex and global spinlock. The
definitions of these helpers will be expanded upon in the next patch
which introduces reentrancy into the locking scheme.
Signed-off-by: Mike Turquette <mturquette@linaro.org> Cc: Rajagopal Venkat <rajagopal.venkat@linaro.org> Cc: David Brown <davidb@codeaurora.org> Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
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