Dan Carpenter [Mon, 11 Mar 2024 11:00:53 +0000 (14:00 +0300)]
gpio: nomadik: remove BUG_ON() in nmk_gpio_populate_chip()
Using BUG_ON() is discouraged and also the check wasn't done early
enough to prevent an out of bounds access. Check earlier and return
an error instead of calling BUG().
Linus Walleij [Tue, 5 Mar 2024 11:00:03 +0000 (12:00 +0100)]
pinctrl: aw9523: Make the driver tristate
The AW9523 driver fails to build in some allmod configs since the
I2C core can be a module, but AW9523 can not. Fix it up by allowing
AW9523 to be a module (tristate).
Linus Walleij [Tue, 5 Mar 2024 22:09:04 +0000 (23:09 +0100)]
gpio: nomadik: Back out some managed resources
Several commits introduce managed resources (devm_*) into the
nmk_gpio_populate_chip() function.
This isn't always working because when called from the Nomadik pin
control driver we just want to populate some states for the device as
the same states are used by the pin control driver.
Some managed resources such as devm_kzalloc() etc will work, as the
passed in platform device will be used for lifecycle management,
but in some cases where we used the looked-up platform device
for the GPIO block, this will cause problems for the combined
pin control and GPIO driver, because it adds managed resources
to the GPIO device before it is probed, which is something that
the device core will not accept, and all of the GPIO blocks will
refuse to probe:
platform 8012e000.gpio: Resources present before probing
platform 8012e080.gpio: Resources present before probing
(...)
Fix this by not tying any managed resources to the looked-up
gpio_pdev/gpio_dev device, let's just live with the fact that
these need imperative resource management for now.
Drop in some notes and use a local *dev variable to clarify the
code.
Andre Przywara [Tue, 5 Mar 2024 14:38:59 +0000 (14:38 +0000)]
pinctrl: pinmux: Suppress error message for -EPROBE_DEFER
EPROBE_DEFER error returns are not really critical, since they cancel
the probe process, but the kernel will return later and retry.
However, depending on the probe order, this might issue quite some
verbatim and scary, though pointless messages:
[ 2.388731] 300b000.pinctrl: pin-224 (5000000.serial) status -517
[ 2.397321] 300b000.pinctrl: could not request pin 224 (PH0) from group PH0 on device 300b000.pinctrl
Replace dev_err() with dev_err_probe(), which not only drops the
priority of the message from error to debug, but also puts some text
into debugfs' devices_deferred file, for later reference.
AngeloGioacchino Del Regno [Fri, 1 Mar 2024 13:29:24 +0000 (14:29 +0100)]
pinctrl: Add driver for Awinic AW9523/B I2C GPIO Expander
The Awinic AW9523(B) is a multi-function I2C gpio expander in a
TQFN-24L package, featuring PWM (max 37mA per pin, or total max
power 3.2Watts) for LED driving capability.
It has two ports with 8 pins per port (for a total of 16 pins),
configurable as either PWM with 1/256 stepping or GPIO input/output,
1.8V logic input; each GPIO can be configured as input or output
independently from each other.
This IC also has an internal interrupt controller, which is capable
of generating an interrupt for each GPIO, depending on the
configuration, and will raise an interrupt on the INTN pin to
advertise this to an external interrupt controller.
AngeloGioacchino Del Regno [Thu, 24 Jun 2021 21:44:57 +0000 (23:44 +0200)]
dt-bindings: pinctrl: Add bindings for Awinic AW9523/AW9523B
Add bindings for the Awinic AW9523/AW9523B I2C GPIO Expander driver.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: David Bauer <mail@david-bauer.net> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210624214458.68716-1-mail@david-bauer.net
[Fixed up minor bugs found by new checking tools] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andy Shevchenko [Sat, 2 Mar 2024 17:33:29 +0000 (19:33 +0200)]
gpio: nomadik: Finish conversion to use firmware node APIs
Previously driver got a few updates in order to replace OF APIs by
respective firmware node, however it was not finished to the logical
end, e.g., some APIs that has been used are still require OF node
to be passed. Finish that job by converting leftovers to use firmware
node APIs.
PINCTRL_NOMADIK cannot select GPIO_NOMADIK without first selecting
GPIOLIB on which GPIO_NOMADIK depends. GPIO_NOMADIK depends on OF_GPIO,
it is a direct dependency.
Colin Ian King [Fri, 23 Feb 2024 16:28:50 +0000 (16:28 +0000)]
pinctrl: ocelot: remove redundant assignment to variable ret
The variable ret is being assigned a value that is never read, it
is being re-assigned a value in every case statement in the following
switch statement. The assignment is redundant and can be removed.
Cleans up clang scan build warning:
drivers/pinctrl/pinctrl-ocelot.c:1404:3: warning: Value stored to 'ret'
is never read [deadcode.DeadStores]
Théo Lebrun [Wed, 28 Feb 2024 11:28:23 +0000 (12:28 +0100)]
gpio: nomadik: grab optional reset control and deassert it at probe
Fetch a reference to the optional shared reset control and deassert it
if it exists.
Optional because not all platforms that use this driver have a reset
attached to the reset block. Shared because some platforms that use the
reset (at least Mobileye EyeQ5) share the reset across banks.
Do not keep a reference to the reset control as it is not needed
afterwards; the driver does not handle suspend, does not use runtime
PM, does not register a remove callback and does not support unbinding
from sysfs (made explicit with suppress_bind_attrs).
The operation is done in nmk_gpio_populate_chip(). This function is
called by either gpio-nomadik or pinctrl-nomadik, whoever comes first.
This is here for historic reasons and could probably be removed now; it
seems gpio-ranges enforces the ordering to be pinctrl-first. It is not
the topic of the present patch however.
Théo Lebrun [Wed, 28 Feb 2024 11:28:22 +0000 (12:28 +0100)]
gpio: nomadik: support mobileye,eyeq5-gpio
We create a custom compatible for the STA2X11 IP block as integrated
into the Mobileye EyeQ5 platform. Its wake and alternate functions have
been disabled, we want to avoid touching those registers.
We both do: (1) early return in functions that do not support the
platform, but with warnings, and (2) avoid calling those functions in
the first place.
We ensure that pinctrl-nomadik is not used with this STA2X11 variant.
Théo Lebrun [Wed, 28 Feb 2024 11:28:21 +0000 (12:28 +0100)]
gpio: nomadik: handle variadic GPIO count
Read the "ngpios" property to determine the number of GPIOs for a bank.
If not available, fallback to NMK_GPIO_PER_CHIP ie 32 ie the current
behavior.
The IP block always supports 32 GPIOs, but platforms can expose a lesser
amount. The Mobileye EyeQ5 is in this case; one bank is 29 GPIOs and
the other is 23.
Théo Lebrun [Wed, 28 Feb 2024 11:28:20 +0000 (12:28 +0100)]
gpio: nomadik: support shared GPIO IRQs
Support a single IRQs used by multiple GPIO banks. Change the IRQ
handler type from a chained handler (as used by gpiolib
for ->parent_handler) to a threaded IRQ.
Use the generic_handle_domain_irq_safe() helper. The non-safe version
must be called in a no-IRQ context.
The Mobileye EyeQ5 platform uses this GPIO controller and share an IRQ
for its two banks.
Théo Lebrun [Wed, 28 Feb 2024 11:28:19 +0000 (12:28 +0100)]
gpio: nomadik: change driver name from gpio to nomadik-gpio
This GPIO driver is historically related to the Nomadik platform. It
however can be used by others as it implements the ST STA2X11 IP block.
Pick a less ambiguous name for it.
Théo Lebrun [Wed, 28 Feb 2024 11:28:18 +0000 (12:28 +0100)]
gpio: nomadik: make clock optional
Not all platforms using this platform driver expose a clock for this
GPIO controller. Turn devm_clk_get() into devm_clk_get_optional() to
avoid failing when no clocks are provided.
Théo Lebrun [Wed, 28 Feb 2024 11:28:17 +0000 (12:28 +0100)]
gpio: nomadik: request dynamic ID allocation
Move away from statically allocated GPIO IDs. Switch to dynamic ID
allocation. Static IDs are deprecated because they cause issues when
multiple GPIO controllers are to be found on the same platform.
Add a bit of complexity to do pin number -> GPIO chip + offset.
Previously, bank number and offsets were retrieved using division and
remainder (bank size being constant 32). Now, to get the pin number
matching a bank base, we must know the sum of ngpios of previous banks.
This is done in find_nmk_gpio_from_pin() which also exposes the offset
inside the bank.
Also remove the assumption that bank sizes are constant. Instead of
using NMK_GPIO_PER_CHIP as bank size, use nmk_gpio_chips[i]->ngpio.
Fix strict checkpatch warnings relative to if-else blocks and bool
expressions. Message types addressed:
CHECK: Comparison to NULL could be written "!nmk_cfg_params[index].choice"
CHECK: Unbalanced braces around else statement
CHECK: Using comparison to false is error prone
CHECK: Using comparison to true is error prone
CHECK: braces {} should be used on all arms of this statement
Fix strict checkpatch warnings relative to whitespace. Message types
addressed:
ERROR: space required before the open parenthesis '('
WARNING: quoted string split across lines
CHECK: Alignment should match open parenthesis
CHECK: Please don't use multiple blank lines
CHECK: line length of 103 exceeds 100 columns
CHECK: spaces preferred around that '+' (ctx:VxV)
Fix strict checkpatch warnings relative to types. Warning types
addressed:
WARNING: do not add new typedefs
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
WARNING: static const char * array should probably be static const
char * const
Total messages before: 1 errors, 40 warnings, 39 checks.
Total messages after: 1 errors, 2 warnings, 38 checks.
Théo Lebrun [Wed, 28 Feb 2024 11:28:08 +0000 (12:28 +0100)]
pinctrl: nomadik: minimise indentation in probe
nmk_pinctrl_probe() iterates over each GPIO block. Use an early
conditional continue to skip to the next iteration rather than indent
all the loop code block.
Do not change code logic. The block is changed from:
for (i = 0; i < NMK_MAX_BANKS; i++) {
x = of_parse_phandle(...);
if (x) {
... do work ...
}
}
To:
for (i = 0; i < NMK_MAX_BANKS; i++) {
x = of_parse_phandle(...);
if (!x)
continue;
Théo Lebrun [Wed, 28 Feb 2024 11:28:06 +0000 (12:28 +0100)]
pinctrl: nomadik: fix build warning (-Wformat)
Fix compiler warning found in the pinctrl-nomadik platform driver. GCC
message is as such:
drivers/pinctrl/nomadik/pinctrl-nomadik.c:855:21: warning:
format ‘%u’ expects argument of type ‘unsigned int’, but argument 5
has type ‘size_t {aka const long unsigned int}’ [-Wformat=]
Théo Lebrun [Wed, 28 Feb 2024 11:28:05 +0000 (12:28 +0100)]
pinctrl: nomadik: Kconfig: allow building with COMPILE_TEST
PINCTRL_NOMADIK, PINCTRL_STN8815 and PINCTRL_DB8500 depend on ARCH_U8500
or ARCH_NOMADIK. Add COMPILE_TEST as an option to allow test building
the driver.
Théo Lebrun [Wed, 28 Feb 2024 11:28:04 +0000 (12:28 +0100)]
gpio: nomadik: extract GPIO platform driver from drivers/pinctrl/nomadik/
Previously, drivers/pinctrl/nomadik/pinctrl-nomadik.c registered two
platform drivers: pinctrl & GPIO. Move the GPIO aspect to the
drivers/gpio/ folder, as would be expected.
Both drivers are intertwined for a reason; pinctrl requires access to
GPIO registers for pinmuxing, pull-disable, disabling interrupts while
setting the muxing and wakeup control. Information sharing is done
through a shared array containing GPIO chips and a few helper
functions. That shared array is not touched from gpio-nomadik when
CONFIG_PINCTRL_NOMADIK is not defined.
Make no change to the code that moved into gpio-nomadik; there should be
no behavior change following. A few functions are shared and header
comments are added. Checkpatch warnings are addressed. NUM_BANKS is
renamed to NMK_MAX_BANKS.
It is supported to compile gpio-nomadik without pinctrl-nomadik. The
opposite is not true.
Théo Lebrun [Wed, 28 Feb 2024 11:28:03 +0000 (12:28 +0100)]
gpio: nomadik: fix offset bug in nmk_pmx_set()
Previously, the statement looked like:
slpm[x] &= ~BIT(g->grp.pins[i]);
Where:
- slpm is a unsigned int pointer;
- g->grp.pins[i] is a pin number. It can grow to more than 32.
The expected shift amount is a pin bank offset.
This bug does not occur on every group or pin: the altsetting must be
NMK_GPIO_ALT_C and the pin must be 32 or above. It might have occured.
For example, in pinctrl-nomadik-db8500.c, pin group i2c3_c_2 has the
right altsetting and pins 229 and 230.
This GPIO controller is used on the Mobileye EyeQ5 SoC. Add its
compatible to the dt-bindings. One difference is that the block as
integrated on EyeQ5 does not support sleep-mode.
Claudiu Beznea [Thu, 15 Feb 2024 12:41:12 +0000 (14:41 +0200)]
pinctrl: renesas: rzg2l: Add suspend/resume support
pinctrl-rzg2l driver is used on RZ/G3S which support deep sleep states
where power to most of the SoC components is turned off.
For this add suspend/resume support. This involves saving and restoring
configured registers along with disabling clock in case there is no pin
configured as wakeup sources.
To save/restore registers 2 caches were allocated: one for GPIO pins and
one for dedicated pins.
On suspend path the pin controller registers are saved and if none of the
pins are configured as wakeup sources the pinctrl clock is disabled.
Otherwise it remains on.
On resume path the configuration is done as follows:
1/ setup PFCs by writing to registers on pin based accesses
2/ setup GPIOs by writing to registers on port based accesses and
following configuration steps specified in hardware manual
3/ setup dedicated pins by writing to registers on port based accesses
4/ setup interrupts.
Because interrupt signals are routed to IA55 interrupt controller and
IA55 interrupt controller resumes before pin controller, patch restores
also the configured interrupts just after pin settings are restored to
avoid invalid interrupts while resuming.
Claudiu Beznea [Thu, 15 Feb 2024 12:41:11 +0000 (14:41 +0200)]
pinctrl: renesas: rzg2l: Select GPIOLIB_IRQCHIP and IRQ_DOMAIN_HIERARCHY
The pinctrl-rzg2l driver accesses gpio_chip.irq, which is available only
if CONFIG_GPIOLIB_IRQCHIP=y, and uses APIs that are defined only if
CONFIG_IRQ_DOMAIN_HIERARCHY=y (irq_chip_*_parent() APIs).
On ARCH_RZG2L, CONFIG_IRQ_DOMAIN_HIERARCHY is selected anyway, e.g. by
CONFIG_ARM_GIC_V3, but CONFIG_GPIOLIB_IRQCHIP is not (it is on R-Car).
Make this explicit at the driver level for a clearer view of the
dependencies.
Biju Das [Tue, 6 Feb 2024 13:53:18 +0000 (13:53 +0000)]
pinctrl: renesas: rzg2l: Avoid configuring ISEL in gpio_irq_{en,dis}able*(
Currently on irq_disable(), we are disabling gpio interrupt enable(ISEL).
That means the pin is just gpio input and not gpio input interrupt any
more. So, move configuring ISEL in rzg2l_gpio_child_to_parent_hwirq()/
rzg2l_gpio_irq_domain_free() so that the pin will be gpioint always even
during irq_disable().
Add pins, groups and functions for the QSPI functionality proviced by
the SPI Multi I/O Bus Controller (RPC-IF) on the Renesas R-Car V4M
(R8A779H0) SoC.
Update maxItems to 60 for gpio-reserved-ranges to allow multiple gpio
reserved ranges.
Add input-enable property to allow configuring a pin as input.
Also update example.
Rob Herring [Fri, 2 Feb 2024 22:34:53 +0000 (16:34 -0600)]
dt-bindings: pinctrl: nvidia,tegra234-pinmux: Restructure common schema
The structure of the NVIDIA Tegra234 common pinmux schema doesn't work
for restricting properties because a child node schema can't be extended
with additional properties from another schema defining the same child
node. The 2 child node schemas are evaluated independently as the
schemas are not recursively combined in any way.
As the common schema is almost all the child node schema anyways, just
remove the parent node from the common schema. Then add 'reg' and adjust
the $ref's in the users of the common schema.
Chen-Yu Tsai [Wed, 31 Jan 2024 07:19:08 +0000 (15:19 +0800)]
pinctrl: mediatek: Drop bogus slew rate register range for MT8192
The MT8192 does not support configuring pin slew rate. This is evident
from both the datasheet, and the fact that the driver points the slew
rate register range at the GPIO direction register range.
Drop the bogus setting.
Fixes: d32f38f2a8fc ("pinctrl: mediatek: Add pinctrl driver for mt8192") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20240131071910.3950450-2-wenst@chromium.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Chen-Yu Tsai [Wed, 31 Jan 2024 07:19:07 +0000 (15:19 +0800)]
pinctrl: mediatek: Drop bogus slew rate register range for MT8186
The MT8186 does not support configuring pin slew rate. This is evident
from both the datasheet, and the fact that the driver points the slew
rate register range at the GPIO direction register range.
Drop the bogus setting.
Fixes: 8b483bda1e46 ("pinctrl: add pinctrl driver on mt8186") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20240131071910.3950450-1-wenst@chromium.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Lad Prabhakar [Mon, 29 Jan 2024 13:55:55 +0000 (13:55 +0000)]
pinctrl: renesas: pinctrl-rzg2l: Add the missing port pins P19 to P28
Add the missing port pins P19 to P28 for RZ/Five SoC. These additional
pins provide expanded capabilities and are exclusive to the RZ/Five SoC.
Couple of port pins have different configuration and are not identical for
the complete port so introduce struct rzg2l_variable_pin_cfg to handle
such cases and introduce the PIN_CFG_VARIABLE macro. The actual pin config
is then assigned in rzg2l_pinctrl_get_variable_pin_cfg().
Add an additional check in rzg2l_gpio_get_gpioint() to only allow GPIO pins
which support interrupt facility.
While at define RZG2L_GPIO_PORT_PACK() using RZG2L_GPIO_PORT_SPARSE_PACK().
Update the gpio-ranges property in the RZ/Five SoC DTSI, as it must
match the driver.
Lad Prabhakar [Mon, 29 Jan 2024 13:55:54 +0000 (13:55 +0000)]
pinctrl: renesas: rzg2l: Include pinmap in RZG2L_GPIO_PORT_PACK() macro
Currently we assume all the port pins are sequential ie always PX_0 to
PX_n (n=1..7) exist, but on RZ/Five SoC we have additional pins P19_1 to
P28_5 which have holes in them, for example only one pin on port19 is
available and that is P19_1 and not P19_0. So to handle such cases
include pinmap for each port which would indicate the pin availability
on each port. As the pincount can be calculated based on pinmap drop this
from RZG2L_GPIO_PORT_PACK() macro.
Previously we had a max of 7 pins on each port but on RZ/Five Port-20
has 8 pins, so move the single pin configuration to BIT(63).
Lad Prabhakar [Mon, 29 Jan 2024 13:55:53 +0000 (13:55 +0000)]
pinctrl: renesas: rzg2l: Improve code for readability
As the RZ/G2L pinctrl driver is extensively utilized by numerous SoCs and
has experienced substantial growth, enhance code readability by
incorporating FIELD_PREP_CONST/FIELD_GET macros wherever necessary.
If the number of provided enum IDs in a variable width config register
description does not match the expected number, the checker uses the
expected number for validating the individual enum IDs.
However, this may cause out-of-bounds accesses on the array holding the
enum IDs, leading to bogus enum_id conflict warnings. Worse, if the bug
is an incorrect bit field description (e.g. accidentally using "12"
instead of "-12" for a reserved field), thousands of warnings may be
printed, overflowing the kernel log buffer.
Fix this by limiting the enum ID check to the number of provided enum
IDs.
Claudiu Beznea [Mon, 15 Jan 2024 15:34:53 +0000 (17:34 +0200)]
pinctrl: renesas: rzg2l: Fix locking in rzg2l_dt_subnode_to_map()
Commit d3aaa7203a17 ("pinctrl: renesas: rzg2l: Add pin configuration
support for pinmux groups") introduced the possibility to parse pin
configuration for pinmux groups. It did that by calling
rzg2l_map_add_config() at the end of rzg2l_dt_subnode_to_map() and
jumping to the remove_group label in case rzg2l_map_add_config() failed.
But if that happens, the mutex will already be unlocked, thus this it will
lead to double mutex unlock operation. To fix this move the
rzg2l_map_add_config() call just after all the name argument is ready and
before the mutex is locked. There is no harm in doing this, as this only
parses the data from device tree that will be further processed by
pinctrl core code.
Compatible string doesn't really match with compatible string listed in the
driver itself. While binding was converted from txt to yaml
xlnx,zynq-pinctrl was listed as compatible string but example was using
xlnx,pinctrl-zynq and also this string is used in all DTSes.
xlnx,zynq-pinctrl is used only in dt binding and not present in any DT
which is stable for quite a long time that's why use old compatible string
and update binding document instead of starting to use unused compatible
string.
nuvoton,npcm845-pinctrl defines the common "input-debounce" property as
an array rather than an scalar. Update the common definition to expand
it to an uint32-array, and update all the users of the property with
array constraints.
Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20240124190106.1540585-1-robh@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Erick Archer [Fri, 19 Jan 2024 18:19:09 +0000 (19:19 +0100)]
pinctrl: pinctrl-zynqmp: Use devm_kcalloc() instead of devm_kzalloc()
As noted in the "Deprecated Interfaces, Language Features, Attributes,
and Conventions" documentation [1], size calculations (especially
multiplication) should not be performed in memory allocator (or similar)
function arguments due to the risk of them overflowing. This could lead
to values wrapping around and a smaller allocation being made than the
caller was expecting. Using those allocations could lead to linear
overflows of heap memory and other misbehaviors.
So, use the purpose specific devm_kcalloc() function instead of the
argument size * count in the devm_kzalloc() function.
Jean Thomas [Wed, 17 Jan 2024 14:55:47 +0000 (15:55 +0100)]
pinctrl: mediatek: mt7981: add additional emmc groups
Add new emmc groups in the pinctrl driver for the
MediaTek MT7981 SoC:
* emmc reset, with pin 15.
* emmc 4-bit bus-width, with pins 16 to 19, and 24 to 25.
* emmc 8-bit bus-width, with pins 16 to 25.
The existing emmc_45 group is kept for legacy reasons, even
if this is the union of emmc_reset and emmc_8 groups.
Randy Dunlap [Thu, 11 Jan 2024 04:51:26 +0000 (20:51 -0800)]
pinctrl: mt7986: excise kernel-doc warnings
Fix kernel-doc warnings for enum (anonymous): the enum values are not
documented, so don't indicate that the comment contains kernel-doc
notation.
pinctrl-mt7986.c:68: warning: Enum value 'GPIO_BASE' not described in enum '(anonymous)'
pinctrl-mt7986.c:68: warning: Enum value 'IOCFG_RT_BASE' not described in enum '(anonymous)'
pinctrl-mt7986.c:68: warning: Enum value 'IOCFG_RB_BASE' not described in enum '(anonymous)'
pinctrl-mt7986.c:68: warning: Enum value 'IOCFG_LT_BASE' not described in enum '(anonymous)'
pinctrl-mt7986.c:68: warning: Enum value 'IOCFG_LB_BASE' not described in enum '(anonymous)'
pinctrl-mt7986.c:68: warning: Enum value 'IOCFG_TR_BASE' not described in enum '(anonymous)'
pinctrl-mt7986.c:68: warning: Enum value 'IOCFG_TL_BASE' not described in enum '(anonymous)'
Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202312110210.x3vxq42A-lkp@intel.com/ Cc: Linus Walleij <linus.walleij@linaro.org> Cc: <linux-gpio@vger.kernel.org> Cc: Sean Wang <sean.wang@kernel.org> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Cc: <linux-mediatek@lists.infradead.org> Cc: <linux-arm-kernel@lists.infradead.org> Link: https://lore.kernel.org/r/20240111045126.13768-1-rdunlap@infradead.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Torvalds [Sun, 21 Jan 2024 22:01:12 +0000 (14:01 -0800)]
Merge tag 'bcachefs-2024-01-21' of https://evilpiepirate.org/git/bcachefs
Pull more bcachefs updates from Kent Overstreet:
"Some fixes, Some refactoring, some minor features:
- Assorted prep work for disk space accounting rewrite
- BTREE_TRIGGER_ATOMIC: after combining our trigger callbacks, this
makes our trigger context more explicit
- A few fixes to avoid excessive transaction restarts on
multithreaded workloads: fstests (in addition to ktest tests) are
now checking slowpath counters, and that's shaking out a few bugs
- Assorted tracepoint improvements
- Starting to break up bcachefs_format.h and move on disk types so
they're with the code they belong to; this will make room to start
documenting the on disk format better.
- A few minor fixes"
* tag 'bcachefs-2024-01-21' of https://evilpiepirate.org/git/bcachefs: (46 commits)
bcachefs: Improve inode_to_text()
bcachefs: logged_ops_format.h
bcachefs: reflink_format.h
bcachefs; extents_format.h
bcachefs: ec_format.h
bcachefs: subvolume_format.h
bcachefs: snapshot_format.h
bcachefs: alloc_background_format.h
bcachefs: xattr_format.h
bcachefs: dirent_format.h
bcachefs: inode_format.h
bcachefs; quota_format.h
bcachefs: sb-counters_format.h
bcachefs: counters.c -> sb-counters.c
bcachefs: comment bch_subvolume
bcachefs: bch_snapshot::btime
bcachefs: add missing __GFP_NOWARN
bcachefs: opts->compression can now also be applied in the background
bcachefs: Prep work for variable size btree node buffers
bcachefs: grab s_umount only if snapshotting
...
Linus Torvalds [Sun, 21 Jan 2024 19:14:40 +0000 (11:14 -0800)]
Merge tag 'timers-core-2024-01-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer updates from Thomas Gleixner:
"Updates for time and clocksources:
- A fix for the idle and iowait time accounting vs CPU hotplug.
The time is reset on CPU hotplug which makes the accumulated
systemwide time jump backwards.
- Assorted fixes and improvements for clocksource/event drivers"
* tag 'timers-core-2024-01-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
tick-sched: Fix idle and iowait sleeptime accounting vs CPU hotplug
clocksource/drivers/ep93xx: Fix error handling during probe
clocksource/drivers/cadence-ttc: Fix some kernel-doc warnings
clocksource/drivers/timer-ti-dm: Fix make W=n kerneldoc warnings
clocksource/timer-riscv: Add riscv_clock_shutdown callback
dt-bindings: timer: Add StarFive JH8100 clint
dt-bindings: timer: thead,c900-aclint-mtimer: separate mtime and mtimecmp regs
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