Olof Johansson [Mon, 4 Nov 2019 01:27:39 +0000 (17:27 -0800)]
Merge tag 'tegra-for-5.5-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.5-rc1
Adds support for CPU frequency scaling on Tegra20 and Tegra30, EMC
frequency scaling on Tegra30, SMMU support for VDE on Tegra30, the
STMPE ADC found on Toradex T30 modules as well as fixes for eDP
support on Venice2.
* tag 'tegra-for-5.5-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: cardhu-a04: Add CPU Operating Performance Points
ARM: tegra: cardhu-a04: Set up voltage regulators for DVFS
ARM: tegra: trimslice: Add CPU Operating Performance Points
ARM: tegra: paz00: Add CPU Operating Performance Points
ARM: tegra: paz00: Set up voltage regulators for DVFS
ARM: tegra: Add CPU Operating Performance Points for Tegra30
ARM: tegra: Add CPU Operating Performance Points for Tegra20
ARM: tegra: Add Tegra30 CPU clock
ARM: tegra: Add Tegra20 CPU clock
ARM: tegra: Add External Memory Controller node on Tegra30
ARM: tegra: nyan-big: Add timings for RAM codes 4 and 6
ARM: tegra: Connect SMMU with Video Decoder Engine on Tegra30
ARM: tegra: Add eDP power supplies on Venice2
ARM: tegra: Add SOR0_OUT clock on Tegra124
ARM: tegra: Add stmpe-adc DT node to Toradex T30 modules
Olof Johansson [Mon, 4 Nov 2019 01:07:51 +0000 (17:07 -0800)]
Merge tag 'sunxi-dt-for-5.5-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
Our usual bunch of DT patches, with this time mostly:
- Mali GPU support for the H6
- Two new crypto drivers enablement
- A few fixes to our DTs, fixed through the validation effort
- New boards: NanoPi Duo2
* tag 'sunxi-dt-for-5.5-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (22 commits)
dt-bindings: arm: sunxi: add FriendlyARM NanoPi Duo2
ARM: dts: sun8i: add FriendlyARM NanoPi Duo2
arm64: allwinner: h6: Enable GPU node for Tanix TX6
arm64: dts: allwinner: bluetooth for Emlid Neutis N5
ARM: dts: sunxi: h3/h5: add missing uart2 rts/cts pins
ARM: dts: sun9i: a80: Add Security System node
ARM: dts: sun8i: a83t: Add Security System node
arm64: dts: allwinner: sun50i: Add Crypto Engine node on H6
arm64: dts: allwinner: sun50i: Add crypto engine node on H5
arm64: dts: allwinner: sun50i: Add Crypto Engine node on A64
ARM: dts: sun8i: H3: Add Crypto Engine node
ARM: dts: sun8i: R40: add crypto engine node
dt-bindings: crypto: Add DT bindings documentation for sun8i-ce Crypto Engine
arm64: dts: allwinner: Add mali GPU supply for H6 boards
arm64: dts: allwinner: Add ARM Mali GPU node for H6
ARM: dts: sun8i: a83t: a711: Add touchscreen node
ARM: dts: sun5i: olinuxino micro: Fix AT24 node name
ARM: dts: sun9i: Add missing watchdog clocks
arm64: dts: sun50i: sopine-baseboard: Expose serial1, serial2 and serial3
arm64: dts: allwinner: orange-pi-3: Enable UART1 / Bluetooth
...
Olof Johansson [Mon, 4 Nov 2019 01:05:18 +0000 (17:05 -0800)]
Merge tag 'renesas-arm64-dt-for-v5.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM64 DT updates for v5.5 (take two)
- Video-Input and Serial-ATA support on RZ/G2N,
- Color Management Module support on various R-Car Gen3 SoCs,
- Initial support for the R-Car M3-W+ (r8a77961) SoC on the
Salvator-XS board.
* tag 'renesas-arm64-dt-for-v5.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: Add support for Salvator-XS with R-Car M3-W+
arm64: dts: renesas: Add Renesas R8A77961 SoC support
arm64: dts: renesas: Prepare for rename of ARCH_R8A7796 to ARCH_R8A77960
dt-bindings: clock: Add r8a77961 CPG Core Clock Definitions
dt-bindings: power: Add r8a77961 SYSC power domain definitions
arm64: dts: renesas: r8a774b1: Add SATA controller node
arm64: dts: renesas: rcar-gen3: Add CMM units
arm64: dts: renesas: r8a774b1: Add VIN and CSI-2 support
Olof Johansson [Mon, 4 Nov 2019 01:02:06 +0000 (17:02 -0800)]
Merge tag 'omap-for-v5.5/prm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
PRM reset control dts changes for v5.5 merge window
This series of changes adds the PRM reset driver nodes for am3/4, omap4/5
and dra7 SoCs. The reset driver changes make it easier to add support for
various accelerators for TI SoCs in a more generic way.
Note that this branch is based on the PRM reset driver changes branch.
* tag 'omap-for-v5.5/prm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap5: Add PRM data
ARM: dts: am43xx: Add PRM data
ARM: dts: am33xx: Add PRM data
ARM: dts: omap4: add PRM nodes
ARM: dts: dra7: add PRM nodes
soc: ti: omap-prm: add omap5 PRM data
soc: ti: omap-prm: add am4 PRM data
soc: ti: omap-prm: add dra7 PRM data
soc: ti: omap-prm: add data for am33xx
soc: ti: omap-prm: add omap4 PRM data
soc: ti: omap-prm: add support for denying idle for reset clockdomain
soc: ti: omap-prm: poll for reset complete during de-assert
soc: ti: add initial PRM driver with reset control support
dt-bindings: omap: add new binding for PRM instances
Manivannan Sadhasivam [Wed, 30 Oct 2019 10:11:54 +0000 (15:41 +0530)]
ARM: dts: Add RDA8810PL GPIO controllers
Add GPIO controllers for RDA8810PL SoC. There are 4 GPIO controllers
in this SoC with maximum of 32 gpios. Except GPIOC, all controllers
are capable of generating edge/level interrupts from first 8 lines.
Olof Johansson [Sat, 2 Nov 2019 20:34:24 +0000 (13:34 -0700)]
Merge tag 'socfpga_dts_updates_for_v5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt
SoCFPGA DTS updates for v5.5
- Arria10
- modify QSPI read-delay property
- Agilex
- Add QSPI support
- Enable USB and LEDs
- Add service layer, fpga manager support
- Stratix10
- Update QSPI reg address
* tag 'socfpga_dts_updates_for_v5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
arm64: dts: agilex: add service layer, fpga manager and fpga region
arm64: agilex: enable USB and LEDs on agilex devkit
arm64: dts: altera: update QSPI reg addresses for Stratix10
arm64: dts: agilex: add QSPI support for Intel Agilex
ARM: dts: arria10: Modify QSPI read_delay for Arria10
Geert Uytterhoeven [Wed, 23 Oct 2019 12:33:39 +0000 (14:33 +0200)]
arm64: dts: renesas: Add Renesas R8A77961 SoC support
Add initial support for the Renesas R-Car M3-W+ (R8A77961) SoC.
This includes:
- Cortex-A57 and Cortex-A53 CPU cores
(incl. L2 caches and power state definitions),
- Power Management Unit,
- PSCI firmware,
- Pin Function Controller,
- Clock, Reset, System, and Interrupt Controllers,
- SCIF2 serial console,
- Product Register,
- ARM Architectured Timer,
and various placeholders to allow to use salvator-xs.dtsi.
Geert Uytterhoeven [Wed, 23 Oct 2019 12:33:38 +0000 (14:33 +0200)]
arm64: dts: renesas: Prepare for rename of ARCH_R8A7796 to ARCH_R8A77960
CONFIG_ARCH_R8A7796 for R-Car M3-W (R8A77960) will be renamed to
CONFIG_ARCH_R8A77960, to avoid confusion with R-Car M3-W+ (R8A77961),
which will use CONFIG_ARCH_R8A77961.
Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car
M3-W+ (R8A77961) SoC, as listed in Table 8.2b ("List of Clocks [R-Car
M3-W/R-Car M3-W+]") of the R-Car Series, 3rd Generation Hardware User's
Manual (Rev. 2.00, Jul. 31, 2019). A gap is added for CSIREF, to
preserve compatibility with the definitions for R-Car M3-W (R8A77960).
Note that internal CPG clocks (S0, S1, S2, S3, SDSRC, SSPSRC, and POST2)
are not included, as they are used as internal clock sources only, and
never referenced from DT.
Georgii Staroselskii [Fri, 1 Nov 2019 09:43:33 +0000 (12:43 +0300)]
arm64: dts: allwinner: bluetooth for Emlid Neutis N5
The Emlid Neutis N5 board has AP6212 BT+WiFi chip. This patch is in
line with 8558c6e21ceb ("ARM: dts: sun8i: h3: bluetooth for Banana Pi
M2 Zero board") and other commits that add Bluetooth support for
similar boards.
Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Corentin Labbe [Fri, 25 Oct 2019 18:51:28 +0000 (20:51 +0200)]
ARM: dts: sun9i: a80: Add Security System node
The Security System is a hardware cryptographic accelerator that support
AES/MD5/SHA1/DES/3DES/PRNG/RSA algorithms.
It could be found on Allwinner SoC A80 and A83T
This patch adds it on the Allwinner A80 SoC Device-tree.
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Corentin Labbe [Fri, 25 Oct 2019 18:51:27 +0000 (20:51 +0200)]
ARM: dts: sun8i: a83t: Add Security System node
The Security System is a hardware cryptographic accelerator that support
AES/MD5/SHA1/DES/3DES/PRNG/RSA algorithms.
It could be found on Allwinner SoC A80 and A83T
This patch adds it on the Allwinner A83T SoC Device-tree.
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Dmitry Osipenko [Thu, 24 Oct 2019 22:14:11 +0000 (01:14 +0300)]
ARM: tegra: Add CPU Operating Performance Points for Tegra30
Operating Point are specified per HW version. The OPP voltages are kept
in a separate DTSI file because some boards may not define CPU regulator
in their device-tree if voltage scaling isn't necessary for them.
Dmitry Osipenko [Thu, 24 Oct 2019 22:14:10 +0000 (01:14 +0300)]
ARM: tegra: Add CPU Operating Performance Points for Tegra20
Operating Point are specified per HW version. The OPP voltages are kept
in a separate DTSI file because some boards may not define CPU regulator
in their device-tree if voltage scaling isn't necessary, like for example
in a case of tegra20-trimslice which is outlet-powered device.
ARM: tegra: nyan-big: Add timings for RAM codes 4 and 6
Add timings for RAM codes 4 and 6 and a timing for 528mHz of RAM code 1,
which was missed due to the clock driver bug that is fixed now in all of
stable kernels.
The power supplies needed to drive eDP on Venice2 were never hooked up,
so things only worked because those regulators are already enabled by
other devices.
Dmitry Osipenko [Sun, 11 Aug 2019 21:00:39 +0000 (00:00 +0300)]
dt-bindings: memory: Add binding for NVIDIA Tegra30 External Memory Controller
Add device-tree binding for NVIDIA Tegra30 External Memory Controller.
The binding is based on the Tegra124 EMC binding since hardware is
similar, although there are couple significant differences.
Note that the memory timing description is given in a platform-specific
form because there is no detailed information on how to convert a
typical-common DDR timing into the register values. The timing format is
borrowed from downstream kernel, hence there is no hurdle in regards to
upstreaming of memory timings for the boards.
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Sun, 11 Aug 2019 21:00:37 +0000 (00:00 +0300)]
dt-bindings: memory: tegra30: Convert to Tegra124 YAML
The Tegra30 binding will actually differ from the Tegra124 a tad, in
particular the EMEM configuration description. Hence rename the binding
to Tegra124 during of the conversion to YAML.
Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
dt-bindings: regulator: Document regulators coupling of NVIDIA Tegra20/30 SoCs
There is voltage coupling between three regulators on Tegra20 boards and
between two on Tegra30. The voltage coupling is a SoC-level feature and
thus it is mandatory and common for all of the Tegra boards.
Andreas Färber [Tue, 15 Aug 2017 21:50:56 +0000 (23:50 +0200)]
dt-bindings: reset: Add Realtek RTD1295
Add a header with symbolic reset indices for Realtek RTD1295 SoC.
Naming was derived from reset-names in an OEM's Device Tree.
Acked-by: Rob Herring <robh@kernel.org>
[AF: Dropped RTD1295 specific binding definition, updated SPDX] Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Sun, 20 Oct 2019 12:41:21 +0000 (14:41 +0200)]
arm64: dts: realtek: Add watchdog node for RTD129x
Add the watchdog node to the RTD129x Device Tree.
Acked-by: Rob Herring <robh@kernel.org> Acked-by: Guenter Roeck <linux@roeck-us.net>
[AF: Moved from RTD1295 to new RTD129x] Signed-off-by: Andreas Färber <afaerber@suse.de>
Olof Johansson [Mon, 28 Oct 2019 15:53:16 +0000 (08:53 -0700)]
Merge tag 'stm32-dt-for-v5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT updates for v5.5, round 1
Highlights:
----------
MPU part:
-Add and enable ADC support on stm32mp157a-dk1
-Add DAC support on stm32mp157c-ed1
-Add and enable VREFBUF support on stm32mp157a-dk1
-Add focaltech touchscreen on stm32mp157c-dk2
-Add hdmi support on stm32mp157a-dk1
-Fix issues seen during YAML DT validation
-Fix regulators issues for all MPU boards
MCU part:
-Fix issues seen during YAML DT validation
* tag 'stm32-dt-for-v5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
ARM: dts: stm32: remove useless dma-ranges property for stm32f469
ARM: dts: stm32: remove useless dma-ranges property for stm32f429
ARM: dts: stm32: disable active-discharge for vbus_otg on stm32mp157a-avenger96
ARM: dts: stm32: Fix active discharge usage on stm32mp157
ARM: dts: stm32: change default minimal buck1 value on stm32mp157
ARM: dts: stm32: add PWR regulators support on stm32mp157
ARM: dts: stm32: remove useless interrupt from dsi node for stm32f469
ARM: dts: stm32: add hdmi audio support to stm32mp157a-dk1 board
ARM: dts: stm32: Add DAC support to stm32mp157c-ed1
ARM: dts: stm32: Add DAC pins used on stm32mp157c-ed1
ARM: dts: stm32: fix regulator-sd_switch node on stm32mp157c-ed1 board
ARM: dts: stm32: remove usb phy-names entries on stm32mp157c-ev1
ARM: dts: stm32: fix joystick node on stm32f746 and stm32mp157c eval boards
ARM: dts: stm32: fix memory nodes to match with DT validation tool
ARM: dts: stm32: add focaltech touchscreen on stm32mp157c-dk2 board
ARM: dts: stm32: enable ADC support on stm32mp157a-dk1
ARM: dts: stm32: add ADC pins used on stm32mp157a-dk1
ARM: dts: stm32: Enable VREFBUF on stm32mp157a-dk1
ARM: dts: stm32: move ltdc pinctrl on stm32mp157a dk1 board
Fabrice Gasnier [Wed, 9 Oct 2019 14:12:52 +0000 (16:12 +0200)]
ARM: dts: stm32: Add DAC support to stm32mp157c-ed1
stm32mp157c-ed1 board has digital-to-analog converter signals routed
to JP11 and JP10 jumpers (e.g. PA4/PA5).
It's easier then to configure them both. But keep them disabled by default,
so the pins are kept in their initial state to lower power consumption.
This way they can also be used as GPIO.
Fabrice Gasnier [Wed, 9 Oct 2019 14:12:51 +0000 (16:12 +0200)]
ARM: dts: stm32: Add DAC pins used on stm32mp157c-ed1
Define pins that can be used by digital-to-analog converter on
stm32mp157c eval daughter board:
- PA4 and PA5 pins are available respectively on JP11 and JP10
ARM: dts: stm32: enable ADC support on stm32mp157a-dk1
Configure ADC support on stm32mp157a-dk1. It can be used for various
purpose:
- AIN connector has several analog inputs: ANA0, ANA1, ADC2 in6 & in2,
ADC1 in13 & in6
- USB Type-C CC1 & CC2 pins wired to in18 & in19
It's easier then to Configure them all. But keep them disabled by default,
so the pins are kept in their initial state to lower power consumption.
This way they can also be used as GPIO.
Add VDD and VDDA supplies to ADC on stm32mp157c-dk1 board. This allows to
get full ADC analog performances in case VDDA is below 2.7V (not the case
by default).
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