Signed-off-by: Anatoly Pugachev <matorola@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
(cherry picked from commit c1e9b3b0eea12899b7749571af21cc60822cf2b6) Signed-off-by: Allen Pais <allen.pais@oracle.com>
Shannon Nelson [Thu, 12 Jan 2017 22:24:58 +0000 (14:24 -0800)]
tcp: fix tcp_fastopen unaligned access complaints on sparc
Fix up a data alignment issue on sparc by swapping the order
of the cookie byte array field with the length field in
struct tcp_fastopen_cookie, and making it a proper union
to clean up the typecasting.
This addresses log complaints like these:
log_unaligned: 113 callbacks suppressed
Kernel unaligned access at TPC[976490] tcp_try_fastopen+0x2d0/0x360
Kernel unaligned access at TPC[9764ac] tcp_try_fastopen+0x2ec/0x360
Kernel unaligned access at TPC[9764c8] tcp_try_fastopen+0x308/0x360
Kernel unaligned access at TPC[9764e4] tcp_try_fastopen+0x324/0x360
Kernel unaligned access at TPC[976490] tcp_try_fastopen+0x2d0/0x360
Cc: Eric Dumazet <eric.dumazet@gmail.com> Signed-off-by: Shannon Nelson <shannon.nelson@oracle.com> Acked-by: Eric Dumazet <edumazet@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from commit 003c941057eaa868ca6fedd29a274c863167230d) Signed-off-by: Allen Pais <allen.pais@oracle.com>
Liam R. Howlett [Tue, 31 Jan 2017 20:34:08 +0000 (12:34 -0800)]
vds: Add physical block support
Version 1.2 of the virtual IO device protocol added physical block
support. Start sending the underlaying physical block device size.
Signed-off-by: Liam R. Howlett <Liam.Howlett@Oracle.com> Reviewed-by: Shannon Nelson <shannon.nelson@oracle.com> Reviewed-by: Rob Gardner <rob.gardner@oracle.com>
Orabug: 19420123 Signed-off-by: Allen Pais <allen.pais@oracle.com>
Dave Aldridge [Fri, 17 Feb 2017 15:00:38 +0000 (07:00 -0800)]
sparc64: Add missing hardware capabilities for M7
Some M7 hardware capabilities were not being reported
correctly. This commit fixes the issue by adding definitions
for all the missing capabilities from both the Machine
Descriptor and the Compatibility Feature Register.
Signed-off-by: Dave Aldridge <david.j.aldridge@oracle.com> Reviewed-by: Shannon Nelson <shannon.nelson@oracle.com> Reviewed-by: Khalid Aziz <khalid.aziz@oracle.com> Signed-off-by: Allen Pais <allen.pais@oracle.com>
Jag Raman [Tue, 7 Mar 2017 21:41:31 +0000 (16:41 -0500)]
sparc64: VDC threads in guest domain do not resume after primary domain reboot
Prevents VDC threads from hanging while waiting for primary
domain to come back up. Ensures that all waiting VDC threads
are woken up when primary domain comes back up.
Liam R. Howlett [Wed, 1 Feb 2017 19:09:26 +0000 (14:09 -0500)]
sunvdc: Add support for setting physical sector size
Physical sector size is supported in v1.2 of the vDisk protocol and
should be set if available. If protocol version 1.2 is used and the
physical disk size is unavailable, then the disk is considered busy.
Signed-off-by: Liam R. Howlett <Liam.Howlett@Oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
(Cherry-pick of upstream f41e54616ca1a199f6c17228f26082ccdaaab3de)
Orabug: 19420123 Signed-off-by: Allen Pais <allen.pais@oracle.com>
Atish Patra [Wed, 1 Mar 2017 02:18:26 +0000 (19:18 -0700)]
sparc64: create/destroy cpu sysfs dynamically
Currently, cpu/cpuX represents maximum number of possible
cpus in a domain. Those cpu sysfs directories also does
not change as we add/remove cpus via ldom manager.
Update sysfs so that it represents number of present cpus
in the domain. As a result, cpu sysfs is also updated
dynamically upon cpu add/removal.
Before the fix:
[root@ca-sparc76 ~]# ldm list
NAME STATE FLAGS CONS VCPU MEMORY UTIL NORM UPTIME
primary active -n-cv- UART 32 32G 0.2% 0.2% 11m
[root@ca-sparc76 ~]# getconf _NPROCESSORS_CONF
512
[root@ca-sparc76 ~]# ldm set-vcpu 64 primary
[root@ca-sparc76 ~]# ldm list
NAME STATE FLAGS CONS VCPU MEMORY UTIL NORM UPTIME
primary active -n-cv- UART 64 32G 0.0% 0.0% 12m
[root@ca-sparc76 ~]# getconf _NPROCESSORS_CONF
512
-------------------------------------------------------------------------
After the fix:
[root@ca-sparc76 ~]# getconf _NPROCESSORS_CONF
32
[root@ca-sparc76 ~]# ldm set-vcpu 64 primary
[root@ca-sparc76 ~]# ldm list
NAME STATE FLAGS CONS VCPU MEMORY UTIL NORM UPTIME
primary active -n-cv- UART 64 32G 0.0% 0.0% 12m
[root@ca-sparc76 ~]# getconf _NPROCESSORS_CONF
64
Signed-off-by: Atish Patra <atish.patra@oracle.com> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Reviewed-by: Thomas Tai <thomas.tai@oracle.com> Signed-off-by: Allen Pais <allen.pais@oracle.com>
Khalid Aziz [Tue, 7 Mar 2017 18:26:10 +0000 (11:26 -0700)]
sparc64: Do not retain old VM_SPARC_ADI flag when protection changes on page
When protection on a memory page is changed with mprotect(), old
arch-specific VM flags on the page are retained. This patch clears
old VM_SPARC_ADI flag when protection is changed since mprotect() is
potentially being invoked to disable ADI on the page. This code will
add VM_SPARC_ADI flag back if the new protection includes it.
Aaron Young [Fri, 17 Feb 2017 23:18:53 +0000 (18:18 -0500)]
SPARC64: VIO: Support for virtual-device MD node probing
This update adds support to the mdesc/vio infrastructure to
probe for "virtual-device" nodes in the MD. The vio
module will create sysfs device files for these nodes which
can be accessed by user space code (such as udev). In addition,
VIO drivers can now probe for these MD nodes if the need arises.
This functionality will serve as part of the fix for
BUG 24841906.
Signed-off-by: Aaron Young <Aaron.Young@oracle.com> Reviewed-By: Alexandre Chartre <Alexandre.Chartre@oracle.com>
Orabug: 24841906
Thomas Tai [Mon, 13 Feb 2017 14:50:05 +0000 (06:50 -0800)]
sparc: fix kernel panic caused by vio handshake
During hours long reboot test, the primary prints out multiple TX trigger
errors followed by a VIO handshake panic. The TX trigger error happens
because the primary ldmvsw detects that the ldc channel is down. In this
situation, the ldc operation is aborted, the tx and rx queue are then
flushed. The problem is that the rx queue may contain a LDC_EVENT_RESET
sent by the guest. It causes the primary to think that the ldc channel
is not in reset state. When the guest comes up again, the handshake is
out of sequence and thus causes handshake panic.
The TX trigger error would not have happened if the LDC_EVENT_RESET was
received before the TX checked the ldc link state. This is the reason
why the panic happens intermittently.
This patch checks for the connection reset and changes the ldc state to
reset. The reset logic is taken from existing vnet_event_napi() ldc_ctrl:
code path.
Khalid Aziz [Fri, 2 Dec 2016 19:45:37 +0000 (12:45 -0700)]
sparc64: Add sensible read values for /proc/<pid>/sparc_adi
This patch makes value read from /proc/<pid>/sparc_adi consistent
across platforms that support ADi and ones that do not. When ADI is
not available for a process either due to process being an anonymous
process on an ADI-capable platform or the process is running on a
non-ADI platform, a read from /proc/<pid>/sparc_adi always reads a
value of -1. This patch updates the documentation file as well with
the values for sparc_adi proc file.
Eric Snowberg [Thu, 17 Nov 2016 21:27:36 +0000 (13:27 -0800)]
sparc64: Add ability to set the mcde state for a process
turn off version checking (PSTATE.mcde) to avoid tripping over ADI
versions in flux. This has been partially remedied by using non-faulting
loads.
However, there is still a need to turn off PSTATE.mcde in memory dump
functions. This is to determine if an address is readable. If the
address is unreadable, the dump shows the memory contents as "********"
instead of a 4-byte hex value.
Signed-off-by: Eric Snowberg <eric.snowberg@oracle.com> Reviewed-by: Khalid Aziz <khalid.aziz@oracle.com> Signed-off-by: Allen Pais <allen.pais@oracle.com>
Chuck Anderson [Sat, 18 Feb 2017 06:15:35 +0000 (22:15 -0800)]
sparc64: add mcd_on_by_default
Add the global variable mcd_on_by_default and support for the kernel boot arg
"mcd_on_by_default" which causes mcd_on_by_default = 1 if the kernel is
adi_capable().
Based on the code in commit:
sparc64: Enable Application Data Integrity for m7 and newer processors
Required by commit:
sparc64: Add proc files specific to ADI
Orabug: 22713162 Signed-off-by: Chuck Anderson <chuck.anderson@oracle.com>
Khalid Aziz [Wed, 15 Feb 2017 19:57:59 +0000 (12:57 -0700)]
sparc64: Add support for ADI (Application Data Integrity)
ADI is a new feature supported on SPARC M7 and newer processors to allow
hardware to catch rogue accesses to memory. ADI is supported for data
fetches only and not instruction fetches. An app can enable ADI on its
data pages, set version tags on them and use versioned addresses to
access the data pages. Upper bits of the address contain the version
tag. On M7 processors, upper four bits (bits 63-60) contain the version
tag. If a rogue app attempts to access ADI enabled data pages, its
access is blocked and processor generates an exception. Please see
Documentation/sparc/adi.txt for further details.
This patch extends mprotect to enable ADI (TSTATE.mcde), enable/disable
MCD (Memory Corruption Detection) on selected memory ranges, enable
TTE.mcd in PTEs, return ADI parameters to userspace and save/restore ADI
version tags on page swap out/in or migration. It also adds handlers for
traps related to MCD. ADI is not enabled by default for any task. A task
must explicitly enable ADI on a memory range and set version tag for ADI
to be effective for the task.
This initial implementation supports saving and restoring one tag per
page. A page must use same version tag across the entire page for the
tag to survive swap and migration. Swap swupport infrastructure in this
patch allows for this capability to be expanded to store/restore more
than one tag per page in future.
This is a backport of patch sent upstream and brings UEK code closer to
upstream patch v6.
Khalid Aziz [Wed, 18 Jan 2017 17:59:26 +0000 (10:59 -0700)]
sparc64: Add support for ADI register fields, ASIs and traps
SPARC M7 processor adds new control register fields, ASIs and a new
trap to support the ADI (Application Data Integrity) feature. This
patch adds definitions for these register fields, ASIs and a handler
for the new precise memory corruption detected trap.
This is a backport of patch sent upstream and brings UEK code in sync
with upstream patch v6.
Khalid Aziz [Wed, 18 Jan 2017 17:36:21 +0000 (10:36 -0700)]
mm: Add functions to support extra actions on swap in/out
If a processor supports special metadata for a page, for example ADI
version tags on SPARC M7, this metadata must be saved when the page is
swapped out. The same metadata must be restored when the page is swapped
back in. This patch adds two new architecture specific functions -
arch_do_swap_page() to be called when a page is swapped in,
arch_unmap_one() to be called when a page is being unmapped for swap
out.
This is a backport of patch sent upstream and brings UEK code in sync
with upstream patch v6.
Khalid Aziz [Thu, 5 Jan 2017 18:46:54 +0000 (11:46 -0700)]
signals, sparc: Add signal codes for ADI violations
SPARC M7 processor introduces a new feature - Application Data
Integrity (ADI). ADI allows MMU to catch rogue accesses to memory.
When a rogue access occurs, MMU blocks the access and raises an
exception. In response to the exception, kernel sends the offending
task a SIGSEGV with si_code that indicates the nature of exception.
This patch adds three new signal codes specific to ADI feature:
1. ADI is not enabled for the address and task attempted to access
memory using ADI
2. Task attempted to access memory using wrong ADI tag and caused
a deferred exception.
3. Task attempted to access memory using wrong ADI Ttag and caused
a precise exception.
This is a backport of patch sent upstream and brings UEK code closer to
upstream patch v6.
The command "shutdown -h -H now" should shut the system down to the
OBP, however the machine was being powered off in the LDOM case.
In the LDOM case, the "reboot-command" variable must be set to
the string "noop" and then ldom_reboot() must be called.
This will make the OBP ignore the setting of "auto-boot?" after it
completes the reset. This causes the system to stop at the ok prompt.
Signed-off-by: Larry Bassel <larry.bassel@oracle.com> Reviewed-by: Shannon Nelson <shannon.nelson@oracle.com> Signed-off-by: Allen Pais <allen.pais@oracle.com>
When returning from the user probe code into userspace process, PC & NPC are
truncated to 32 bits.
As a result of shared libraries get loaded very high in the virtual address
space of the process, placing a user probe inside a shared library makes the
kernel return into the process at the wrong address, causing it to seg'fault
most of the time.
This patch prevents truncating PC and NPC.
Signed-off-by: Eric Saint Etienne <eric.saint.etienne@oracle.com> Reviewed-by: David Aldridge <david.j.aldridge@oracle.com> Signed-off-by: Allen Pais <allen.pais@oracle.com>
Atish Patra [Mon, 23 Jan 2017 21:40:35 +0000 (14:40 -0700)]
sparc64: Use online cpus instead of present cpus during hotplug.
As per the hotplug documentation, online cpu maps should be
updated if cpu hotplug happens via sysfs. Thus, all other
cpu maps should be updated basd on the online cpus instead
of present cpus. The following example illustrates the issue
if cpu maps are updated based on present cpus.
[root@ca-sparc64 hackbench]# echo 1 > /sys/devices/system/cpu/cpu2/online
[root@ca-sparc64 hackbench]#
cat /sys/devices/system/cpu/cpu1/topology/core_siblings_list
0-255
[root@ca-sparc64 hackbench]#
cat /sys/devices/system/cpu/cpu1/topology/thread_siblings_list
0-7
This is wrong because cpu0 is still offline.
After the fix:
[root@ca-sparc64 hackbench]#
cat /sys/devices/system/cpu/cpu1/topology/core_siblings_list
1-255
[root@ca-sparc64 hackbench]#
cat /sys/devices/system/cpu/cpu1/topology/thread_siblings_list
1-7
Signed-off-by: Atish Patra <atish.patra@oracle.com> Reviewed-by: Chris Hyser <chris.hyser@oracle.com> Signed-off-by: Allen Pais <allen.pais@oracle.com>
Atish Patra [Mon, 23 Jan 2017 21:39:24 +0000 (14:39 -0700)]
sparc64: Update cpumaps correctly during hotplug.
Currently,numa_cpu_mask is not updated when cpus are
hotplugged resulting incorrect number of cpus reported
by lscpu/numactl. Moreover, cpu_core_sib_cache_map is
also not cleared when cpu goes offline.
Update both the masks correctly whenever cpu goes online/
offline.
Thomas Tai [Tue, 17 Jan 2017 19:43:32 +0000 (11:43 -0800)]
sparc: fix intermittent LDom hang waiting for vdc_port_up
When an LDom boots, sunvdc probes the disk using the LDC channel.
If the channel was previously configured, we need to wait for
the channel state to change from UP to RESETTING so that the
seqid is properly reset in the primary. Otherwise the primary
will expect that the ldc packet contains a seqid other than 0.
Also disable ldc hypervisor interrupt before calling vio_port_up,
because interrupts can happen once ldc_bind is called. disabling the
interrupt ensures everything is configured before getting an interrupt
request.
Signed-off-by: Thomas Tai <thomas.tai@oracle.com> Reviewed-By: Liam Merwick <Liam.Merwick@oracle.com> Signed-off-by: Allen Pais <allen.pais@oracle.com>
Babu Moger [Wed, 18 Jan 2017 01:21:44 +0000 (17:21 -0800)]
arch/sparc: Add a dedicated clear_page and clear_user_page for M7
Adding a dedicated clear_page and clear_user_page for M7.
Avoids multiple checks which are really not required.
This eliminates about 30 instructions for each call.
Seen about 3 to 4 percent latency reduction in some cases.
Signed-off-by: Dave Aldridge <david.j.aldridge@oracle.com> Signed-off-by: Eric Saint Etienne <eric.saint.etienne@oracle.com> Reviewed-by: Rob Gardner <rob.gardner@oracle.com> Signed-off-by: Allen Pais <allen.pais@oracle.com>
Couple of indexing fixes.
1. Fix indexing pbm->msi_msiqid_table. It is initialized
based off of pbm->msi_first(not pbm->msiq_first as previously done).
Here is how it is initialized(Look at in sparc64_setup_msi_irq)
pbm->msi_msiqid_table[msi - pbm->msi_first] = msiqid;
2. In set_related_affinity, we dont need to subtract msi_first as
the loop is indexed from 0 to size of the table.
Saves time when smp_flush_tlb_page/smp_flush_tlb_pending
is called during do_exit(...). Without this patch, killing
processes had performance bottle neck in these functions
due to unnecessary xcalls made to flush TLBs.
Reviewed-by: Nitin Gupta <nitin.m.gupta@oracle.com> Signed-off-by: Bob Picco <bob.picco@oracle.com Signed-off-by: Henry Willard <henry.willard@oracle.com> Signed-off-by: Sanath Kumar <sanath.s.kumar@oracle.com> Signed-off-by: Allen Pais <allen.pais@oracle.com>
Liam R. Howlett [Thu, 5 Jan 2017 20:58:41 +0000 (15:58 -0500)]
sparc64: Zero pages on allocation for mondo and error queues.
Error queues use a non-zero first word to detect if the queues are full.
Using pages that have not been zeroed may result in false positive
overflow events. These queues are set up once during boot so zeroing
all mondo and error queue pages is safe.
Note that this does not always occur because the page allocation for
these queues is so early in the boot cycle that higher number CPUs get
fresh pages. It is only when traps are serviced with lower number CPUs
who were given already used pages that this issue is exposed.
Liam R. Howlett [Thu, 22 Dec 2016 02:57:42 +0000 (21:57 -0500)]
sparc64: Don't panic on user mode non-resumable errors
Send a SIGBUS to the offending process on all userspace non-resumable
traps. This prevents userspace applications from creating a kernel
panic. The siginfo will return the code BUS_ADRERR and a valid address
if possible.
David S. Miller [Thu, 27 Oct 2016 16:04:54 +0000 (09:04 -0700)]
sparc64: Handle extremely large kernel TLB range flushes more gracefully.
When the vmalloc area gets fragmented, and because the firmware
mapping area sits between where modules live and the vmalloc area, we
can sometimes receive requests for enormous kernel TLB range flushes.
When this happens the cpu just spins flushing billions of pages and
this triggers the NMI watchdog and other problems.
We took care of this on the TSB side by doing a linear scan of the
table once we pass a certain threshold.
Do something similar for the TLB flush, however we are limited by
the TLB flush facilities provided by the different chip variants.
First of all we use an (mostly arbitrary) cut-off of 256K which is
about 32 pages. This can be tuned in the future.
The huge range code path for each chip works as follows:
1) On spitfire we flush all non-locked TLB entries using diagnostic
acceses.
2) On cheetah we use the "flush all" TLB flush.
3) On sun4v/hypervisor we do a TLB context flush on context 0, which
unlike previous chips does not remove "permanent" or locked
entries.
We could probably do something better on spitfire, such as limiting
the flush to kernel TLB entries or even doing range comparisons.
However that probably isn't worth it since those chips are old and
the TLB only had 64 entries.
Reported-by: James Clarke <jrtc27@jrtc27.com> Tested-by: James Clarke <jrtc27@jrtc27.com> Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from commit a74ad5e660a9ee1d071665e7e8ad822784a2dc7f) Signed-off-by: Allen Pais <allen.pais@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from commit a236441bb69723032db94128761a469030c3fe6d) Signed-off-by: Allen Pais <allen.pais@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from commit 830cda3f9855ff092b0e9610346d110846fc497c) Signed-off-by: Allen Pais <allen.pais@oracle.com>
David S. Miller [Wed, 26 Oct 2016 02:43:17 +0000 (19:43 -0700)]
sparc64: Handle extremely large kernel TSB range flushes sanely.
If the number of pages we are flushing is more than twice the number
of entries in the TSB, just scan the TSB table for matches rather
than probing each and every page in the range.
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from commit 849c498766060a16aad5b0e0d03206726e7d2fa4) Signed-off-by: Allen Pais <allen.pais@oracle.com>
David S. Miller [Tue, 25 Oct 2016 23:23:26 +0000 (16:23 -0700)]
sparc64: Fix illegal relative branches in hypervisor patched TLB code.
When we copy code over to patch another piece of code, we can only use
PC-relative branches that target code within that piece of code.
Such PC-relative branches cannot be made to external symbols because
the patch moves the location of the code and thus modifies the
relative address of external symbols.
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from commit b429ae4d5b565a71dfffd759dfcd4f6c093ced94) Signed-off-by: Allen Pais <allen.pais@oracle.com>
2. CPU DR related problems including 'length too big' errors and hangs. With
these new fixes, >256 vcpus can be successfully added/removed from a guest
domain. As part of this fix, a new scheme for reusing event data memory
buffers was implemented.
Signed-off-by: Aaron Young <Aaron.Young@oracle.com> Reviewed-By: Liam Merwick <Liam.Merwick@oracle.com>
Orabug: 23171935, 24848179 Signed-off-by: Allen Pais <allen.pais@oracle.com>
Aaron Young [Wed, 23 Nov 2016 16:02:02 +0000 (11:02 -0500)]
SPARC64: ds driver: Make memory allocations ATOMIC and enhance debugging
This patch fixes the following issues:
1. BUG 25107317 - Kernel Panic: Watchdog HARD LOCKUP out of ds_cap_fini()
2. BUG 24787856 - Forward port 19811909 - Unnecessary
warning - ldom_req_sp_token
BUG 25107317 appears to be caused by the ds driver allocating memory using
the GFP_KERNEL flag (which can result in sleeping) while holding a spinlock.
This is a violation of rules and resulted in the panic.
To fix BUG 24787856, the error message in question was changed to a
printk_once() which will result in the message only appearing once
in the console log instead of repeatedly.
The debugging facility in the driver was also enhanced by adding 3 separate
debug levels for the ds driver debug messages.
Signed-off-by: Aaron Young <Aaron.Young@oracle.com> Reviewed-by: Alexandre Chartre <Alexandre.Chartre@oracle.com> Reviewed-By: Liam Merwick <Liam.Merwick@oracle.com>
Orabug: 25107317, 24787856
(cherry picked from commit f3bf272f0512120708a2966a7916b51c34efe56d) Signed-off-by: Allen Pais <allen.pais@oracle.com>
Dave Aldridge [Thu, 19 May 2016 10:54:58 +0000 (03:54 -0700)]
sparc64: Add symbolic access to M7 performance counters to perf
This commit provides symbolic access to every performance counter
provided in the M7. The 'perf list' command can be used to provide
a complete list of these new events, which will be reported as
shown below.
Br_mispred OR cpu/Br_mispred/ [Kernel PMU event]
Br_taken OR cpu/Br_taken/ [Kernel PMU event]
Br_tgt_mispred OR cpu/Br_tgt_mispred/ [Kernel PMU event]
Signed-off-by: Dave Aldridge <david.j.aldridge@oracle.com> Acked-by: Rob Gardner <rob.gardner@oracle.com> Signed-off-by: Allen Pais <allen.pais@oracle.com>
(cherry picked from commit 39f70b2fa98ea10931133ab983f521c70cb7429f)
Signed-off-by: Dave Aldridge <david.j.aldridge@oracle.com>
(cherry picked from commit f39f00c4536c8c6ca0585a200a56894c2c158743) Signed-off-by: Allen Pais <allen.pais@oracle.com>
Dave Aldridge [Fri, 24 Jun 2016 13:17:25 +0000 (06:17 -0700)]
sparc64: Fix the watchdog corrupting performance counters
There is a race condition in the perf_event_grab_pmc() which
means that we do not increment the active_events count correctly
when a new event is added. Ultimately, we end up with a negative
value for the active_event count. This means that the next time
we try and add a new event the watchdog will not be stopped
correctly and corruption of the performance count will
be observed.
Note: In sparc64 land the watchdog is implemented using one
of the performance counters.
This issue is fixed by moving the mutex lock to make
sure it encompasses the whole critical section in the
perf_event_grab_pmc().
Dave Aldridge [Tue, 29 Mar 2016 10:57:14 +0000 (03:57 -0700)]
sparc64: Fix incorrect counting when using multiple perf counters
Commit 165050c1 introduced a change to the way we deal with
performance counter overflow interrupts. This change had the
side effect that when a performance counter overflow was
detected it assumed all performance counters in use
had overflowed. Thus, when using multiple performance
counters the event counting was incorrect.
This commit fixes this incorrect counting behaviour.
Dave Aldridge [Fri, 4 Nov 2016 16:56:07 +0000 (09:56 -0700)]
sparc64: Fix a race condition when stopping performance counters
When stopping a performance counter that is close to overflowing,
there is a race condition that can occur between writing to the
PCRx register to stop the counter (and also clearing the PCRx.ov
bit at the same time) vs the performance counter overflowing and
setting the PCRx.ov bit in the PCRx register.
The result of this race condition is that we occassionally miss
a performance counter overflow interrupt, which in turn leads
to incorrect event counting.
This race condition has been observed when counting cpu cycles.
To fix this issue when stopping a performance counter,
we simply allow it to continue counting and overflow before
stopping it. This allows the performance counter overflow
interrupt to be generated and acted upon.
This fix is applied for M7, T5 and T4 devices.
Signed-off-by: Dave Aldridge <david.j.aldridge@oracle.com> Signed-off-by: Eric Saint-Etienne <eric.saint.etienne@oracle.com>
(cherry picked from commit e5b7619e1de2f3e0dd858f632bc08ce64c344245) Signed-off-by: Allen Pais <allen.pais@oracle.com>
Dave Aldridge [Fri, 4 Mar 2016 11:18:45 +0000 (03:18 -0800)]
sparc64: Stop performance counter before updating
In order to reliably clear the PCRx.ov bit when updating a
performance counter value, we need to stop it counting first.
If we do not do this, then we can miss performance counter
overflow events.
Signed-off-by: Allen Pais <allen.pais@oracle.com> Signed-off-by: Dave Kleikamp <dave.kleikamp@oracle.com>
(cherry picked from commit a53c94ca8afc7a7603ff3c1154d81abb113a9e71)
Reviewed-by: Chris Hyser <chris.hyser@oracle.com> Signed-off-by: Allen Pais <allen.pais@oracle.com>
(cherry picked from commit c33aebff52457ee7d0bacc922dc23b07cee4139a)
Thomas Tai [Fri, 11 Nov 2016 15:46:10 +0000 (10:46 -0500)]
sparc64: fix compile warning section mismatch in find_node()
A compile warning is introduced by a commit to fix the find_node().
This patch fix the compile warning by moving find_node() into __init
section. Because find_node() is only used by memblock_nid_range() which
is only used by a __init add_node_ranges(). find_node() and
memblock_nid_range() should also be inside __init section.
Signed-off-by: Thomas Tai <thomas.tai@oracle.com>
(cherry picked from commit e58d08f923190fc4dc2a1962710f84672c2bc9b2) Signed-off-by: Allen Pais <allen.pais@oracle.com>
sun4v_build_irq assume the given irq number is valid and use
it to get the handler pointer, the pointer is dereference
without being checked and cause kernel panic.
The cause of the invalid irq is that the tx/rx irq have never
been free during device removal. irq number end up exhausted during
continuous device add/removal test.
tx/rx irq is allocated during vio_device_probe() using irq_alloc()
and cookie_assign(). To free the tx/rx irq, cookie_unassign() and
irq_free() is called when the device is removed.
Signed-off-by: Thomas Tai <thomas.tai@oracle.com> Reviewed-by: Chris Hyser <chris.hyser@oracle.com>
(cherry picked from commit 80043637b8fb1eabc16ab5947019f4dcdbb8c79f) Signed-off-by: Allen Pais <allen.pais@oracle.com>
Aaron Young [Wed, 2 Nov 2016 17:00:29 +0000 (13:00 -0400)]
SPARC64: ldmvsw: tx queue stuck in stopped state after LDC reset
The following patch fixes an issue with the ldmvsw driver where
the network connection of a guest domain becomes non-functional after
the guest domain has panic'd and rebooted.
The root cause was determined to be from the following series of
events:
1. Guest domain panics - resulting in the guest no longer processing
network packets (from ldmvsw driver)
2. The ldmvsw driver (in the control domain) eventually exerts flow
control due to no more available tx drings and stops the tx queue
for the guest domain
3. The LDC of the network connection for the guest is reset when
the guest domain reboots after the panic.
4. The LDC reset event is received by the ldmvsw driver and the ldmvsw
responds by clearing the tx queue for the guest.
5. ldmvsw waits indefinitely for a DATA ACK from the guest - which is
the normal method to re-enable the tx queue. But the ACK never comes
because the tx queue was cleared due to the LDC reset.
To fix this issue, in addition to clearing the tx queue, re-enable the
tx queue on a LDC reset. This prevents the ldmvsw from getting caught in
this deadlocked state of waiting for a DATA ACK which will never come.
Signed-off-by: Aaron Young <Aaron.Young@oracle.com> Acked-by: Sowmini Varadhan <sowmini.varadhan@oracle.com>
Orabug: 24714685
(cherry picked from commit d84ad41602ceb070c05d2633bc09d81f66796e15) Signed-off-by: Allen Pais <allen.pais@oracle.com>
Babu Moger [Thu, 13 Oct 2016 17:36:48 +0000 (10:36 -0700)]
sparc: Implement watchdog_nmi_enable and watchdog_nmi_disable
Implement functions watchdog_nmi_enable and watchdog_nmi_disable
to enable/disable nmi watchdogs. Sparc uses arch specific nmi watchdog
handler. Currently, we do not have a way to enable/disable nmi watchdog
dynamically. With these patches we can enable or disable arch
specific nmi watchdogs using proc or sysctl interface.
Example commands.
To enable: echo 1 > /proc/sys/kernel/nmi_watchdog
To disable: echo 0 > /proc/sys/kernel/nmi_watchdog
It can also achieved using the sysctl parameter kernel.nmi_watchdog
Signed-off-by: Babu Moger <babu.moger@oracle.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
(cherry picked from commit 43e96774e0a338e883e9ced9e717424df126b153) Signed-off-by: Allen Pais <allen.pais@oracle.com>
Atish Patra [Thu, 20 Oct 2016 00:33:29 +0000 (18:33 -0600)]
sparc64: Setup a scheduling domain for highest level cache.
Individual scheduler domain should consist different hierarchy
consisting of cores sharing similar property. Currently, no
scheduler domain is defined separately for the cores that shares
the last level cache. As a result, the scheduler fails to take
advantage of cache locality while migrating tasks during load
balancing.
Here are the cpu masks currently present for sparc that are/can
be used in scheduler domain construction.
cpu_core_map : set based on the cores that shares l1 cache.
core_core_sib_map : is set based on the socket id or max cache id.
The prior SPARC notion of socket was defined as highest level of
shared cache. However, the MD record on T7 platforms now describes
the CPUs that share the physical socket and this is no longer tied
to shared cache.
That's why a separate cpu mask needs to be created that truly
represent highest level of shared cache for all platforms.
Signed-off-by: Atish Patra <atish.patra@oracle.com> Reviewed-by: Chris Hyser <chris.hyser@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from commit 1e655ca52bb2727471f20cf4d8f62b4b9f69e6fc) Signed-off-by: Allen Pais <allen.pais@oracle.com>
Allen Pais [Mon, 30 May 2016 07:42:15 +0000 (13:12 +0530)]
SPARC64: PORT LDMVSW DRIVER TO UEK4
Port of the new ldmvsw (Ldoms Virtual Switch) driver to UEK4.
This code has already been submitted and accepted
into the mainline Linux kernel.
The ldmvsw is very similar in function to the existing sunvnet driver. The
sunvnet driver is therefore split to put the code common to both drivers
into the kernel for use by both drivers when loaded (see sunvnet_common.c/h).
Signed-off-by: Aaron Young <aaron.young@oracle.com> Signed-off-by: Allen Pais <allen.pais@oracle.com>
(cherry picked from commit 361afffe35368dc23d2c9df6d7797ccf9af8fe57)
Rob Gardner [Sun, 1 Nov 2015 23:51:34 +0000 (16:51 -0700)]
SPARC64: Fix bad FP register calculation
An additional problem was found in handle_ldf_stq
after adding the fix for the SIGFPE on no-fault
load. The calculation for freg is incorrect when
a single precision load is being handled. This
causes %f1 to be seen as %f32 etc, and the incorrect
register ends up being overwritten. This code
sequence demonstrates the problem:
ldd [%g1], %f32 ! g1 = valid address
lda [%i3] ASI_PNF, %f1 ! i3 = invalid address
std %f32, [%g1] ! %f32 is mangled
This is corrected by basing the freg calculation on
the load size.
Rob Gardner [Fri, 30 Oct 2015 19:18:00 +0000 (13:18 -0600)]
SPARC64: Respect no-fault ASI for floating exceptions
Floating point load instructions using ASI_PNF or other
no-fault ASIs should never cause a SIGFPE. A store-quad
instruction should naturally fault if a non-quad register
is given, but this constraint should not apply to loads,
which may be single precision, double, or quad, and the
only constraint should be that the target register type
be appropriate for the precision of the load. A bug in
handle_ldf_stq() unnecessarily restricts no-fault loads
to quad registers, and causes a floating point exception
if one is not given. This restriction is removed.
Signed-off-by: Rob Gardner <rob.gardner@oracle.com> Signed-off-by: Allen Pais <allen.pais@oracle.com> Signed-off-by: Dave Kleikamp <dave.kleikamp@oracle.com>
The sysfs file /sys/devices/system/node/node0/cpulist is incorrect in the
single node case on sun4v machines as the machine description record in this
case does not contain any NUMA information. A default list from 0 to NR_CPUS
was used prior. This file is read by utilities such as 'numactl --hardware'
and lscpu to show CPU-to-node assignment.
In order to fix this issue, the numa_cpumask_lookup_table is cleared at
bootup. Whenever an extra cpu is bringup via __cpu_up, the corresponding
cpu mask is set in the numa_cpumask_lookup_table.
chris hyser [Fri, 23 Sep 2016 16:27:07 +0000 (09:27 -0700)]
sparc64: Cleans up PRIQ error and debugging messages.
Given that the lowest level arch dependent interrupt routines cannot actually
propagate any error back to the calling driver in the case of irq
request/enable/disable and setting affinity, PRIQ error messages need to
communicate failures in a more traceable way. The original error messages which
were more for internal debugging than regular usage have also been improved as
well as made controllable via a command line parameter priq=dbg.
Signed-off-by: Chris Hyser <chris.hyser@oracle.com>
(cherry picked from commit 89c31d4dd664cd2edc1f6d14aa62c75acfb0d172) Signed-off-by: Allen Pais <allen.pais@oracle.com>
Dave Kleikamp [Fri, 17 Jun 2016 14:51:04 +0000 (09:51 -0500)]
sparc: Remove console spam during kdump
Before executing the crash kernel, the panicking kernel cleans up the
irq state of the machine. This code contains a warning when cleaning up
unbound MSIs. Repeating this warning for each one floods the console and
can cause a waiting thread to time out before the other cpus have
completed.
This patch removes the warning and increases the time allowed for all
the cpus to complete the machine_capture_other_strands() function.
Dave Kleikamp [Mon, 27 Jun 2016 16:30:17 +0000 (11:30 -0500)]
sparc64: kdump: set crashing_cpu for panic
crashing_cpu was only being set in die_if_kernel() but not when a
crash dump is initiated from panic(). Move the initialization to
machine_crash_shutdown().
Also call bust_spinlocks() from die_if_kernel() to get rid of a warning
in smp_call_function_many(). It's already called in the panic path.
Signed-off-by: Dave Kleikamp <dave.kleikamp@oracle.com>
(cherry picked from commit 1b588be700fac73edd07c015ff53aecba5d92bec) Signed-off-by: Allen Pais <allen.pais@oracle.com>
Dave Kleikamp [Thu, 23 Jun 2016 19:04:30 +0000 (14:04 -0500)]
sparc: kexec: Don't mess with the tl register
I meddled with things I didn't fully understand while implementing commit b43bc8f0 - "sparc64: add missing code for crash_setup_regs()"
I had changed the tl register in order to read tstate, tpc, etc. without
really knowing what I was doing. This can be a disaster if the crashing
thread takes another interrupt. Currently, the crash utitility doesn't
even use those values. They are found on the stack instead.
Signed-off-by: Dave Kleikamp <dave.kleikamp@oracle.com>
(cherry picked from commit 80eb7e28d3c719bbe3af56de5a5a8c68b764dbb9) Signed-off-by: Allen Pais <allen.pais@oracle.com>
In case of a ldom/hardware not supporting ldc, ipmi_si module
will set the smi interface pointer to NULL after ldc channel
detection failure. However, ipmi_si module will crash during
unload due to absence of NULL check.
Add the smi interface null check and assign the workqueue to
NULL during cleanup to avoid double free panic.
Signed-off-by: Atish Patra <atish.patra@oracle.com> Reviewed-by: David Aldridge <david.j.aldridge@oracle.com> Reviewed-by: Vijay Kumar <vijay.ac.kumar@oracle.com> Reviewed-by: Rob Gardner <rob.gardner@oracle.com>
(cherry picked from commit f2546771efb0c6402a5ea65dac9c5dbce18150e6) Signed-off-by: Allen Pais <allen.pais@oracle.com>
Currently, ipmi driver fakes it self as a userland process
to access ipmi vldc channel.
This patch uses new cleaner vldc kernel interface that is added
for ipmi driver.
Signed-off-by: Atish Patra <atish.patra@oracle.com> Reviewed-by: Rob Gardner <rob.gardner@oracle.com> Signed-off-by: Allen Pais <allen.pais@oracle.com>
(cherry picked from commit 7a0d1deac3289130680a5ab1626c609b76c9f053)
IPMI driver will have a stale vldc file pointer if ILOM resets.
Thus, IPMI drivers failed to work after the reset is complete.
IPMI driver need to close that file pointer and open another after
ilom reset is complete.
This is achieved by trying to open vldc file in every 15 seconds
in a process context. As vldc or ldc can not detect a ILOM reset,
this is the best possible approach for the problem.
This is based on Rob's patch for mc reset fix. Signed-off-by: Atish Patra <atish.patra@oracle.com> Reviewed-by: Rob Gardner <rob.gardner@oracle.com>
(cherry picked from commit cf5139791a8241fcab1f59c1da0a9058def661f2) Signed-off-by: Allen Pais <allen.pais@oracle.com>
Vijay Kumar [Sun, 2 Oct 2016 21:40:18 +0000 (15:40 -0600)]
sparc64:mm/hugetlb: Set correct huge_pte_count index for 8M hugepages
Both set_huge_pte_at(...) and huge_ptep_get_and_clear(...)
call real_hugepage_size_to_pte_count_idx(hugepage_size) when adjusting
huge_pte_count. For 8MB/4MB the huge_pte_count index computed is 1(one).
This is incorrect because this index is for xl_hugepages. So the tsb
grow code in the mm fault path does not grow the tsb for 8MB/4MB
hugepages.
Signed-off-by: Bob Picco <bob.picco@oracle.com> Signed-off-by: Vijay Kumar <vijay.ac.kumar@oracle.com> Reviewed-by: Mike Kravetz <mike.kravetz@oracle.com> Tested-by: Mike Kravetz <mike.kravetz@oracle.com>
Orabug: 24490586
(cherry picked from commit c928d6fccaa59bd4b6cffc904144fa67a4726ff6) Signed-off-by: Allen Pais <allen.pais@oracle.com>
As pages are allocated by a task, counters in the mm and mm_context
structures are used to track these allocations. These counters are
then used to size the task's TSBs. This patch addresses issues where
counts are not maintained properly, and TSBs of the incorrect size
are created for the task.
- hugetlb pages are not included in a task's RSS calculations. However,
the routine do_sparc64_fault() calculates the size of base TSB block
by subtracting total size of hugetlb pages from RSS. Since hugetlb
size is likely larger than RSS, a negative value is passed as an
unsigned value to the routine which allocates the TSB block. The
'negative unsigned' value appears as a really big value and results in
a maximum sized base TSB being allocated. This is the case for almost
all tasks using hugetlb pages.
THP pages are also counted in huge_pte_count[MM_PTES_HUGE]. And
unlike hugetlb pages, THP pages are included in a task's RSS.
Therefore, both hugetlb and THP can not be counted for in
huge_pte_count[MM_PTES_HUGE].
Add a new counter thp_pte_count for THP pages, and use this value for
adjusting RSS to size the base TSB.
- In order to save memory, THP makes use of a huge zero page. This huge
zero page does not count against a task's RSS, but it does consume TSB
entries. Therefore, count huge zero page entries in
huge_pte_count[MM_PTES_HUGE].
- Accounting of THP pages is done in the routine set_pmd_at().
Unfortunately, this does not catch the case where a THP page is split.
To handle this case, decrement the count in pmdp_invalidate().
pmdp_invalidate is only called when splitting a THP. However, 'sanity
checks' are added in case it is ever called for other purposes.
- huge_pte_count[MM_PTES_HUGE] tracks the number of HPAGE_SIZE (8M) pages
used by the task. This value is used to size the TSB for HPAGE_SIZE
pages. However, for each HPAGE_SIZE (8M) there are two REAL_HPAGE_SIZE
(4M) pages. The TSB contains an entry for each REAL_HPAGE_SIZE page.
Therefore, the number of REAL_HPAGE_SIZE pages used by the task should
be used to size the MM_PTES_HUGE TSB. A new compile time constant
REAL_HPAGE_PER_HPAGE is used to multiply huge_pte_count[MM_PTES_HUGE]
before sizing the TSB.
Signed-off-by: Mike Kravetz <mike.kravetz@oracle.com> Reviewed-by: Vijay Kumar <vijay.ac.kumar@oracle.com> Tested-by: Vijay Kumar <vijay.ac.kumar@oracle.com>
(cherry picked from commit 417fc85e759b6d4c4602fbdbdd5375ec5ddf2cb0) Signed-off-by: Allen Pais <allen.pais@oracle.com>
Currently, irq stack bootmem is allocated for all possible cpus
before nr_cpus value changes the list of possible cpus. As a result,
there is unnecessary wastage of bootmemory.
Move the irq stack bootmem allocation so that it happens after
possible cpu list is modified based on nr_cpus value.
If kernel boot parameter nr_cpus is set, it should define the number
of CPUs that can ever be available in the system i.e.
cpu_possible_mask. setup_nr_cpu_ids() overrides the nr_cpu_ids based
on the cpu_possible_mask during kernel initialization. If
cpu_possible_mask is not set based on the nr_cpus value, earlier part
of the kernel would be initialized using nr_cpus value leading to a
kernel crash.
Set cpu_possible_mask based on nr_cpus value. Thus setup_nr_cpu_ids()
becomes redundant and does not corrupt nr_cpu_ids value.
Signed-off-by: Atish Patra <atish.patra@oracle.com> Reviewed-by: Bob Picco <bob.picco@oracle.com> Reviewed-by: Vijay Kumar <vijay.ac.kumar@oracle.com>
(cherry picked from commit f539e5b332d8d969301bc43f076d905569c2b12c) Signed-off-by: Allen Pais <allen.pais@oracle.com>
Nitin Gupta [Thu, 25 Aug 2016 18:33:27 +0000 (11:33 -0700)]
sparc64: Fix sentinel page table entry for 16G
Currently no page table trimming is done for 16G pages
so _PAGE_PMD_HUGE must not be set for 16G. Also, for
this size, trimming would be done at PUD level, so
this flag should not be set anyways.
Nitin Gupta [Thu, 2 Jun 2016 22:14:42 +0000 (15:14 -0700)]
sparc64: Trim page tables for 2G pages
Currently mapping a 2G page requires 256*1024 PTE entries.
This results in large amounts of RAM to be used just for
storing page tables. We now use 256 PMD entries to map a
2G page which is much more space efficient.
Nitin Gupta [Fri, 27 May 2016 21:58:13 +0000 (14:58 -0700)]
sparc64: Trim page tables at PMD for hugepages
For PMD aligned (8M) hugepages, we currently allocate
all four page table levels which is wasteful. We now
allocate till PMD level only which saves memory usage
from page tables.
Signed-off-by: Larry Bassel <larry.bassel@oracle.com> Reviewed-by: Khalid Aziz <khalid.aziz@oracle.com> Signed-off-by: Allen Pais <allen.pais@oracle.com>
All signal frames must be at least 16-byte aligned, because that is
the alignment we explicitly create when we build signal return stack
frames.
All stack pointers must be at least 8-byte aligned.
Signed-off-by: David S. Miller <davem@davemloft.net>
Conflicts:
arch/sparc/kernel/signal32.c - modified patch context so that it would apply
Signed-off-by: Larry Bassel <larry.bassel@oracle.com> Reviewed-by: Mike Kravetz <mike.kravetz@oracle.com> Signed-off-by: Allen Pais <allen.pais@oracle.com>
Number of context IDs supported by the hardware
is reported via machine descriptor for sun4v
systems. For systems > T3, 16 bits are used
to represent context ID in the HW. For these
systems the context ID wrap around happens if
there are more that 65536 processes running
simultaneously. For systems older than that
13 bits are used and the context ID wraps around
if there are 8192 processes running simultaneously.
Reviewed-by: Babu Moger <babu.moger@oracle.com> Acked-by: Rob Gardner <rob.gardner@oracle.com> Signed-off-by: Sanath Kumar <sanath.s.kumar@oracle.com> Signed-off-by: Allen Pais <allen.pais@oracle.com>
David S. Miller [Sun, 29 May 2016 03:41:12 +0000 (20:41 -0700)]
sparc64: Fix return from trap window fill crashes.
We must handle data access exception as well as memory address unaligned
exceptions from return from trap window fill faults, not just normal
TLB misses.
Otherwise we can get an OOPS that looks like this:
The window trap handlers are slightly clever, the trap table entries for them are
composed of two pieces of code. First comes the code that actually performs
the window fill or spill trap handling, and then there are three instructions at
the end which are for exception processing.
And the way this works is that if any of those memory accesses
generate an exception, the exception handler can revector to one of
those final three branch instructions depending upon which kind of
exception the memory access took. In this way, the fault handler
doesn't have to know if it was a spill or a fill that it's handling
the fault for. It just always branches to the last instruction in
the parent trap's handler.
All window trap handlers are 0x80 aligned, so if we "or" 0x7c into the
trap time program counter, we'll get that final instruction in the
trap handler.
On return from trap, we have to pull the register window in but we do
this by hand instead of just executing a "restore" instruction for
several reasons. The largest being that from Niagara and onward we
simply don't have enough levels in the trap stack to fully resolve all
possible exception cases of a window fault when we are already at
trap level 1 (which we enter to get ready to return from the original
trap).
This is executed inline via the FILL_*_RTRAP handlers. rtrap_64.S's
code branches directly to these to do the window fill by hand if
necessary. Now if you look at them, we'll see at the end:
And oops, all three cases are handled like a fault.
This doesn't work because each of these trap types (data access
exception, memory address unaligned, and faults) store their auxiliary
info in different registers to pass on to the C handler which does the
real work.
So in the case where the stack was unaligned, the unaligned trap
handler sets up the arg registers one way, and then we branched to
the fault handler which expects them setup another way.
So the FAULT_TYPE_* value ends up basically being garbage, and
randomly would generate the backtrace seen above.
David S. Miller [Wed, 25 May 2016 19:51:20 +0000 (12:51 -0700)]
sparc64: Take ctx_alloc_lock properly in hugetlb_setup().
On cheetahplus chips we take the ctx_alloc_lock in order to
modify the TLB lookup parameters for the indexed TLBs, which
are stored in the context register.
This is called with interrupts disabled, however ctx_alloc_lock
is an IRQ safe lock, therefore we must take acquire/release it
properly with spin_{lock,unlock}_irq().
Reported-by: Meelis Roos <mroos@linux.ee> Tested-by: Meelis Roos <mroos@linux.ee> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Allen Pais <allen.pais@oracle.com>
Reported-by: Ilya Malakhov <ilmalakhovthefirst@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Allen Pais <allen.pais@oracle.com>
max_active determines the maximum number of execution contexts per
CPU which can be assigned to the work items of a wq. For example,
with @max_active of 16, at most 16 work items of the wq can be
executing at the same time per CPU.
Currently, for a bound wq, the maximum limit for @max_active is 512
and the default value used when 0 is specified is 256. For an unbound
wq, the limit is higher of 512 and 4 * num_possible_cpus(). These
values are chosen sufficiently high such that they are not the
limiting factor while providing protection in runaway cases.
The number of active work items of a wq is usually regulated by the
users of the wq, more specifically, by how many work items the users
may queue at the same time. Unless there is a specific need for
throttling the number of active work items, specifying '0' is
recommended.
Signed-off-by: Bijan Mottahedeh <bijan.mottahedeh@oracle.com> Reviewed-by: Liam Merwick <Liam.Merwick@oracle.com> Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
(cherry picked from commit b584786e611e8e8a28830386e8b3db8874d794c5)
(cherry picked from commit f2559a96b70562267f01d5bb62ef44aa9f0c0cd8) Signed-off-by: Allen Pais <allen.pais@oracle.com>
Nitin Gupta [Thu, 26 May 2016 21:56:19 +0000 (14:56 -0700)]
sparc64: Reduce TLB flushes during hugepte changes
During hugepage map/unmap, TSB and TLB flushes are currently
issued at every PAGE_SIZE'd boundary which is unnecessary.
We now issue the flush at REAL_HPAGE_SIZE boundaries only.
Without this patch workloads which unmap a large hugepage
backed VMA region get CPU lockups due to excessive TLB
flush calls.
projects / users / jedix / linux-maple.git / log