Arnd Bergmann [Thu, 5 May 2022 14:48:55 +0000 (16:48 +0200)]
Merge tag 'arm-soc/for-5.19/devicetree' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.19, please pull the following:
- Oleksij fixes the ethernet node name for the USB Ethernet adapter on
BCM283x (Raspberry Pi 1/2/3) platforms
- Kuldeep fixes the PL022 SPI controller clock names to conform to the
binding
- Rafal updates the various BCM5301X (Northstar) Device Tree include
files to be dtsschema conforming for pinctrl, NAND
- Arinc adds the Asus RT-AC88U binding, removes some unnecessary
properties of the Ethernet switch DT node, populates the correct PHY
interface for port 5 of the switch, adds support for fetching the MAC
address from the NVMEM provider and finally disables gmac0 on that
device which is unused
- Phil updates the Raspberry Pi 1/2/3 DTS files to have the latest gpio
line names conforming to the printed circuit board layout
- Krzysztof updates various Broadcom DTS files to have a conforming SPI
nor Device Tree node
- Takayoshi adds support for the Buffalo WZR-1166DHP/WZR-1166DHP2
wireless routers based on the BCM4708 SoC
- William adds support for the BCM47622 ARMv7 Broadband SoC and provides
a basic DTS to boot upstream Linux on such a system
* tag 'arm-soc/for-5.19/devicetree' of https://github.com/Broadcom/stblinux: (22 commits)
ARM: dts: BCM5301X: Add DT for WZR-1166DHP,DHP2
ARM: dts: add dts files for bcmbca soc 47622
dt-bindings: arm: add bcmbca device tree binding document
ARM: dts: bcm283x: Align ETH_CLK GPIO line name
ARM: dts: bcm283x: Remove gpio line name NC
ARM: dts: bcm2835-rpi-b: Fix GPIO line names
ARM: dts: bcm2837-rpi-3-b-plus: Fix GPIO line name of power LED
ARM: dts: bcm2837-rpi-cm3-io3: Fix GPIO line names for SMPS I2C
ARM: dts: bcm2835-rpi-zero-w: Fix GPIO line name for Wifi/BT
ARM: dts: BCM5301X: Disable gmac0 and enable port@8 on Asus RT-AC88U
ARM: dts: broadcom: align SPI NOR node name with dtschema
dt-bindings: arm: bcm: add bindings for Asus RT-AC88U
ARM: dts: BCM5301X: Fix compatible strings for BCM53012 and BCM53016 SoC
dt-bindings: arm: bcm: create new description for BCM53016
dt-bindings: arm: bcm: fix BCM53012 and BCM53016 SoC strings
ARM: dts: BCM5301X: Retrieve gmac1 MAC address from NVRAM on Asus RT-AC88U
ARM: dts: BCM5301X: Add rgmii to port@5 of Broadcom switch on Asus RT-AC88U
ARM: dts: BCM5301X: Remove cell properties from srab ports on Asus RT-AC88U
ARM: dts: BCM5301X: Fix DTC warning for NAND node
ARM: dts: BCM5301X: Update pin controller node name
...
Arnd Bergmann [Thu, 5 May 2022 14:45:50 +0000 (16:45 +0200)]
Merge tag 'juno-updates-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt
Arm FVP/Juno device tree updates for v5.19
The main and bulk of the change is the addition of new platform
Arm corstone1000(both FVP and FPGA versions). Also, there are
addition of Coresight Cross Trigger Interface(CTI) support on Juno,
fix for incorrect SCMI power domain IDs, addition of virtio-rng
on FVP which is default disabled as it works only on latest versions
of the FVP model.
Other miscellanous changes include dropping of useless
'dma-channels/requests' properties and updating virtio device
node names as per dtschema.
* tag 'juno-updates-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: juno: Drop useless 'dma-channels/requests' properties
arm64: dts: fvp: Align virtio device node names with dtschema
arm64: dts: fvp: Add virtio-rng support
arm64: dts: Add Arm corstone1000 platform support
dt-bindings: Add Arm corstone1000 platform
arm64: dts: juno: add CTI entries to device tree
arm64: dts: juno: Fix SCMI power domain IDs for ETF and CS funnel
Arnd Bergmann [Thu, 5 May 2022 14:44:18 +0000 (16:44 +0200)]
Merge tag 'stm32-dt-for-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT for v5.19, round 1
Highlights:
----------
-MCU:
-Fix pinctrl node names to match with pinctrl yaml.
- MPU:
-General:
- Fix pinctrl node names to match with pinctrl yaml.
- Add Protonics boards support based on STM32MP151A SoC:
- PRTT1C - 10BaseT1L switch: mainly embeds a sja1105q switch with
TI and Micrel 10BaseT Phys and wifi support.
- PRTT1S - 10BaseT1L CO2 sensor board: mainly embeds I2C humidity
and CO2 sensors.
- PRTT1A - 10BaseT1L multi functional controller.
- ST boards:
- Add RTC support on stm32mp13.
- Add button and heartbit support on stm32mp13 DK board.
- Add a secure version of STM32MP15 ED1/EV1/DK1/DK2 boards based
on OP-TEE OS and SCMI protocol.
- DH boards:
- Use MCO2 to generate PHY clock and ETHRX clock in order to release
internal PLL for a better SD card usage.
- Add 1ms PHY post-reset on Avenger96 board to match with PHY
requirements.
* tag 'stm32-dt-for-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (24 commits)
ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)
dt-bindings: arm: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)
ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP15
dt-bindings: reset: stm32mp15: rename RST_SCMI define
dt-bindings: clock: stm32mp15: rename CK_SCMI define
dt-bindings: clock: stm32mp1: describes clocks if "st,stm32mp1-rcc-secure"
dt-bindings: rcc: Add optional external ethernet RX clock properties
ARM: dts: stm32: add UserPA13 button on stm32mp135f-dk
ARM: dts: stm32: add blue led (Linux heartbeat) on stm32mp135f-dk
ARM: dts: stm32: add EXTI interrupt-parent to pinctrl node on stm32mp131
ARM: dts: stm32: add support for Protonic PRTT1x boards
ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group
dt-bindings: net: silabs,wfx: add prt,prtt1c-wfm200 antenna variant
dt-bindings: arm: stm32: Add compatible strings for Protonic T1L boards
dt-bindings: arm: stm32: correct blank lines
dt-bindings: arm: stm32: narrow DH STM32MP1 SoM boards
ARM: dts: stm32: enable RTC support on stm32mp135f-dk
ARM: dts: stm32: add RTC node on stm32mp131
ARM: dts: stm32: Fix PHY post-reset delay on Avenger96
ARM: dts: stm32: fix pinctrl node name warnings (MPU soc)
...
dt-bindings: clock: stm32mp1: describes clocks if "st,stm32mp1-rcc-secure"
In case of "st,stm32mp1-rcc-secure" (stm32mp1 clock driver with RCC
security support hardened), "clocks" and "clock-names" describe oscillators
and are required.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Reviewed-by: Rob Herring <robh@kernel.org>
Describe optional external ethernet RX clock in the DT binding
to fix dtbs_check warnings like:
arch/arm/boot/dts/stm32mp153c-dhcom-drc02.dt.yaml: rcc@50000000: 'assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks', 'clock-names', 'clocks' do not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Cc: Rob Herring <robh+dt@kernel.org>
To: devicetree@vger.kernel.org Acked-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220410220514.21779-1-marex@denx.de Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Arnd Bergmann [Tue, 3 May 2022 13:29:13 +0000 (15:29 +0200)]
Merge tag 'amlogic-arm-dt-for-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/dt
Amlogic ARM DT changes for v5.19:
- align SPI NOR node name with dtschema
* tag 'amlogic-arm-dt-for-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
ARM: dts: meson: align SPI NOR node name with dtschema
Arnd Bergmann [Tue, 3 May 2022 13:27:58 +0000 (15:27 +0200)]
Merge tag 'amlogic-arm64-dt-for-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/dt
Amlogic ARM64 DT changes for v5.19:
- DTS makefile alpsa sort
- align SPI NOR node name with dtschema
- add support for S4 power domain, gpio_intc, pinctrl
- updates and fixes for JetHub D1/H1 boards
* tag 'amlogic-arm64-dt-for-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
arm64: dts: meson: alpa sort the board Makefile
arm64: dts: meson: align SPI NOR node name with dtschema
arm64: dts: add support for S4 power domain controller
arm64: dts: meson-s4: add gpio_intc node
arm64: dts: meson-s4: add pinctrl node
arm64: meson: update WiFi SDIO in dts for JetHub D1
arm64: meson: update SDIO voltage in dts for JetHub D1
arm64: meson: dts: update serial alias in dts for JetHub D1
arm64: meson: add dts bluetooth node for JetHub H1
Arnd Bergmann [Tue, 3 May 2022 13:25:36 +0000 (15:25 +0200)]
Merge tag 'bindings-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Clock binding updates for omaps
Minor clock binding changes to document clock-output-names usage for omaps
so we can fix lots of related dt bindings check warnings. The related driver
changes already got merged for v5.18.
* tag 'bindings-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
dt-bindings: clock: ti: Add clock-output-names for TI composite clocks
dt-bindings: clock: ti: Add clock-output-names for clockctrl
dt-bindings: omap: Add clock-output-names and #clock-cells
Arnd Bergmann [Tue, 3 May 2022 13:24:08 +0000 (15:24 +0200)]
Merge tag 'renesas-arm-dt-for-v5.19-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.19
- ADC, SDHI, CAN-FD, I2C, QSPI, timer, watchdog, sound, USB, SPI, GPU,
cpufreq, and thermal support for the RZ/V2L SoC, and the RZ/V2L
SMARC EVK development board,
- USB, I2C, Audio, NOR Flash, timer, SPI support for RZ/G2LC SMARC EVK
development board,
- Can-FD support for the R-Car M30W+ and V3U SoCs, and the Falcon
development board,
- I2C and GPIO support for the R-Car S4-8 SoC,
- I2C EEPROM support for the Falcon development board,
- SPI Multi I/O Bus Controller (RPC-IF) support for the R-Car H3,
M3-W(+), M3-N, E3, and D3 SoCs,
- RPC HyperFlash support for the Draak, Ebisu, Salvator-X(S), and ULCB
development boards,
- Initial support (UART, DMAC, pin control, SDHI, eMMC, Ethernet) for
the RZ/G2UL SoC, and the RZ/G2UL SMARC EVK development board,
- Miscellaneous fixes and improvements.
Krzysztof Kozlowski [Sat, 30 Apr 2022 12:18:57 +0000 (14:18 +0200)]
arm64: dts: juno: Drop useless 'dma-channels/requests' properties
The pl330 DMA controller provides number of DMA channels and requests
through its registers, so duplicating this information (with a chance of
mistakes) in DTS is pointless. Additionally the DTS used always wrong
property names which causes DT schema check failures - the bindings
documented 'dma-channels' and 'dma-requests' properties without leading
hash sign.
Another reason is that the number of requests also does not seem right
(should be 8).
Diego Sueiro [Thu, 21 Apr 2022 14:35:21 +0000 (15:35 +0100)]
arm64: dts: fvp: Add virtio-rng support
The virtio-rng is available from FVP_Base_RevC-2xAEMvA version 11.17,
so add the devicetree node to support it. It is disabled by default to
avoid any issues with models that doesn't support it.
Corstone1000 is a platform from arm, which includes pre
verified Corstone SSE710 sub-system that combines Cortex-A and
Cortex-M processors [0].
These device trees contains the necessary bits to support the
Corstone 1000 FVP (Fixed Virtual Platform) [1] and the
FPGA MPS3 board Cortex-A35 implementation at Cortex-A35 host
side of this platform. [2]
Add bindings to describe the FPGA in a prototyping board
(MPS3) implementation and the Fixed Virtual Platform
implementation of the ARM Corstone1000 platform.
William Zhang [Wed, 13 Apr 2022 19:26:43 +0000 (12:26 -0700)]
ARM: dts: add dts files for bcmbca soc 47622
Add dts for ARMv7 based broadband SoC BCM47622. bcm47622.dtsi is the
SoC description dts header and bcm947622.dts is a simple dts file for
Broadcom BCM947622 Reference board that only enable the UART port.
Signed-off-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
William Zhang [Wed, 13 Apr 2022 19:26:41 +0000 (12:26 -0700)]
dt-bindings: arm: add bcmbca device tree binding document
Add arch bcmbca device tree binding document for Broadcom ARM based
broadband SoC chipsets. In this change, only BCM47622 is added. Other
chipsets will be added in the future.
Signed-off-by: William Zhang <william.zhang@broadcom.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Merge tag 'samsung-dt64-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM64 changes for v5.19
1. Cleanup: move aliases of board-related features to board in
Exynos850.
2. Add specific compatibles to Multi Core Timer to allow stricter DT
schema matching.
* tag 'samsung-dt64-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: tesla: add a specific compatible to MCT on FSD
arm64: dts: exynos: add a specific compatible to MCT
arm64: dts: exynos: move aliases to board in Exynos850
Merge tag 'samsung-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.19
1. Several DT schema related changes to make DTBs passing schema checks:
EHCI/OHCI/DMA/Ethernet node names, DMA channels order, USB-like
compatibles.
2. Add specific compatibles to Multi Core Timer to allow stricter DT
schema matching.
3. Cleanup from deprecated bindings:
- Remove deprecated unit-address workaround for Exynos5422 Odroid XU3
LPDDR3 memory timings.
- Do not use unit-address (and SFR region) in Exynos5250 MIPI phy in
favor of syscon node (unit-address deprecated in 2016).
- Use standard generic PHYs for EHCI/OHCI device in S5PV210.
4. Fix inverted SPI CS (thus blank panel) on S5PV210 Aries boards.
5. Correct Bluetooth interupt name on S5PV210 Aries boards.
* tag 'samsung-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: s5pv210: align DMA channels with dtschema
ARM: dts: s5pv210: Adjust DMA node names to match spec
ARM: dts: s5pv210: Adjust memory reg entries to match spec
ARM: dts: s5pv210: Correct interrupt name for bluetooth in Aries
ARM: dts: s5pv210: Remove spi-cs-high on panel in Aries
ARM: dts: s5pv210: Use standard arrays of generic PHYs for EHCI/OHCI device
ARM: dts: s5pv210: align EHCI/OHCI nodes with dtschema
ARM: dts: exynos: align EHCI/OHCI nodes with dtschema on Exynos4
ARM: dts: exynos: drop deprecated SFR region from MIPI phy
ARM: dts: exynos: add a specific compatible to MCT
ARM: dts: exynos: remove deprecated unit address for LPDDR3 timings on Odroid
ARM: dts: exynos: fix compatible strings for Ethernet USB devices
ARM: dts: exynos: fix ethernet node name for different odroid boards
Merge tag 'dt-cleanup-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Minor cleanup of ARM DTS for v5.19
Align node names and unit addresses to DT schema and DT coding style in
nspire, ox820 and socfpga.
* tag 'dt-cleanup-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: socfpga: align interrupt controller node name with dtschema
ARM: dts: ox820: align interrupt controller node name with dtschema
ARM: dts: nspire: use lower case hex addresses in node unit addresses
ARM: dts: am335x-baltos: update MPU regulator range
Update the max MPU voltage range to align with the maximum
possible value allowed in the operating-points table, which is max
target voltage of 132500 uV + 2%.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Message-Id: <20220419143923.25196-1-yegorslists@googlemail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* Update partition table to save env and splash image
* GPMC config values optimized for Bosch Guardian Board
* NAND Chip used by Bosch Guardian Board is Micron MT29F4G08ABBFA
Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Message-Id: <20220325100613.1494-2-Gireesh.Hiremath@in.bosch.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Oleksij Rempel [Wed, 16 Feb 2022 07:49:25 +0000 (08:49 +0100)]
ARM: dts: omap3/4/5: fix ethernet node name for different OMAP boards
The node name of Ethernet controller should be "ethernet" instead of
"usbether" as required by Ethernet controller devicetree schema:
Documentation/devicetree/bindings/net/ethernet-controller.yaml
This patch can potentially affect boot loaders patching against full
node path instead of using device aliases.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Message-Id: <20220216074927.3619425-8-o.rempel@pengutronix.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
Phil Elwell [Mon, 11 Apr 2022 20:01:43 +0000 (22:01 +0200)]
ARM: dts: bcm283x: Align ETH_CLK GPIO line name
The GPIO line name ETHCLK is not aligned with the other signals like
WIFI_CLK. Recently this has been fixed in the vendor tree, so upstream
this change.
Signed-off-by: Phil Elwell <phil@raspberrypi.com> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Stefan Wahren [Mon, 11 Apr 2022 20:01:42 +0000 (22:01 +0200)]
ARM: dts: bcm283x: Remove gpio line name NC
The convention to name not connected GPIOs with NC has never been
adapted. Also newer Raspberry Pi boards like RPi 4 never did. So fix
this inconsistency by removing all of the NC names.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Stefan Wahren [Mon, 11 Apr 2022 20:01:41 +0000 (22:01 +0200)]
ARM: dts: bcm2835-rpi-b: Fix GPIO line names
Recently this has been fixed in the vendor tree, so upstream this.
Fixes: 731b26a6ac17 ("ARM: bcm2835: Add names for the Raspberry Pi GPIO lines") Signed-off-by: Phil Elwell <phil@raspberrypi.com> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Marek Vasut [Fri, 25 Mar 2022 17:58:51 +0000 (18:58 +0100)]
ARM: dts: stm32: Fix PHY post-reset delay on Avenger96
Per KSZ9031RNX PHY datasheet FIGURE 7-5: POWER-UP/POWER-DOWN/RESET TIMING
Note 2: After the de-assertion of reset, wait a minimum of 100 μs before
starting programming on the MIIM (MDC/MDIO) interface.
Add 1ms post-reset delay to guarantee this figure.
Fixes: 010ca9fe500bf ("ARM: dts: stm32: Add missing ethernet PHY reset on AV96") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Fabien Dessenne [Fri, 11 Mar 2022 12:13:23 +0000 (13:13 +0100)]
ARM: dts: stm32: fix pinctrl node name warnings (MPU soc)
The recent addition pinctrl.yaml in commit c09acbc499e8 ("dt-bindings:
pinctrl: use pinctrl.yaml") resulted in some node name warnings.
Fix the node names to the preferred 'pinctrl'.
Fabien Dessenne [Fri, 11 Mar 2022 12:14:48 +0000 (13:14 +0100)]
ARM: dts: stm32: fix pinctrl node name warnings (MCU soc)
The recent addition pinctrl.yaml in commit c09acbc499e8 ("dt-bindings:
pinctrl: use pinctrl.yaml") resulted in some node name warnings.
Fix the node names to the preferred 'pinctrl'.
ARM: dts: r9a06g032: Drop "arm,cortex-a7-timer" from timer node
"make dtbs_check":
arch/arm/boot/dts/r9a06g032-rzn1d400-db.dt.yaml: timer: compatible: 'oneOf' conditional failed, one must be fixed:
['arm,cortex-a7-timer', 'arm,armv7-timer'] is too long
'arm,cortex-a7-timer' is not one of ['arm,cortex-a15-timer']
'arm,cortex-a7-timer' is not one of ['arm,armv7-timer']
'arm,cortex-a7-timer' is not one of ['arm,armv8-timer']
From schema: Documentation/devicetree/bindings/timer/arm,arch_timer.yaml
The Cortex-A7 timer should just declare compatibility with
"arm,armv7-timer".
This adds the PN544 NFC chip mounted on some of the Codina models
numbered GT-I8160P. The "P" at the end of the product number
indicates that an NFC chip is mounted.
arm64: dts: juno: Fix SCMI power domain IDs for ETF and CS funnel
The SCMI power domain ID for all the coresight components is 8 while
the previous/older SCPI domain was 0. When adding SCMI variant, couple
of instances retained SCPI domain ID by mistake.
Fix the same by using the correct SCMI power domain ID of 8.
Link: https://lore.kernel.org/r/20220413093547.1699535-1-sudeep.holla@arm.com Fixes: 96bb0954860a ("arm64: dts: juno: Add separate SCMI variants") Cc: Robin Murphy <robin.murphy@arm.com> Reported-by: Mike Leach <Mike.Leach@arm.com> Acked-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Biju Das [Sat, 2 Apr 2022 08:13:26 +0000 (09:13 +0100)]
arm64: dts: renesas: rzg2ul-smarc: Enable microSD on SMARC platform
Enable the microSD card slot connected to SDHI1 on the RZ/G2UL SMARC
platform by removing the sdhi1 override which disabled it, and by adding
the necessary pinmux required for SDHI1.
This patch also adds gpios property to vccq_sdhi1 regulator.
Biju Das [Sat, 2 Apr 2022 08:13:23 +0000 (09:13 +0100)]
arm64: dts: renesas: rzg2ul-smarc: Add scif0 and audio clk pins
Add scif0 and audio clk pins to soc pinctrl dtsi and drop deleting
the pinctrl-0 and pinctrl-names properties for scif0 node so that
we now actually make use of these properties for scif0.
Biju Das [Tue, 12 Apr 2022 16:13:14 +0000 (17:13 +0100)]
arm64: dts: renesas: Add initial device tree for RZ/G2UL Type-1 SMARC EVK
Add basic support for RZ/G2UL SMARC EVK (based on R9A07G043U11):
- memory
- External input clock
- CPG
- DMA
- SCIF
It shares the same carrier board with RZ/G2L, but the pin mapping is
different. Disable the device nodes which are not tested and delete the
corresponding pinctrl definitions.
Biju Das [Tue, 12 Apr 2022 16:13:13 +0000 (17:13 +0100)]
arm64: dts: renesas: Add initial DTSI for RZ/G2UL SoC
Add initial DTSI for RZ/G2UL SoC.
Both RZ/G2L and RZ/G2UL uses the same SMARC EVK. Therefore they share
the common dtsi (rz-smarc.dtsi) file. Place holders are added in
device nodes to avoid compilation errors for the devices which have
not been enabled yet on RZ/G2UL SoC.
Biju Das [Fri, 1 Apr 2022 17:54:27 +0000 (18:54 +0100)]
arm64: dts: renesas: rzg2l-smarc: Move gpios property of vccq_sdhi1 from common dtsi
On RZ/G2{L,LC} SoM module, gpio for power selection is connected to
P39_1 whereas on RZ/G2UL it is connected to P6_1. So move gpios property
of vccq_sdhi1 regulator from common dtsi to soc specific dtsi.
Biju Das [Fri, 1 Apr 2022 14:57:02 +0000 (15:57 +0100)]
arm64: dts: renesas: rzg2lc-smarc: Enable RSPI1 on carrier board
RSPI1 (SPI1) interface is available on PMOD0 connector (J1) on the
carrier board. This patch adds pinmux and spi1 nodes to the carrier
board dtsi file and drops deleting pinctl* properties from DTS file.
RSPI1 interface is tested by setting the macro SW_RSPI_CAN to 0.
Add device nodes for the SPI Multi I/O Bus Controllers (RPC-IF) on the
various R-Car Gen3 SoCs that do not have support for them yet in their
device trees (R-Car H3, M3-W, M3-W+, M3-N, E3, and D3).
Biju Das [Sat, 2 Apr 2022 07:30:34 +0000 (08:30 +0100)]
dt-bindings: clock: Add R9A07G043 CPG Clock and Reset Definitions
Define RZ/G2UL (R9A07G043U) Clock Pulse Generator Core Clock and module
clock outputs, as listed in Table 7.1.4.2 ("Clock List r0.51") and also
add Reset definitions referring to registers CPG_RST_* in Section 7.2.3
("Register configuration") of the RZ/G2UL Hardware User's Manual (Rev.
0.51, Nov. 2021).
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220402073037.23947-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Document the Renesas SMARC EVK board which is based on the Renesas
RZ/G2UL Type-1 (R9A07G043U11) SoC. The SMARC EVK consists of an
RZ/G2UL Type-1 SoM module and a SMARC carrier board. The SoM module
sits on top of the carrier board.
Tony Lindgren [Fri, 4 Feb 2022 08:43:38 +0000 (10:43 +0200)]
ARM: dts: Drop custom clkctrl compatible and update omap5 l4per
We can now use the clock-output-names and don't need custom compatible
values for each clkctrl instance. And we can use a generic name also for
the clock manager instance.
Cc: Stephen Boyd <sboyd@kernel.org> Cc: Tero Kristo <kristo@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
Message-Id: <20220204084339.12341-5-tony@atomide.com>
Tony Lindgren [Fri, 4 Feb 2022 08:43:37 +0000 (10:43 +0200)]
ARM: dts: Add clock-output-names for omap5
To stop using the non-standard node name based clock naming, let's
first add the clock-output-names property. This allows us to stop using
the internal legacy clock naming and unify the naming for the TI SoCs in
the following patches.
Note that we must wait on fixing the node naming issues until after the
internal clock names have been updated to avoid adding name translation
unnecessarily.
Cc: Stephen Boyd <sboyd@kernel.org> Cc: Tero Kristo <kristo@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
Message-Id: <20220204084339.12341-4-tony@atomide.com>
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