Jagadeesh Kona [Sun, 2 Jun 2024 11:44:35 +0000 (17:14 +0530)]
clk: qcom: videocc-sm8550: Add SM8650 video clock controller
Add support to the SM8650 video clock controller by extending
the SM8550 video clock controller, which is mostly identical
but SM8650 has few additional clocks and minor differences.
Jagadeesh Kona [Sun, 2 Jun 2024 11:44:33 +0000 (17:14 +0530)]
dt-bindings: clock: qcom: Add SM8650 video clock controller
SM8650 video clock controller has most clocks same as SM8450,
but it also has few additional clocks and resets. Add device tree
bindings for the video clock controller on Qualcomm SM8650 platform
by defining these additional clocks and resets on top of SM8450.
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Link: https://lore.kernel.org/r/20240602114439.1611-3-quic_jkona@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Tengfei Fan [Tue, 18 Jun 2024 07:22:00 +0000 (15:22 +0800)]
arm64: dts: qcom: qcs8550: introduce qcs8550 dtsi
QCS8550 is derived from SM8550. The difference between SM8550 and
QCS8550 is QCS8550 doesn't have modem RF system. QCS8550 is mainly used
in IoT products.
QCS8550 firmware has different memory map compared to SM8550.
The memory map will be runtime added through bootloader.
There are 3 types of reserved memory regions here:
1. Firmware related regions which aren't shared with kernel.
The device tree source in kernel doesn't need to have node to indicate
the firmware related reserved information. Bootloader converys the
information by updating devicetree at runtime.
This will be described as: UEFI saves the physical address of the
UEFI System Table to dts file's chosen node. Kernel read this table and
add reserved memory regions to efi config table. Current reserved memory
region may have reserved region which was not yet used, release note of
the firmware have such kind of information.
2. Firmware related memory regions which are shared with Kernel
The device tree source in the kernel needs to include nodes that
indicate fimware-related shared information. A label name is suggested
because this type of shared information needs to be referenced by
specific drivers for handling purposes.
Unlike previous platforms, QCS8550 boots using EFI and describes
most reserved regions in the ESRT memory map. As a result, reserved
memory regions which aren't relevant to the kernel(like the hypervisor
region) don't need to be described in DT.
3. Remoteproc regions.
Remoteproc regions will be reserved and then assigned to subsystem
firmware later.
Here is a reserved memory map for this platform:
0x80000000 +-------------------+
| |
| Firmware Related |
| |
0x8a800000 +-------------------+
| |
| Remoteproc Region |
| |
0xa7000000 +-------------------+
| |
| Kernel Available |
| |
0xd4d00000 +-------------------+
| |
| Firmware Related |
| |
0x100000000 +-------------------+
Tengfei Fan [Tue, 18 Jun 2024 07:21:59 +0000 (15:21 +0800)]
dt-bindings: arm: qcom: Document QCS8550 SoC and the AIM300 AIoT board
Document QCS8550 SoC and the AIM300 AIoT board bindings.
QCS8550 is derived from SM8550. The difference between SM8550 and
QCS8550 is QCS8550 doesn't have modem RF system. QCS8550 is mainly used
in IoT scenarios.
AIM300 Series is a highly optimized family of modules designed to
support AIoT applications. It integrates QCS8550 SoC, UFS and PMIC chip
etc.
AIM stands for Artificial Intelligence Module. AIoT stands for AI IoT.
Komal Bajaj [Mon, 17 Jun 2024 11:56:24 +0000 (17:26 +0530)]
arm64: dts: qcom: qdu1000: fix usb interrupts properties
Update the usb interrupts properties to fix the following
bindings check errors:
usb@a6f8800: interrupt-names:0: 'pwr_event' was expected
from schema $id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml#
usb@a6f8800: interrupt-names:1: 'hs_phy_irq' was expected
from schema $id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml#
usb@a6f8800: interrupt-names: ['hs_phy_irq', 'ss_phy_irq', 'dm_hs_phy_irq', 'dp_hs_phy_irq'] is too short
from schema $id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml#
Bartosz Golaszewski [Wed, 5 Jun 2024 12:27:29 +0000 (14:27 +0200)]
arm64: dts: qcom: qrb5165-rb5: add the Wifi node
Add a node for the PMU module of the QCA6391 present on the RB5 board.
Assign its LDO power outputs to the existing Bluetooth module. Add a
node for the PCIe port to sm8250.dtsi and define the WLAN node on it in
the board's .dts and also make it consume the power outputs of the PMU.
Luca Weiss [Tue, 18 Jun 2024 13:30:55 +0000 (15:30 +0200)]
arm64: dts: qcom: qcm6490-shift-otter: Name the regulators
Without explicitly specifying names for the regulators they are named
based on the DeviceTree node name. This results in multiple regulators
with the same name, making debug prints and regulator_summary impossible
to reason about.
Luca Weiss [Tue, 18 Jun 2024 13:30:54 +0000 (15:30 +0200)]
arm64: dts: qcom: qcm6490-fairphone-fp5: Name the regulators
Without explicitly specifying names for the regulators they are named
based on the DeviceTree node name. This results in multiple regulators
with the same name, making debug prints and regulator_summary impossible
to reason about.
NÃcolas F. R. A. Prado [Fri, 14 Jun 2024 20:59:36 +0000 (16:59 -0400)]
arm64: dts: qcom: sc7180-trogdor: Disable pwmleds node where unused
Currently the keyboard backlight is described in the common
sc7180-trogdor dtsi as an led node below a pwmleds node, and the led
node is set to disabled. Only the boards that have a keyboard backlight
enable it.
However, since the parent pwmleds node is still enabled everywhere, even
on boards that don't have keyboard backlight it is probed and fails,
resulting in an error:
leds_pwm pwmleds: probe with driver leds_pwm failed with error -22
as well as a failure in the DT kselftest:
not ok 45 /pwmleds
Fix this by controlling the status of the parent pwmleds node instead of
the child led, based on the presence of keyboard backlight. This is what
is done on sc7280 already.
While at it add a missing blank line before the child node to follow the
coding style.
Fixes: 7ec3e67307f8 ("arm64: dts: qcom: sc7180-trogdor: add initial trogdor and lazor dt") Signed-off-by: NÃcolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20240614-sc7180-pwmleds-probe-v1-1-e2c3f1b42a43@collabora.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Dmitry Baryshkov [Fri, 14 Jun 2024 10:18:28 +0000 (13:18 +0300)]
arm64: dts: qcom: sm8650: drop second clock name from clock-output-names
There is no need to specify exact name for the second (AUX) output
clock. It has never been used for the lookups based on the system
clock name. The driver generates it on its own, in order to remain
compatible with the older DT. Drop the clock name.
Dmitry Baryshkov [Fri, 14 Jun 2024 10:18:27 +0000 (13:18 +0300)]
arm64: dts: qcom: sm8550: drop second clock name from clock-output-names
There is no need to specify exact name for the second (AUX) output
clock. It has never been used for the lookups based on the system
clock name. The driver generates it on its own, in order to remain
compatible with the older DT. Drop the clock name.
Dmitry Baryshkov [Fri, 14 Jun 2024 10:18:26 +0000 (13:18 +0300)]
arm64: dts: qcom: sm8450: drop second clock name from clock-output-names
There is no need to specify exact name for the second (AUX) output
clock. It has never been used for the lookups based on the system
clock name. The driver generates it on its own, in order to remain
compatible with the older DT. Drop the clock name.
The Embedded Controller in the Lenovo Yoga C630 is accessible on &i2c1
and provides battery and adapter status, as well as altmode
notifications for the second USB Type-C port.
Luca Weiss [Thu, 6 Jun 2024 09:09:06 +0000 (11:09 +0200)]
arm64: dts: qcom: qcm6490-fairphone-fp5: Use .mbn firmware for IPA
Specify the file name for the squashed/non-split firmware with the .mbn
extension instead of the split .mdt. The kernel can load both but the
squashed version is preferred in dts nowadays.
Konrad Dybcio [Fri, 10 May 2024 12:58:41 +0000 (14:58 +0200)]
arm64: dts: qcom: sm8650: Throttle the GPU when overheating
Add an 85C passive trip point to ensure the thermal framework takes
sufficient action to prevent reaching junction temperature and a
110C critical point to help avoid hw damage.
Also, register the GPU as a cooling device and hook it up to the
right thermal zones.
Konrad Dybcio [Fri, 10 May 2024 12:58:40 +0000 (14:58 +0200)]
arm64: dts: qcom: sm8550: Throttle the GPU when overheating
Add an 85C passive trip point to ensure the thermal framework takes
sufficient action to prevent reaching junction temperature and a
110C critical point to help avoid hw damage.
Remove the copypasta-from-downstream userspace governor entries while
at it.
Konrad Dybcio [Fri, 10 May 2024 12:58:39 +0000 (14:58 +0200)]
arm64: dts: qcom: sm8450: Throttle the GPU when overheating
Add an 85C passive trip point to ensure the thermal framework takes
sufficient action to prevent reaching junction temperature and a
110C critical point to help avoid hw damage.
Remove the copypasta-from-downstream userspace governor entries while
at it.
Konrad Dybcio [Fri, 10 May 2024 12:58:38 +0000 (14:58 +0200)]
arm64: dts: qcom: sm8350: Throttle the GPU when overheating
Add an 85C passive trip point to ensure the thermal framework takes
sufficient action to prevent reaching junction temperature and a
110C critical point to help avoid hw damage.
Konrad Dybcio [Fri, 10 May 2024 12:58:37 +0000 (14:58 +0200)]
arm64: dts: qcom: sm8250: Throttle the GPU when overheating
Add an 85C passive trip point to ensure the thermal framework takes
sufficient action to prevent reaching junction temperature and a
110C critical point to help avoid hw damage.
Konrad Dybcio [Fri, 10 May 2024 12:58:36 +0000 (14:58 +0200)]
arm64: dts: qcom: sm8150: Throttle the GPU when overheating
Add an 85C passive trip point to ensure the thermal framework takes
sufficient action to prevent reaching junction temperature and a
110C critical point to help avoid hw damage.
Konrad Dybcio [Fri, 10 May 2024 12:58:35 +0000 (14:58 +0200)]
arm64: dts: qcom: sm6350: Update GPU thermal zone settings
Lower the thresholds to something more reasonable and introduce a
passive polling delay to make sure more than one "passive" thermal point
is taken into account when throttling.
Konrad Dybcio [Fri, 10 May 2024 12:58:34 +0000 (14:58 +0200)]
arm64: dts: qcom: sm6115: Update GPU thermal zone settings
Lower the thresholds to something more reasonable and introduce a
passive polling delay to make sure more than one "passive" thermal point
is taken into account when throttling.
Konrad Dybcio [Fri, 10 May 2024 12:58:33 +0000 (14:58 +0200)]
arm64: dts: qcom: sdm845: Throttle the GPU when overheating
Add an 85C passive trip point to ensure the thermal framework takes
sufficient action to prevent reaching junction temperature and a
110C critical point to help avoid hw damage.
Konrad Dybcio [Fri, 10 May 2024 12:58:32 +0000 (14:58 +0200)]
arm64: dts: qcom: sdm630: Throttle the GPU when overheating
Add an 85C passive trip point to ensure the thermal framework takes
sufficient action to prevent reaching junction temperature and a
110C critical point to help avoid hw damage.
Konrad Dybcio [Fri, 10 May 2024 12:58:31 +0000 (14:58 +0200)]
arm64: dts: qcom: sc8280xp: Throttle the GPU when overheating
Add an 85C passive trip point with 1C of hysteresis to ensure the
thermal framework takes sufficient action to prevent reaching junction
temperature. Also, add passive polling to ensure more than one
temperature change event is recorded.
Konrad Dybcio [Fri, 10 May 2024 12:58:30 +0000 (14:58 +0200)]
arm64: dts: qcom: sc8180x: Throttle the GPU when overheating
Add an 85C passive trip point to ensure the thermal framework takes
sufficient action to prevent reaching junction temperature and a
110C critical point to help avoid hw damage.
Stephen Boyd [Tue, 4 Jun 2024 21:42:32 +0000 (14:42 -0700)]
arm64: dts: qcom: sc7180-trogdor: Make clamshell/detachable fragments
At a high-level, detachable Trogdors (sometimes known as Strongbads)
don't have a cros_ec keyboard, while all clamshell Trogdors (only known
as Trogdors) always have a cros_ec keyboard. Looking closer though, all
clamshells have a USB type-A connector and a hardwired USB camera. And
all detachables replace the USB camera with a MIPI based one and swap
the USB type-a connector for the detachable keyboard pogo pins.
Split the detachable and clamshell bits into different files so we can
describe these differences in one place instead of in each board that
includes sc7180-trogdor.dtsi. For now this is just the keyboard part,
but eventually this will include the type-a port and the pogo pins.
Cc: cros-qcom-dts-watchers@chromium.org Cc: Bjorn Andersson <andersson@kernel.org> Cc: Konrad Dybcio <konrad.dybcio@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> Cc: Conor Dooley <conor+dt@kernel.org> Cc: linux-arm-msm@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: Pin-yen Lin <treapking@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20240604214233.3551692-4-swboyd@chromium.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
We put a header before modifying pinctrl nodes defined in
sc7180-trogdor.dtsi in every other file. Add one here so we know that
this section is for pinctrl modifications.
Cc: cros-qcom-dts-watchers@chromium.org Cc: Bjorn Andersson <andersson@kernel.org> Cc: Konrad Dybcio <konrad.dybcio@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> Cc: Conor Dooley <conor+dt@kernel.org> Cc: linux-arm-msm@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: Pin-yen Lin <treapking@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20240604214233.3551692-3-swboyd@chromium.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Stephen Boyd [Tue, 4 Jun 2024 21:42:30 +0000 (14:42 -0700)]
arm64: dts: qcom: sc7180: quackingstick: Disable instead of delete usb_c1
It's simpler to reason about things if we disable nodes instead of
deleting them. Disable the second usb type-c connector node on
quackingstick instead of deleting it so that we can reason about ports
more easily.
Cc: cros-qcom-dts-watchers@chromium.org Cc: Bjorn Andersson <andersson@kernel.org> Cc: Konrad Dybcio <konrad.dybcio@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> Cc: Conor Dooley <conor+dt@kernel.org> Cc: linux-arm-msm@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: Pin-yen Lin <treapking@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20240604214233.3551692-2-swboyd@chromium.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Interrupt flags 0x2008 looks like some downstream copy-paste, because
generic GPIOLIB code, used by Qualcomm pin controller drivers, ignores
flags outside of IRQ_TYPE_SENSE_MASK. Probably the intention was to
pass just 0x8, so IRQ_TYPE_LEVEL_LOW.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org> # SM8450 PDX223 Link: https://lore.kernel.org/r/20240605160032.150587-4-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Interrupt flags 0x2008 looks like some downstream copy-paste, because
generic GPIOLIB code, used by Qualcomm pin controller drivers, ignores
flags outside of IRQ_TYPE_SENSE_MASK. Probably the intention was to
pass just 0x8, so IRQ_TYPE_LEVEL_LOW.
Interrupt flags 0x2008 looks like some downstream copy-paste, because
generic GPIOLIB code, used by Qualcomm pin controller drivers, ignores
flags outside of IRQ_TYPE_SENSE_MASK. Probably the intention was to
pass just 0x8, so IRQ_TYPE_LEVEL_LOW.
Interrupt flags 0x2008 looks like some downstream copy-paste, because
generic GPIOLIB code, used by Qualcomm pin controller drivers, ignores
flags outside of IRQ_TYPE_SENSE_MASK. Probably the intention was to
pass just 0x8, so IRQ_TYPE_LEVEL_LOW.
Abel Vesa [Thu, 6 Jun 2024 10:41:54 +0000 (13:41 +0300)]
arm64: dts: qcom: x1e80100-qcp: Add pmic-glink node with all 3 connectors
Add the pmic-glink node and describe all 3 USB Type-C connectors. Do this
for USB only, for now. The DP ports will come at a later stage since
they use muxes.
Abel Vesa [Thu, 6 Jun 2024 10:41:53 +0000 (13:41 +0300)]
arm64: dts: qcom: x1e80100-crd: Add pmic-glink node with all 3 connectors
Add the pmic-glink node and describe all 3 USB Type-C connectors. Do this
for USB only, for now. The DP ports will come at a later stage since
they use retimers.
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