Driver Changes:
- amdgpu: Track BO memory stats at runtime
- amdxdna: Various fixes
- hisilicon: New HIBMC driver
- bridges:
- Provide default implementation of atomic_check for HDMI bridges
- it605: HDCP improvements, MCCS Support
Driver Changes:
- HDCP fixes and updates for Xe3lpd and for HDCP 1.4 (Suraj)
- Add dedicated lock for each sideband (Jani)
- New GSC FW for ARL-H and ARL-U (Daniele)
- Add support for 3 VDSC engines 12 slices (Ankit)
- Sanitize MBUS joining (Ville)
- Fixes in DP MST (Imre)
- Stop using pixel_format_from_register_bits() to parse VBT (Ville)
- Declutter CDCLK code (Ville)
- PSR clean up and fixes (Jouni, Jani, Animesh)
- DMC wakelock - Fixes and enablement for Xe3_LPD (Gustavo)
- Demote source OUI read/write failure logging to debug (Jani)
- Potential boot oops fix and some general cleanups (Ville)
- Scaler code cleanups (Ville)
- More conversion towards struct intel_display and general cleanups (Jani)
- Limit max compressed bpp to 18 when forcing DSC (Ankit)
- Start to reconcile i915's and xe's display power mgt sequences (Rodrigo)
- Some correction in the DP Link Training sequence (Arun)
- Avoid setting YUV420_MODE in PIPE_MISC on Xe3lpd (Ankit)
- MST and DDI cleanups and refactoring (Jani)
- Fixed an typo in i915_gem_gtt.c (Zhang)
- Try to make DPT shrinkable again (Ville)
- Try to fix CPU MMIO fails during legacy LUT updates (Ville)
- Some PPS cleanups (Ville, Jani)
- Use seq buf for printing rates (Jani)
- Flush DMC wakelock release work at the end of runtime suspend (Gustavo)
- Fix NULL pointer dereference in capture_engine (Eugene)
- Fix memory leak by correcting cache object name in error handler (Jiasheng)
- Small refactor in WM/DPKGC for modifying latency programmed into PKG_C_LATENCY (Suraj)
- Add drm_printer based hex dumper and use it (Jani)
- Move g4x code to specific g4x functions (Jani)
Signed-off-by: Simona Vetter <simona.vetter@ffwll.ch>
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
[sima: conflict in intel_dp_mst.c due to conversion to
drm_connector_dynamic_init that landed through drm-misc] Link: https://patchwork.freedesktop.org/patch/msgid/Z1n4VhatZpvT5xKs@intel.com
Dmitry Baryshkov [Tue, 24 Dec 2024 01:48:02 +0000 (03:48 +0200)]
drm/vc4: hdmi: use drm_atomic_helper_connector_hdmi_hotplug()
Use the helper function to update the connector's information. This
makes sure that HDMI-related events are handled in a generic way.
Currently it is limited to the HDMI state reporting to the sound system.
Dmitry Baryshkov [Tue, 24 Dec 2024 01:48:01 +0000 (03:48 +0200)]
drm/vc4: hdmi: stop rereading EDID in get_modes()
The vc4_hdmi_connector_detect_ctx() via vc4_hdmi_handle_hotplug()
already reads EDID and propagates it to the drm_connector. Stop
rereading EDID as a part of the .get_modes() callback and just update
the list of modes. This matches the behaviour of the i915 driver.
Extend drm_bridge_connector code to read the EDID and use it to update
connector status if the bridge chain implements HDMI bridge. Performing
it from the generic location minimizes individual bridge's code and
enforces standard behaviour from all corresponding drivers.
Dmitry Baryshkov [Tue, 24 Dec 2024 01:47:58 +0000 (03:47 +0200)]
drm/display/hdmi: implement hotplug functions
The HDMI Connectors need to perform a variety of tasks when the HDMI
connector state changes. Such tasks include setting or invalidating CEC
address, notifying HDMI codec driver, updating scrambler data, etc.
Implementing such tasks in a driver-specific callbacks is error prone.
Start implementing the generic helper function (currently handling only
the HDMI Codec framework) to be used by drivers utilizing HDMI Connector
framework.
Dmitry Baryshkov [Tue, 24 Dec 2024 01:47:57 +0000 (03:47 +0200)]
drm/bridge: lt9611: switch to using the DRM HDMI codec framework
Make the Lontium LT9611 DSI-to-HDMI bridge driver use the DRM HDMI Codec
framework. This enables programming of Audio InfoFrames using the HDMI
Connector interface and also enables support for the missing features,
including the ELD retrieval and better hotplug support.
Dmitry Baryshkov [Tue, 24 Dec 2024 01:47:56 +0000 (03:47 +0200)]
drm/bridge: connector: add support for HDMI codec framework
Add necessary glue code to be able to use new HDMI codec framework from
the DRM bridge drivers. The drm_bridge implements a limited set of the
hdmi_codec_ops interface, with the functions accepting both
drm_connector and drm_bridge instead of just a generic void pointer.
This framework is integrated with the DRM HDMI Connector framework, but
can also be used for DisplayPort connectors.
Several DRM drivers implement HDMI codec support (despite its name it
applies to both HDMI and DisplayPort drivers). Implement generic
framework to be used by these drivers. This removes a requirement to
implement get_eld() callback and provides default implementation for
codec's plug handling.
Dmitry Baryshkov [Tue, 24 Dec 2024 01:47:54 +0000 (03:47 +0200)]
ASoC: hdmi-codec: move no_capture_mute to struct hdmi_codec_pdata
The no_capture_mute flag might differ from platform to platform,
especially in the case of the wrapping implementations, like the
upcoming DRM HDMI Codec framework. Move the flag next to all other flags
in struct hdmi_codec_pdata.
Dmitry Baryshkov [Tue, 24 Dec 2024 01:47:53 +0000 (03:47 +0200)]
ASoC: hdmi-codec: pass data to get_dai_id too
The upcoming DRM connector HDMI codec implementation is going to use
codec-specific data in the .get_dai_id to get drm_connector. Pass data
to the callback, as it is done with other hdmi_codec_ops callbacks.
Lizhi Hou [Thu, 2 Jan 2025 21:22:39 +0000 (13:22 -0800)]
accel/amdxdna: Declare mailbox register base as __iomem pointer
Declare mailbox ringbuf_base and mbox_base as 'void __iomem *' to fix
sparse warnings:
cast removes address space '__iomem' of expression
incorrect type in argument 2 (different address spaces)
Fixes: b87f920b9344 ("accel/amdxdna: Support hardware mailbox") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202412310857.syD1sXXO-lkp@intel.com/ Signed-off-by: Lizhi Hou <lizhi.hou@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250102212244.1586340-2-lizhi.hou@amd.com
Lizhi Hou [Thu, 2 Jan 2025 21:22:38 +0000 (13:22 -0800)]
accel/amdxdna: Declare npu device profile as static variables
Declare the variables as static to fix the sparse warnings:
symbol 'npu5_dev_priv' was not declared. Should it be static?
symbol 'npu1_dev_priv' was not declared. Should it be static?
symbol 'npu4_dev_priv' was not declared. Should it be static?
symbol 'npu2_dev_priv' was not declared. Should it be static?
Fixes: 8c9ff1b181ba ("accel/amdxdna: Add a new driver for AMD AI Engine") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202412310648.dtMHgGem-lkp@intel.com/ Signed-off-by: Lizhi Hou <lizhi.hou@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250102212244.1586340-1-lizhi.hou@amd.com
Hermes Wu [Mon, 30 Dec 2024 10:51:28 +0000 (18:51 +0800)]
drm/bridge: it6505: add I2C functionality on AUX
DisplayPort AUX protocol supports I2C transport which is capable of
reading EDID or supports MCCS.
In drm_dp_helper, drm_dp_i2c_xfer() packs I2C requests into a
sequence of AUX requests.
it6505_aux_i2c_operation() is implemented to match drm_dp_i2c_xfer()
operactions.
it6505_aux_i2c_transfer() adds I2C functionality
for it6505_aux_transfer().
Hermes Wu [Mon, 30 Dec 2024 10:51:27 +0000 (18:51 +0800)]
drm/bridge: it6505: fix HDCP CTS KSV list wait timer
HDCP must disabled encryption and restart authentication after
waiting KSV for 5s.
The original method uses a counter in a waitting loop that may
wait much longer than it is supposed to.
Use time_after() for KSV wait timeout.
Hermes Wu [Mon, 30 Dec 2024 10:51:25 +0000 (18:51 +0800)]
drm/bridge: it6505: fix HDCP CTS KSV list read with UNIGRAF DPR-100.
When running the HDCP CTS test with UNIGRAF DPR-100.
KSV list must be read from DP_AUX_HDCP_KSV_FIFO in an AUX request,
and can not separate with multiple read requests.
The AUX operation command "CMD_AUX_GET_KSV_LIST" reads the KSV list
with AUX FIFO and is able to read DP_AUX_HDCP_KSV_FIFO in an AUX request.
Add it6505_get_ksvlist() which uses CMD_AUX_GET_KSV_LIST operation
to read the KSV list.
Hermes Wu [Mon, 30 Dec 2024 10:51:21 +0000 (18:51 +0800)]
drm/bridge: it6505: add AUX operation for HDCP KSV list read
HDCP KSV list readback can choose to use AUX FIFO or
general data register.
For some DisplayPort devices, the KSV list must be read
in 5 byte boundaries.
The original AUX read command does not support these devices.
The AUX command operation control register "REG_AUX_CMD_REQ" uses b[3:0]
as AUX operacion control, and b[7:4] are status bits and read only.
To change KSV read operation uses "CMD_AUX_NATIVE_READ" from using
the data registers to using AUX FIFO.
The extended command "CMD_AUX_GET_KSV_LIST" is added as
"CMD_AUX_NATIVE_READ" with the 0x10 flag which selects AUX FIFO mode.
Hermes Wu [Mon, 30 Dec 2024 10:51:20 +0000 (18:51 +0800)]
drm/bridge: it6505: improve AUX operation for edid read
The original AUX operation using data registers is limited to 4 bytes.
The AUX operation command CMD_AUX_I2C_EDID_READ uses AUX FIFO and
is capable of reading 16 bytes.
This improves the speed of EDID read.
Baihan Li [Fri, 3 Jan 2025 09:38:24 +0000 (17:38 +0800)]
drm/hisilicon/hibmc: add dp module in hibmc
To support DP interface displaying in hibmc driver. Add
a encoder and connector for DP modual. The HPD function
and get_edid function will be add in next series, so temporarily
using 1024x768 as default in hibmc_dp_connector_get_modes()
Fei Shao [Wed, 4 Dec 2024 14:25:38 +0000 (22:25 +0800)]
drm/mediatek: dp: Support flexible length of DP calibration data
The DP calibration data is stored in nvmem cells, and the data layout is
described in the `mtk_dp_efuse_fmt` arrays for each platform.
There is no guarantee that the data is always a 4-length u32 cell array.
For example, MT8188 has a data length of 3, preventing it from passing
the preliminary check and undergoing calibration.
Update the logic to support flexible data lengths. Specifically, we
validate the length returned from `nvmem_cell_read()` against the
platform-specific efuse format. If out-of-bound access is detected, fall
back to the default calibration values. This likely indicates an error
in either the efuse data length described in DT or the efuse format
within the driver.
Liankun Yang [Thu, 28 Nov 2024 02:37:21 +0000 (10:37 +0800)]
drm/mediatek: dp: Add sdp path reset
When using type-c to type-c to connect to the monitor,
the sound plays normally. If you unplug the type-c and
connect the type-c to hdmi dongle to the monitor, there will be noise.
By capturing the audio data, it is found that
the data position is messy, and there is no error in the data.
Through experiments, it can be restored by resetting the SDP path
when unplugging it.
Dmitry Baryshkov [Tue, 10 Dec 2024 14:16:50 +0000 (16:16 +0200)]
drm/bridge: dw-hdmi-qp: drop atomic_check() callback
As drm_bridge_connector now provides atomic_check() implementation which
calls drm_atomic_helper_connector_hdmi_check(), drop the duplicating
callback from the bridge driver.
Dmitry Baryshkov [Tue, 10 Dec 2024 14:16:49 +0000 (16:16 +0200)]
drm/bridge: lontium-lt9611: drop atomic_check() callback
As drm_bridge_connector now provides atomic_check() implementation which
calls drm_atomic_helper_connector_hdmi_check(), drop the duplicating
callback from the bridge driver.
Dmitry Baryshkov [Tue, 10 Dec 2024 14:16:48 +0000 (16:16 +0200)]
drm/bridge: ite-it6263: drop atomic_check() callback
As drm_bridge_connector now provides atomic_check() implementation which
calls drm_atomic_helper_connector_hdmi_check(), drop the duplicating
callback from the bridge driver.
Dmitry Baryshkov [Tue, 10 Dec 2024 14:16:47 +0000 (16:16 +0200)]
drm/display: bridge_connector: provide atomic_check for HDMI bridges
The bridges using HDMI connector framework have a call to
drm_atomic_helper_connector_hdmi_check() in their atomic_check()
callback. In order to reduce boilerplate and make simplify bridge's
code, use drm_atomic_helper_connector_hdmi_check() to implement
drm_connector.atomic_check() for HDMI bridges.
Linus Walleij [Thu, 19 Dec 2024 18:36:05 +0000 (19:36 +0100)]
MAINTAINERS: Assume maintainership of PL111
Emma Anholt dropped maintainership for PL111 and I
didn't notice it at the time. I've written part of it
and I'm happy to maintain it, list myself as maintainer
and assume active maintainership.
Ahmad Fatoum [Wed, 18 Dec 2024 19:45:00 +0000 (20:45 +0100)]
drm: panel-simple: support TOPLAND TIAN G07017 LCD panel
The TIAN-G07017-01 is a 7" TFT-LCD module by TOPLAND ELECTRONICS (H.K).
The panel features 1024x600 24-bit RGB pixels driven over LVDS as well
as a PWM backlight and I2C-connected ft5506-compatible capacitive touch.
The panel description is taken from the Datasheet V0 (2024.5.23), but
it lists no timings and these were provided by the vendor separately.
Xin Ji [Thu, 19 Dec 2024 07:03:29 +0000 (15:03 +0800)]
drm/bridge:anx7625: Update HDCP content status
When user enabled HDCP feature, userspace will set HDCP content
to DRM_MODE_CONTENT_PROTECTION_DESIRED. Next, anx7625 will update
HDCP content to DRM_MODE_CONTENT_PROTECTION_ENABLED if down stream
support HDCP feature.
As anx7625 bridge IC will be power down after call .atomic_disable(),
then all HDCP status will be lost on chip. So we should reestablish
HDCP again in .atomic_enable(), and update hdcp content to DESIRE if
current HDCP content is ENABLE in .atomic_disable().
v4:
- Change HDCP content value to DESIRED if HDCP status is ENABLE in bridge
interface .atomic_enable().
v3:
- Move hdcp content value checking from bridge interface
.atomic_check() to .atomic_enable()
Yunxiang Li [Thu, 19 Dec 2024 15:14:11 +0000 (10:14 -0500)]
drm/amdgpu: track bo memory stats at runtime
Before, every time fdinfo is queried we try to lock all the BOs in the
VM and calculate memory usage from scratch. This works okay if the
fdinfo is rarely read and the VMs don't have a ton of BOs. If either of
these conditions is not true, we get a massive performance hit.
In this new revision, we track the BOs as they change states. This way
when the fdinfo is queried we only need to take the status lock and copy
out the usage stats with minimal impact to the runtime performance. With
this new approach however, we would no longer be able to track active
buffers.
Define how to handle buffers with multiple possible placement so we
don't get incompatible implementations. Callout the resident requirement
for drm-purgeable- explicitly. Remove the requirement for there to be
only drm-memory- or only drm-resident-, it's not what's implemented and
having both is better for back-compat. Also re-order the paragraphs to
flow better.
Yunxiang Li [Thu, 19 Dec 2024 15:14:08 +0000 (10:14 -0500)]
drm: make drm-active- stats optional
When memory stats is generated fresh everytime by going though all the
BOs, their active information is quite easy to get. But if the stats are
tracked with BO's state this becomes harder since the job scheduling
part doesn't really deal with individual buffers.
Make drm-active- optional to enable amdgpu to switch to the second
method.
Bagas Sanjaya [Tue, 17 Dec 2024 03:49:15 +0000 (10:49 +0700)]
drm/sched: Fix drm_sched_fini() docu generation
Commit baf4afc5831438 ("drm/sched: Improve teardown documentation")
documents problems of drm_sched_fini() in form of a list. The checklist
triggers htmldocs warning (but renders correctly in htmldocs output):
Add a optional properties to change LVDS output voltage. This should not
be static as this depends mainly on the connected display voltage
requirement. We have three properties:
- "ti,lvds-termination-ohms", which sets near end termination,
- "ti,lvds-vod-swing-data-microvolt" and
- "ti,lvds-vod-swing-clock-microvolt" which both set LVDS differential
output voltage for data and clock lanes. They are defined as an array
with min and max values. The appropriate bitfield will be set if
selected constraints can be met.
If "ti,lvds-termination-ohms" is not defined the default of 200 Ohm near
end termination will be used. Selecting only one:
"ti,lvds-vod-swing-data-microvolt" or
"ti,lvds-vod-swing-clock-microvolt" can be done, but the output voltage
constraint for only data/clock lanes will be met. Setting both is
recommended.
Andrej Picej [Mon, 16 Dec 2024 08:54:08 +0000 (09:54 +0100)]
dt-bindings: drm/bridge: ti-sn65dsi83: Add properties for ti,lvds-vod-swing
Add properties which can be used to specify LVDS differential output
voltage. Since this also depends on near-end signal termination also
include property which sets this. LVDS differential output voltage is
specified with an array (min, max), which should match the one from
connected device.
Tomi Valkeinen [Wed, 23 Oct 2024 11:52:43 +0000 (14:52 +0300)]
drm: xlnx: zynqmp_dpsub: Add DP audio support
Add basic DisplayPort audio support.
Support non-live audio playback from two PCMs (DMA channels), and the
volume control in the audio mixer.
As older dtb files may not have the audio DMA channels defined, the
driver will just mark the audio support as disabled if the audio DMA is
missing, and will continue with only display support.
Note: Reset doesn't seem to work (ZYNQMP_DISP_AUD_SOFT_RESET). If we do
a reset, audio playback won't start again even if, afaics, we do set up
all the necessary registers. So, at the moment, resetting the audio
block in dp_dai_hw_free() is commented out.
The DP subsystem for ZynqMP supports audio via two channels, and the DP
DMA has dma-engines for those channels. For some reason the DT binding
has not specified those channels, even if the picture included in
xlnx,zynqmp-dpsub.yaml shows "2 x aud" DMAs.
This hasn't caused any issues as the drivers have not supported audio,
and has thus gone unnoticed.
To make it possible to add the audio support to the driver, add the two
audio DMAs to the binding. While strictly speaking this is an ABI break,
there should be no regressions caused by this as we're adding new
entries at the end of the dmas list, and, after the audio support has
been added in "arm64: dts: zynqmp: Add DMA for DP audio", the driver
will treat the audio DMAs as optional to also support the old bindings.
Dave Airlie [Wed, 18 Dec 2024 21:59:20 +0000 (07:59 +1000)]
Merge tag 'drm-intel-gt-next-2024-12-18' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-next
Driver Changes:
- More accurate engine busyness metrics with GuC submission (Umesh)
- Ensure partial BO segment offset never exceeds allowed max (Krzysztof)
- Flush GuC CT receive tasklet during reset preparation (Zhanjun)
Michel Dänzer [Tue, 17 Dec 2024 17:22:56 +0000 (18:22 +0100)]
drm/amdgpu: Handle NULL bo->tbo.resource (again) in amdgpu_vm_bo_update
Third time's the charm, I hope?
Fixes: d3116756a710 ("drm/ttm: rename bo->mem and make it a pointer") Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3837 Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <mdaenzer@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Replacing kmalloc() + memcpy() with kmemdump() doesn't change semantics.
Original code works without fault, so this is not a bug fix but proposed improvement.
Link: https://lwn.net/Articles/198928/ Fixes: 84a2947ecc85 ("drm/amdgpu: Implement virt req_ras_err_count") Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: Xinhui Pan <Xinhui.Pan@amd.com> Cc: David Airlie <airlied@gmail.com> Cc: Simona Vetter <simona@ffwll.ch> Cc: Zhigang Luo <Zhigang.Luo@amd.com> Cc: Victor Skvortsov <victor.skvortsov@amd.com> Cc: Hawking Zhang <Hawking.Zhang@amd.com> Cc: Lijo Lazar <lijo.lazar@amd.com> Cc: Yunxiang Li <Yunxiang.Li@amd.com> Cc: Jack Xiao <Jack.Xiao@amd.com> Cc: Vignesh Chander <Vignesh.Chander@amd.com> Cc: Danijel Slivka <danijel.slivka@amd.com> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Mirsad Todorovac <mtodorovac69@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Srinivasan Shanmugam [Thu, 12 Dec 2024 09:33:29 +0000 (15:03 +0530)]
drm/amd/display: Fix NULL pointer dereference in dmub_tracebuffer_show
It corrects the issue by checking if 'adev->dm.dmub_srv' is NULL before
accessing its 'meta_info' member. This ensures that we do not
dereference a NULL pointer.
Fixes the below:
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:917 dmub_tracebuffer_show()
warn: address of 'adev->dm.dmub_srv->meta_info' is non-NULL
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c
901 static int dmub_tracebuffer_show(struct seq_file *m, void *data)
902 {
903 struct amdgpu_device *adev = m->private;
904 struct dmub_srv_fb_info *fb_info = adev->dm.dmub_fb_info;
905 struct dmub_fw_meta_info *fw_meta_info = &adev->dm.dmub_srv->meta_info;
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Even if adev->dm.dmub_srv is NULL, the address of ->meta_info can't be NULL
v2: Initialize struct dmub_fw_meta_info *fw_meta_info to NULL (Dan Carpenter)
Fixes: 5a498172c8d0 ("drm/amd/display: Make DMCUB tracebuffer debugfs chronological") Cc: Leo Li <sunpeng.li@amd.com> Cc: Tom Chung <chiahsuan.chung@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Roman Li <roman.li@amd.com> Cc: Alex Hung <alex.hung@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Hamza Mahfooz <hamza.mahfooz@amd.com> Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Philip Yang [Tue, 3 Dec 2024 15:00:25 +0000 (10:00 -0500)]
drm/amdgpu: Show warning message if IH ring overflow
If IH primary ring and KFD ih fifo overflows, we may miss CP, SDMA
interrupts and cause application soft hang. Show warning message with
ring name if overflow happens.
Add function to get ih ring name to avoid duplicating it. To keep
warning message consistent between GPU generations, change all
*_ih.c except ASICs older than Vega which has only one ih ring.
Signed-off-by: Philip Yang <Philip.Yang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Philip Yang [Wed, 4 Dec 2024 22:49:08 +0000 (17:49 -0500)]
drm/amdkfd: Improve signal event slow path
If event slot is not signaled, kfd_signal_event_interrupt goes to slow
path to scan all event slots to find the signaled event, this is needed
for old ASICs that don't have the event ID or the event IDs are
incorrect in the IH payload.
There is case that GPU signal the same event twice, then driver process
the first event interrupt, set_event and event slot is auto-reset, then
for the second event interrupt, KFD goes to slow path as event is not
signaled, just drop the second event interrupt because the application
only need wakeup once.
Signed-off-by: Philip Yang <Philip.Yang@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Philip Yang [Tue, 26 Nov 2024 16:33:15 +0000 (11:33 -0500)]
drm/amdkfd: Queue interrupt work to different CPU
For CPX mode, each KFD node has interrupt worker to process ih_fifo to
send events to user space. Currently all interrupt workers of same adev
queue to same CPU, all workers execution are actually serialized and
this cause KFD ih_fifo overflow when CPU usage is high.
Use per-GPU unbounded highpri queue with number of workers equals to
number of partitions, let queue_work select the next CPU round robin
among the local CPUs of same NUMA.
Signed-off-by: Philip Yang <Philip.Yang@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
After GPU page fault, there are lots of page fault interrupts generated
at short period even with CAM filter enabled because the fault address
is different. Each page fault copy to KFD ih fifo to send event to user
space by KFD interrupt worker, this could cause KFD ih fifo overflow
while other processes generate events at same time.
KFD process is aborted after GPU page fault, we only need one GPU page
fault interrupt sent to KFD ih fifo to send memory exception event to
user space.
Incease KFD ih fifo size to 2 times of IH primary ring size, to handle
the burst events case.
This patch handle the gfx v9 path, cover retry on/off and CAM filter
on/off cases.
Signed-off-by: Philip Yang <Philip.Yang@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Philip Yang [Fri, 22 Nov 2024 22:36:15 +0000 (17:36 -0500)]
drm/amdkfd: KFD interrupt access ih_fifo data in-place
To handle 40000 to 80000 interrupts per second running CPX mode with 4
streams/queues per KFD node, KFD interrupt handler becomes the
performance bottleneck.
Remove the kfifo_out memcpy overhead by accessing ih_fifo data in-place
and updating rptr with kfifo_skip_count.
Signed-off-by: Philip Yang <Philip.Yang@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit introduced a new state variable into adev without even
remotely worrying about CPU barriers.
Since we already have the amdgpu_in_reset() function exactly for this
use case partially revert that.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 12 Dec 2024 15:43:45 +0000 (16:43 +0100)]
drm/amdgpu: set the VM pointer to NULL in amdgpu_job_prepare
As soon as the prepare phase is completed the VM might be released,
better set it to NULL.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 12 Dec 2024 15:29:18 +0000 (16:29 +0100)]
drm/amdgpu: fix amdgpu_coredump
The VM pointer might already be outdated when that function is called.
Use the PASID instead to gather the information instead.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
The sdma context empty interrupt is dropped in amdgpu_irq_dispatch
as unregistered interrupt src_id 243, this interrupt accounts to 1/3 of
total interrupts and causes IH primary ring overflow when running
stressful benchmark application. Disable this interrupt has no side
effect found.
Signed-off-by: Philip Yang <Philip.Yang@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Karol Przybylski [Sun, 15 Dec 2024 12:28:57 +0000 (13:28 +0100)]
drm/amdgpu: Fix potential integer overflow in scheduler mask calculations
The use of 1 << i in scheduler mask calculations can result in an
unintentional integer overflow due to the expression being
evaluated as a 32-bit signed integer.
This patch replaces 1 << i with 1ULL << i to ensure the operation
is performed as a 64-bit unsigned integer, preventing overflow
George Shen [Thu, 5 Dec 2024 21:58:21 +0000 (16:58 -0500)]
drm/amd/display: Disable MPC rate control on ODM pipe update
[Why]
Seamless boot skips MPC init for the active pipe, resulting in stale MPC
rate control state being retained. This will cause issues since other
logic assumes it is disabled (as DCN30 and newer does not need it).
[How]
Disable MPC rate control on ODM pipe update to cover the seamless boot
case.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: George Shen <george.shen@amd.com> Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
A long time ago, we had an issue with the Raven system when it was
connected to two displays: one with DP and another with HDMI. After the
system woke up from suspension, we saw a solid green screen caused by an
underflow generated by bad DCC metadata. To workaround this issue, the
'commit 87b7ebc2e16c ("drm/amd/display: Fix green screen issue after
suspend")' was introduced to disable the DCC for a few frames after in
the resume phase. However, in hindsight, this solution was probably a
workaround at the kernel level for some issues from another part
(probably other driver components or user space). After applying this
patch and trying to reproduce the green issue in a similar hardware
system but using the latest kernel and userspace, we cannot see the
issue, which makes this workaround obsolete and creates extra
unnecessary complexity to the code; for all of this reason, this commit
reverts the original change.
Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nicholas Kazlauskas [Thu, 5 Dec 2024 19:53:36 +0000 (14:53 -0500)]
drm/amd/display: Apply (some) policy for DML2 formulation on DCN35/DCN351
[Why]
Dropping the entirety of dml2_policy_build_synthetic_soc_states exposes
an issue for states that cannot be filled via bbox_overrides and rely on
the default parameters that may or may not be present depending on the
DM.
For amdgpu_dm this results in missing parameters for most of the struct
in higher states:
Shunlu Zhang [Thu, 14 Nov 2024 00:21:40 +0000 (19:21 -0500)]
drm/amd/display: delete legacy code
Delete unused code.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Jun Lei <jun.lei@amd.com> Signed-off-by: Shunlu Zhang <Shunlu.Zhang@amd.com> Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Fangzhi Zuo [Mon, 2 Dec 2024 18:30:37 +0000 (13:30 -0500)]
drm/amd/display: Fix Mode Cutoff in DSC Passthrough to DP2.1 Monitor
Source --> DP2.1 MST hub --> DP1.4/2.1 monitor
When change from DP1.4 to DP2.1 from monitor manual, modes higher than
4k120 are all cutoff by mode validation. Switch back to DP1.4 gets all
the modes up to 4k240 available to be enabled by dsc passthrough.
[why]
Compared to DP1.4 link from hub to monitor, DP2.1 link has larger
full_pbn value that causes overflow in the process of doing conversion
from pbn to kbps.
[how]
Change the data type accordingly to fit into the data limit during
conversion calculation.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com> Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Tue, 3 Dec 2024 20:55:34 +0000 (15:55 -0500)]
drm/amd/display: init dc_power_state
Initialize the power state for dc use
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Chris Park <chris.park@amd.com> Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dillon Varone [Fri, 29 Nov 2024 21:37:32 +0000 (16:37 -0500)]
drm/amd/display: Add support for FAMS2+ interface versions
Current driver interface does not allow for flexibility in coexistence
of multiple interface versions, so add support for checking minor
interface revisions and providing appropriate programming.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alvin Lee [Fri, 29 Nov 2024 16:53:38 +0000 (11:53 -0500)]
drm/amd/display: Update FAMS2 config cmd
The FAMS2 stream and sub-state have been separated into
2 different commands. Update the cmd function to send
one command each for the stream and sub-state.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com> Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>