From: Mauro Carvalho Chehab Date: Mon, 23 Apr 2012 19:59:33 +0000 (+0000) Subject: edac: rename is_csrows and GET_POS X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=refs%2Fheads%2Fhw_events_v14;p=users%2Fmchehab%2Fedac.git edac: rename is_csrows and GET_POS Those names don't represent well the meaning for those fields. So, rename them to be meaningful. As "is_csrows" is used to indicate that a layer is part of the virtual csrow, let's name it as is_virt_csrows. As "GET_POS" is used to get the EDAC mci dimm_info pointer for a given layer address, let's call it as "EDAC_DIMM_PTR". Signed-off-by: Mauro Carvalho Chehab --- diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 08af66c77b0d..50467a03c471 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -2568,10 +2568,10 @@ static int amd64_init_one_instance(struct pci_dev *F2) ret = -ENOMEM; layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; layers[0].size = pvt->csels[0].b_cnt; - layers[0].is_csrow = true; + layers[0].is_virt_csrow = true; layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = pvt->channel_count; - layers[1].is_csrow = false; + layers[1].is_virt_csrow = false; mci = edac_mc_alloc(nid, ARRAY_SIZE(layers), layers, false, 0); if (!mci) goto err_siblings; diff --git a/drivers/edac/amd76x_edac.c b/drivers/edac/amd76x_edac.c index 99d8d564c927..be6c2251cce5 100644 --- a/drivers/edac/amd76x_edac.c +++ b/drivers/edac/amd76x_edac.c @@ -247,10 +247,10 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx) layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; layers[0].size = AMD76X_NR_CSROWS; - layers[0].is_csrow = true; + layers[0].is_virt_csrow = true; layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = 1; - layers[1].is_csrow = false; + layers[1].is_virt_csrow = false; mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, 0); if (mci == NULL) diff --git a/drivers/edac/cell_edac.c b/drivers/edac/cell_edac.c index ee61f0dc01bb..d28167b2e896 100644 --- a/drivers/edac/cell_edac.c +++ b/drivers/edac/cell_edac.c @@ -200,10 +200,10 @@ static int __devinit cell_edac_probe(struct platform_device *pdev) layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; layers[0].size = 1; - layers[0].is_csrow = true; + layers[0].is_virt_csrow = true; layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = num_chans; - layers[1].is_csrow = false; + layers[1].is_virt_csrow = false; mci = edac_mc_alloc(pdev->id, ARRAY_SIZE(layers), layers, false, sizeof(struct cell_edac_priv)); if (mci == NULL) diff --git a/drivers/edac/cpc925_edac.c b/drivers/edac/cpc925_edac.c index 02030897411c..31b3c91884f2 100644 --- a/drivers/edac/cpc925_edac.c +++ b/drivers/edac/cpc925_edac.c @@ -978,10 +978,10 @@ static int __devinit cpc925_probe(struct platform_device *pdev) layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; layers[0].size = CPC925_NR_CSROWS; - layers[0].is_csrow = true; + layers[0].is_virt_csrow = true; layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = nr_channels; - layers[1].is_csrow = false; + layers[1].is_virt_csrow = false; mci = edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers, false, sizeof(struct cpc925_mc_pdata)); if (!mci) { diff --git a/drivers/edac/e752x_edac.c b/drivers/edac/e752x_edac.c index 35f282ed2ade..7e601c1f6875 100644 --- a/drivers/edac/e752x_edac.c +++ b/drivers/edac/e752x_edac.c @@ -1293,10 +1293,10 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx) layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; layers[0].size = E752X_NR_CSROWS; - layers[0].is_csrow = true; + layers[0].is_virt_csrow = true; layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = drc_chan + 1; - layers[1].is_csrow = false; + layers[1].is_virt_csrow = false; mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, sizeof(*pvt)); if (mci == NULL) diff --git a/drivers/edac/e7xxx_edac.c b/drivers/edac/e7xxx_edac.c index 93695e465583..2defa9622807 100644 --- a/drivers/edac/e7xxx_edac.c +++ b/drivers/edac/e7xxx_edac.c @@ -445,10 +445,10 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx) */ layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; layers[0].size = E7XXX_NR_CSROWS; - layers[0].is_csrow = true; + layers[0].is_virt_csrow = true; layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = drc_chan + 1; - layers[1].is_csrow = false; + layers[1].is_virt_csrow = false; mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, sizeof(*pvt)); if (mci == NULL) return -ENOMEM; diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c index d3dd0dd4d464..6853935a2f49 100644 --- a/drivers/edac/edac_mc.c +++ b/drivers/edac/edac_mc.c @@ -240,7 +240,7 @@ struct mem_ctl_info *edac_mc_alloc(unsigned edac_index, tot_csrows = 1; for (i = 0; i < n_layers; i++) { tot_dimms *= layers[i].size; - if (layers[i].is_csrow) + if (layers[i].is_virt_csrow) tot_csrows *= layers[i].size; else tot_cschannels *= layers[i].size; @@ -380,7 +380,7 @@ struct mem_ctl_info *edac_mc_alloc(unsigned edac_index, /* Increment csrow location */ if (!rev_order) { for (j = n_layers - 1; j >= 0; j--) - if (!layers[j].is_csrow) + if (!layers[j].is_virt_csrow) break; chn++; if (chn == tot_cschannels) { @@ -389,7 +389,7 @@ struct mem_ctl_info *edac_mc_alloc(unsigned edac_index, } } else { for (j = n_layers - 1; j >= 0; j--) - if (layers[j].is_csrow) + if (layers[j].is_virt_csrow) break; row++; if (row == tot_csrows) { diff --git a/drivers/edac/i3000_edac.c b/drivers/edac/i3000_edac.c index 15df2bcd3ffc..55eff02ede26 100644 --- a/drivers/edac/i3000_edac.c +++ b/drivers/edac/i3000_edac.c @@ -358,10 +358,10 @@ static int i3000_probe1(struct pci_dev *pdev, int dev_idx) layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; layers[0].size = I3000_RANKS / nr_channels; - layers[0].is_csrow = true; + layers[0].is_virt_csrow = true; layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = nr_channels; - layers[1].is_csrow = false; + layers[1].is_virt_csrow = false; mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, 0); if (!mci) return -ENOMEM; diff --git a/drivers/edac/i3200_edac.c b/drivers/edac/i3200_edac.c index acb5d3976c34..818ee6ff0e95 100644 --- a/drivers/edac/i3200_edac.c +++ b/drivers/edac/i3200_edac.c @@ -343,10 +343,10 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx) layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; layers[0].size = I3200_DIMMS; - layers[0].is_csrow = true; + layers[0].is_virt_csrow = true; layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = nr_channels; - layers[1].is_csrow = false; + layers[1].is_virt_csrow = false; mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, sizeof(struct i3200_priv)); if (!mci) diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c index 3626225e332f..fda19b450d07 100644 --- a/drivers/edac/i5000_edac.c +++ b/drivers/edac/i5000_edac.c @@ -1280,7 +1280,7 @@ static int i5000_init_csrows(struct mem_ctl_info *mci) if (!MTR_DIMMS_PRESENT(mtr)) continue; - dimm = GET_POS(mci->layers, mci->dimms, mci->n_layers, + dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms, mci->n_layers, channel / MAX_BRANCHES, channel % MAX_BRANCHES, slot); @@ -1397,13 +1397,13 @@ static int i5000_probe1(struct pci_dev *pdev, int dev_idx) layers[0].type = EDAC_MC_LAYER_BRANCH; layers[0].size = MAX_BRANCHES; - layers[0].is_csrow = false; + layers[0].is_virt_csrow = false; layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = num_channels / MAX_BRANCHES; - layers[1].is_csrow = false; + layers[1].is_virt_csrow = false; layers[2].type = EDAC_MC_LAYER_SLOT; layers[2].size = num_dimms_per_channel; - layers[2].is_csrow = true; + layers[2].is_virt_csrow = true; mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, sizeof(*pvt)); if (mci == NULL) diff --git a/drivers/edac/i5100_edac.c b/drivers/edac/i5100_edac.c index dd260c894a1a..a5a7ca43ea6c 100644 --- a/drivers/edac/i5100_edac.c +++ b/drivers/edac/i5100_edac.c @@ -844,7 +844,7 @@ static void __devinit i5100_init_csrows(struct mem_ctl_info *mci) if (!npages) continue; - dimm = GET_POS(mci->layers, mci->dimms, mci->n_layers, + dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms, mci->n_layers, chan, rank, 0); dimm->nr_pages = npages; @@ -932,10 +932,10 @@ static int __devinit i5100_init_one(struct pci_dev *pdev, layers[0].type = EDAC_MC_LAYER_CHANNEL; layers[0].size = 2; - layers[0].is_csrow = false; + layers[0].is_virt_csrow = false; layers[1].type = EDAC_MC_LAYER_SLOT; layers[1].size = ranksperch; - layers[1].is_csrow = true; + layers[1].is_virt_csrow = true; mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, sizeof(*priv)); if (!mci) { diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c index 74b64c68892d..676591e9a6f8 100644 --- a/drivers/edac/i5400_edac.c +++ b/drivers/edac/i5400_edac.c @@ -1198,7 +1198,7 @@ static int i5400_init_dimms(struct mem_ctl_info *mci) if (!MTR_DIMMS_PRESENT(mtr)) continue; - dimm = GET_POS(mci->layers, mci->dimms, mci->n_layers, + dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms, mci->n_layers, channel / 2, channel % 2, slot); size_mb = pvt->dimm_info[slot][channel].megabytes; @@ -1286,13 +1286,13 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx) */ layers[0].type = EDAC_MC_LAYER_BRANCH; layers[0].size = MAX_BRANCHES; - layers[0].is_csrow = false; + layers[0].is_virt_csrow = false; layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = CHANNELS_PER_BRANCH; - layers[1].is_csrow = false; + layers[1].is_virt_csrow = false; layers[2].type = EDAC_MC_LAYER_SLOT; layers[2].size = DIMMS_PER_CHANNEL; - layers[2].is_csrow = true; + layers[2].is_virt_csrow = true; mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, sizeof(*pvt)); if (mci == NULL) diff --git a/drivers/edac/i7300_edac.c b/drivers/edac/i7300_edac.c index f9a4fa4ee5db..7425f1794d6c 100644 --- a/drivers/edac/i7300_edac.c +++ b/drivers/edac/i7300_edac.c @@ -795,7 +795,7 @@ static int i7300_init_csrows(struct mem_ctl_info *mci) for (ch = 0; ch < MAX_CH_PER_BRANCH; ch++) { int channel = to_channel(ch, branch); - dimm = GET_POS(mci->layers, mci->dimms, + dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms, mci->n_layers, branch, ch, slot); dinfo = &pvt->dimm_info[slot][channel]; @@ -1044,13 +1044,13 @@ static int __devinit i7300_init_one(struct pci_dev *pdev, /* allocate a new MC control structure */ layers[0].type = EDAC_MC_LAYER_BRANCH; layers[0].size = MAX_BRANCHES; - layers[0].is_csrow = false; + layers[0].is_virt_csrow = false; layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = MAX_CH_PER_BRANCH; - layers[1].is_csrow = true; + layers[1].is_virt_csrow = true; layers[2].type = EDAC_MC_LAYER_SLOT; layers[2].size = MAX_SLOTS; - layers[2].is_csrow = true; + layers[2].is_virt_csrow = true; mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, sizeof(*pvt)); if (mci == NULL) diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c index cf27af876a96..dfdee48f3a47 100644 --- a/drivers/edac/i7core_edac.c +++ b/drivers/edac/i7core_edac.c @@ -596,7 +596,7 @@ static int get_dimm_config(struct mem_ctl_info *mci) if (!DIMM_PRESENT(dimm_dod[j])) continue; - dimm = GET_POS(mci->layers, mci->dimms, mci->n_layers, + dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms, mci->n_layers, i, j, 0); banks = numbank(MC_DOD_NUMBANK(dimm_dod[j])); ranks = numrank(MC_DOD_NUMRANK(dimm_dod[j])); @@ -2229,10 +2229,10 @@ static int i7core_register_mci(struct i7core_dev *i7core_dev) layers[0].type = EDAC_MC_LAYER_CHANNEL; layers[0].size = NUM_CHANS; - layers[0].is_csrow = false; + layers[0].is_virt_csrow = false; layers[1].type = EDAC_MC_LAYER_SLOT; layers[1].size = MAX_DIMMS; - layers[1].is_csrow = true; + layers[1].is_virt_csrow = true; mci = edac_mc_alloc(i7core_dev->socket, ARRAY_SIZE(layers), layers, false, sizeof(*pvt)); if (unlikely(!mci)) diff --git a/drivers/edac/i82443bxgx_edac.c b/drivers/edac/i82443bxgx_edac.c index 877ba5431432..c0249f3d84ea 100644 --- a/drivers/edac/i82443bxgx_edac.c +++ b/drivers/edac/i82443bxgx_edac.c @@ -251,10 +251,10 @@ static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx) layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; layers[0].size = I82443BXGX_NR_CSROWS; - layers[0].is_csrow = true; + layers[0].is_virt_csrow = true; layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = I82443BXGX_NR_CHANS; - layers[1].is_csrow = false; + layers[1].is_virt_csrow = false; mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, 0); if (mci == NULL) return -ENOMEM; diff --git a/drivers/edac/i82860_edac.c b/drivers/edac/i82860_edac.c index f493758d894d..6ff59b00c331 100644 --- a/drivers/edac/i82860_edac.c +++ b/drivers/edac/i82860_edac.c @@ -202,10 +202,10 @@ static int i82860_probe1(struct pci_dev *pdev, int dev_idx) */ layers[0].type = EDAC_MC_LAYER_CHANNEL; layers[0].size = 2; - layers[0].is_csrow = true; + layers[0].is_virt_csrow = true; layers[1].type = EDAC_MC_LAYER_SLOT; layers[1].size = 8; - layers[1].is_csrow = true; + layers[1].is_virt_csrow = true; mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, 0); if (!mci) return -ENOMEM; diff --git a/drivers/edac/i82875p_edac.c b/drivers/edac/i82875p_edac.c index a42a5bd34e0f..c9439047ba8e 100644 --- a/drivers/edac/i82875p_edac.c +++ b/drivers/edac/i82875p_edac.c @@ -416,10 +416,10 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx) layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; layers[0].size = I82875P_NR_CSROWS(nr_chans); - layers[0].is_csrow = true; + layers[0].is_virt_csrow = true; layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = nr_chans; - layers[1].is_csrow = false; + layers[1].is_virt_csrow = false; mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, sizeof(*pvt)); if (!mci) { rc = -ENOMEM; diff --git a/drivers/edac/i82975x_edac.c b/drivers/edac/i82975x_edac.c index 717f20889342..a4a676819e65 100644 --- a/drivers/edac/i82975x_edac.c +++ b/drivers/edac/i82975x_edac.c @@ -548,10 +548,10 @@ static int i82975x_probe1(struct pci_dev *pdev, int dev_idx) /* assuming only one controller, index thus is 0 */ layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; layers[0].size = I82975X_NR_DIMMS; - layers[0].is_csrow = true; + layers[0].is_virt_csrow = true; layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = I82975X_NR_CSROWS(chans); - layers[1].is_csrow = false; + layers[1].is_virt_csrow = false; mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, sizeof(*pvt)); if (!mci) { rc = -ENOMEM; diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c index 42e209cd7d21..1640d54b6193 100644 --- a/drivers/edac/mpc85xx_edac.c +++ b/drivers/edac/mpc85xx_edac.c @@ -988,10 +988,10 @@ static int __devinit mpc85xx_mc_err_probe(struct platform_device *op) layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; layers[0].size = 4; - layers[0].is_csrow = true; + layers[0].is_virt_csrow = true; layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = 1; - layers[1].is_csrow = false; + layers[1].is_virt_csrow = false; mci = edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers, false, sizeof(*pdata)); if (!mci) { diff --git a/drivers/edac/mv64x60_edac.c b/drivers/edac/mv64x60_edac.c index 87139cad92a1..59c399a5e4cf 100644 --- a/drivers/edac/mv64x60_edac.c +++ b/drivers/edac/mv64x60_edac.c @@ -711,10 +711,10 @@ static int __devinit mv64x60_mc_err_probe(struct platform_device *pdev) layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; layers[0].size = 1; - layers[0].is_csrow = true; + layers[0].is_virt_csrow = true; layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = 1; - layers[1].is_csrow = false; + layers[1].is_virt_csrow = false; mci = edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers, false, sizeof(struct mv64x60_mc_pdata)); if (!mci) { diff --git a/drivers/edac/pasemi_edac.c b/drivers/edac/pasemi_edac.c index 634b919974b4..267e9ccfef3f 100644 --- a/drivers/edac/pasemi_edac.c +++ b/drivers/edac/pasemi_edac.c @@ -211,10 +211,10 @@ static int __devinit pasemi_edac_probe(struct pci_dev *pdev, layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; layers[0].size = PASEMI_EDAC_NR_CSROWS; - layers[0].is_csrow = true; + layers[0].is_virt_csrow = true; layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = PASEMI_EDAC_NR_CHANS; - layers[1].is_csrow = false; + layers[1].is_virt_csrow = false; mci = edac_mc_alloc(system_mmc_id++, ARRAY_SIZE(layers), layers, false, 0); if (mci == NULL) diff --git a/drivers/edac/ppc4xx_edac.c b/drivers/edac/ppc4xx_edac.c index 3917b0f6bde2..77908cdb3be4 100644 --- a/drivers/edac/ppc4xx_edac.c +++ b/drivers/edac/ppc4xx_edac.c @@ -1287,10 +1287,10 @@ static int __devinit ppc4xx_edac_probe(struct platform_device *op) */ layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; layers[0].size = ppc4xx_edac_nr_csrows; - layers[0].is_csrow = true; + layers[0].is_virt_csrow = true; layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = ppc4xx_edac_nr_chans; - layers[1].is_csrow = false; + layers[1].is_virt_csrow = false; mci = edac_mc_alloc(ppc4xx_edac_instance, ARRAY_SIZE(layers), layers, false, sizeof(struct ppc4xx_edac_pdata)); if (mci == NULL) { diff --git a/drivers/edac/r82600_edac.c b/drivers/edac/r82600_edac.c index 6a7a2ce2a056..7b7eaf239e74 100644 --- a/drivers/edac/r82600_edac.c +++ b/drivers/edac/r82600_edac.c @@ -287,10 +287,10 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx) debugf2("%s(): DRAMC register = %#0x\n", __func__, dramcr); layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; layers[0].size = R82600_NR_CSROWS; - layers[0].is_csrow = true; + layers[0].is_virt_csrow = true; layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = R82600_NR_CHANS; - layers[1].is_csrow = false; + layers[1].is_virt_csrow = false; mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, 0); if (mci == NULL) return -ENOMEM; diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c index ff07f340e8e0..bb7e95faacbc 100644 --- a/drivers/edac/sb_edac.c +++ b/drivers/edac/sb_edac.c @@ -572,7 +572,7 @@ static int get_dimm_config(struct mem_ctl_info *mci) u32 mtr; for (j = 0; j < ARRAY_SIZE(mtr_regs); j++) { - dimm = GET_POS(mci->layers, mci->dimms, mci->n_layers, + dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms, mci->n_layers, i, j, 0); pci_read_config_dword(pvt->pci_tad[i], mtr_regs[j], &mtr); @@ -1635,10 +1635,10 @@ static int sbridge_register_mci(struct sbridge_dev *sbridge_dev) /* allocate a new MC control structure */ layers[0].type = EDAC_MC_LAYER_CHANNEL; layers[0].size = NUM_CHANNELS; - layers[0].is_csrow = false; + layers[0].is_virt_csrow = false; layers[1].type = EDAC_MC_LAYER_SLOT; layers[1].size = MAX_DIMMS; - layers[1].is_csrow = true; + layers[1].is_virt_csrow = true; mci = edac_mc_alloc(sbridge_dev->mc, ARRAY_SIZE(layers), layers, false, sizeof(*pvt)); diff --git a/drivers/edac/tile_edac.c b/drivers/edac/tile_edac.c index 4aecb06d89b8..56b0ab010f70 100644 --- a/drivers/edac/tile_edac.c +++ b/drivers/edac/tile_edac.c @@ -137,10 +137,10 @@ static int __devinit tile_edac_mc_probe(struct platform_device *pdev) /* A TILE MC has a single channel and one chip-select row. */ layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; layers[0].size = TILE_EDAC_NR_CSROWS; - layers[0].is_csrow = true; + layers[0].is_virt_csrow = true; layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = TILE_EDAC_NR_CHANS; - layers[1].is_csrow = false; + layers[1].is_virt_csrow = false; mci = edac_mc_alloc(pdev->id, ARRAY_SIZE(layers), layers, false, sizeof(struct tile_edac_priv)); if (mci == NULL) diff --git a/drivers/edac/x38_edac.c b/drivers/edac/x38_edac.c index c5e54efff17e..219530b842b5 100644 --- a/drivers/edac/x38_edac.c +++ b/drivers/edac/x38_edac.c @@ -344,10 +344,10 @@ static int x38_probe1(struct pci_dev *pdev, int dev_idx) /* FIXME: unconventional pvt_info usage */ layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; layers[0].size = X38_RANKS; - layers[0].is_csrow = true; + layers[0].is_virt_csrow = true; layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = x38_channel_num; - layers[1].is_csrow = false; + layers[1].is_virt_csrow = false; mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, 0); if (!mci) return -ENOMEM; diff --git a/include/linux/edac.h b/include/linux/edac.h index 062a1a7a40f8..e348afbf5225 100644 --- a/include/linux/edac.h +++ b/include/linux/edac.h @@ -384,14 +384,14 @@ enum edac_mc_layer_type { * struct edac_mc_layer - describes the memory controller hierarchy * @layer: layer type * @size:maximum size of the layer - * @is_csrow: This layer is part of the "csrow" when old API + * @is_virt_csrow: This layer is part of the "csrow" when old API * compatibility mode is enabled. Otherwise, it is * a channel */ struct edac_mc_layer { enum edac_mc_layer_type type; unsigned size; - bool is_csrow; + bool is_virt_csrow; }; /* @@ -424,7 +424,7 @@ struct edac_mc_layer { __i; \ }) -#define GET_POS(layers, var, nlayers, lay0, lay1, lay2) ({ \ +#define EDAC_DIMM_PTR(layers, var, nlayers, lay0, lay1, lay2) ({ \ typeof(*var) __p; \ int ___i = GET_OFFSET(layers, nlayers, lay0, lay1, lay2); \ if (___i < 0) \