From: Kenji Kaneshige Date: Thu, 10 Nov 2011 07:40:37 +0000 (+0900) Subject: PCI: pciehp: wait 1000 ms before Link Training check X-Git-Tag: v2.6.39-400.9.0~423^2~2 X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=fa9ef64e06317ebd94032b0fe915e390c7c9b356;p=users%2Fjedix%2Flinux-maple.git PCI: pciehp: wait 1000 ms before Link Training check Orabug:13993738 We need to wait for 1000 ms after Data Link Layer Link Active (DLLLA) bit reads 1b before sending configuration request. Currently pciehp does this wait after checking Link Training (LT) bit. But we need it before checking LT bit because LT is still set even after DLLLA bit is set on some platforms. Acked-by: Yinghai Lu Tested-by: Yinghai Lu Signed-off-by: Kenji Kaneshige Signed-off-by: Jesse Barnes (cherry picked from commit 0027cb3e1947d0f453fece40ed16764fb362bac6) Signed-off-by: Zhenzhong Duan --- diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index 50a23da5d24d..1e4a95456495 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c @@ -287,6 +287,14 @@ int pciehp_check_link_status(struct controller *ctrl) } else msleep(1000); + /* + * Need to wait for 1000 ms after Data Link Layer Link Active + * (DLLLA) bit reads 1b before sending configuration request. + * We need it before checking Link Training (LT) bit becuase + * LT is still set even after DLLLA bit is set on some platform. + */ + msleep(1000); + retval = pciehp_readw(ctrl, PCI_EXP_LNKSTA, &lnk_status); if (retval) { ctrl_err(ctrl, "Cannot read LNKSTATUS register\n");