From: Samson Tam Date: Fri, 5 Aug 2022 22:41:01 +0000 (-0400) Subject: drm/amd/display: fix odm 2:1 policy not being applied consistently in 4k144 modes X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=f577c7c76bf9f0e0a6dd3daf5b9a3d3f2b3880cc;p=linux.git drm/amd/display: fix odm 2:1 policy not being applied consistently in 4k144 modes [Why] odm 2:1 policy is splitting the pipes in 4k144. then in subvp code, we merge the pipes. but since the configuration is unsupported, we keep the pipes split [How] for unsupported subvp configuration, redo the dml and pipe split calls Reviewed-by: Alvin Lee Reviewed-by: Jun Lei Acked-by: Brian Chang Signed-off-by: Samson Tam Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c index 8118cfc5b405..edefb3fc1c3c 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c @@ -1082,6 +1082,11 @@ static void dcn32_full_validate_bw_helper(struct dc *dc, dc->res_pool->funcs->remove_phantom_pipes(dc, context); vba->DRAMClockChangeSupport[*vlevel][vba->maxMpcComb] = dm_dram_clock_change_unsupported; *pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes, false); + + *vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, *pipe_cnt); + /* This may adjust vlevel and maxMpcComb */ + if (*vlevel < context->bw_ctx.dml.soc.num_states) + *vlevel = dcn20_validate_apply_pipe_split_flags(dc, context, *vlevel, split, merge); } else { // only call dcn20_validate_apply_pipe_split_flags if we found a supported config memset(split, 0, MAX_PIPES * sizeof(int));