From: Radim Krčmář Date: Fri, 25 Jul 2025 16:54:10 +0000 (+0200) Subject: riscv: use lw when reading int cpu in asm_per_cpu X-Git-Tag: v6.17-rc5~6^2~3 X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=f4ea67a722e8c9e1fb8109adebb9fb881ff0793a;p=users%2Fgriffoul%2Flinux.git riscv: use lw when reading int cpu in asm_per_cpu REG_L is wrong, because thread_info.cpu is 32-bit, not xlen-bit wide. The struct currently has a hole after cpu, so little endian accesses seemed fine. Fixes: be97d0db5f44 ("riscv: VMAP_STACK overflow detection thread-safe") Cc: stable@vger.kernel.org Reviewed-by: Alexandre Ghiti Signed-off-by: Radim Krčmář Link: https://lore.kernel.org/r/20250725165410.2896641-5-rkrcmar@ventanamicro.com Signed-off-by: Paul Walmsley --- diff --git a/arch/riscv/include/asm/asm.h b/arch/riscv/include/asm/asm.h index a8a2af6dfe9d..2a16e88e13de 100644 --- a/arch/riscv/include/asm/asm.h +++ b/arch/riscv/include/asm/asm.h @@ -91,7 +91,7 @@ #endif .macro asm_per_cpu dst sym tmp - REG_L \tmp, TASK_TI_CPU_NUM(tp) + lw \tmp, TASK_TI_CPU_NUM(tp) slli \tmp, \tmp, PER_CPU_OFFSET_SHIFT la \dst, __per_cpu_offset add \dst, \dst, \tmp