From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Date: Fri, 2 Feb 2018 17:34:19 +0000 (-0500)
Subject: x86/spectre: Now that we expose 'stbibp' make sure it is correct.
X-Git-Tag: v4.1.12-124.31.3~1149
X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=f017e7c7763fdfba7f29ed3ed219eab205b056ab;p=users%2Fjedix%2Flinux-maple.git

x86/spectre: Now that we expose 'stbibp' make sure it is correct.

Right now it is 'stipb' but that is not correct. It should
be 'stibp'

Orabug: 27477743
CVE: CVE-2017-5715

Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Reviewed-by: Pavel Tatashin <pasha.tatashin@oracle.com>
Reviewed-by: Darren Kenny <darren.kenny@oracle.com>
---

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 316b14fd0416..e61e725ec000 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -199,7 +199,7 @@
 #define X86_FEATURE_INTEL_PT	( 7*32+15) /* Intel Processor Trace */
 #define X86_FEATURE_RSB_CTXSW	( 7*32+19) /* "" Fill RSB on context switches */
 #define X86_FEATURE_IBRS	( 7*32+20) /* Control Speculation Control */
-#define X86_FEATURE_STIPB	( 7*32+21) /* Single Thread Indirect Branch Predictors */
+#define X86_FEATURE_STIBP	( 7*32+21) /* Single Thread Indirect Branch Predictors */
 #define X86_FEATURE_IA32_ARCH_CAPS	( 7*32+22) /* Control Speculation Control */
 #define X86_FEATURE_IBRS_ATT	( 7*32+23) /* IBRS all the time */
 
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index c1b207f5262f..29730c899534 100644
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -50,7 +50,7 @@ void init_scattered_cpuid_features(struct cpuinfo_x86 *c)
 		{ X86_FEATURE_CPB,		CR_EDX, 9, 0x80000007, 0 },
 		{ X86_FEATURE_PROC_FEEDBACK,	CR_EDX,11, 0x80000007, 0 },
 		{ X86_FEATURE_IBRS,		CR_EDX,26, 0x00000007, 0 },
-		{ X86_FEATURE_STIPB,            CR_EDX,27, 0x00000007, 0 },
+		{ X86_FEATURE_STIBP,            CR_EDX,27, 0x00000007, 0 },
 		{ X86_FEATURE_IA32_ARCH_CAPS,   CR_EDX,29, 0x00000007, 0 },
 		{ X86_FEATURE_NPT,		CR_EDX, 0, 0x8000000a, 0 },
 		{ X86_FEATURE_LBRV,		CR_EDX, 1, 0x8000000a, 0 },
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index aa49b40b1da8..099bc7a57018 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -445,7 +445,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
 			/* Aka !ibrs_supported and !ibpb_supported */
 			if ( !boot_cpu_has(X86_FEATURE_IBRS) )
 				entry->edx &= !(1u << KVM_CPUID_BIT_IBRS);
-			if ( !boot_cpu_has(X86_FEATURE_STIPB) )
+			if ( !boot_cpu_has(X86_FEATURE_STIBP) )
 				entry->edx &= !(1u << KVM_CPUID_BIT_STIBP);
 		} else {
 			entry->ebx = 0;