From: wdenk Date: Sat, 20 Jan 2001 01:23:52 +0000 (+0000) Subject: Changes for release 0.8.0; see CHANGELOG X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=ea79cfadb4367aae3abed95c87fdd8977bcf211f;p=users%2Frw%2Fppcboot.git Changes for release 0.8.0; see CHANGELOG --- diff --git a/CHANGELOG b/CHANGELOG index cc88474..2d0dcef 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -58,9 +58,114 @@ To do: (and it uses default address). ====================================================================== -Modifications since 0.7.3: +Modifications for 0.7.4: ====================================================================== +---------------------------------------------------------------------- +Flash Patch by Dave Ellis (17 Jan 2001 16:09:18 -0500) +---------------------------------------------------------------------- +- moved flash_protect(), addr2info() and flash_write() to + common/flash.c. They were very similar in each board/flash.c +- changed flash_protect() so it protects/unprotects sectors even if + only part of the sector is referenced +- some additional work on the boards (fads, sixnet, genietv and + sandpoint) that support FLASH_AM040 flash so it is clear + (particularly in flash_get_offsets()) that it is not a top or + bottom boot flash. It has 8 equal size sectors. +- fixed a minor error in doc/README.fads and made some readability + improvements to config_FADS860T.h +---------------------------------------------------------------------- + +---------------------------------------------------------------------- +Mega Patch by Murray Jensen (Fri, 19 Jan 2001 15:36:00 +1100) +---------------------------------------------------------------------- +- some hacking on Cogent platform - making some fairly major changes; not + tested at all yet +- much hacking on the hymod board support: + - fixed flash driver (Intel 28F320J5) + - fixed SDRAM initialisation + - added support for daughter board LEDs + - fixed problems with flash environment + - removed clearing of timebase registers; now done later in C code + - fixed FCC ethernet support +- added check for Ctrl-C in the memory test +- major overhaul of the GDB support. Here are the changes (from my CVS log): + - saved the processor state on first entry to kgdb so that the + monitor can be returned to even if a program was loaded and + the pc, sp etc were changed; made it use this when it received + the 'k' (kill process) packet + - made it use putc instead of serial_putc (and only if debugging + is turned on) + - minor aesthetic changes + - better debugging output so that packets aren't missed + - fixed bug in 'G' command whereby passed the number of hex + digits instead of the number of bytes (i.e. forgot to divide + by two) + - got rid of 'H' command, so that now it is considered as + unimplemented, rather than trying to support it right (we + ignored the command anyway - just parsed it) + - added support for the 'C' and 'S' commands; ignored the supplied + signal number and just did the same as 'c' and 's' (not sure if + this is the right thing to do yet) + - added support for the 's' packet providing an address argument + - added support for the 'P' packet, which sets an individual register + to a value (Pr=v where r and v are hex numbers) + - changed the interface to kgd_breakpoint() so that it supplied the + board info pointer and passed any arguments that were passed to + the "kgdb" monitor command; this means that programs compiled + similar to those in the "examples" directory will receive arguments + as expected + - added an alignment fault error code + - added support for floating point registers if 8260 cpu + - added a kgdb_putreg() function to set a single register, to support + the 'P' packet +- added dual port ram allocation to the 8260 code. Note that I did this + before the 8xx platform changes, so they are slightly different. The 8260 + platform code only uses dynamic allocation - you can't turn it off. I + considered grafting your static dual port ram scheme into the 8260 code + but decided there were better things to do. I based my code on the stuff + in the Linux kernel - so cpu/mpc8260/commproc.c is almost identical to + arch/ppc/8260/commproc.c, including the brg setting functions +- extensive hacking on the 8260 startup code: + - added lots of debugging support + - moved some initialisations to occur early in the startup + - zeroed out the initdata area - which led to discovery of an + interesting bug. the gcc stack frame is such that the function + you are entering actually saves its return address into the + previous stack frame. This meant that after setting up the stack + pointer in startup.S, the first call to a C function would actually + write above where the stack pointer was pointing (which happened + to be in the initdata area) and used the value it wrote upon return + from that C function. when I zeroed the initdata area in cpu_init_f() + it wrote zero over this spot and when cpu_init_f() returned, it + returned to zero! Needless to say this was a little difficult to + track down, but a single assembly line added to the startup fixed + this (simply allocated room for this on the stack after setting it + up). NOTE: the 8xx platform probably has a similar problem. +- hacked on the 8260 i2c driver: + - fixed rounding problem in i2c_roundrate() + - added support for DP ram dynamic allocation + - fixed i2c_doio() to check that there was actually a xmit or recv + queued before doing it +- hacked on 8260 serial_s[mc]c drivers: + - changed SCC driver to use different BRGs for different SCC ports + (i.e. SCC1->BRG1, SCC2->BRG2 + - changed both SCC and SMC to use the new dpram alloc and set brg + routines + - added independent kgdb serial support to both SCC and SMC + - removed ioport code in SMC driver (done in ioport config table) +- fixed bad comments in include/mpc8260.h +- added a program to generate a random, locally administered, ethernet address +---------------------------------------------------------------------- + +* Added configuration for AR405 and CANBT boards (Stefan Roese) + +* Fixed bug in cpci405/init.S + +* Added configuration for IVML24 boards (Speech Design) + +* Update/optimize ETX_094 config + * Add timeout handling to I2C code * Allow to overwrite CROSS_COMPILE setting when running MAKEALL diff --git a/MAKEALL b/MAKEALL index 23bdcb8..39962c9 100755 --- a/MAKEALL +++ b/MAKEALL @@ -10,9 +10,9 @@ fi LIST=" \ TQM823L TQM850L TQM855L TQM860L FPS850L SM850 \ - ETX094 SPD823TS IVMS8 \ + ETX094 SPD823TS IVMS8 IVML24 \ FADS823 FADS850SAR FADS860T MBX \ - CPCI405 ADCIOP \ + CPCI405 ADCIOP AR405 CANBT \ cogent_mpc8xx \ GENIETV \ SXNI855T \ diff --git a/Makefile b/Makefile index a97bced..5748201 100644 --- a/Makefile +++ b/Makefile @@ -62,6 +62,10 @@ ifeq ($(CPU),ppc4xx) OBJS += cpu/$(CPU)/resetvec.o endif +# include libcommon last for common low level functions referenced +# by the other libraries +OBJS += common/libcommon.a + ######################################################################### all: ppcboot.srec ppcboot.bin @@ -133,6 +137,14 @@ IVMS8_config: unconfig echo "CPU = mpc8xx" >>config.mk ; \ echo "#include " >config.h +IVML24_config: unconfig + @echo "Configuring for $(@:_config=) Board..." ; \ + cd include ; \ + echo "ARCH = ppc" > config.mk ; \ + echo "BOARD = ivms8" >>config.mk ; \ + echo "CPU = mpc8xx" >>config.mk ; \ + echo "#include " >config.h + SM850_config : unconfig @echo "Configuring for $(@:_config=) Board..." ; \ cd include ; \ @@ -286,7 +298,7 @@ clean: \( -name 'core' -o -name '*.bak' \ -o -name '*.o' -o -name '*.a' \) -print` rm -f examples/hello_world examples/timer - rm -f tools/img2srec tools/mkimage tools/envcrc + rm -f tools/img2srec tools/mkimage tools/envcrc tools/gen_eth_addr rm -f tools/easylogo/easylogo rm -f tools/gdb/astest tools/gdb/gdbcont tools/gdb/gdbsend diff --git a/board/adciop/flash.c b/board/adciop/flash.c index 00dec01..13a46af 100644 --- a/board/adciop/flash.c +++ b/board/adciop/flash.c @@ -29,21 +29,8 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ * Functions */ static ulong flash_get_size (vu_long *addr, flash_info_t *info); - -int flash_write (uchar *, ulong, ulong); -flash_info_t *addr2info (ulong); - -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt); static int write_word (flash_info_t *info, ulong dest, ulong data); static void flash_get_offsets (ulong base, flash_info_t *info); -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info); - -/*----------------------------------------------------------------------- - * Protection Flags: - */ -#define FLAG_PROTECT_SET 0x01 -#define FLAG_PROTECT_CLEAR 0x02 - #ifdef CONFIG_ADCIOP #define ADDR0 0x0aa9 @@ -113,10 +100,10 @@ unsigned long flash_init (void) flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]); /* monitor protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, - CFG_FLASH_BASE, - CFG_FLASH_BASE+CFG_MONITOR_LEN-1, - &flash_info[0]); + flash_protect(FLAG_PROTECT_SET, + CFG_FLASH_BASE, + CFG_FLASH_BASE+CFG_MONITOR_LEN-1, + &flash_info[0]); if (size_b1) { memctl->memc_or1 = CFG_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000); @@ -130,10 +117,10 @@ unsigned long flash_init (void) flash_get_offsets (CFG_FLASH_BASE + size_b0, &flash_info[1]); /* monitor protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, - CFG_FLASH_BASE, - CFG_FLASH_BASE+CFG_MONITOR_LEN-1, - &flash_info[1]); + flash_protect(FLAG_PROTECT_SET, + CFG_FLASH_BASE, + CFG_FLASH_BASE+CFG_MONITOR_LEN-1, + &flash_info[1]); } else { flash_info[1].flash_id = FLASH_UNKNOWN; flash_info[1].sector_count = -1; @@ -145,10 +132,10 @@ unsigned long flash_init (void) flash_get_offsets (FLASH_BASE0_PRELIM, &flash_info[0]); /* monitor protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, - FLASH_BASE0_PRELIM+size_b0-CFG_MONITOR_LEN, - FLASH_BASE0_PRELIM+size_b0-1, - &flash_info[0]); + flash_protect(FLAG_PROTECT_SET, + FLASH_BASE0_PRELIM+size_b0-CFG_MONITOR_LEN, + FLASH_BASE0_PRELIM+size_b0-1, + &flash_info[0]); if (size_b1) { /* Re-do sizing to get full correct info */ @@ -158,15 +145,15 @@ unsigned long flash_init (void) flash_get_offsets (FLASH_BASE0_PRELIM + size_b0, &flash_info[1]); /* monitor protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, - FLASH_BASE0_PRELIM+size_b0+size_b1-CFG_MONITOR_LEN, - FLASH_BASE0_PRELIM+size_b0+size_b1-1, - &flash_info[1]); + flash_protect(FLAG_PROTECT_SET, + FLASH_BASE0_PRELIM+size_b0+size_b1-CFG_MONITOR_LEN, + FLASH_BASE0_PRELIM+size_b0+size_b1-1, + &flash_info[1]); /* monitor protection OFF by default (one is enough) */ - (void)flash_protect(FLAG_PROTECT_CLEAR, - FLASH_BASE0_PRELIM+size_b0-CFG_MONITOR_LEN, - FLASH_BASE0_PRELIM+size_b0-1, - &flash_info[0]); + flash_protect(FLAG_PROTECT_CLEAR, + FLASH_BASE0_PRELIM+size_b0-CFG_MONITOR_LEN, + FLASH_BASE0_PRELIM+size_b0-1, + &flash_info[0]); } else { flash_info[1].flash_id = FLASH_UNKNOWN; flash_info[1].sector_count = -1; @@ -179,73 +166,13 @@ unsigned long flash_init (void) return (size_b0 + size_b1); } -/*----------------------------------------------------------------------- - * Check or set protection status for monitor sectors - * - * The monitor always occupies the _first_ part of the _first_ Flash bank. - */ -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info) -{ - ulong b_end = info->start[0] + info->size - 1; /* bank end address */ - int rc = 0; - int first = -1; - int last = -1; - int i; - - if (to < info->start[0]) { - return (0); - } - - for (i=0; isector_count; ++i) { - ulong end; /* last address in current sect */ - short s_end; - - s_end = info->sector_count - 1; - - end = (i == s_end) ? b_end : info->start[i + 1] - 1; - - if (from > end) { - continue; - } - if (to < info->start[i]) { - continue; - } - - if (from == info->start[i]) { - first = i; - if (last < 0) { - last = s_end; - } - } - if (to == end) { - last = i; - if (first < 0) { - first = 0; - } - } - } - - for (i=first; i<=last; ++i) { - if (flag & FLAG_PROTECT_CLEAR) { - info->protect[i] = 0; - } else if (flag & FLAG_PROTECT_SET) { - info->protect[i] = 1; - } - if (info->protect[i]) { - rc = 1; - } - } - return (rc); -} - - /*----------------------------------------------------------------------- */ static void flash_get_offsets (ulong base, flash_info_t *info) { int i; - /* set up sector start adress table */ + /* set up sector start address table */ if (info->flash_id & FLASH_BTYPE) { /* set sector offsets for bottom boot block type */ info->start[0] = base + 0x00000000; @@ -459,7 +386,7 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) } - /* set up sector start adress table */ + /* set up sector start address table */ if (info->flash_id & FLASH_BTYPE) { /* set sector offsets for bottom boot block type */ info->start[0] = base + 0x00000000; @@ -611,81 +538,6 @@ DONE: printf (" done\n"); } -/*----------------------------------------------------------------------- - */ - -flash_info_t *addr2info (ulong addr) -{ - flash_info_t *info; - int i; - - for (i=0, info=&flash_info[0]; i= info->start[0]) && - (addr <= (info->start[0] + info->size - 1)) ) { - return (info); - } - } - - return (NULL); -} - -/*----------------------------------------------------------------------- - * Copy memory to flash. - * Make sure all target addresses are within Flash bounds, - * and no protected sectors are hit. - * Returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - target range includes protected sectors - * 8 - target address not in Flash memory - */ -int flash_write (uchar *src, ulong addr, ulong cnt) -{ - int i; - ulong end = addr + cnt - 1; - flash_info_t *info_first = addr2info (addr); - flash_info_t *info_last = addr2info (end ); - flash_info_t *info; - - if (cnt == 0) { - return (0); - } - - if (!info_first || !info_last) { - return (8); - } - - for (info = info_first; info <= info_last; ++info) { - ulong b_end = info->start[0] + info->size; /* bank end addr */ - short s_end = info->sector_count - 1; - for (i=0; isector_count; ++i) { - ulong e_addr = (i == s_end) ? b_end : info->start[i + 1]; - - if ((end >= info->start[i]) && (addr < e_addr) && - (info->protect[i] != 0) ) { - return (4); - } - } - } - - /* finally write data to flash */ - for (info = info_first; info <= info_last && cnt>0; ++info) { - ulong len; - - len = info->start[0] + info->size - addr; - if (len > cnt) - len = cnt; - if ((i = write_buff(info, src, addr, len)) != 0) { - return (i); - } - cnt -= len; - addr += len; - src += len; - } - return (0); -} - /*----------------------------------------------------------------------- * Copy memory to flash, returns: * 0 - OK @@ -693,7 +545,7 @@ int flash_write (uchar *src, ulong addr, ulong cnt) * 2 - Flash not erased */ -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) { ulong cp, wp, data; int i, l, rc; diff --git a/board/ar405/Makefile b/board/ar405/Makefile new file mode 100644 index 0000000..12b2fa8 --- /dev/null +++ b/board/ar405/Makefile @@ -0,0 +1,47 @@ +# +# (C) Copyright 2000 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +OBJS = $(BOARD).o flash.o +SOBJS = init.o + +$(LIB): $(OBJS) $(SOBJS) + $(AR) crv $@ $^ + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +sinclude .depend + +######################################################################### diff --git a/board/ar405/ar405.c b/board/ar405/ar405.c new file mode 100644 index 0000000..221feb8 --- /dev/null +++ b/board/ar405/ar405.c @@ -0,0 +1,262 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include "ar405.h" +#include + + +/* ------------------------------------------------------------------------- */ + +#if 0 +#define FPGA_DEBUG +#endif + +#define FPGA_PRG_SLEEP 32 /* fpga program sleep-time */ + +#define IBM405GP_GPIO0_OR 0xef600700 /* GPIO Output */ +#define IBM405GP_GPIO0_TCR 0xef600704 /* GPIO Three-State Control */ +#define IBM405GP_GPIO0_ODR 0xef600718 /* GPIO Open Drain */ +#define IBM405GP_GPIO0_IR 0xef60071c /* GPIO Input */ + +/* fpga configuration data - generated by bit2inc */ +const unsigned char fpgadata[] = +{ +#include "fpgadata.c" +}; + + +/****************************************************************************** + * + * fpga_boot - Load fpga-image into fpga + * + */ +static int fpga_boot(void) +{ + int i,j,index,len; + unsigned char b; + int size = sizeof(fpgadata); + + /* display infos on fpgaimage */ + index = 15; + for (i=0; i<4; i++) + { + len = fpgadata[index]; +#ifdef FPGA_DEBUG + printf("FPGA: %s\n", &(fpgadata[index+1])); +#endif + index += len+3; + } + + /* search for preamble 0xFF2X */ + for (index = 0; index < size-1 ; index++) + { + if ((fpgadata[index] == 0xff) && ((fpgadata[index+1] & 0xf0) == 0x20)) + break; + } +#ifdef FPGA_DEBUG + printf("FPGA: configdata starts at position 0x%x\n",index); + printf("FPGA: length of fpga-data %d\n", size-index); +#endif + + /* + * Setup port pins for fpga programming + */ + out32(IBM405GP_GPIO0_ODR, 0x00000000); /* no open drain pins */ + out32(IBM405GP_GPIO0_TCR, 0x07000000); /* setup for output */ + out32(IBM405GP_GPIO0_OR, 0x07000000); /* set output pins to high (default) */ + +#ifdef FPGA_DEBUG + printf("%s\n",((in32(IBM405GP_GPIO0_IR) & 0x00800000) == 0) ? "NOT DONE" : "DONE" ); +#endif + + /* + * Init fpga by asserting and deasserting PROGRAM* + */ + out32(IBM405GP_GPIO0_OR, 0x03000000); + udelay(FPGA_PRG_SLEEP*1000); +#ifdef FPGA_DEBUG + printf("%s\n",((in32(IBM405GP_GPIO0_IR) & 0x00800000) == 0) ? "NOT DONE" : "DONE" ); +#endif + out32(IBM405GP_GPIO0_OR, 0x07000000); + udelay(FPGA_PRG_SLEEP*1000); +#ifdef FPGA_DEBUG + printf("%s\n",((in32(IBM405GP_GPIO0_IR) & 0x00800000) == 0) ? "NOT DONE" : "DONE" ); +#endif + + /* write configuration-data into fpga... */ + for (i=index; i +#include +#include + +flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ + +/*----------------------------------------------------------------------- + * Functions + */ +static ulong flash_get_size (vu_long *addr, flash_info_t *info); + +int flash_write (uchar *, ulong, ulong); +flash_info_t *addr2info (ulong); + +static int write_word (flash_info_t *info, ulong dest, ulong data); +static void flash_get_offsets (ulong base, flash_info_t *info); + +/*----------------------------------------------------------------------- + * Protection Flags: + */ +#define FLAG_PROTECT_SET 0x01 +#define FLAG_PROTECT_CLEAR 0x02 + + +#ifdef CONFIG_ADCIOP +#define ADDR0 0x0aa9 +#define ADDR1 0x0556 +#define FLASH_WORD_SIZE unsigned char +#endif + +#if defined (CONFIG_CPCI405) || (CONFIG_AR405) +#define ADDR0 0x5555 +#define ADDR1 0x2aaa +#define FLASH_WORD_SIZE unsigned short +#endif + +/*----------------------------------------------------------------------- + */ + +unsigned long flash_init (void) +{ + unsigned long size_b0, size_b1; + int i; + uint pbcr; + unsigned long base_b0, base_b1; + + /* Init: no FLASHes known */ + for (i=0; iflash_id & FLASH_VENDMASK) == FLASH_MAN_SST) { + for (i = 0; i < info->sector_count; i++) + info->start[i] = base + (i * 0x00010000); + } else { + if (info->flash_id & FLASH_BTYPE) { + /* set sector offsets for bottom boot block type */ + info->start[0] = base + 0x00000000; + info->start[1] = base + 0x00004000; + info->start[2] = base + 0x00006000; + info->start[3] = base + 0x00008000; + for (i = 4; i < info->sector_count; i++) { + info->start[i] = base + (i * 0x00010000) - 0x00030000; + } + } else { + /* set sector offsets for top boot block type */ + i = info->sector_count - 1; + info->start[i--] = base + info->size - 0x00004000; + info->start[i--] = base + info->size - 0x00006000; + info->start[i--] = base + info->size - 0x00008000; + for (; i >= 0; i--) { + info->start[i] = base + i * 0x00010000; + } + } + } +} + +/*----------------------------------------------------------------------- + */ +void flash_print_info (flash_info_t *info) +{ + int i; + int k; + int size; + int erased; + volatile unsigned long *flash; + + if (info->flash_id == FLASH_UNKNOWN) { + printf ("missing or unknown FLASH type\n"); + return; + } + + switch (info->flash_id & FLASH_VENDMASK) { + case FLASH_MAN_AMD: printf ("AMD "); break; + case FLASH_MAN_FUJ: printf ("FUJITSU "); break; + case FLASH_MAN_SST: printf ("SST "); break; + default: printf ("Unknown Vendor "); break; + } + + switch (info->flash_id & FLASH_TYPEMASK) { + case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n"); + break; + case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n"); + break; + case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n"); + break; + case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n"); + break; + case FLASH_SST800A: printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n"); + break; + case FLASH_SST160A: printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n"); + break; + default: printf ("Unknown Chip Type\n"); + break; + } + + printf (" Size: %ld MB in %d Sectors\n", + info->size >> 20, info->sector_count); + + printf (" Sector Start Addresses:"); + for (i=0; isector_count; ++i) { + /* + * Check if whole sector is erased + */ + if (i != (info->sector_count-1)) + size = info->start[i+1] - info->start[i]; + else + size = info->start[0] + info->size - info->start[i]; + erased = 1; + flash = (volatile unsigned long *)info->start[i]; + size = size >> 2; /* divide by 4 for longword access */ + for (k=0; kstart[i], + info->protect[i] ? " (RO)" : " " +#else + printf (" %08lX%s%s", + info->start[i], + erased ? " E" : " ", + info->protect[i] ? "RO " : " " +#endif + ); + } + printf ("\n"); +} + +/*----------------------------------------------------------------------- + */ + + +/*----------------------------------------------------------------------- + */ + +/* + * The following code cannot be run from FLASH! + */ +static ulong flash_get_size (vu_long *addr, flash_info_t *info) +{ + short i; + FLASH_WORD_SIZE value; + ulong base = (ulong)addr; + volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr; + + /* Write auto select command: read Manufacturer ID */ + addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; + addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055; + addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090; + +#ifdef CONFIG_ADCIOP + value = addr2[2]; +#else + value = addr2[0]; +#endif + + switch (value) { + case (FLASH_WORD_SIZE)AMD_MANUFACT: + info->flash_id = FLASH_MAN_AMD; + break; + case (FLASH_WORD_SIZE)FUJ_MANUFACT: + info->flash_id = FLASH_MAN_FUJ; + break; + case (FLASH_WORD_SIZE)SST_MANUFACT: + info->flash_id = FLASH_MAN_SST; + break; + default: + info->flash_id = FLASH_UNKNOWN; + info->sector_count = 0; + info->size = 0; + return (0); /* no or unknown flash */ + } + +#ifdef CONFIG_ADCIOP + value = addr2[0]; /* device ID */ + // printf("\ndev_code=%x\n", value); +#else + value = addr2[1]; /* device ID */ +#endif + + switch (value) { + case (FLASH_WORD_SIZE)AMD_ID_LV400T: + info->flash_id += FLASH_AM400T; + info->sector_count = 11; + info->size = 0x00080000; + break; /* => 0.5 MB */ + + case (FLASH_WORD_SIZE)AMD_ID_LV400B: + info->flash_id += FLASH_AM400B; + info->sector_count = 11; + info->size = 0x00080000; + break; /* => 0.5 MB */ + + case (FLASH_WORD_SIZE)AMD_ID_LV800T: + info->flash_id += FLASH_AM800T; + info->sector_count = 19; + info->size = 0x00100000; + break; /* => 1 MB */ + + case (FLASH_WORD_SIZE)AMD_ID_LV800B: + info->flash_id += FLASH_AM800B; + info->sector_count = 19; + info->size = 0x00100000; + break; /* => 1 MB */ + + case (FLASH_WORD_SIZE)AMD_ID_LV160T: + info->flash_id += FLASH_AM160T; + info->sector_count = 35; + info->size = 0x00200000; + break; /* => 2 MB */ + + case (FLASH_WORD_SIZE)AMD_ID_LV160B: + info->flash_id += FLASH_AM160B; + info->sector_count = 35; + info->size = 0x00200000; + break; /* => 2 MB */ +#if 0 /* enable when device IDs are available */ + case (FLASH_WORD_SIZE)AMD_ID_LV320T: + info->flash_id += FLASH_AM320T; + info->sector_count = 67; + info->size = 0x00400000; + break; /* => 4 MB */ + + case (FLASH_WORD_SIZE)AMD_ID_LV320B: + info->flash_id += FLASH_AM320B; + info->sector_count = 67; + info->size = 0x00400000; + break; /* => 4 MB */ +#endif + case (FLASH_WORD_SIZE)SST_ID_xF800A: + info->flash_id += FLASH_SST800A; + info->sector_count = 16; + info->size = 0x00100000; + break; /* => 1 MB */ + + case (FLASH_WORD_SIZE)SST_ID_xF160A: + info->flash_id += FLASH_SST160A; + info->sector_count = 32; + info->size = 0x00200000; + break; /* => 2 MB */ + + default: + info->flash_id = FLASH_UNKNOWN; + return (0); /* => no or unknown flash */ + + } + + /* set up sector start adress table */ + if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) { + for (i = 0; i < info->sector_count; i++) + info->start[i] = base + (i * 0x00010000); + } else { + if (info->flash_id & FLASH_BTYPE) { + /* set sector offsets for bottom boot block type */ + info->start[0] = base + 0x00000000; + info->start[1] = base + 0x00004000; + info->start[2] = base + 0x00006000; + info->start[3] = base + 0x00008000; + for (i = 4; i < info->sector_count; i++) { + info->start[i] = base + (i * 0x00010000) - 0x00030000; + } + } else { + /* set sector offsets for top boot block type */ + i = info->sector_count - 1; + info->start[i--] = base + info->size - 0x00004000; + info->start[i--] = base + info->size - 0x00006000; + info->start[i--] = base + info->size - 0x00008000; + for (; i >= 0; i--) { + info->start[i] = base + i * 0x00010000; + } + } + } + + /* check for protected sectors */ + for (i = 0; i < info->sector_count; i++) { + /* read sector protection at sector address, (A7 .. A0) = 0x02 */ + /* D0 = 1 if protected */ +#ifdef CONFIG_ADCIOP + addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]); + info->protect[i] = addr2[4] & 1; +#else + addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]); + if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) + info->protect[i] = 0; + else + info->protect[i] = addr2[2] & 1; +#endif + } + + /* + * Prevent writes to uninitialized FLASH. + */ + if (info->flash_id != FLASH_UNKNOWN) { + addr2 = (FLASH_WORD_SIZE *)info->start[0]; + *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ + } + + return (info->size); +} + + +/*----------------------------------------------------------------------- + */ + +void flash_erase (flash_info_t *info, int s_first, int s_last) +{ + volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]); + volatile FLASH_WORD_SIZE *addr2; + int flag, prot, sect, l_sect; + ulong start, now, last; + int i; + + if ((s_first < 0) || (s_first > s_last)) { + if (info->flash_id == FLASH_UNKNOWN) { + printf ("- missing\n"); + } else { + printf ("- no sectors to erase\n"); + } + return; + } + + if (info->flash_id == FLASH_UNKNOWN) { + printf ("Can't erase unknown flash type - aborted\n"); + return; + } + + prot = 0; + for (sect=s_first; sect<=s_last; ++sect) { + if (info->protect[sect]) { + prot++; + } + } + + if (prot) { + printf ("- Warning: %d protected sectors will not be erased!\n", + prot); + } else { + printf ("\n"); + } + + l_sect = -1; + + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts(); + + /* Start erase on unprotected sectors */ + for (sect = s_first; sect<=s_last; sect++) { + if (info->protect[sect] == 0) { /* not protected */ + addr2 = (FLASH_WORD_SIZE *)(info->start[sect]); + if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) { + addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; + addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; + addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080; + addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; + addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; + addr2[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */ + for (i=0; i<50; i++) + udelay(1000); /* wait 1 ms */ + } else { + addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; + addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; + addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080; + addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; + addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; + addr2[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */ + } + l_sect = sect; + } + } + + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); + + /* wait at least 80us - let's wait 1 ms */ + udelay (1000); + + /* + * We wait for the last triggered sector + */ + if (l_sect < 0) + goto DONE; + + start = get_timer (0); + last = start; + addr = (FLASH_WORD_SIZE *)(info->start[l_sect]); + while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) { + if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + printf ("Timeout\n"); + return; + } + /* show that we're waiting */ + if ((now - last) > 1000) { /* every second */ + putc ('.'); + last = now; + } + } + +DONE: + /* reset to read mode */ + addr = (FLASH_WORD_SIZE *)info->start[0]; + addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ + + printf (" done\n"); +} + + +/*----------------------------------------------------------------------- + * Copy memory to flash, returns: + * 0 - OK + * 1 - write timeout + * 2 - Flash not erased + */ + +int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +{ + ulong cp, wp, data; + int i, l, rc; + + wp = (addr & ~3); /* get lower word aligned address */ + + /* + * handle unaligned start bytes + */ + if ((l = addr - wp) != 0) { + data = 0; + for (i=0, cp=wp; i0; ++i) { + data = (data << 8) | *src++; + --cnt; + ++cp; + } + for (; cnt==0 && i<4; ++i, ++cp) { + data = (data << 8) | (*(uchar *)cp); + } + + if ((rc = write_word(info, wp, data)) != 0) { + return (rc); + } + wp += 4; + } + + /* + * handle word aligned part + */ + while (cnt >= 4) { + data = 0; + for (i=0; i<4; ++i) { + data = (data << 8) | *src++; + } + if ((rc = write_word(info, wp, data)) != 0) { + return (rc); + } + wp += 4; + cnt -= 4; + } + + if (cnt == 0) { + return (0); + } + + /* + * handle unaligned tail bytes + */ + data = 0; + for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { + data = (data << 8) | *src++; + --cnt; + } + for (; i<4; ++i, ++cp) { + data = (data << 8) | (*(uchar *)cp); + } + + return (write_word(info, wp, data)); +} + +/*----------------------------------------------------------------------- + * Write a word to Flash, returns: + * 0 - OK + * 1 - write timeout + * 2 - Flash not erased + */ +static int write_word (flash_info_t *info, ulong dest, ulong data) +{ + volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]); + volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest; + volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data; + ulong start; + int flag; + int i; + + /* Check if Flash is (sufficiently) erased */ + if ((*((volatile FLASH_WORD_SIZE *)dest) & + (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) { + return (2); + } + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts(); + + for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++) + { + addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; + addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055; + addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0; + + dest2[i] = data2[i]; + + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); + + /* data polling for D7 */ + start = get_timer (0); + while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != + (data2[i] & (FLASH_WORD_SIZE)0x00800080)) { + if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + return (1); + } + } + } + + return (0); +} + +/*----------------------------------------------------------------------- + */ diff --git a/board/ar405/fpgadata.c b/board/ar405/fpgadata.c new file mode 100644 index 0000000..376d4a4 --- /dev/null +++ b/board/ar405/fpgadata.c @@ -0,0 +1,2589 @@ + 0x00,0x09,0x0f,0xf0,0x0f,0xf0,0x0f,0xf0,0x0f,0xf0,0x00,0x00,0x01,0x61,0x00,0x0d, + 0x70,0x70,0x63,0x5f,0x61,0x72,0x30,0x31,0x2e,0x6e,0x63,0x64,0x00,0x62,0x00,0x0b, + 0x73,0x34,0x30,0x78,0x6c,0x70,0x71,0x32,0x34,0x30,0x00,0x63,0x00,0x0b,0x32,0x30, + 0x30,0x30,0x2f,0x31,0x32,0x2f,0x30,0x37,0x00,0x64,0x00,0x09,0x31,0x38,0x3a,0x35, + 0x37,0x3a,0x33,0x34,0x00,0x65,0x00,0x00,0xa1,0x79,0xff,0x20,0x50,0xbc,0x1f,0x5b, + 0xff,0xfe,0xff,0xbf,0xeb,0xfb,0x7b,0xdf,0xbf,0xef,0xef,0x7b,0xff,0xef,0xed,0xef, + 0xff,0xfe,0xff,0xef,0xfb,0xfe,0xd6,0xbd,0xef,0x7b,0xde,0xf7,0xfd,0xef,0x7b,0xde, + 0xd6,0xbd,0xee,0xee,0xff,0x8f,0xff,0xb6,0xed,0xbb,0x6e,0xff,0xef,0xfb,0xbb,0x6e, + 0xdf,0xef,0xfb,0xeb,0xff,0xff,0xbb,0xbf,0xfe,0xdf,0xbb,0xee,0xff,0xbf,0xff,0xff, + 0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0xbf,0xff,0xbf,0xff,0xed,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xff, + 0xff,0xf8,0x3f,0xff,0xa7,0xe9,0xfa,0x7e,0xff,0xbd,0xed,0xfa,0x7e,0xbf,0xbf,0x8f, + 0xdb,0xfe,0xff,0xbf,0x0f,0x7e,0xbf,0xbf,0xef,0x7b,0xfe,0xff,0xbf,0xef,0xfb,0xd6, + 0xf7,0xbf,0xef,0xfb,0xfe,0xff,0xbf,0xff,0x57,0xff,0xbf,0xbf,0xef,0xfb,0xfe,0xff, + 0xbf,0xef,0xfb,0xfe,0x7f,0x9b,0xe3,0xfb,0xbe,0x7f,0x83,0xef,0xfe,0x7f,0x9f,0xee, + 0xf9,0xbe,0x6f,0x9b,0xe6,0xf9,0xbe,0xef,0x9b,0xe6,0xf9,0xbe,0x7f,0xbf,0xf2,0xff, + 0xfd,0xf7,0x7d,0xdf,0x7f,0xff,0xff,0xfd,0xdf,0x77,0xff,0xff,0xfe,0xff,0xff,0xff, + 0xfa,0xff,0x97,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xfe,0x97,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x83,0xff,0xfd,0xff,0x7f, + 0xdf,0xff,0xff,0xff,0xff,0xdf,0xf7,0xff,0xff,0xfb,0xff,0xff,0xff,0xef,0xfe,0xf7, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0x5f,0xff,0xfb,0xfe,0xff,0xbf,0xdf,0xff,0xfe,0xff,0xbf,0xf7,0xff,0xff, + 0xff,0x7f,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xcf, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xee,0x2b,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xc1,0x7f, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf3,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xfe,0x3f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xfa,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x97,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0x3f, + 0xff,0xfb,0xfc,0xff,0xff,0xcf,0xff,0xfd,0xfd,0xff,0xaf,0xff,0xfc,0xff,0xfb,0xff, + 0xfb,0xe4,0xff,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0x7f,0xdf, + 0xf7,0xfd,0x7f,0x3d,0xdf,0xfd,0x7f,0x5d,0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xf3,0xfd, + 0xff,0x7f,0xdf,0xf7,0xfd,0xff,0x7f,0xbf,0xdf,0xff,0xef,0xfb,0xee,0xff,0xbe,0xef, + 0xfb,0xee,0xff,0xbf,0xef,0xfb,0xee,0xff,0xbe,0xef,0xdb,0xfa,0xbf,0xef,0xeb,0xf6, + 0xff,0xbf,0xab,0xfa,0xfe,0xf7,0xbf,0xab,0xfa,0xf6,0xff,0xbf,0xef,0xff,0xab,0xbf, + 0xe7,0xe9,0xfe,0x7f,0x9f,0xe7,0xf1,0xbe,0x7f,0x9e,0xe7,0xf9,0xbe,0x7f,0x9f,0xe7, + 0xf9,0xde,0x9f,0xe7,0xf1,0xfe,0x7f,0x9f,0xe7,0xf9,0xfe,0x7f,0x9f,0xe7,0xf9,0xee, + 0x7d,0x9f,0xe7,0xff,0xf9,0x7f,0xff,0xbf,0xef,0xfb,0xfe,0xff,0xbf,0xef,0xfb,0xfe, + 0xef,0xbf,0xef,0xf9,0xfe,0xff,0xbb,0x6f,0xc6,0xef,0xbf,0x6f,0xdb,0xfe,0xbd,0xbf, + 0xef,0x5b,0xfe,0xf9,0xbf,0xef,0xdb,0xfe,0xff,0xbf,0x7f,0xee,0x9b,0x9f,0xe7,0xf9, + 0xfe,0x7b,0x9f,0xe7,0xf9,0xfe,0x7f,0x9f,0xe7,0xf9,0xfe,0x7f,0x9d,0xef,0xee,0xf7, + 0x9d,0xef,0xfb,0x9e,0x7f,0xbf,0xe7,0xfb,0xee,0x7f,0xbf,0xe7,0xfb,0xfe,0x7f,0x9f, + 0xed,0xc5,0xff,0xfd,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0x7f, + 0xdf,0xf7,0xfd,0xff,0x7f,0xf7,0xfd,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xf7, + 0xfd,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0x7a,0x3f,0x7e,0xff,0xbf,0xef,0xeb,0xfe,0xff, + 0xbf,0xef,0xbb,0xfe,0xff,0xbf,0xef,0xfb,0xfe,0xff,0xdf,0xed,0xfe,0xff,0xdf,0xf7, + 0xb3,0xff,0x7f,0xbf,0xb7,0xfb,0xff,0x7f,0xbf,0xf7,0xdb,0xfe,0xff,0xbf,0xd6,0xff, + 0x9b,0xf6,0xfd,0xbf,0x6f,0xdb,0xf6,0xfd,0xbb,0x6f,0x5b,0xf6,0xfd,0xbf,0x6f,0xdb, + 0xfe,0xff,0xef,0xdb,0xfe,0xff,0xbf,0x6f,0xfb,0xf6,0xff,0xbf,0x6f,0xfb,0xf6,0xff, + 0xbf,0x6f,0xdb,0xff,0xe4,0xef,0xff,0xff,0xf7,0xff,0xfd,0xff,0xff,0xff,0xf7,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xcd,0xff,0xfe,0x7f,0xb7,0xff,0xfb,0xfd, + 0xff,0xb7,0xff,0xf7,0xfd,0xf7,0xbe,0xff,0xff,0xff,0xe5,0x1f,0xff,0xff,0xff,0xff, + 0xff,0xbf,0xff,0xff,0xfd,0xff,0xff,0xfb,0xff,0xff,0xbf,0xff,0xe7,0xff,0xff,0xbf, + 0xfd,0xff,0x75,0xff,0xdf,0xfb,0xff,0xff,0xff,0xf6,0xff,0xff,0xf7,0xff,0xef,0xff, + 0xfe,0xc2,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xe7,0xfd,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xfd,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xfe,0xff,0xff, + 0xf7,0xff,0xff,0xff,0xff,0xff,0xbf,0xf1,0x7f,0xff,0xfd,0xfb,0xff,0xdf,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xfb,0xfe,0xff,0xff,0xff,0xff,0x3f,0xff, + 0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0xf6,0x2f,0xff, + 0xf7,0xfc,0xf7,0x7f,0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0x7f,0xc7,0xf7, + 0xfd,0xff,0xdf,0xf7,0xf5,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0x7f,0xd7,0xf7,0xfd,0xff, + 0x7f,0xdf,0xf7,0xff,0xc9,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xfb, + 0xfe,0xff,0xff,0xff,0xff,0xff,0x7d,0xff,0xdf,0xf7,0xfd,0xff,0x6f,0xdf,0xbc,0xf5, + 0x3f,0xff,0xf3,0xb4,0xfc,0x9b,0xff,0xfb,0xff,0x7f,0x7d,0x3f,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xbf,0xef,0xff,0xfe,0xff,0xff,0xff,0xdf,0xfe,0xff,0xfd,0xff, + 0xff,0xdf,0xf7,0xfd,0xff,0xff,0xdf,0xbf,0xef,0xfb,0xfe,0xff,0xff,0xef,0xfb,0xff, + 0xff,0x87,0xef,0xff,0xff,0xff,0xff,0xff,0x5f,0xff,0xff,0xff,0x7f,0xdf,0xff,0xff, + 0xff,0xff,0xff,0xfb,0xb6,0xff,0xef,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xfd,0xfe, + 0xef,0xfb,0xff,0xff,0x7f,0xff,0xff,0xf6,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xfd, + 0xff,0xff,0xdf,0xdf,0xff,0xfd,0xff,0x7f,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xfe,0xff,0xff,0xff,0xff,0x7d,0xdf,0xff, + 0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb, + 0xff,0xfb,0xfb,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0xff, + 0xf7,0xfe,0xf7,0xef,0xdb,0xff,0xff,0xdf,0xff,0xff,0xff,0xef,0xfb,0xff,0xff,0xff, + 0xcf,0xff,0xff,0xff,0xef,0xff,0xbf,0xff,0xf7,0xfd,0xff,0xfe,0xaf,0xff,0xef,0xf9, + 0xfe,0x3f,0xaf,0xa7,0xfa,0xff,0xbf,0xaf,0xff,0xff,0xfc,0x7f,0xff,0xff,0xff,0xff, + 0xff,0xff,0x9f,0xef,0xff,0xff,0xff,0xbf,0xff,0xff,0x7f,0xff,0xff,0xfb,0xef,0xff, + 0xff,0xff,0xbb,0xff,0xff,0xbf,0xfb,0xef,0xfe,0xff,0xff,0x6f,0xdf,0xf5,0xff,0xff, + 0xff,0x2f,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xff, + 0xfe,0xf7,0xff,0x7e,0xff,0xf7,0xff,0xff,0xdb,0xff,0xbf,0xf7,0xff,0xbf,0xfe,0xff, + 0xf7,0xff,0xbf,0xbf,0xf7,0xef,0xfe,0xf9,0xff,0xff,0xdf,0xdf,0xff,0xff,0xff,0xff, + 0xbf,0xff,0x7f,0xfe,0xfd,0xbf,0xff,0xff,0xff,0xff,0xef,0xfd,0x3f,0xff,0xbf,0xff, + 0xcf,0xdf,0xff,0xff,0xff,0x7f,0xef,0xff,0xfb,0xee,0xff,0xf1,0xfe,0xfe,0xbf,0xff, + 0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xfe,0xbf,0xff,0xff,0xff,0xf7, + 0xfe,0xff,0xdf,0xff,0xff,0xff,0x9e,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xbf,0xff,0xff,0xf7,0xd7,0xfd,0xff,0xff,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xee,0x3d,0xff,0x75,0xff,0xff,0xff,0xef,0xff, + 0xff,0xff,0xfe,0xee,0xff,0xfc,0xff,0xff,0xff,0xff,0xe4,0xbf,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xe6,0xff, + 0xbf,0xef,0xff,0xff,0xdf,0x7f,0xff,0xff,0xff,0xff,0x7f,0xff,0xf7,0xff,0xff,0xff, + 0xfd,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7d,0xff,0xf7,0xff, + 0xff,0xfb,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0x7f,0xdf,0xff, + 0xfd,0xbf,0xfb,0xff,0xfb,0xfb,0xff,0xab,0xff,0xff,0xff,0x7b,0xff,0xff,0xff,0xff, + 0xff,0xff,0xef,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xbf,0xff, + 0xfb,0xff,0x7f,0xff,0xff,0xfd,0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xfb,0x7f,0xef, + 0xff,0xff,0xff,0xbf,0xff,0xff,0xff,0xff,0xfe,0xff,0xfb,0xeb,0xff,0xff,0xff,0xfb, + 0xff,0xef,0xff,0xfe,0xfd,0xff,0xff,0xdf,0xff,0xfb,0xff,0xff,0xff,0xff,0xfa,0xbf, + 0xff,0xff,0xfb,0xff,0x83,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xfe,0xf9,0xf3,0xef,0x7c,0xed,0x73,0x5e,0xcb,0xbf,0xf9,0xfb,0xff, + 0xd7,0xbf,0xff,0xfb,0xfd,0xcf,0xbf,0xf1,0xf3,0xff,0x21,0xab,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xf3,0xbf,0xff,0xff,0xdf,0x97,0xfd,0xff,0xda,0x9f, + 0xe7,0xdf,0x77,0xff,0xaf,0x7f,0xf3,0xf7,0xff,0xaf,0xff,0xfa,0xf7,0xe7,0xaf,0xff, + 0x5b,0xbd,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbc,0xff,0xff, + 0xfb,0xf2,0xcf,0xbd,0xfb,0xff,0xec,0xaf,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xfe, + 0xaf,0xff,0xff,0x9e,0xff,0xef,0xef,0xc6,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xdf,0xbf,0xff,0xff,0x7e,0xef,0xf7,0xff,0x7f,0xff,0x95,0xfd,0xff, + 0xff,0xff,0xff,0xff,0xff,0xfe,0x57,0xff,0xff,0xf9,0x5f,0xff,0xff,0x7e,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xf9,0xbb,0x7f,0xef,0xef,0x2c, + 0xf7,0xef,0x7f,0xff,0xf7,0xbd,0xeb,0xff,0xdf,0xff,0xfd,0xff,0xff,0xdf,0xff,0xfd, + 0xfb,0x32,0xff,0xff,0x9b,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0x77,0x3f,0xff,0xfd,0xdf,0x7e,0x9d,0xf9,0xdf,0xff,0xfd,0xf7,0x7d,0x5f,0xff,0xff, + 0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0x6f,0x57,0xfd,0xb9,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xef,0xe7,0xff,0xbf,0xed,0xfb,0xff,0xbd,0xff, + 0xfa,0xfe,0xf5,0xaf,0xff,0xff,0xff,0xf5,0x7f,0xea,0xff,0xf5,0xff,0xef,0xeb,0xff, + 0xe4,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xfe,0xbf, + 0xf7,0xff,0xba,0x70,0xe7,0x3f,0xff,0x53,0xdc,0x15,0xff,0xcf,0xff,0xfc,0xbf,0xfd, + 0x6f,0xfc,0xfc,0xf5,0xfd,0x7f,0xfe,0x0f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0x9f,0xff,0xff,0xf7,0xfd,0xff,0xdf,0xfe,0xfd,0xff,0x7f, + 0xff,0xf7,0xff,0xff,0x7b,0xff,0xf7,0xff,0xff,0x7f,0xf9,0xff,0xff,0xed,0xff,0xbf, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0x9f,0xff,0xff,0xff,0x6f, + 0x9f,0xf9,0xff,0xeb,0x9f,0xe7,0xff,0xfe,0x7f,0xff,0xe7,0xff,0xfe,0x7f,0xff,0xe7, + 0xff,0xff,0xff,0xfb,0x9f,0xfb,0xbf,0xef,0xfb,0xfe,0xff,0xbf,0xef,0xfb,0xd6,0xfb, + 0xbd,0x65,0xfb,0xfe,0xdf,0xb3,0xe7,0xf6,0x7f,0xbe,0xe7,0xf9,0xfe,0xff,0x9f,0xef, + 0xf9,0xfe,0xff,0x87,0xef,0xf9,0xf6,0xff,0xbf,0x7e,0xe6,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xef,0xff,0xff,0xff,0xbf,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf6,0xff,0xff,0xcf, + 0x70,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0xef,0xff,0xff, + 0xff,0xef,0xff,0xef,0xde,0xff,0xff,0xef,0xfb,0xff,0xff,0xbf,0xff,0xfb,0xff,0xff, + 0xff,0xff,0xfa,0xff,0xff,0xef,0xfc,0x5f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xfd,0x7f,0xfe,0xd5,0xff,0xff,0xfb,0xcf,0xf8,0xff,0x8e,0x5f,0xf8,0xfe,0x3f, + 0xff,0xe3,0xff,0xfe,0x3f,0xff,0xe3,0xff,0xfe,0x3d,0x7f,0xff,0xff,0xf3,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xa7,0xff,0xfa,0x2f,0xff,0xff,0xec,0xbf, + 0xbf,0xfb,0xe9,0xff,0xbf,0xef,0xff,0xfe,0xff,0xff,0xef,0xff,0xfe,0xff,0xff,0xef, + 0xab,0xff,0xf9,0x99,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf5,0xff, + 0xff,0x57,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xf7,0xfd,0xff,0xff,0xff,0xb7,0xff, + 0xfd,0xff,0xff,0xb7,0xff,0xfb,0x7d,0xff,0xff,0xff,0x6f,0xff,0xff,0x9f,0xe7,0xf9, + 0xfe,0x7f,0x9f,0xe7,0xf8,0xbe,0x7f,0x8b,0xe7,0xf9,0xfe,0x7f,0x9d,0x87,0xd8,0x7f, + 0x9d,0x87,0x61,0xfe,0x7e,0x1f,0xe7,0xe1,0xfe,0x7e,0x1f,0xe7,0xe0,0xfe,0x7f,0x8f, + 0x75,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xd7,0xff,0xfd,0x7f,0xff, + 0xff,0xfd,0xff,0xbf,0xfb,0xf4,0xff,0xbf,0xe7,0xff,0xff,0xff,0xff,0xff,0xff,0xfe, + 0xff,0xff,0xff,0xf7,0xff,0xfe,0xe9,0x3f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xfa,0xff,0xff,0xad,0xff,0xff,0xfe,0xf7,0xfc,0xdf,0xcc,0x9f,0xf4,0xdf,0x37, + 0xff,0xf3,0x7f,0xff,0x37,0xff,0xf3,0x7f,0xff,0x33,0xdf,0xff,0xff,0x07,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xf5,0xff,0xff,0xff,0xff,0xfe, + 0xe6,0xee,0x7f,0xff,0xe7,0xf9,0xff,0xff,0x9f,0xff,0xf9,0xff,0xfb,0x9f,0xff,0xf9, + 0xdf,0xff,0xff,0xf6,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xeb,0xff, + 0xfe,0xff,0xff,0xff,0xff,0xff,0xfa,0x7f,0xa7,0x7f,0xfa,0x7e,0x9f,0xff,0xe9,0xff, + 0xfe,0x9f,0xff,0xe9,0xff,0xfe,0x8f,0xff,0xff,0xfc,0x9f,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xcb,0xff,0xfe,0xbf,0xcf,0xcb,0xfc,0xbf,0xff, + 0xff,0xf6,0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xbf,0xff,0xff, + 0xeb,0xff,0xfe,0xbf,0xaf,0xeb,0xfa,0xfe,0xbf,0xab,0xcb,0xfa,0xbe,0xbd,0x2d,0xeb, + 0xfa,0xfe,0xbb,0xaf,0xba,0x7e,0xaf,0xaf,0xaa,0xfa,0xfe,0xbf,0xaf,0xeb,0xfa,0xfe, + 0xaf,0xaf,0xeb,0xfa,0xfe,0xbf,0xfd,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xef,0xff,0xff,0xff,0xfe,0xdf,0xff,0x1f,0xe7,0xec,0xff,0xff,0xe7,0xf5,0xff, + 0xff,0x5f,0xff,0xf5,0xef,0xff,0x3f,0xff,0xf5,0xf7,0xff,0xff,0xee,0x87,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0x7f,0xff,0xff,0xfb,0xbf,0xf7, + 0xfe,0xb7,0x7f,0xcf,0xff,0xdd,0xff,0xff,0xff,0xff,0xdf,0xff,0xef,0xff,0xff,0xff, + 0xff,0xff,0x7f,0xac,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0x7b,0xfc,0xff,0xff,0xfb,0xbf,0xeb,0xff,0xff,0xff,0xff,0xbf,0xff,0xfb,0xff,0xff, + 0xbf,0xff,0xf7,0xff,0xff,0xbf,0xff,0xff,0xff,0xe5,0x9f,0xff,0xff,0xff,0xff,0xff, + 0xff,0xef,0xff,0xff,0xfa,0xff,0xff,0xa7,0xfd,0xff,0xff,0xfd,0xff,0xff,0xff,0xff, + 0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xfe,0xff,0xfb,0xfe, + 0xd7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xfd,0x7f,0xff, + 0xff,0xff,0xef,0xdc,0xff,0xff,0xdf,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xf7,0xff,0x7f,0xff,0xff,0xe8,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb, + 0xff,0xef,0xbf,0xfe,0xdf,0xfe,0xff,0xff,0xff,0xbf,0xbb,0xff,0xff,0xbf,0xef,0xff, + 0xfe,0xff,0xf7,0xeb,0xff,0xbc,0x3f,0xff,0xef,0xff,0xff,0xef,0xfd,0x5f,0xff,0xff, + 0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xf3,0xff,0xff,0xff,0xbf,0xfb,0xeb, + 0xe8,0xfb,0xef,0xdb,0xf2,0xdb,0xbf,0x6f,0xff,0xf3,0xff,0xfb,0x7f,0xff,0xf7,0xfd, + 0xff,0xff,0xff,0xbb,0xff,0xff,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0x7f,0xde,0xbd,0xff,0xde,0x7e,0xff,0xff,0x6d,0xff,0xfe, + 0xfd,0xff,0xfb,0xff,0xfa,0xdf,0xef,0xff,0xff,0xfc,0x7f,0xdf,0xff,0xfd,0xff,0xff, + 0xff,0xff,0xff,0xff,0xfe,0x7b,0xfe,0xbf,0xff,0xff,0xff,0xff,0xfe,0xdf,0xfc,0xf7, + 0xff,0xff,0xff,0xff,0xff,0xff,0xef,0x7f,0xff,0xf7,0xff,0xff,0xbf,0xff,0xef,0xfe, + 0x4f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf6,0xff,0xff, + 0xff,0xfb,0xff,0xff,0xff,0xaf,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xff,0xfd, + 0x7f,0xff,0xff,0xf7,0xff,0xff,0xdd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f, + 0xdf,0xfb,0xff,0xff,0xff,0xff,0xfe,0xf5,0xff,0x7f,0xf7,0xff,0xff,0x7f,0xdf,0xf7, + 0xfd,0xeb,0xff,0xdf,0xff,0xff,0xfb,0xff,0xde,0xff,0xdf,0xff,0xfe,0x3f,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xef,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbd,0xef, + 0xf2,0x7b,0xff,0xef,0xfb,0xf8,0xff,0xbf,0xfb,0xfb,0xff,0xff,0xdf,0xf9,0xfb,0xff, + 0xbf,0xff,0xff,0x07,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf5,0xff,0xbf,0xff,0xff, + 0xff,0x7f,0xff,0xff,0xf7,0xf3,0xff,0x7f,0xfd,0xf3,0xfc,0xff,0xff,0xcf,0xff,0xfc, + 0xff,0xfd,0xff,0xff,0xfc,0xef,0xf7,0xff,0xff,0xfc,0x3f,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xf7,0xff,0xfc,0xff,0xff,0xcf,0xff,0xff,0xff,0x1f,0xcf,0xfc,0xff,0x3f, + 0xff,0xff,0xff,0xff,0x7f,0x7f,0xff,0xff,0xff,0xfe,0xff,0xf7,0xed,0x7f,0xff,0xf7, + 0x5a,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xfb,0xff,0xff, + 0xff,0xf7,0xdf,0x39,0xff,0xef,0xdf,0xf7,0xfe,0x6f,0x7f,0xe7,0xf7,0xff,0xff,0x7f, + 0xf7,0xf7,0xfc,0x7f,0xff,0xf5,0xb3,0xdf,0xff,0xff,0xff,0xff,0xff,0x3f,0xff,0xff, + 0xff,0xff,0xeb,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0x7b,0xff,0xff,0xff,0xff,0xef, + 0xff,0xfe,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xaf,0xff,0xfe,0xfb,0x6f,0xff,0xff, + 0xff,0xff,0xff,0xe5,0xff,0xff,0xff,0xff,0xe5,0x7f,0xff,0xff,0xff,0xff,0xff,0x7f, + 0xf7,0xff,0xff,0x7f,0xdf,0xfd,0xfd,0xff,0xdf,0xdf,0xff,0xfd,0xff,0xdf,0xdf,0xf5, + 0xff,0xf3,0xf7,0xaf,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xef,0xb7,0xbd,0x7f,0xef,0xd6,0xf5,0xbf,0xbf,0x5b,0xfb, + 0xfd,0xff,0xbf,0xcf,0xb3,0xf5,0xff,0xff,0xff,0xa1,0xbf,0xff,0xff,0xff,0xff,0xff, + 0xff,0x53,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xdf,0xfd,0xef,0xff, + 0xd6,0xf5,0xb5,0xff,0x5b,0x5f,0xf7,0x7f,0xff,0x53,0x5a,0xf5,0xbd,0xff,0xff,0xd9, + 0x1f,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xfe,0xbf,0xfd,0xff,0xdf, + 0xf7,0xff,0xbf,0xfe,0xfb,0xff,0xbf,0xfb,0xfe,0xfe,0xfd,0x6f,0xef,0xff,0xfe,0xff, + 0xbf,0xef,0xd7,0xf5,0xff,0xfe,0x37,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xff, + 0xff,0xff,0xd7,0xff,0xff,0xf1,0xfc,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdf, + 0xff,0x3d,0xff,0xff,0xff,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xe6,0xff,0xb7,0xff, + 0xff,0xff,0xff,0xff,0xef,0xf9,0xfe,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xfb,0x7f,0xff, + 0xb7,0xff,0xf8,0x9f,0xf9,0xff,0xff,0xff,0xff,0xfb,0xff,0xbf,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xe3,0xff,0xfe,0xff,0xff,0xff,0xf9,0xff,0xfe,0xf1,0xff,0xfb,0xfe,0xff,0xbf,0xee, + 0xfb,0xf6,0xfd,0xbf,0xef,0xfb,0x7e,0xff,0xbf,0xef,0x5b,0xbe,0xff,0xef,0xfb,0xf6, + 0xfd,0xbf,0xef,0xfb,0xfe,0xdf,0xbf,0xef,0xfb,0xee,0xdf,0xbf,0xef,0xfb,0xff,0xe3, + 0x6f,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xfd,0xbf,0xff,0xff,0xff,0xff,0xff,0xff, + 0xfb,0xfe,0xff,0xbf,0xfb,0xfc,0xff,0x7f,0xff,0xfb,0xff,0xff,0xbf,0xff,0xfb,0xff, + 0xff,0xbf,0xff,0xff,0xff,0xf7,0xaf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdf, + 0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xfe,0xff,0xbf,0xfd,0xfe,0xff,0xff,0xff,0xfb, + 0xff,0xff,0xbf,0xff,0xfb,0xff,0xff,0xbf,0xff,0xff,0xff,0xff,0xcd,0xff,0xff,0xff, + 0xff,0xff,0x97,0xf5,0xfd,0x7f,0x5f,0xff,0xff,0xff,0xfb,0xfe,0xff,0xff,0xff,0xff, + 0xbf,0xfd,0xff,0xff,0xff,0x9f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xfd,0xbf,0xff,0xff,0xff,0xff,0xfa,0x76,0xaf,0xeb,0xe9,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xdf,0xb7,0xfb,0x7e,0xdf,0xa7,0xe9,0xfb,0x7e,0xdf,0x77,0xed, + 0xff,0xff,0xdf,0x77,0xed,0xff,0x7f,0xff,0xff,0xa3,0xfd,0xff,0xff,0xff,0xff,0xff, + 0xdf,0xbf,0xfd,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xdf,0xdd,0xf7,0x7f, + 0xff,0xfe,0x7f,0xff,0xff,0xff,0x7f,0xff,0xf7,0xf5,0xff,0xff,0x5f,0xff,0xef,0xf6, + 0xff,0xff,0xf9,0xfe,0x7f,0x9f,0xe6,0xf8,0xfe,0x3f,0x9f,0xe7,0xf9,0xfe,0x7f,0x9f, + 0xe7,0xf8,0xf8,0x5f,0x83,0xf8,0xb8,0x2e,0x0f,0xe3,0xe1,0xfe,0x7e,0x1f,0xe3,0xe0, + 0xbe,0x3e,0x0b,0xe7,0xf9,0xfd,0x1f,0xf7,0xff,0xff,0xff,0xfd,0x7f,0xff,0xff,0xf5, + 0xff,0xff,0xff,0xff,0xfe,0x7f,0x9f,0xff,0xf7,0x3f,0xf3,0xdf,0xff,0x3f,0xcd,0xff, + 0xdc,0xd7,0xfe,0xcf,0xff,0xdc,0xff,0xfd,0xcf,0xff,0xff,0xff,0x8b,0xff,0xff,0xff, + 0xff,0xff,0xaf,0xff,0xff,0xfe,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd, + 0x3f,0xcf,0xff,0xfd,0xff,0x3f,0xff,0xf2,0xfe,0xdf,0x7f,0xef,0xf7,0xff,0xff,0x7f, + 0xff,0xf9,0xe1,0x7f,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xd7,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xdf,0x7d,0xf7,0x7f,0xff,0x7f,0xd7,0xff,0x7d,0x5f,0xf7, + 0xdf,0xff,0xfd,0x5f,0xf7,0xd5,0xff,0xff,0x7f,0xef,0xff,0xff,0xff,0xff,0xff,0xff, + 0xfd,0xff,0x7a,0xff,0xff,0xff,0xff,0xff,0x7f,0xdf,0xff,0xff,0xa7,0xfa,0x3f,0xff, + 0xa7,0xe8,0xff,0xfe,0x8b,0xff,0x69,0xff,0xff,0x0b,0xff,0xe8,0xbf,0xff,0xf7,0x75, + 0xbf,0xff,0xff,0xff,0xff,0xff,0xfc,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xff, + 0xff,0xfd,0xff,0x93,0xff,0xfd,0xdf,0xaf,0xc9,0xf7,0x7d,0xff,0x77,0xff,0xf7,0x7f, + 0xff,0x77,0xff,0xff,0xff,0xf9,0x3f,0xff,0xeb,0xfa,0xfe,0xbf,0xaf,0xeb,0xfa,0xfe, + 0xbf,0xaf,0xea,0xfa,0xfe,0xaf,0xab,0xeb,0xba,0xff,0xad,0xea,0xda,0xfe,0xb7,0xaf, + 0x6b,0xda,0xb6,0xbf,0xab,0x6b,0xfa,0xb6,0xbf,0xaf,0xeb,0xfb,0x27,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xcf,0xbf,0xff,0xff,0xf7,0xff,0xf3,0xff,0xf7, + 0xbf,0xfe,0xff,0xfb,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0x7f,0xff,0xfa,0x7f,0x7f,0xf7,0xff,0xff,0xff,0xff,0xfd,0xfe,0xfb,0xef,0xff,0xff, + 0xfe,0xff,0xff,0xfc,0x77,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xfa,0x9f,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xdf,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xef,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xf1, + 0xfe,0xff,0xff,0xff,0xff,0x7f,0xeb,0xfa,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xeb,0xfa,0xbf,0xf3,0xfd,0xfe,0xf6,0xbf,0xff,0xfb,0xfa,0xff,0xff,0xff,0xfb,0xff, + 0xf7,0xbf,0xfe,0xfd,0xff,0xf4,0x7f,0xff,0xff,0xff,0xff,0xff,0xfd,0xbf,0x6f,0xf9, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7d,0x6f,0xcf,0xff,0xfd,0xff,0x57,0xff,0xfd, + 0xff,0xff,0xff,0xff,0xdd,0xff,0xff,0xdf,0xff,0xdf,0xff,0xfe,0x87,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0xdf,0xff,0xff,0x7f,0xff,0x9f,0xbe,0xfe,0xbf, + 0xdf,0xf3,0xef,0xff,0xef,0xf7,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xfe, + 0xff,0xff,0xd9,0xff,0xff,0xdf,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xfb,0xdf,0xff,0xfd,0x3f,0x7f,0xbf,0xff,0xbf,0xef,0xfd,0xff,0xff,0xff,0xff, + 0xbf,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xf9,0xbf,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xfb,0x5f,0xff,0xff,0xef,0xdf,0xfd,0xff, + 0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xc7, + 0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff, + 0xbf,0xf5,0xfc,0x3a,0xef,0xf5,0xfc,0x7f,0xff,0xef,0xff,0xfe,0xf5,0xff,0xcf,0x7f, + 0xfc,0x7f,0xff,0xff,0xff,0xe8,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0xbd,0xff,0x3f,0xfd,0xef,0xff,0xfe, + 0xff,0xef,0xf7,0xff,0xff,0x7f,0xef,0xdf,0xfe,0xff,0xff,0xfe,0x1f,0xff,0xff,0xff, + 0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xbb,0xff,0xfb,0xfa, + 0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0xff,0xf7,0xff, + 0xff,0xfb,0xab,0xff,0xff,0xff,0xff,0xf7,0xfd,0xff,0x7f,0xff,0xff,0xff,0xff,0xff, + 0xfe,0x3f,0xff,0xfe,0xff,0xd7,0xff,0xff,0xdf,0xff,0xff,0xfd,0xff,0xdf,0xf7,0xff, + 0xff,0xff,0xff,0xff,0xfd,0xff,0xff,0xff,0x67,0x7f,0xff,0xff,0xff,0xfe,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xfe,0xff,0xff,0xef,0xff,0xff, + 0xbf,0xff,0xbf,0xff,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xcb, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xfe,0xff, + 0xfd,0x3f,0xff,0xef,0xf3,0x5e,0xff,0xbf,0xcd,0x7f,0xff,0xd7,0xbf,0xff,0xfb,0xff, + 0xd7,0xff,0xff,0xff,0xff,0x35,0xaf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfa,0xff, + 0xff,0xff,0xff,0xff,0x3f,0xcf,0xff,0xeb,0xff,0xbb,0xae,0xe7,0xdf,0xf7,0xfd,0x93, + 0xbf,0xfa,0xff,0xff,0x9e,0xff,0xfa,0xff,0xff,0xf9,0xff,0x58,0x3d,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xfa,0xfe,0xff,0xff,0x5a, + 0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xbf,0xef,0x86,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xfd,0xf9,0x5c,0xff,0xff,0xef,0x5f,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0x7a,0x5f,0xd7,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xeb,0xf7,0xec,0xb6,0xdf,0x7f,0xff,0xf7, + 0xfd,0xff,0xfe,0xdd,0xff,0xfd,0xff,0xff,0xdf,0xff,0xfd,0xff,0xfe,0xff,0xfc,0xdf, + 0xf6,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0x79,0x74, + 0xf6,0x95,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0x77,0x7f,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xd7,0xfd,0x9b,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xbe,0xad,0xef,0xfa,0xf5,0xad,0xff,0xff,0xff,0xfd,0x7f,0xfb, + 0xd7,0xff,0xff,0xff,0xff,0x9f,0xff,0xfd,0x7f,0xfb,0xff,0xeb,0x7f,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfc,0xdf,0xf5,0xff,0xff,0x52,0xb5, + 0x3f,0xff,0xf3,0xfc,0xaf,0xfd,0xca,0xff,0xfc,0xff,0xff,0xcf,0xff,0xfc,0xaf,0xff, + 0x7f,0xff,0xc7,0xf9,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xf9,0xff,0xfd,0xff,0xdf,0xff,0xfd,0xff,0x7f,0xff,0xf7,0xff,0xff,0x7f, + 0xff,0xf7,0xff,0xff,0x7f,0xff,0xfe,0xff,0xf5,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xef,0x9f,0xf9,0xff,0xff,0x9f, + 0xe7,0xff,0xfe,0x7f,0xff,0xe7,0xff,0xfe,0x7f,0xff,0xe7,0xff,0xff,0xeb,0xff,0x9f, + 0xff,0xbd,0x6f,0xfb,0xfe,0xff,0xbf,0xef,0xfb,0xfe,0xff,0xbf,0xef,0xfb,0x56,0xf5, + 0xbb,0x67,0xfe,0x7f,0xbf,0xe7,0xf9,0xfe,0xff,0x9f,0xef,0xf9,0xfe,0xff,0x9f,0xef, + 0xf9,0xfe,0xff,0xbe,0xfe,0x06,0xff,0xff,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xcf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7c,0xff,0xff,0xf7,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xfb,0xef,0xfe, + 0xff,0xff,0xef,0xfb,0xff,0xff,0xbf,0xff,0xfb,0xff,0xff,0xbf,0xff,0xfb,0xff,0xff, + 0xff,0xfd,0x9f,0xfb,0xff,0xb7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xfd,0xff,0xff,0xfe,0xf0,0xbf,0x8b,0xff,0xd0,0xfe,0x3f,0xfb,0xe3,0xff,0xbe,0x3f, + 0xfb,0xe3,0xff,0xbe,0x3f,0xff,0xff,0xfe,0x83,0xff,0xff,0xfb,0x7f,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x9f,0xaa,0xfe,0xfb,0x3f,0xfb,0xff,0xfa,0x3f, + 0xef,0xff,0xfe,0xff,0xff,0xef,0xff,0xfe,0xff,0xff,0xef,0xff,0xfd,0xff,0xfb,0x7f, + 0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xdf, + 0x77,0xcf,0xff,0xff,0xf7,0x5e,0xfd,0x7f,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xff, + 0xff,0xff,0xfd,0x7f,0xfe,0x4f,0xff,0xff,0x8f,0xe7,0xf9,0xfe,0x7f,0x9f,0xe7,0xf9, + 0xfe,0x7f,0x9f,0xe6,0xf9,0xfe,0x3f,0x8f,0x87,0xd8,0x7f,0x89,0x87,0xe1,0xfe,0x76, + 0x1f,0xe7,0xe1,0xfe,0x76,0x1f,0xe7,0x61,0xfe,0x2f,0x9f,0xe1,0xff,0xfe,0xff,0x7f, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xf7,0xff,0xff,0x7f,0xfb, + 0xff,0xff,0xbf,0xef,0xff,0xfe,0xff,0xff,0xef,0xff,0xfe,0x7f,0xff,0xef,0xff,0xff, + 0xff,0xfa,0xbf,0xff,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xfb,0xfe,0xff,0xff,0xbe,0xd7,0xed,0xff,0xf6,0xdd,0xb7,0xff,0xdb,0x7f,0xff,0xb7, + 0xff,0xfd,0x7f,0xfd,0xb7,0xff,0xff,0x9e,0xd7,0xff,0xfb,0xfd,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xf7,0xfd,0xe7,0xee,0x7f,0xff,0xe7, + 0xf9,0xff,0xff,0x9f,0xff,0xb9,0xff,0xff,0x5f,0xff,0xf9,0xff,0xd7,0xf3,0xf4,0xff, + 0xff,0x7e,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xef,0xff,0x7b, + 0xde,0xf2,0x7f,0x27,0x7f,0xf2,0x7c,0x9f,0xff,0xc9,0xff,0xfc,0x9f,0xff,0xd1,0xff, + 0xfc,0x9f,0xfa,0xff,0xf7,0x1f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xdf,0xfd,0xbf,0x2f,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x6f,0xff,0xfb,0xff,0xfe,0xbf,0xaf, + 0xeb,0xfa,0xfe,0xbf,0xaf,0xeb,0xfa,0xbe,0xbf,0xab,0xeb,0xda,0xee,0xaf,0xab,0xf2, + 0xbe,0xaf,0xa7,0xea,0xfa,0x7e,0x9f,0xaf,0xeb,0xfa,0xfe,0xbf,0xaf,0xeb,0xfa,0xf6, + 0xbf,0xf2,0x7f,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0xff,0xfe,0xff, + 0xff,0x67,0xfb,0xff,0xfb,0xfc,0xff,0xff,0xc7,0xf3,0xfc,0xff,0xfd,0xff,0xfb,0xff, + 0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xfe,0x87,0xff,0xbf,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xb7,0xf5,0xff,0xff,0xff,0xbb,0xff,0xd7,0xdd, + 0xff,0xff,0xff,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xa9,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xff, + 0xff,0xfe,0xdf,0xfe,0xef,0x7f,0xdf,0xd7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0x78,0x9f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xf8,0xff,0xfb,0xff,0xff,0xfd,0xff,0xef,0x7f,0xdf,0xbf,0xdf, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0x37,0xff,0xff,0xff,0xff, + 0xff,0xff,0xfd,0xff,0xff,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xfc,0xff, + 0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xfd,0xff,0xff,0xff,0xfd,0xff,0xff, + 0xff,0x7e,0x7f,0xbf,0xff,0xb7,0xff,0xff,0xbf,0xff,0xfb,0xff,0xff,0xff,0x7f,0xdf, + 0xfd,0xe3,0x7e,0xfb,0xcf,0xbd,0xff,0xeb,0xf7,0xfd,0xff,0xff,0xff,0xfb,0xff,0xff, + 0xff,0xff,0xdf,0xff,0xff,0x7f,0xef,0xfc,0x9f,0xff,0xff,0xfd,0xff,0xff,0xff,0xfe, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x3f,0xbf,0xe7,0xff,0xef,0xff,0xff, + 0xff,0xfe,0xf7,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xf9,0xff,0xff,0xbb,0xff, + 0xff,0xff,0x7b,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xfb, + 0xdf,0xee,0xff,0xbf,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xf6,0x7d,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xef,0xff,0x37,0xdf,0xff,0xff,0x17,0xef,0xff,0xfd,0x7f, + 0xff,0xdf,0x7f,0xee,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xcf,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xfb,0xff, + 0xff,0xf7,0xfd,0xff,0xfd,0xff,0xff,0xfb,0xff,0xff,0xf7,0xff,0xff,0xff,0xf7,0xff, + 0xff,0xc9,0xf6,0xff,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xd7,0xf5,0xfe,0xdf,0xbf,0x4d,0xff,0xdf,0xff,0xf7,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x3f,0x7f,0xf7,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xaf,0xff,0xff,0xbf,0xbe,0xff,0xff, + 0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x87,0xdf, + 0xff,0xff,0xaf,0xff,0xff,0xff,0xbf,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xf7,0xf7, + 0xef,0xfb,0xfd,0xcf,0xff,0xfb,0xff,0x7f,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xfd,0xff,0xff,0xf2,0xbf,0xff,0xff,0xff,0xff,0xff,0x9f,0x3f,0xff,0xff,0xff, + 0xff,0xfe,0xff,0xff,0xff,0x7f,0xf5,0xec,0xde,0xff,0xf5,0xec,0xfb,0xff,0xff,0xbf, + 0xff,0xfb,0xff,0xff,0xbf,0xfd,0x7b,0xff,0xff,0xff,0xf3,0x4a,0xff,0xff,0xff,0xff, + 0xff,0xfa,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xfe,0x7d,0xaf,0xdf, + 0xfc,0xfd,0xaf,0x7c,0xff,0xf7,0xff,0xff,0x7f,0xff,0xf7,0xff,0x9f,0x7f,0xff,0xff, + 0xf5,0xeb,0xdf,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xfb,0xff, + 0xff,0xff,0xff,0xff,0xf3,0xaf,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xf4,0x6f,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,0xcf,0xff,0xfe,0x65,0xff,0xff,0xff,0xff, + 0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xe7,0xff, + 0x7f,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xbb,0x7f, + 0xff,0x7f,0xf7,0xff,0xff,0x7f,0xdf,0xbf,0x7d,0xff,0xff,0xdf,0xff,0xfd,0xff,0xff, + 0xdf,0xff,0xff,0xff,0xf1,0xbf,0xdf,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xfd,0xdf,0xff,0xdd,0xff,0x7f,0xff,0xfd,0xff,0xff,0xff,0xff,0xdd,0x8f,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdd,0x9f,0xff,0xff,0xef,0xff, + 0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0xff,0xff,0xbf,0xff,0xfa,0xff, + 0xff,0xfd,0xff,0x7e,0xff,0xfd,0x7f,0xff,0x9f,0xff,0xed,0xff,0xff,0x9f,0xff,0xff, + 0xfe,0x57,0xff,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff, + 0xff,0xff,0xf7,0xff,0x3f,0x53,0xff,0xff,0x3f,0xcf,0x7f,0xfc,0x3f,0xff,0xcf,0xff, + 0xfe,0x8f,0xff,0xcb,0xff,0xff,0xff,0xea,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x9f,0xff,0xdf,0xfd,0xff,0xff,0xdf,0xf7, + 0xff,0xb7,0x7f,0xff,0xf7,0xff,0xff,0x7f,0xff,0xf7,0xbf,0xff,0xff,0xff,0x1f,0xff, + 0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe, + 0xf9,0xff,0x9f,0xfe,0x79,0xfe,0x7f,0xfb,0xe7,0xff,0xfe,0x7f,0xff,0xe7,0xff,0xfe, + 0x7f,0xff,0xff,0xff,0xb1,0xff,0xfb,0xfe,0xff,0xbf,0xef,0xfb,0xfe,0xff,0xbf,0xef, + 0xfb,0xfe,0xdf,0xbd,0x6f,0x5b,0xee,0x7f,0xe7,0x5b,0xfe,0x7f,0x9f,0xee,0xf9,0xfe, + 0xff,0x9f,0xef,0xf8,0xfe,0xff,0x9f,0xef,0xfb,0xff,0xe9,0x6f,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xf6,0x2f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xfe,0xff,0xfe,0xff,0xef,0xff,0xfe,0xff,0xbb,0xff,0xfb,0xff,0xff,0xbf,0xff, + 0xff,0xff,0xff,0xbf,0xff,0xff,0xff,0xe9,0xff,0xff,0xef,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xdf,0xff,0xff,0x8f,0xf8,0xff,0xff,0x8f,0xe3, + 0xff,0xfe,0x3f,0xff,0xe3,0xff,0xfe,0x3f,0xff,0xe3,0xff,0xff,0xff,0xec,0xbf,0xff, + 0xff,0xfa,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x6e,0xfa,0xbf,0xdf, + 0xfb,0xff,0xbd,0xdf,0xfb,0xfe,0xff,0x7f,0xef,0xff,0xfe,0xff,0xff,0xef,0xff,0xfe, + 0xff,0xff,0xff,0xff,0xa3,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0x7f,0xff,0xff,0xfe,0xdf,0xfd,0xff,0xff,0xff,0xbf,0xff,0xfb,0x7f, + 0xff,0xb7,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xf9,0xfe,0x7f, + 0x9f,0xe7,0xf9,0xfe,0x7f,0x9f,0xe7,0xf9,0xfe,0x3f,0x9f,0xe7,0xf9,0xf8,0x7d,0x87, + 0xf9,0xd8,0x7e,0x1f,0xe7,0xe1,0xfe,0x7e,0x1f,0xe7,0xe1,0xfe,0x76,0x1f,0xe7,0xf9, + 0xff,0xdf,0xff,0xff,0xd7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xfd,0x7f,0x5f,0xff,0xff,0x9f,0xff,0xfb,0xff,0xff,0xff,0xe7,0xff,0xfe,0x7f,0xff, + 0xe7,0xff,0xfe,0x7f,0xff,0xff,0xff,0xfb,0xff,0xff,0xfa,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xaf,0xfb,0xff,0xed,0xfe,0xdf,0xff,0x6d,0xfb, + 0x7f,0xff,0xb7,0xff,0xfb,0x7f,0xff,0xb7,0xff,0xfb,0x7f,0xff,0xff,0xf7,0x7f,0xff, + 0xff,0x57,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xf5,0x7d,0xff, + 0xf6,0x6f,0x65,0xff,0xf6,0x7d,0x97,0xff,0xd9,0xff,0xfd,0x9f,0xff,0xd9,0xff,0xfd, + 0x9f,0xff,0xff,0xfe,0x0f,0xff,0xff,0xeb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xfe,0xbf,0xef,0xff,0xa7,0xfa,0x7f,0xff,0xa7,0xe9,0xff,0xfe,0x9f, + 0xff,0xe9,0xff,0xfe,0x9f,0xff,0xe9,0xff,0xff,0xff,0xc5,0xff,0xff,0xec,0xbf,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0x3f,0xff,0xff,0xfe,0xff,0xff,0xff,0xff, + 0x7f,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xb8,0xaf,0xff,0xeb,0xba,0xfe,0xbf,0xaf,0xeb,0x7a,0xfe,0xbf,0xaf,0xeb,0xda,0xfe, + 0xaf,0xaf,0xea,0xfa,0xff,0xab,0xeb,0xfa,0xbe,0xb7,0xaf,0xea,0xfa,0xfe,0xbf,0xaf, + 0xea,0xf2,0xfe,0xaf,0xaf,0xeb,0xfd,0x07,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xfc,0x5e,0xc5,0xff,0xfc,0x7f,0x3f, + 0xff,0xf1,0xff,0xff,0x3f,0xff,0xf3,0xff,0xff,0x3d,0xff,0xbf,0xff,0xec,0x7f,0xff, + 0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0x7f,0x7f,0xff,0xff,0xff,0x7f,0xdf,0xff,0xfd, + 0xbe,0xfb,0xff,0xff,0xb7,0xed,0xbf,0xee,0xff,0xff,0xef,0x7f,0xfe,0xff,0xff,0xe7, + 0xff,0xff,0xf7,0xf9,0x17,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xdf,0xff,0xff,0xdf,0xe9,0xff,0xfb,0xdf,0xf7,0xf3,0xff,0x7f,0xbf, + 0xe7,0x77,0xdf,0x7f,0xff,0xf7,0x7f,0xff,0xff,0xfe,0xf3,0xff,0xff,0xf8,0xff,0xff, + 0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xec,0xfb,0xff,0xfe,0xff,0xcb, + 0xff,0xb7,0xef,0xaf,0x7f,0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff, + 0xf6,0x7f,0xff,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xff,0xff,0xff,0xef, + 0xf7,0xfe,0xfd,0xff,0xcf,0xff,0x7f,0xff,0xff,0xf6,0xff,0xff,0xff,0xff,0xff,0xff, + 0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0x4f,0xff,0xff,0xf3,0x7e,0xff,0xff,0xff,0xff, + 0xbf,0xff,0xff,0xff,0xff,0xfc,0xff,0xdf,0xff,0xff,0xbb,0xdf,0xb7,0xfb,0xee,0xff, + 0xde,0xc7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xf9,0xff,0x7f, + 0xbd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdd,0xff,0xff,0xff,0x7f,0xff,0xff,0xf7, + 0xff,0xbf,0xff,0xf8,0xbf,0x3f,0xff,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xf6,0xff, + 0xff,0xef,0xff,0xfb,0x3f,0xff,0xff,0xef,0xfd,0xff,0xff,0xfe,0xff,0xff,0xfb,0xff, + 0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0xef,0xdf,0xff,0xbf,0xef,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x77,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xbd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfc,0xff,0xbf, + 0x7f,0xfe,0xff,0x1f,0xff,0xf1,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xe8,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xff, + 0xff,0xff,0xbf,0xff,0xbf,0xff,0xff,0xfb,0xf7,0xf6,0xff,0xff,0xbb,0xff,0xff,0xff, + 0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0x1f,0xfb,0xfd,0xd7,0x7e,0xff,0xff,0xff,0xff, + 0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xfb,0xf7,0xff,0x7d,0xff,0xf7,0xf5,0x2f, + 0xfb,0xdf,0xff,0xf5,0xff,0xff,0xff,0xff,0xf5,0x7d,0x7f,0xff,0xff,0xf1,0xdf,0xfb, + 0xfe,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xed,0xff,0x7f,0xf7,0xdf,0xff,0xff,0xfe, + 0xdd,0xed,0xff,0x7e,0xd7,0x9f,0xff,0xfa,0xff,0xff,0x9f,0xef,0xff,0xff,0xff,0xbf, + 0xaf,0xff,0xff,0xe9,0x7d,0xfe,0xff,0xb7,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff, + 0xff,0xfb,0xff,0xff,0xff,0xff,0x3f,0xb3,0xff,0xff,0x3f,0xf7,0xff,0xfc,0xff,0xff, + 0xf7,0xed,0xff,0xfe,0xff,0xef,0xff,0xff,0xff,0xfe,0xe3,0xff,0xff,0xef,0xff,0xfe, + 0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xf1,0xff,0xff,0xfd,0x7b, + 0xff,0xff,0xff,0xef,0xff,0xfe,0xff,0xfe,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff, + 0x25,0xaf,0xff,0xfc,0x7f,0xff,0xd7,0xff,0xff,0xf9,0xff,0xde,0xff,0xff,0xff,0x7f, + 0xff,0xff,0xfc,0xff,0xcf,0x9f,0x7f,0xff,0xfe,0x7d,0xf3,0xff,0xdf,0x3f,0xf7,0xff, + 0xe7,0xdf,0x9f,0xff,0xff,0xff,0x5b,0xbd,0xff,0xff,0xef,0xff,0x9a,0xff,0xff,0xff, + 0xff,0xca,0xff,0xff,0xff,0x5f,0xff,0xff,0xed,0x7d,0x3f,0xdf,0xff,0xff,0xff,0xff, + 0xff,0xbf,0xff,0xff,0xfb,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xef,0x26,0xff,0xff, + 0x97,0xff,0xf3,0x5f,0xff,0xff,0xff,0xfb,0x5f,0xff,0xff,0xef,0xff,0xff,0xff,0xff, + 0xef,0xff,0xff,0xbf,0xef,0xff,0xff,0xdf,0xff,0xef,0xff,0xdf,0xff,0xff,0xff,0x7f, + 0xff,0xff,0xff,0x60,0xff,0xff,0xfe,0xbb,0x6f,0xef,0xd7,0xff,0xff,0xff,0xaf,0xd7, + 0xff,0xfe,0xff,0x5f,0xff,0xff,0xbc,0x7b,0xd7,0xda,0xbe,0xff,0xff,0x7f,0xf5,0xf6, + 0xef,0x4f,0xff,0xff,0xf7,0xef,0xff,0xff,0xff,0xfe,0x5b,0x7f,0xff,0xd5,0xad,0xfd, + 0x56,0xff,0xff,0xff,0xfd,0xfe,0xff,0xff,0xff,0xfb,0xff,0xff,0xdd,0x6d,0xd6,0xff, + 0xd5,0xff,0x7f,0xff,0xf5,0xbf,0xf7,0x5b,0x56,0xff,0xff,0xfd,0x7f,0xff,0xff,0xfd, + 0xc9,0xff,0xff,0xfa,0xff,0xbf,0xaf,0xff,0xff,0xff,0xff,0xaf,0xbf,0xff,0xff,0xfe, + 0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xfe,0xbf,0xff,0xff,0xff,0xb7,0xff,0xbf,0xff, + 0xff,0xbf,0xbf,0xff,0xff,0xff,0xef,0x7f,0xff,0xff,0x5f,0xf7,0xf5,0xff,0xff,0xff, + 0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xea,0xff,0xd7,0xff, + 0x3f,0xff,0xfa,0x7f,0xfd,0xff,0xff,0xfa,0xb7,0xff,0xff,0xf3,0xff,0x2f,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0x7f,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xf7,0xff,0xff,0xff,0xdf,0xff,0xfd,0xef,0xff,0xff,0xff,0xfd,0xff,0xff, + 0xff,0xff,0xff,0xd5,0xff,0xff,0xff,0xfb,0xf7,0xff,0xff,0xff,0xff,0xff,0xf9,0x9f, + 0xff,0xff,0xf6,0xff,0xff,0xff,0xff,0xff,0xfe,0x7f,0xff,0xff,0xf9,0xff,0xff,0x9f, + 0xff,0xff,0xff,0xff,0x9f,0xff,0xff,0xff,0xff,0xfa,0x1f,0xff,0xbf,0xec,0xfb,0xf6, + 0xff,0xbf,0xef,0xfb,0xd6,0x7f,0xbf,0xef,0xdb,0xee,0xff,0xbf,0xef,0xd6,0xff,0x8f, + 0x6f,0xdb,0xfe,0x7d,0xbf,0xe3,0xdb,0xfe,0xff,0xbf,0xe3,0xfb,0xfe,0xff,0xbf,0xfe, + 0x46,0xff,0xff,0xff,0xff,0xf6,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xf3,0xff, + 0xff,0xff,0xef,0xf3,0xff,0xff,0x6f,0xdb,0xff,0xfd,0xbf,0xff,0xdb,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0x62,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,0xff, + 0xfe,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xfb,0xfe,0xdf,0xff,0xfb,0xfe,0xff,0xfe, + 0xdf,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x5f,0xfe,0xde, + 0xff,0xff,0xed,0xff,0xff,0xff,0xff,0xed,0x5f,0xff,0xff,0xb5,0xff,0xff,0xff,0xff, + 0xff,0xfb,0xe3,0xff,0xbd,0xef,0x8e,0xdf,0xf8,0xef,0xfd,0xff,0xff,0xf8,0xe7,0xff, + 0x7f,0xff,0xff,0xe3,0xff,0xf9,0xff,0xbf,0xe9,0xeb,0xff,0xff,0xff,0xff,0xb2,0xff, + 0xff,0xfe,0x8b,0xff,0xff,0xfe,0x7d,0xe7,0xfe,0xfe,0x7f,0xdf,0xfb,0xfd,0xdf,0xbe, + 0xdf,0xb7,0xff,0xff,0xbe,0xdf,0xe7,0xff,0xf9,0xd9,0x3f,0xff,0x7f,0xdf,0xff,0xf7, + 0xff,0xff,0xfe,0xff,0xf4,0xff,0xff,0xfe,0xf7,0xff,0xff,0xff,0xff,0xef,0xff,0xd7, + 0xff,0xf7,0xff,0xdf,0x7f,0xef,0xff,0xf7,0xff,0xff,0xf5,0xdf,0xed,0xef,0xff,0xff, + 0xef,0xff,0xef,0x9b,0xe7,0xf9,0xbe,0x7f,0x9f,0xe7,0xf8,0xbe,0x7f,0x9f,0xe3,0xf9, + 0xfe,0x7f,0x9b,0x87,0xb8,0x7f,0x9b,0x87,0xe1,0xde,0x7e,0x1f,0xe3,0xe0,0xfe,0x7f, + 0x9f,0xe3,0xf9,0xbe,0x7f,0x8f,0x7d,0xff,0xfd,0xff,0xff,0x5f,0xff,0xff,0xff,0xff, + 0xff,0xd7,0xff,0xff,0xff,0x5f,0xff,0xff,0xff,0xf3,0xff,0x3f,0xff,0xf3,0xcc,0xfb, + 0xfd,0xcf,0x9f,0xfc,0xdf,0xff,0xff,0xff,0x7f,0xf7,0xfe,0x7e,0xff,0xbf,0xff,0xbf, + 0xfd,0xeb,0x7f,0xdf,0xff,0xff,0xff,0xfb,0xdf,0xff,0xff,0xeb,0x7f,0xff,0xff,0xef, + 0xde,0xfd,0xef,0xef,0xdd,0xf7,0x5f,0xff,0x7b,0xef,0xf3,0xff,0xff,0x7b,0xef,0xf6, + 0xff,0xff,0x9e,0xc7,0xff,0xf7,0xfd,0xfd,0x7f,0xff,0xff,0xff,0xff,0xff,0x5f,0xff, + 0xff,0xff,0x7f,0xff,0xff,0xff,0xf6,0xff,0x7f,0xff,0xf7,0x7d,0xff,0xf7,0xdf,0xff, + 0xfd,0x7f,0xff,0xdf,0xfd,0xfd,0xdf,0xff,0xf7,0xf6,0xf7,0xfe,0xff,0xbf,0xaf,0xff, + 0xff,0xff,0xff,0xf7,0xeb,0xff,0xff,0xff,0xbf,0xff,0xff,0xff,0xba,0x7b,0xa7,0xff, + 0xba,0x76,0x9f,0xff,0xe9,0xff,0xbe,0x8f,0xff,0xf9,0xff,0xbf,0x9b,0xff,0x7f,0xf7, + 0xcf,0xfd,0xff,0xff,0xf2,0xff,0xbf,0xff,0xff,0xff,0xfd,0xff,0xff,0xff,0xf4,0x7f, + 0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xf7,0xdf,0xff, + 0xfd,0xf7,0xff,0xff,0xff,0xeb,0xd3,0x97,0xfe,0xbf,0xae,0xeb,0xfa,0xfe,0xbf,0xaf, + 0xeb,0xda,0xbe,0xaf,0xad,0xeb,0xfa,0xfe,0xb7,0xad,0xf2,0xde,0xbf,0xaf,0xeb,0xfa, + 0xbe,0xbf,0xad,0xeb,0xfa,0xfe,0xbf,0xaf,0x6a,0xfa,0xfe,0xbf,0xf6,0x7f,0xdf,0xff, + 0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xef,0xfb,0xff,0xff, + 0xef,0xbf,0x1f,0xff,0xff,0xfe,0xff,0xff,0xcf,0xff,0xff,0xff,0xff,0xcf,0xff,0xff, + 0xfb,0xff,0xff,0x67,0xff,0xff,0xdf,0xff,0xfd,0xff,0xff,0xbf,0xef,0x77,0xef,0xff, + 0xbf,0xf7,0xbf,0xf7,0xff,0xfe,0xff,0xff,0xfd,0xdf,0xff,0xfc,0xff,0xff,0xff,0xef, + 0xff,0xef,0x7f,0xff,0xff,0xff,0xff,0xff,0x7f,0x81,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xc5,0xff, + 0xff,0xff,0xff,0xff,0xfd,0x7d,0xff,0xff,0xff,0xfd,0x7f,0xff,0xff,0xff,0xff,0xfd, + 0x3f,0xdf,0xff,0xff,0xe3,0xe8,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7d,0xff, + 0xff,0xff,0xf7,0xff,0x7f,0xff,0xff,0xff,0xff,0xef,0xfe,0xff,0xff,0xef,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0x97,0xff,0xff,0xff,0xfa,0xd7,0xbd,0xff,0xff,0xff, + 0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xfc,0xff,0xff,0xff,0xff,0xff,0xfd, + 0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xf0,0xff,0xff,0xff, + 0xf7,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xff,0xff,0xbf,0xff,0xfd,0xff,0xff,0xfe, + 0x9f,0xff,0xff,0xff,0xfe,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd, + 0xff,0xff,0xfe,0x1f,0xff,0xfb,0xff,0xfe,0xff,0xff,0xf9,0xfe,0xff,0xff,0xbf,0xef, + 0xff,0xf4,0xff,0xff,0xef,0xfb,0xef,0xbe,0xef,0xfb,0xff,0xff,0xdf,0xff,0xff,0xfe, + 0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xa3,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0xf7, + 0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf1,0xfd,0xff,0xfe,0xff,0xff, + 0xfe,0xff,0x1f,0xd0,0xfc,0x7e,0x37,0x83,0xf2,0xdc,0x7f,0x3f,0xc7,0xf3,0xfc,0x7f, + 0x7f,0xef,0xff,0xff,0xff,0x7e,0x6f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xdf,0xbf,0xff,0xff,0xff,0xff,0xef,0xfd,0xfb,0xdf,0xef,0xed,0xff,0x3d,0xdf, + 0xdf,0xfd,0xff,0x7f,0xdf,0xf7,0xef,0xfd,0xff,0xff,0xff,0xff,0xf5,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xbf,0xff,0xff,0xfc,0xff,0xff, + 0xfd,0xff,0xff,0xff,0xff,0xef,0xff,0xfe,0xff,0xff,0xef,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0x9f,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xbf, + 0xff,0xff,0xff,0xfc,0xb7,0xfd,0xff,0xff,0xed,0xfd,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0xfe,0xd7,0xdf,0xff,0xff,0xff,0xd7,0xff, + 0xff,0xff,0xff,0xff,0xe7,0xf7,0xff,0xff,0xf7,0xff,0xdf,0xff,0xfe,0xff,0xff,0x7f, + 0xff,0xff,0xfb,0xff,0xff,0x7f,0xff,0xff,0xff,0xef,0x7f,0xff,0xff,0xff,0xff,0xec, + 0x3f,0xff,0xff,0xff,0xb3,0xff,0xff,0xff,0xff,0xff,0xfc,0xff,0x3f,0xff,0xbf,0xff, + 0xff,0xbf,0xef,0xfe,0x9f,0xff,0xef,0xff,0xfe,0xcf,0xbf,0xef,0xff,0x3e,0xff,0xbf, + 0xef,0xff,0xff,0xff,0xff,0xf3,0x9a,0xff,0xff,0xff,0xf7,0x7f,0xff,0xff,0xff,0xff, + 0xeb,0xff,0xef,0xff,0xff,0xff,0xfa,0x3f,0xfd,0xff,0xdf,0xff,0xfb,0xff,0xfc,0xa9, + 0xf7,0xfb,0xff,0xe7,0xbf,0xf7,0xfd,0x9f,0xff,0xff,0xff,0xf5,0xdb,0xdf,0xff,0xff, + 0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xfe,0xff,0xff,0xfa,0xff,0xff, + 0xff,0x4b,0xff,0xff,0xff,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xfe,0xf4,0x6f,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xfd,0xff,0xff,0xff,0xfd,0x7f,0xff,0xff,0xf7,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf6,0x4f,0xff,0xff,0xff,0xfb,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xcd,0xff,0xec,0xdf,0x7f,0xf7,0xfd,0xff, + 0x7f,0xdf,0xb7,0xfd,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xff,0xff,0xff,0xd5, + 0xb7,0xff,0xff,0xff,0x77,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xfb,0xbf, + 0xf7,0x6b,0xff,0xff,0xff,0x7f,0xff,0xff,0xdd,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xda,0x9f,0xff,0xff,0xff,0xef,0x7f,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xef,0xff,0xef,0xff,0xbd,0xff,0x7f,0xf6,0xad,0x7f,0xff,0xde,0xbf, + 0xff,0xff,0x7f,0xd7,0xff,0xed,0xfb,0xff,0xff,0xff,0xff,0xfe,0x37,0xff,0xff,0xff, + 0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xff,0xff,0xdc,0x8f,0x27, + 0xf2,0x56,0xaf,0x2b,0xcd,0x7a,0xbc,0xff,0x07,0xca,0xf3,0xfe,0x9f,0xab,0xca,0xff, + 0xff,0xff,0xe8,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xf9,0xff,0xff,0xbf,0x7f,0xde,0xfd,0xef,0x7f,0xdf,0xf7,0xfd,0xbf,0x7f,0xdf,0xf7, + 0xfd,0xff,0x7b,0xdf,0xf7,0xff,0xff,0xff,0xfe,0xdb,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0x9f,0xef,0xfe,0xe7,0xf9,0xff,0x9f,0xe7,0xf9, + 0xfe,0x7f,0x9a,0xe7,0xf9,0xfe,0x7f,0x9f,0xe7,0xf9,0xfe,0x7f,0xfb,0xff,0xff,0xc9, + 0xff,0xfb,0xfe,0xff,0xbf,0xef,0xfb,0xfe,0xff,0xbf,0x6f,0xfb,0xfe,0xfd,0xbb,0xef, + 0xf9,0x7e,0x7f,0xe7,0xf8,0xfe,0x7f,0x9f,0xe2,0xf9,0xfe,0x7f,0x9f,0xe7,0xf8,0xfe, + 0x3f,0x9f,0xee,0xfb,0xff,0xe6,0x6f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0x6f,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xf7,0xef,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xfe,0xff, + 0xef,0xff,0xfe,0xbf,0xbf,0xff,0xfb,0xfe,0xff,0xbf,0xef,0xff,0xff,0xff,0xb7,0xff, + 0xff,0xff,0xe5,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xd7,0xfd,0xed, + 0xfb,0x5f,0xd7,0xbc,0x3f,0x8f,0x90,0xbc,0x3d,0x0f,0xca,0xd0,0xfe,0x3d,0x2f,0xeb, + 0xfa,0xfe,0x2f,0x8f,0xe3,0xf7,0xf5,0xff,0xf9,0xbf,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xfa,0x77,0x9f,0xba,0xea,0xfa,0x7f,0x8f,0xfb,0xfa,0x3f,0x8f,0x23, + 0xec,0xf2,0x3f,0xef,0xa3,0xfe,0xff,0xbf,0xef,0xfb,0xfe,0xfb,0x7e,0x9f,0x9d,0xd3, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0x5d,0xf7,0x7f,0xfd,0xf7,0xff, + 0xf5,0x7f,0x7f,0x4f,0xf3,0xf5,0x7f,0x7f,0xf5,0xff,0xe5,0xff,0xff,0xff,0xfb,0xff, + 0x5f,0xfe,0xff,0xd7,0xff,0xfe,0xff,0xff,0xf9,0xfe,0x7f,0x9f,0xe7,0xf9,0xfe,0x7f, + 0x8b,0xe6,0xf9,0xfe,0x6f,0x9f,0xe6,0xf9,0xf8,0x4b,0x86,0xf8,0xb8,0x3e,0x1f,0xe7, + 0x60,0xbe,0x7e,0x1f,0xe7,0xe1,0xfe,0x76,0x1f,0xe2,0xf8,0x74,0x1f,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0x3f,0xcf,0xff,0xf5,0xfd,0x7f,0xcf,0xfb,0xff, + 0x9f,0xdf,0xfb,0xfc,0xfd,0x3f,0xef,0xf9,0xfe,0xff,0xff,0xe7,0xfb,0xfe,0xff,0x7f, + 0xff,0xff,0xc3,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xb7,0xfb,0xff, + 0xde,0xb7,0xaf,0xf9,0xff,0x4d,0x7c,0xdb,0x7f,0xcc,0xd3,0x2d,0xfd,0x37,0xdf,0xd3, + 0x7d,0xff,0x37,0x5f,0xd3,0x3f,0xff,0xf9,0xea,0x7f,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xf5,0xff,0x3f,0xff,0xff,0xff,0xff,0x7f,0xfe,0x7f,0xe7,0x7f,0xee, + 0x77,0x9e,0xff,0xf9,0xff,0xff,0x9f,0xff,0xf9,0xff,0xff,0x9f,0xff,0xff,0x7e,0x2f, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xdf,0xe7,0xff,0xff,0xff,0xff, + 0xed,0xff,0xa7,0xfa,0x6f,0xff,0xa3,0xe9,0xff,0xfe,0x9f,0xff,0xe9,0xff,0xfe,0x9f, + 0xff,0xe9,0xff,0xff,0xf3,0x74,0xff,0xff,0xff,0xff,0x6f,0xff,0xff,0xff,0xdf,0xff, + 0xff,0xff,0xfd,0xbf,0xef,0xff,0xff,0xff,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7a,0x3f,0xff,0xeb,0xfa, + 0xf6,0xbf,0xab,0xea,0xfa,0xfe,0xbf,0xad,0xeb,0xfa,0xde,0x3f,0xaf,0xeb,0xfa,0xff, + 0xaf,0xeb,0xfa,0xfe,0xaf,0xaf,0xe8,0xf2,0x3e,0x9f,0xa3,0xe9,0xfa,0xfe,0xbf,0xaf, + 0xeb,0xf7,0x67,0xff,0xff,0xff,0xf5,0x7f,0xff,0xff,0xff,0xff,0xfe,0xff,0xf3,0xf3, + 0x6d,0xdf,0xff,0xff,0xfe,0xff,0xef,0xff,0xff,0xff,0x3f,0xdf,0xf3,0xfc,0x7f,0x3f, + 0xc7,0xf3,0xfc,0xff,0xff,0xff,0xff,0xff,0xe4,0x7b,0xff,0xff,0xff,0xff,0xbf,0xff, + 0xfd,0xfe,0x7f,0xfe,0xeb,0xfd,0xfe,0xff,0xdf,0xf7,0xfe,0xff,0xef,0xff,0xff,0xff, + 0xbe,0xff,0xbd,0xee,0xff,0xbe,0x6f,0xfd,0xfa,0xbd,0xff,0xdf,0xff,0xfd,0xf9,0x5f, + 0xff,0xff,0xff,0xfb,0x7f,0xff,0xfd,0xbf,0x6f,0x7f,0xff,0xdd,0xfb,0xff,0xbb,0xff, + 0xff,0xff,0xfb,0xfe,0xff,0xbf,0xeb,0xfa,0xfa,0xdf,0xaf,0xfb,0xee,0xfd,0xdf,0xff, + 0xff,0xff,0xff,0xff,0xfe,0xb3,0xff,0xff,0xff,0xff,0xdf,0xf7,0xfd,0xdf,0xff,0xff, + 0xb7,0xff,0xfa,0xff,0xaf,0xff,0xdf,0xff,0xff,0xef,0xff,0xfe,0xbf,0xff,0xff,0xfe, + 0xf8,0xff,0xff,0xff,0xff,0xef,0xf7,0xff,0xff,0x6b,0xff,0xf0,0x7f,0xff,0xff,0xff, + 0x7f,0xff,0xfb,0xff,0xff,0xff,0x7d,0xf7,0xdf,0xef,0xff,0xbf,0xff,0xf7,0xfd,0x87, + 0xff,0xff,0x7f,0xff,0xff,0xef,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe, + 0xbf,0xfe,0x6f,0xff,0xff,0xfb,0xbe,0xff,0xff,0xff,0xfb,0xbe,0xff,0xb7,0xef,0xeb, + 0xf8,0xff,0x3f,0xef,0xfb,0xfb,0x3f,0xcf,0xf3,0xfc,0xff,0x3b,0xcf,0xf3,0xff,0xdf, + 0xff,0xff,0xf3,0x7e,0xff,0x9f,0xfd,0xff,0xfd,0xff,0xff,0xbd,0xfb,0x7e,0xff,0xff, + 0xbe,0xbf,0xbf,0xef,0xfb,0x7e,0xff,0x78,0x5b,0xeb,0xfe,0xff,0x1f,0x77,0xfd,0xbf, + 0x6f,0xdf,0xf6,0xed,0xbf,0xff,0xfb,0xff,0xff,0xff,0xef,0xbf,0xff,0xff,0xfa,0xbf, + 0xff,0xff,0xb7,0xed,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xfb,0xff,0xee,0xfb,0xff, + 0xff,0xff,0xeb,0xfe,0xff,0xbf,0xef,0xfb,0xb2,0xff,0xbf,0xff,0xff,0xff,0xff,0xfb, + 0xfd,0xd7,0x7f,0xff,0xff,0xb7,0xff,0xff,0xff,0xfc,0x7f,0xff,0xdf,0xbf,0xbc,0x7d, + 0x7f,0xc7,0xff,0xfa,0xff,0xf7,0xfd,0xff,0xfd,0xff,0xff,0xf7,0xff,0xdf,0xbf,0xdf, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xfd,0xf7,0xec,0xff,0xff,0xff,0xff, + 0xf7,0xff,0xfb,0xff,0xff,0xef,0xef,0xfe,0xbf,0xff,0xf7,0xdf,0xff,0xff,0xff,0xbe, + 0xff,0xbe,0xff,0xff,0xfd,0xfb,0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0x5f,0xff,0xff,0xff,0xfd,0xff,0xff,0xff,0xf7,0xfd,0xff,0x7b,0xde,0xf7, + 0xbd,0xff,0x5c,0xd7,0xf7,0xff,0x7f,0xdb,0x37,0x7d,0xdf,0x7a,0xdf,0xf7,0xfd,0x7f, + 0xff,0xff,0xff,0xfc,0xff,0xff,0xf7,0xff,0xd9,0xff,0xff,0xff,0xff,0x3e,0xff,0xff, + 0x7c,0xbf,0x3f,0xcf,0x73,0xf4,0x7f,0x7f,0xdf,0xf3,0xfc,0xff,0xdf,0xf7,0xfd,0xdf, + 0x7f,0xd7,0xf7,0xfd,0xff,0x3f,0xff,0xff,0xff,0xbf,0xbf,0xff,0xff,0xff,0xec,0x7e, + 0xff,0xff,0xff,0xf7,0xff,0xff,0xef,0xbf,0xef,0x7b,0xee,0xff,0xbf,0xff,0xff,0xfe, + 0xff,0xbf,0xbf,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xff,0xfd, + 0xd7,0xff,0xff,0xff,0xfe,0x83,0xff,0xff,0xef,0xfb,0x7f,0xff,0xbf,0xef,0xca,0xbe, + 0xef,0xb9,0x2f,0xcb,0xa6,0xed,0x3b,0x2e,0xcc,0xec,0xbb,0xee,0xcb,0xbe,0xef,0xbf, + 0x5e,0x7f,0x3f,0xff,0xff,0xec,0xff,0xfe,0xf7,0xff,0xff,0x39,0xaf,0xff,0xfc,0x7f, + 0x1f,0xef,0xf7,0xbf,0x79,0xde,0x73,0xfd,0x6b,0x79,0xdc,0xf5,0x9d,0x7f,0x4f,0xf5, + 0x9d,0x7f,0x5f,0xd3,0xf3,0xfd,0xe6,0x6f,0xf7,0xff,0xff,0xfc,0x5f,0xff,0xc7,0xff, + 0xff,0x5a,0x3d,0xff,0xfc,0xaf,0x2b,0xfe,0xfe,0xfd,0xef,0x7a,0xde,0xd7,0xb5,0xed, + 0x7a,0xde,0xd7,0xb5,0xef,0x7e,0xd7,0xb5,0xef,0x7b,0xde,0xd7,0xbd,0xbb,0xff,0xff, + 0xff,0xff,0xaf,0x5f,0x9e,0xff,0xff,0xef,0x86,0xff,0xff,0xb7,0xe5,0xff,0xff,0xdf, + 0xa7,0xe9,0xfa,0x7e,0x9f,0xa7,0xe9,0xfa,0x7e,0x9f,0xa7,0xea,0x7e,0x9f,0xa7,0xe9, + 0xfa,0x7e,0x9f,0xa7,0xff,0xff,0xff,0xff,0xf5,0xe5,0xf3,0x7f,0xff,0xff,0x66,0xff, + 0xff,0xfa,0xbb,0x2e,0xdb,0xb3,0xff,0xb5,0x6d,0xfb,0x56,0xd5,0xb7,0xed,0xdb,0x36, + 0xd5,0xb5,0x7b,0x56,0xdf,0xb5,0x6d,0x5b,0x7e,0xde,0xf7,0xff,0xff,0xff,0xff,0xff, + 0xac,0xcb,0x37,0xff,0xfe,0x9b,0xff,0xff,0xd5,0xa5,0x6b,0xfa,0x77,0xdd,0xe7,0x79, + 0xd6,0x75,0x9d,0xf7,0x51,0xda,0x77,0x9d,0x6d,0xde,0x77,0x9d,0xf7,0x79,0xde,0x75, + 0x9d,0xff,0xff,0xff,0xff,0xfd,0xf5,0xa9,0x6f,0xff,0xfd,0xb9,0xff,0xff,0xfa,0xde, + 0xbf,0xef,0xef,0xfb,0xf2,0xf6,0xbb,0xee,0xfb,0xf6,0xef,0xbd,0xee,0x8b,0xff,0xbe, + 0x2f,0x4b,0xc6,0xf8,0xbb,0x2f,0xd6,0xbf,0xff,0xff,0xff,0xff,0xfe,0xbf,0xef,0xff, + 0xff,0xe8,0x7f,0xff,0xff,0x5f,0xd7,0x3f,0xfd,0xff,0xd2,0x74,0xfd,0xbf,0x6f,0xd2, + 0x76,0xfd,0x2b,0x6b,0xd0,0xfd,0x2f,0x41,0xd3,0xf4,0xbd,0x87,0x4b,0xda,0xbf,0xff, + 0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xfe,0x8f,0xff,0xff,0xff,0xff,0xef,0xff,0xfe, + 0xcd,0x8b,0x6e,0xdb,0xb6,0xed,0xab,0x6e,0xdb,0xb6,0xad,0xbe,0xda,0xb6,0xed,0xbb, + 0x6a,0xdb,0xb6,0xbd,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xd9,0xff,0xff,0xcd,0xff, + 0xff,0xff,0xfb,0xff,0xbd,0xff,0xff,0x9f,0xe4,0xf9,0x3e,0x4f,0x93,0xe4,0xf9,0x3e, + 0x4f,0x93,0xf9,0x3e,0x4f,0x93,0xe4,0xf9,0x3e,0x4f,0x93,0xff,0xff,0xff,0xff,0xff, + 0xfe,0xfd,0xff,0xff,0xfb,0x9f,0xff,0xbf,0xec,0x5b,0xfe,0xff,0xbd,0x27,0xe9,0xfa, + 0x3e,0x8f,0xa7,0xe8,0xfa,0x7e,0x8f,0xa7,0xfa,0x7e,0x9f,0xa7,0xe9,0xfa,0x3e,0x9f, + 0xa3,0xfb,0xfe,0xff,0xbf,0xef,0xfb,0x96,0xbf,0xbf,0xfe,0x36,0xff,0xff,0xef,0xfb, + 0xfe,0xff,0xff,0xe7,0xfd,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xf7,0xff,0x7f, + 0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff, + 0xff,0x70,0xff,0xff,0xfb,0xfb,0xff,0xbf,0xff,0xfa,0xef,0xb3,0xed,0xfb,0x7e,0xcf, + 0xb7,0xec,0xfb,0x7e,0xcf,0xec,0xfb,0x3e,0xcf,0xb3,0xed,0xfb,0x3e,0xdf,0xff,0xff, + 0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xfc,0x9f,0xff,0xff,0xff,0xf5,0xff,0xff,0x5f, + 0xb2,0xf6,0x2d,0xab,0x63,0x98,0xf6,0xbd,0x8f,0x63,0xd8,0xf9,0x8f,0x63,0xd8,0xf6, + 0x3d,0xaf,0x6b,0xd8,0xfd,0xff,0xff,0x5f,0xff,0xf7,0xff,0xbf,0xfe,0xff,0xd3,0xff, + 0xff,0xff,0xbe,0xdf,0xfa,0xe9,0xfb,0x3c,0xcf,0x33,0xec,0xfb,0x3e,0xcf,0x33,0xec, + 0xfb,0x3f,0xb3,0xcc,0xdb,0x3e,0xcf,0xb3,0xec,0xfb,0x3f,0x9f,0xff,0xe9,0xff,0x7e, + 0xef,0xf3,0xff,0xf9,0xd3,0x3f,0xff,0xff,0xdf,0x97,0xbf,0xdf,0xff,0xfe,0xf3,0xfd, + 0xdf,0x3f,0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xfd,0xef,0x7f,0xcf,0xf7,0xfd,0xef,0x77, + 0xd7,0xf7,0x7f,0xfd,0x7f,0xff,0xd7,0xff,0xff,0xfe,0xff,0x4f,0xff,0xff,0x8f,0xc3, + 0xe1,0xfa,0x7e,0x1f,0xc6,0xf9,0xbc,0x6f,0x99,0x86,0xf9,0x9a,0x66,0x19,0x85,0x98, + 0x67,0x9b,0xa6,0x61,0xbe,0x6f,0x1b,0xe6,0xe9,0xfe,0x2e,0x1f,0xe2,0xe1,0xfe,0x7f, + 0x87,0x61,0xff,0xff,0xff,0xfe,0xef,0xb7,0xe4,0xd9,0x7e,0xcf,0xf7,0xed,0xfb,0x3e, + 0xcf,0xf1,0xfc,0x7b,0x1e,0xf1,0xec,0x7f,0x1e,0xc7,0xb1,0xfc,0xfb,0x3f,0xdd,0xbf, + 0xfe,0xe9,0x7f,0xdf,0xbf,0xff,0xff,0xfa,0x3f,0xff,0xff,0xff,0xfd,0xa3,0xf8,0x9c, + 0x2f,0x9b,0xfe,0xf9,0xbe,0x6e,0x99,0xfe,0xeb,0xba,0x6e,0x9e,0xe9,0xbf,0xef,0x9b, + 0xa6,0xff,0x9e,0x6f,0xfb,0xe7,0xff,0xfa,0x2f,0xfb,0x67,0xdf,0xff,0x9e,0x93,0xff, + 0xff,0xfd,0x6d,0x79,0xd5,0x7f,0xd7,0x65,0x9f,0x76,0x5d,0xd6,0x65,0xdf,0x77,0xdd, + 0x97,0x66,0x76,0x5d,0xf7,0x55,0xd9,0x77,0xdd,0x96,0x7f,0x7d,0xff,0xfb,0xd5,0xff, + 0xf1,0x7f,0xff,0xf7,0xe0,0xff,0xff,0xfe,0xfd,0xb6,0xef,0x9f,0x67,0xb9,0xbf,0xef, + 0x9b,0xe6,0xfb,0xbf,0xef,0xbb,0xee,0xfb,0xef,0xbb,0xfe,0xf9,0xbe,0xef,0xfb,0xe6, + 0xff,0xee,0x7f,0xff,0x66,0xbf,0xfe,0x7f,0xff,0xff,0x77,0x9f,0xff,0xff,0xff,0xf2, + 0xfc,0xbf,0x2f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xff, + 0xff,0xfd,0xff,0xff,0xff,0xff,0xd3,0xff,0xff,0xff,0xf7,0x7f,0xfe,0xfc,0xbf,0xff, + 0x7b,0xdb,0xff,0xfe,0xbf,0xae,0xea,0xba,0xbe,0xbf,0xa7,0xeb,0xfa,0xde,0x0f,0xa5, + 0xe9,0xf8,0xbe,0xbf,0xab,0xf8,0xfe,0xaf,0xaf,0xe9,0xfa,0xbe,0xbd,0xaf,0xea,0xfa, + 0xfe,0xbf,0xab,0xea,0xba,0xbe,0x9f,0xfe,0x7f,0xff,0xff,0xff,0xff,0xff,0xfe,0xff, + 0xcb,0xfb,0xfc,0xcf,0x2f,0xcd,0xb3,0xfc,0xff,0x37,0xcf,0xec,0xeb,0x37,0xcf,0xb3, + 0xec,0xdf,0x3f,0xcf,0xf3,0xff,0xfb,0x7f,0xef,0xdf,0xfc,0xff,0xff,0xfe,0xe7,0xff, + 0xff,0xbd,0xef,0xff,0xff,0xff,0xef,0xfb,0xef,0x33,0xaf,0xd3,0xbb,0xea,0xf7,0xaf, + 0xee,0xfe,0xaf,0xb7,0xcb,0xfb,0xbd,0x2f,0xff,0xeb,0xdc,0xff,0xff,0xff,0xee,0xff, + 0xfd,0x2f,0xff,0x77,0xbd,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xfb,0xff, + 0xff,0xff,0xff,0xdb,0xf7,0xff,0xbf,0x7f,0xfe,0xfd,0xff,0xef,0xdb,0xff,0xb5,0xff, + 0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xbf,0xff,0xff,0xff,0xe3, + 0x78,0xfb,0xff,0xbd,0xe9,0xfa,0xbf,0xd9,0xf7,0xed,0xfa,0xfe,0xbf,0xff,0xfa,0xfe, + 0xff,0xaf,0xff,0xfa,0x7f,0xff,0x2c,0xff,0xff,0xfe,0x3f,0xbf,0xfb,0xf8,0x77,0xdf, + 0xff,0x47,0xff,0xff,0xef,0xfe,0xeb,0xbf,0xff,0xfd,0xfe,0x9e,0xdf,0xff,0xcf,0xff, + 0x7f,0x6d,0xd7,0xef,0xfd,0x5f,0xfb,0xfd,0x7b,0xff,0xdd,0xff,0x7d,0xbf,0xff,0xff, + 0xff,0xfe,0xfd,0xfb,0xbd,0xff,0xff,0xee,0xff,0xff,0xaf,0xff,0xe7,0xf3,0xff,0xef, + 0xfb,0xef,0xef,0xee,0xff,0xff,0xff,0xdf,0xfe,0x7f,0x3b,0xb3,0x7f,0xfe,0xc5,0xce, + 0xef,0xff,0xde,0xff,0xef,0xff,0xf8,0xff,0xff,0xf7,0xff,0xff,0xff,0xfd,0x1f,0xef, + 0xfb,0x7b,0xf3,0xfd,0xcf,0x4f,0xdb,0x77,0xbf,0xef,0xaf,0xfb,0xff,0xff,0xbf,0x5f, + 0xdb,0xfd,0x7f,0xef,0xff,0xf6,0xff,0xff,0xff,0xfb,0xfa,0x7f,0xbf,0x7f,0xff,0xfe, + 0xdd,0xff,0xff,0xff,0xc3,0xff,0xff,0xbf,0xf7,0xaf,0xbf,0xff,0xbb,0xfd,0xee,0x7f, + 0xff,0xf7,0xfd,0xff,0xff,0x7d,0xfe,0xfe,0xfb,0xff,0x7f,0xff,0xbf,0xfb,0xff,0xdf, + 0xef,0xff,0xff,0xfb,0xff,0xff,0xeb,0xbf,0xfe,0xff,0xf6,0x7f,0xff,0xff,0xff,0xff, + 0x7f,0xdb,0xfe,0xff,0x47,0xdb,0xff,0xdf,0xff,0xfb,0xfb,0xff,0xff,0xff,0xcf,0xee, + 0xbf,0xff,0xff,0xf7,0xfb,0xcf,0x3f,0xff,0x7f,0xff,0xff,0xff,0xff,0xde,0xff,0xff, + 0xff,0xcd,0xff,0xff,0x7f,0xff,0xff,0xff,0xfd,0xff,0xff,0x7f,0x7f,0xff,0xff,0xff, + 0xbf,0x7d,0xfb,0xff,0xdb,0xfe,0xdf,0x9e,0xff,0xfe,0xff,0xff,0xfc,0xff,0xff,0xff, + 0xff,0xff,0xbf,0xff,0xff,0xff,0xff,0xd1,0xff,0xff,0xf7,0xff,0x5f,0xfe,0xbf,0xef, + 0xef,0xdf,0xf2,0x7f,0x9f,0xb7,0xff,0xfb,0xe5,0xfd,0x6f,0xd7,0xff,0xef,0xff,0x5f, + 0xff,0x64,0xfe,0xbf,0xed,0xff,0x75,0xff,0xff,0xff,0xfb,0xfe,0xfe,0xfa,0x9f,0xff, + 0xff,0xff,0xff,0xff,0xfe,0xbf,0xad,0xda,0xfd,0xff,0xff,0xfd,0xfd,0x7f,0xbf,0xbd, + 0xfe,0xff,0xfe,0xbf,0xff,0xff,0xbe,0x7f,0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0xff, + 0xff,0xfb,0xff,0xbe,0x47,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xaf,0xff, + 0xff,0xff,0xff,0xff,0xfd,0xb7,0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0xdf,0xff,0xff, + 0x7f,0xfe,0xff,0xef,0xff,0xff,0xdf,0xf7,0xff,0xfb,0xec,0x3f,0xff,0xfe,0xff,0xbf, + 0xfe,0xfb,0xbf,0xef,0xb3,0xfc,0xff,0x9f,0xef,0xfd,0x2e,0xff,0xbf,0xef,0xfe,0xff, + 0xbf,0xef,0xfb,0xfe,0xff,0xbf,0xdf,0xfb,0xff,0xff,0xbf,0xff,0xfb,0xef,0xff,0xff, + 0xf0,0x9a,0xff,0xff,0xdf,0xf1,0xff,0xdf,0x77,0xcd,0xf2,0xff,0xdf,0xb7,0xed,0xff, + 0xe9,0xbf,0xb7,0xfd,0xff,0xdf,0xef,0xdd,0xf7,0x7f,0xbf,0x77,0xfe,0xfb,0x7f,0xff, + 0xf7,0xff,0xf7,0x7c,0x6f,0xff,0xf5,0x93,0xdf,0xff,0xfb,0xfe,0xbf,0xbf,0xff,0xce, + 0xf4,0xbc,0xaf,0xfb,0x9a,0xf4,0xff,0xbf,0xfb,0xfb,0xff,0xbf,0xff,0xfe,0xff,0xf9, + 0xaf,0xfb,0xfa,0xff,0xbf,0xff,0x2f,0xff,0xf3,0xbd,0x2f,0xff,0xfe,0xff,0x6f,0xff, + 0xff,0x7e,0x57,0x37,0xcf,0xff,0x7f,0xd7,0xf5,0xff,0xf3,0x7e,0x5f,0xf7,0xff,0xf3, + 0x7c,0xf7,0xff,0xff,0x5f,0xdf,0xf5,0xfd,0x7b,0x5f,0xff,0xff,0xe5,0xff,0xfe,0xd7, + 0xfd,0xff,0xff,0xf7,0x8f,0xff,0xff,0xef,0xfa,0xdf,0xb7,0xbd,0xff,0x32,0xed,0xff, + 0xae,0xdb,0x37,0xfe,0xf7,0xac,0xcb,0x7f,0xb7,0xfd,0xff,0xd6,0xdd,0xf7,0xff,0x9f, + 0xfa,0xff,0xff,0xed,0xff,0xef,0xfd,0xf7,0x7f,0xff,0xe5,0xbf,0xff,0xfd,0xdf,0x5b, + 0xf6,0xf7,0xbf,0xee,0x57,0xfd,0xf7,0xfb,0xee,0xff,0xdd,0xf7,0xb9,0x6f,0xf6,0xff, + 0xfd,0xfa,0x5b,0x7d,0xf7,0xf7,0xdf,0x7d,0xbf,0xfd,0xbf,0xff,0x7f,0x1d,0x8f,0xff, + 0xde,0x9e,0xff,0xff,0xbf,0xfb,0xfa,0xfe,0xbf,0xad,0xab,0xfa,0xfe,0xbe,0xaf,0xaf, + 0xfb,0x9e,0xb6,0xbf,0xfa,0xdf,0xe5,0x6f,0xfb,0x7a,0xd7,0xb7,0xaf,0xeb,0x7f,0xfe, + 0xbf,0xff,0xfb,0xef,0xbf,0xff,0xfe,0x37,0xff,0xff,0xf7,0xff,0x7f,0x5b,0xd6,0xf5, + 0xbd,0x7f,0x5f,0xde,0xf7,0xbd,0xff,0x7b,0xde,0xf7,0xbe,0x5b,0xfe,0x35,0xbd,0x6f, + 0x52,0x16,0xf5,0xcd,0xef,0xff,0xd6,0xff,0xfd,0x6f,0x7f,0xff,0xff,0xf6,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x7f,0xbf,0xef,0xfb,0x7f,0xfd,0xb7,0xe7, + 0xff,0xff,0x9f,0x7f,0xf9,0xff,0xfd,0xff,0xef,0xff,0xfe,0xdf,0xff,0xff,0xff,0xfe, + 0xdf,0xff,0xed,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfa, + 0xf6,0xbf,0x9f,0x7f,0x9f,0xff,0xff,0xff,0xfb,0xe6,0xfd,0xff,0xef,0x9b,0xf6,0x3f, + 0xff,0x67,0xff,0xff,0xff,0xff,0x7f,0xff,0xfe,0xff,0xa1,0xff,0xfb,0xfe,0xfd,0xbd, + 0x6f,0x5b,0xf6,0xff,0xbd,0x6e,0xfb,0xe6,0xfd,0xbf,0x63,0xfb,0xd6,0xff,0x6e,0xf8, + 0xbe,0xff,0xbb,0xe6,0xfb,0xf6,0xff,0xbf,0xef,0x5b,0xfe,0xf5,0xbf,0x6f,0xfb,0xbf, + 0xef,0x6f,0xff,0xff,0xfd,0xbf,0xef,0xfb,0xf7,0xff,0xbf,0xff,0xff,0xfd,0xff,0x7f, + 0x6f,0xff,0xfe,0xff,0xff,0xfb,0xfe,0xff,0xff,0xef,0xff,0xf7,0xff,0xbf,0xff,0xfb, + 0xff,0xff,0xbf,0xcf,0xfb,0xff,0xf7,0xaf,0xff,0xff,0xff,0xdf,0xef,0xfd,0xff,0xff, + 0xbf,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xbf,0xfd,0xfe,0xff,0x7f,0xff,0xfb, + 0xef,0xff,0xff,0xef,0xff,0xfd,0xff,0xff,0xef,0xfb,0xfe,0xff,0xff,0xc1,0xfe,0xff, + 0xff,0xff,0xfe,0xf6,0xb5,0xad,0x6b,0xfe,0xff,0xf5,0xbd,0x6f,0xdf,0xd0,0xf5,0xaf, + 0x6b,0xd6,0xa4,0x2d,0x6b,0x5a,0xd2,0xb5,0xbf,0x7f,0xdb,0xff,0xfd,0xbf,0xff,0x5b, + 0xdf,0xff,0xff,0xfc,0x3f,0xff,0xff,0xff,0xfa,0xfb,0xbe,0xef,0xbb,0xfd,0xfb,0x7e, + 0xa9,0xab,0xee,0xb2,0x3e,0xad,0xab,0xfa,0xbe,0x8f,0xaa,0x6a,0xfa,0x3e,0xa9,0xb7, + 0xee,0xbf,0xfe,0xef,0xff,0xea,0xbe,0xbe,0xaf,0x9d,0x83,0xfd,0xff,0xff,0xef,0xff, + 0xdd,0xd7,0x75,0xdd,0xfe,0xff,0xff,0xff,0xdf,0x7f,0x5c,0xf7,0xfd,0xce,0xff,0xd5, + 0x7d,0xff,0xff,0x5d,0xff,0xfd,0xff,0x7f,0xff,0xf7,0x7f,0xff,0xf3,0x7f,0xf7,0x6f, + 0xec,0xff,0xff,0xf9,0xfa,0x6f,0x8f,0x83,0xe0,0xf8,0x7f,0x1f,0xa7,0xe1,0xf8,0x3f, + 0x89,0xe6,0xe0,0xb8,0x7f,0x82,0xf0,0xf8,0x7e,0x0b,0xa7,0xe0,0xf8,0x3e,0x1f,0xe3, + 0xe1,0xfe,0x7e,0x1b,0xe6,0xf8,0xf5,0xdf,0xff,0xff,0xff,0x7f,0xfb,0x7e,0xdf,0xb7, + 0xee,0xeb,0xbe,0xdf,0xb7,0xef,0xfd,0x1f,0xff,0xbf,0xef,0x7e,0x4f,0xbf,0xed,0xf9, + 0x17,0xdf,0xb3,0x65,0xfb,0xff,0xdf,0xbf,0xfd,0xfb,0x3f,0xdf,0xef,0xa3,0xff,0xff, + 0xff,0xfb,0xb6,0x6d,0x1f,0x27,0xc9,0xff,0xf7,0x9b,0x23,0xd1,0xef,0xad,0xff,0x26, + 0xd1,0xed,0x0b,0x7f,0xc9,0xb4,0x2d,0xbb,0x23,0x7a,0xb2,0x7f,0xfb,0x27,0xfe,0xf2, + 0x3b,0xfa,0xf9,0xe8,0x7f,0xff,0xff,0xff,0xff,0xdd,0xd7,0x79,0xde,0x7b,0xff,0xd7, + 0x79,0xdd,0x7f,0xfd,0xff,0x79,0xfd,0x6d,0xd7,0x3b,0xde,0x77,0x5d,0xff,0x79,0xde, + 0xff,0x9f,0xff,0x79,0xff,0xf7,0x9c,0xff,0x7f,0x7f,0x2f,0xff,0xff,0xff,0xfe,0xe7, + 0xbd,0xfe,0xff,0xbf,0x77,0xd9,0xee,0xef,0xdf,0xfe,0xbf,0xee,0xfb,0xdf,0xbd,0xaf, + 0x6f,0xbe,0xf6,0xbf,0xee,0xed,0x9f,0xef,0xff,0xee,0xff,0xfb,0xee,0xff,0xef,0xff, + 0x50,0xbf,0xff,0xfd,0x3f,0xef,0xcb,0xf6,0xff,0xff,0x2f,0xff,0xf2,0xfc,0xbf,0x47, + 0xd3,0xf2,0xff,0x3f,0xcb,0xff,0xfc,0xbf,0x2f,0xff,0xf2,0xff,0xfd,0x2f,0xfd,0xf2, + 0xff,0xff,0x2f,0xfb,0xff,0x7e,0xf8,0xbf,0xff,0xeb,0xba,0xde,0xbf,0x2f,0xeb,0xfa, + 0xf6,0xaf,0x8f,0xeb,0xfa,0xf6,0xb7,0xaf,0xc9,0xfa,0x3f,0xad,0xeb,0xf2,0xfe,0xb7, + 0xab,0xeb,0xfa,0xbe,0xbf,0xaf,0xeb,0xfa,0xfe,0xaf,0xaf,0xeb,0xff,0x87,0xff,0xff, + 0xff,0xf5,0xfd,0x8f,0xc3,0xfc,0xff,0x35,0xdf,0xe3,0xf8,0xff,0xff,0xbf,0xa3,0xfc, + 0xfe,0x8e,0xb7,0xf8,0xee,0x3e,0xcf,0xe3,0xdf,0xfe,0x3f,0xff,0xe3,0xef,0xfe,0x3f, + 0x4f,0xff,0xff,0xe8,0x7f,0xff,0xf7,0xff,0xff,0xff,0xf7,0xcd,0xfb,0xde,0xff,0xf7, + 0xfd,0xff,0x7f,0xff,0x5f,0xfd,0xff,0x7f,0xfe,0xdf,0xff,0x7f,0xf7,0xf7,0xff,0xff, + 0x7d,0xff,0xff,0xff,0xff,0xff,0xcb,0xf7,0xff,0xf8,0x5f,0xef,0xff,0xff,0xff,0xfd, + 0x7f,0x5f,0x57,0xbb,0xfe,0xff,0x5f,0xd7,0xff,0xbb,0xdf,0x5f,0xd7,0xf9,0x7f,0xff, + 0xd7,0xf5,0xfe,0xef,0x5f,0xbf,0xf5,0xfb,0xfe,0x5f,0xff,0xf5,0xff,0xfb,0xff,0xff, + 0xcb,0xff,0xff,0xff,0xff,0xfd,0x87,0xeb,0xfa,0x8f,0xbf,0xbf,0x63,0xf8,0xf7,0xff, + 0xef,0xff,0xd8,0x7f,0x87,0xeb,0xff,0xfe,0x3f,0x87,0xe1,0xff,0xfe,0x3f,0xff,0xa3, + 0xf7,0xfe,0x3f,0xbf,0xeb,0xef,0xfa,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0x7e,0x6f, + 0xed,0xde,0xff,0xfd,0xff,0xff,0xd7,0xd7,0xff,0x7f,0xdf,0x7f,0xbb,0xfb,0xfe,0xbb, + 0xdf,0xff,0xfb,0xff,0xdf,0xff,0xff,0xff,0xff,0xfe,0xfb,0x7f,0xf7,0xef,0xfb,0xfe, + 0xff,0xbf,0xee,0xff,0xbe,0xf3,0xb6,0xdf,0xff,0xaf,0xeb,0x7f,0xff,0xbf,0xff,0xfb, + 0xfa,0xff,0xaf,0xff,0xda,0xdf,0x3e,0xbf,0xfd,0xfb,0xff,0xff,0xbd,0xfc,0xfb,0x7f, + 0xff,0x87,0x7f,0xc5,0xff,0xff,0xff,0xef,0xff,0xff,0xff,0xff,0xbf,0xfb,0xff,0xf2, + 0xff,0xbf,0xfd,0xce,0xd6,0xfc,0xff,0xdf,0xf2,0xf5,0xbf,0xbf,0xff,0xfe,0xf7,0xdd, + 0xef,0xfb,0xff,0xbf,0xef,0xff,0xff,0xf7,0xff,0xfe,0xbf,0xff,0xff,0xff,0xfe,0xff, + 0xff,0xfc,0xff,0xdd,0x7f,0xff,0xbf,0xf7,0xff,0xf3,0xff,0xb7,0xbf,0xeb,0xff,0xbf, + 0xef,0xff,0xff,0xff,0xf5,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xff,0xfe,0xef,0xbf, + 0xd7,0xff,0xff,0xdf,0xfc,0xbf,0xff,0xff,0xef,0xff,0xff,0xef,0xeb,0x7f,0xff,0xff, + 0xfb,0xcf,0xf7,0xfc,0x1f,0xbb,0xf1,0xfd,0xee,0xf7,0xc7,0xff,0xff,0xff,0xff,0xef, + 0xff,0xff,0xff,0xff,0xff,0xff,0xe4,0xff,0xdf,0xff,0xff,0xaf,0xff,0xff,0xff,0xff, + 0xff,0xdf,0xfe,0xff,0xff,0xfd,0xff,0x6a,0xfe,0xff,0xbd,0xff,0xff,0xbf,0xbf,0xff, + 0xe6,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xfc,0x1f,0xff,0xff, + 0x77,0xff,0xff,0xff,0xff,0xd7,0xff,0xff,0x7f,0x5f,0xd3,0xff,0xfd,0x7f,0xff,0xff, + 0xfb,0xff,0x4c,0xf7,0xff,0xff,0x7b,0xe6,0xff,0x7f,0xff,0xfb,0xff,0xd7,0xd5,0xff, + 0xff,0xdf,0xff,0xa1,0xff,0xff,0x7e,0xdf,0xdb,0xf6,0x7f,0xfe,0xdf,0xa7,0xef,0xfb, + 0xfe,0xff,0xde,0xef,0xff,0x7e,0xff,0xfd,0xfb,0xff,0x7c,0xbf,0x69,0xff,0xfe,0xff, + 0xdb,0xff,0xff,0xfe,0xff,0xbf,0xff,0xd7,0xff,0xe7,0x7f,0xff,0xef,0x5f,0xff,0xff, + 0xff,0xdf,0xbf,0xef,0xfe,0xef,0x5f,0xbf,0xff,0xeb,0x7f,0xdf,0xdb,0xbf,0xfe,0xff, + 0x7e,0xff,0xf5,0xff,0xff,0xbf,0xff,0xff,0xef,0xdf,0xdf,0xf5,0xff,0x7f,0xff,0xff, + 0x23,0xff,0xff,0xef,0xff,0x3f,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xfe,0x9f,0x3e, + 0xcf,0xbf,0xec,0xfe,0xdf,0xb7,0xec,0xfb,0x7e,0xff,0xbf,0xff,0xcf,0xbf,0xdc,0xfb, + 0xff,0xcf,0x9f,0xff,0xff,0xff,0x11,0xaf,0xff,0xff,0xff,0x36,0xbf,0xff,0xfc,0xff, + 0xbf,0xff,0xf3,0xff,0xdf,0xff,0xfd,0xff,0xff,0xaf,0xfe,0xff,0xa7,0xaf,0xff,0xff, + 0xf7,0xff,0xff,0xf7,0xce,0x9f,0xff,0xf9,0xff,0xff,0xff,0xff,0x5a,0x3d,0xff,0xfd, + 0x3f,0xfb,0xff,0xff,0xff,0xef,0xfb,0xff,0xf3,0xff,0xbf,0xfe,0xdf,0xf7,0xf5,0xff, + 0x7f,0xf7,0xfd,0xff,0x7f,0x5f,0xf3,0xff,0xff,0xff,0xfe,0xff,0xef,0xff,0xfe,0xff, + 0xf5,0xff,0xef,0xb6,0xff,0xff,0xbd,0xfd,0xff,0xff,0xff,0xf7,0xff,0xff,0xfc,0xff, + 0x97,0xff,0xfa,0x7e,0x9f,0xa7,0xeb,0x7e,0x9f,0xa7,0xe9,0xfa,0x7c,0xff,0xff,0xff, + 0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x72,0xff,0xff,0xfa,0xfd,0x6f,0xff, + 0xff,0xff,0xff,0x7e,0xdf,0xfe,0x4d,0xbf,0xff,0xeb,0xb2,0xfe,0xbf,0xeb,0xf2,0xfe, + 0xbf,0xaf,0xeb,0xb3,0xdf,0xff,0xfd,0xfb,0xf7,0xdf,0xff,0xfd,0xff,0xff,0xd5,0xfe, + 0x1b,0xff,0xff,0xff,0x67,0x7b,0xff,0xff,0xfd,0x4f,0x6b,0xff,0xee,0xb7,0xff,0xff, + 0x5f,0xd7,0xf5,0xff,0x58,0xd7,0xf5,0x6d,0x7b,0x5e,0x7b,0xff,0xff,0xfd,0xdc,0xff, + 0xff,0xff,0xff,0xff,0x79,0xbd,0xb9,0xff,0xff,0xfb,0xff,0xbe,0xff,0xff,0xff,0xff, + 0xf5,0xff,0xff,0xfa,0xff,0xfd,0xec,0x7b,0xfe,0xff,0x6f,0xfb,0xd6,0xff,0xbc,0xef, + 0xbf,0xff,0xff,0xfd,0xef,0x3e,0xdf,0xff,0xfd,0xff,0xff,0xff,0xed,0x7f,0xff,0xff, + 0xdf,0xdf,0xff,0xff,0xff,0xff,0xff,0x1f,0xff,0x9f,0x5b,0xff,0xd5,0xed,0x7f,0x5f, + 0xf5,0xcd,0x7a,0x5f,0xd7,0x95,0xff,0xff,0xff,0xfc,0x87,0xe3,0xe8,0xff,0xfc,0x1f, + 0xff,0xff,0xfe,0x6f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xed,0xff,0xf7, + 0xff,0xff,0x66,0xfe,0xbe,0xef,0xbe,0xfb,0xbe,0xef,0xbb,0xea,0xfb,0xfe,0xff,0xff, + 0x7f,0xff,0xf7,0xff,0xff,0x67,0xff,0xff,0xff,0xe9,0xff,0xff,0xff,0xdb,0xff,0xff, + 0xff,0xff,0xfe,0xff,0xfb,0xfe,0xff,0xdf,0xf7,0xff,0xff,0xcf,0xf3,0xbf,0x3f,0xcf, + 0xf3,0xfc,0xff,0x3d,0xcf,0xf9,0xe7,0xff,0xfe,0x7f,0xff,0xe7,0xff,0xff,0xff,0xfd, + 0x1f,0xff,0xbf,0x6f,0xbb,0x7e,0xff,0xbf,0xef,0x5b,0xf6,0x5d,0x9f,0xef,0xda,0xf2, + 0xfc,0xbf,0xaf,0xda,0xfc,0xbf,0x2f,0xeb,0xfa,0xff,0xbf,0xef,0xf9,0xfe,0xff,0x8f, + 0xef,0xd9,0xfe,0xff,0xbf,0xfe,0x16,0xff,0xff,0xcf,0xff,0xff,0xff,0xff,0xff,0xff, + 0xf6,0xfd,0xff,0xef,0xdb,0xfc,0x7d,0xdf,0xe7,0xf3,0x7f,0x1f,0xc7,0xf9,0xfe,0x7f, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdb,0xff,0xff,0xbf,0xff,0x78,0xff,0xff,0xfb, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0xfb,0xfe,0xff,0xbf,0xff,0x7b,0xde, + 0xfd,0xef,0x7b,0xdd,0xf7,0x7d,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xfd,0xfb,0xff, + 0xbf,0xff,0xfe,0x17,0xff,0xff,0xdf,0xb5,0xff,0xff,0xff,0xff,0xf5,0xfd,0x7b,0xcf, + 0xd6,0xe4,0x7f,0xff,0xdf,0xf7,0xfb,0x7b,0xdf,0xf7,0xed,0xff,0x7f,0x5f,0xf7,0xbe, + 0x2f,0xff,0xe3,0xf7,0xf4,0x3f,0xff,0xff,0xbf,0xfb,0xff,0xff,0xfb,0x2e,0x9f,0xff, + 0xff,0xdf,0x7e,0xaf,0xa7,0xfe,0xfe,0xae,0x8f,0x67,0xe9,0xfa,0x7f,0xa7,0xe9,0xfa, + 0x7e,0x9f,0xa7,0xc8,0xfe,0xbf,0xef,0xff,0x7e,0xfe,0x76,0x8f,0xff,0x6a,0xf9,0xda, + 0x7b,0xff,0xfb,0x5f,0x97,0xbf,0xff,0xff,0xde,0xd7,0x75,0xff,0x77,0x5f,0xd5,0xbf, + 0xeb,0xff,0xff,0xff,0xeb,0xfe,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0x7f,0xff,0xb6, + 0xdf,0x95,0xff,0xff,0xff,0xfe,0xcf,0xff,0xff,0x8f,0xe2,0xf9,0xfe,0x7f,0x9b,0xe2, + 0xf8,0xbe,0x7f,0x9b,0xe2,0xf9,0xbe,0x6f,0x9b,0x85,0xb8,0x6f,0x9b,0x86,0xe1,0xbe, + 0x7e,0x9f,0xe7,0x61,0xfa,0x7e,0x1b,0xe2,0xe1,0xfe,0x2f,0x87,0x6d,0xff,0xff,0xfd, + 0x7f,0xef,0xff,0xff,0xff,0xbf,0x47,0xf7,0xfe,0xff,0x7f,0x5f,0xf1,0xfe,0xff,0xbf, + 0xfb,0xfe,0xff,0xff,0xef,0xff,0xf4,0xff,0x7f,0xe7,0xfb,0xfe,0x7f,0x7f,0x4f,0xff, + 0xfd,0xff,0xfb,0x3f,0xff,0xff,0xab,0xfd,0xff,0xff,0xff,0xff,0xeb,0x7a,0xff,0xd7, + 0xfd,0xeb,0x7a,0xff,0x9f,0xee,0xde,0x6d,0xbf,0xee,0xd9,0xd6,0xfe,0x8b,0x6d,0xfe, + 0xb7,0xfb,0xeb,0x6f,0xea,0xb7,0xff,0xb7,0x9e,0xf7,0xff,0xff,0xf5,0xff,0xff,0xff, + 0xff,0xfc,0xff,0x7f,0xdf,0xff,0xfd,0xff,0x7f,0xdf,0xf7,0xfc,0xe6,0xde,0x73,0xfd, + 0xe7,0x75,0xdf,0xff,0xdf,0xff,0xf9,0xed,0xff,0x9d,0xff,0x39,0xff,0xf7,0xf7,0xee, + 0xdf,0xff,0xfe,0xbf,0xf7,0xfd,0xff,0xff,0x9f,0xa7,0xeb,0xff,0x7f,0xff,0xaf,0xe9, + 0xfa,0x7e,0x9a,0x69,0xa2,0x7e,0x9a,0x27,0x0b,0xff,0x61,0xff,0xfe,0x9d,0xbf,0xe9, + 0xbf,0xae,0x9f,0xfe,0xff,0x75,0x5d,0xff,0xff,0xd3,0xff,0xff,0xff,0xff,0xff,0xf7, + 0xff,0xef,0x2f,0xd3,0xff,0xfd,0x3f,0x7f,0xd3,0xff,0xbf,0x2f,0xfb,0xf2,0x7f,0x9f, + 0x4f,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xc2,0xff,0xbe,0xa7, + 0xaf,0xea,0xfa,0xbe,0xaf,0xac,0xe9,0xfa,0x2e,0xbd,0x8f,0xcb,0xda,0xb6,0x2d,0xab, + 0xfa,0xce,0xbf,0xae,0xeb,0xfa,0xf6,0xbf,0xaf,0xeb,0xfa,0x9e,0xbf,0x2d,0xeb,0xfa, + 0xee,0xbf,0xf7,0x7f,0xdf,0xff,0xbf,0xf7,0xff,0xff,0xff,0xef,0xff,0x7c,0xef,0xbe, + 0xd7,0xff,0xbc,0xff,0xee,0xdb,0xe7,0xaf,0x6e,0x7f,0xff,0x77,0xff,0xff,0xf7,0xf7, + 0xfd,0xff,0xff,0xff,0xf3,0xdf,0xff,0xff,0xff,0x67,0xff,0xff,0xfe,0xef,0xff,0xff, + 0xff,0xef,0xef,0xe6,0xaf,0x5f,0x7f,0xf7,0x9c,0xbf,0xff,0xff,0xff,0xf7,0xff,0x7f, + 0xf7,0x7f,0xdf,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xff,0xff,0xff,0x91, + 0xfe,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xaf,0xff,0xfe,0xff,0x7f,0x7f,0xff,0xff, + 0x7f,0xde,0xf7,0xff,0xfb,0xef,0xef,0xfd,0xfb,0x7f,0xff,0xef,0xbf,0xef,0xff,0xff, + 0xff,0xbf,0xff,0xff,0xff,0xfc,0x3f,0xff,0xfe,0xbf,0xfb,0xdf,0xf7,0xff,0xff,0xeb, + 0x70,0xfe,0x3f,0xaf,0xe8,0xf8,0x7e,0x5d,0xe6,0xfe,0x7f,0xbf,0xef,0xfb,0xdb,0xff, + 0xfb,0xff,0xfe,0xff,0xff,0xff,0xff,0xf9,0xff,0xfe,0xbf,0xff,0x15,0xff,0xff,0xfd, + 0xfd,0xff,0xfd,0xff,0x7f,0xd9,0x95,0xbf,0xef,0x9d,0xdd,0x7f,0xbf,0x7f,0xff,0xf4, + 0xff,0xff,0xff,0xfe,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdd,0xff,0xff, + 0xf7,0xff,0xee,0xff,0xbf,0xef,0xbb,0xff,0xff,0xff,0xff,0xff,0xef,0xfb,0xfe,0xfe, + 0xff,0xff,0xfd,0xff,0xfe,0x3b,0x8f,0xfa,0xfe,0xdd,0xee,0xff,0xde,0x7f,0xff,0xef, + 0xff,0xff,0xef,0xff,0xfe,0xff,0xfa,0xff,0xff,0x9f,0xfc,0xff,0xcf,0xff,0x9f,0xef, + 0xff,0xfe,0xff,0xbf,0xef,0xff,0xdf,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0x2f,0xff, + 0xf6,0xfd,0xbf,0x7f,0xfb,0xf3,0xff,0xde,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xd3, + 0xff,0xff,0xfb,0xff,0xfe,0xff,0xff,0xdf,0xff,0xc7,0xf7,0xdd,0xfe,0xff,0xeb,0xff, + 0xef,0x77,0xdc,0xfb,0xef,0xf7,0xbf,0x87,0xbf,0xf8,0xdf,0xff,0xbf,0xff,0xff,0xff, + 0xff,0xf7,0xff,0xfd,0xff,0xf0,0x6f,0xfa,0xff,0xf7,0xff,0xff,0xff,0xff,0xf7,0xff, + 0xff,0xf8,0x37,0xbd,0xff,0xff,0xf7,0xff,0xf6,0xcf,0xe7,0xf5,0xfd,0xff,0xff,0x7f, + 0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x6f,0x7f,0xdf,0xdf, + 0xff,0xf7,0xff,0xfe,0xff,0xff,0xf9,0xff,0xf7,0xfb,0xff,0xff,0xff,0xff,0xff,0xfb, + 0xef,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe, + 0xff,0xff,0xf1,0xff,0xf5,0xff,0x4f,0xff,0xf7,0xff,0xff,0xf7,0xcf,0xf2,0xff,0xff, + 0xbf,0xfe,0xff,0x7c,0xf7,0x3f,0xb7,0xf4,0xff,0x7f,0x5f,0xd7,0xf5,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xfb,0x9f,0xff,0xff,0xef,0xff,0xfe,0xff, + 0xff,0xfd,0xf7,0xbf,0xff,0xff,0xed,0xff,0xff,0xff,0xb7,0xce,0xfc,0xef,0xff,0xef, + 0xeb,0xff,0xfe,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0xfe,0x07, + 0xff,0xff,0xf5,0xff,0xff,0xee,0xff,0xef,0xff,0xff,0x7f,0xbf,0xfd,0xff,0xcf,0xff, + 0xcf,0xfd,0xfe,0xdf,0xbf,0xee,0xff,0xff,0xff,0xbf,0xff,0xfb,0xff,0xff,0xfd,0xff, + 0xff,0xdf,0xff,0xff,0xff,0xe8,0x3f,0xff,0xe6,0xff,0xff,0xff,0xfe,0xff,0xcf,0xff, + 0xff,0xfe,0x3e,0xef,0xb3,0x3a,0xff,0xff,0xff,0xff,0xff,0xf5,0x4f,0xff,0xff,0xff, + 0xff,0xdf,0xf1,0xff,0xfb,0xff,0xbf,0xff,0xff,0xff,0xff,0xf1,0x9a,0xbf,0xfe,0x46, + 0xff,0xff,0xff,0xfb,0xfd,0xf7,0xff,0xff,0xef,0xdb,0xf7,0x67,0xef,0xff,0xff,0xfb, + 0xff,0xfe,0x7f,0xfb,0xff,0xff,0xbf,0xff,0xff,0x67,0xff,0x1f,0xce,0xf9,0xff,0xff, + 0xff,0xf5,0xdb,0xd7,0xfd,0xfa,0xff,0xff,0xff,0x4b,0xff,0xf3,0xff,0xed,0xeb,0xd3, + 0xfe,0xff,0xaa,0x7f,0x9f,0xe7,0xef,0xff,0xff,0xb4,0xbf,0xff,0x4b,0xff,0xff,0xff, + 0xff,0x5f,0xfe,0xff,0xbf,0xff,0x2b,0xfe,0xf7,0x6f,0xfe,0xb9,0xdf,0xff,0xff,0xfd, + 0x7f,0xfe,0x7f,0xbd,0xcf,0x79,0x7f,0xdf,0x95,0xff,0xff,0xff,0xe7,0xff,0xff,0xfe, + 0xdf,0xff,0xed,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xf7,0xff,0xed,0x7f,0xf6,0x8f, + 0xff,0xf7,0xfd,0xb7,0xff,0xff,0xff,0xff,0xfa,0xdb,0xff,0xff,0xff,0x7b,0xff,0xf7, + 0xff,0xff,0xff,0xff,0xef,0xff,0xef,0xfd,0xb4,0x7f,0xdf,0xfa,0xff,0xff,0xaf,0xfb, + 0xfe,0xff,0xfe,0xad,0xff,0xc1,0xb7,0xff,0xff,0xda,0xff,0xff,0xff,0x7f,0xff,0xd9, + 0xbd,0xff,0x5b,0xef,0x77,0xfd,0xff,0xff,0xff,0xff,0x67,0xdb,0xff,0xff,0x5e,0xef, + 0xf7,0xff,0x57,0xff,0xf5,0x7d,0xd6,0xd7,0xff,0xf5,0xbf,0xdb,0x1f,0xff,0xdf,0xff, + 0xff,0xff,0xf4,0xbf,0xfd,0xef,0xff,0xfe,0xff,0xaf,0xef,0xfa,0xf6,0xbf,0xaf,0xf6, + 0xff,0xbf,0xff,0xeb,0xfe,0xfa,0xbf,0xfe,0x6b,0xff,0xff,0xff,0xef,0xfb,0xff,0xff, + 0xff,0xfe,0x57,0xff,0xfb,0xfe,0xff,0xff,0xfe,0x97,0xff,0xef,0x7f,0xff,0xf7,0xf5, + 0xbd,0xff,0x50,0x57,0xf5,0xff,0x7f,0xdf,0xff,0xfd,0x7f,0x7f,0xd7,0xff,0xed,0x7f, + 0xff,0xff,0xf7,0xff,0x7f,0xff,0xff,0xff,0xe0,0xff,0xff,0x6d,0xdf,0xff,0xff,0xff, + 0xff,0xfe,0xfe,0xdf,0x9f,0xed,0xff,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xf9, + 0xff,0xff,0xff,0xef,0xfe,0xff,0xff,0xff,0xff,0xff,0xfe,0xdf,0xff,0xff,0xfd,0x5f, + 0xff,0xee,0xfb,0xbf,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x9f, + 0xf7,0xfd,0xfb,0xdf,0xf7,0xff,0xff,0x6f,0xff,0xf6,0x3f,0xbf,0xff,0xff,0xff,0xff, + 0xff,0xe7,0xff,0xff,0xff,0xf1,0x7f,0xd9,0x46,0x6f,0xbd,0x6f,0xbb,0x7e,0xff,0xbf, + 0x6f,0x5b,0xfe,0xff,0xbf,0xe7,0xdb,0xf6,0xfd,0xef,0xfb,0xfe,0xfd,0xb9,0x6f,0xdb, + 0xfe,0xef,0xbf,0xef,0xfb,0xfe,0xff,0xbf,0xef,0xfb,0xff,0xe8,0x6f,0xdb,0xfe,0xff, + 0xff,0xef,0xff,0xff,0xff,0xff,0x6f,0xfb,0xff,0xff,0xbf,0xff,0xdf,0xf7,0xfd,0xff, + 0xff,0xfe,0xff,0x7f,0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb, + 0xff,0xf6,0x8f,0xfd,0xfe,0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0xf7,0xfe,0xff,0xff, + 0xef,0xff,0xef,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xe9,0xff,0xb4,0x6f,0x1f,0xff,0xd7,0xff, + 0xff,0xff,0xff,0xff,0xf7,0xff,0x6f,0xdf,0xf8,0xfd,0xff,0x7f,0xb7,0xfd,0xfd,0x7f, + 0xde,0xf7,0xfd,0xfd,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xb7,0xff,0xea,0x3f, + 0xfe,0x9f,0xfb,0xff,0xfa,0x7f,0xff,0xff,0xfe,0xdf,0xbf,0xdf,0xeb,0xed,0xff,0xbf, + 0xeb,0xfa,0xff,0xaf,0xab,0xa7,0xee,0xbf,0xbe,0xeb,0xa7,0xff,0xff,0xff,0xdf,0xff, + 0xfd,0xff,0xff,0xaf,0xff,0x17,0xff,0x9b,0xef,0xff,0xfe,0xdf,0xff,0xbf,0xcd,0x77, + 0xff,0xff,0x7d,0xff,0x7f,0xf5,0xf7,0xfd,0xff,0xdf,0xff,0xf5,0xef,0x7f,0xde,0xf7, + 0xef,0xff,0xfb,0xff,0xff,0xff,0xfd,0x7f,0xff,0xdf,0xff,0xe2,0x7f,0xfa,0xf9,0xde, + 0x7f,0x8b,0xe7,0xf9,0xfe,0x2f,0x9f,0xe7,0xf9,0xbe,0x3f,0x9f,0xe7,0xf9,0xfe,0x5f, + 0xe7,0xf8,0xbe,0x3e,0x1f,0xe3,0xe1,0xfe,0x7f,0x9f,0xe7,0xe1,0xfe,0x2e,0x1f,0xe6, + 0xe9,0xff,0xdf,0xff,0x5f,0xff,0xff,0xfd,0x1f,0xff,0xf9,0xf7,0xff,0xff,0xef,0xff, + 0xfd,0xff,0xbf,0xdf,0xf7,0xff,0x7f,0xdf,0xd7,0xf5,0xff,0x7f,0x5f,0xd7,0xff,0xff, + 0xff,0x5c,0xff,0xff,0xcf,0xff,0x7f,0xff,0xab,0xff,0xeb,0xff,0xbf,0xff,0xaf,0xff, + 0xff,0xfe,0xf7,0xbd,0xff,0xff,0xde,0xff,0xfb,0xff,0x7f,0xdf,0xfd,0xfb,0x7b,0xfe, + 0xeb,0x7d,0xee,0xb2,0xff,0xff,0xff,0xeb,0xf7,0xfb,0xff,0x7f,0xfb,0x6f,0xf0,0x7f, + 0xfd,0x7f,0xff,0xff,0xf5,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0xf7,0xfe,0xff, + 0x7f,0xdf,0xed,0xff,0xff,0x5f,0xf7,0x9d,0xff,0x79,0xff,0xff,0xff,0xfd,0x7d,0xff, + 0xd7,0xdf,0xfd,0xf7,0xfe,0x0f,0xff,0xa7,0xff,0xff,0xfe,0x9f,0xff,0xfd,0xff,0xff, + 0xff,0xf7,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xeb,0xff,0xe9,0xff,0xfe, + 0x9f,0xff,0xff,0xdf,0xaf,0x1f,0xba,0xe9,0xff,0xee,0xff,0xd5,0xff,0xff,0xfc,0xbf, + 0xff,0xff,0xff,0xff,0xfd,0xef,0xcb,0xfe,0xfd,0xbf,0x6f,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xcf,0xff,0xf4,0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xef,0xff,0xff, + 0xff,0xf8,0xaf,0xff,0xeb,0xba,0xbc,0xbf,0xab,0xeb,0x7a,0xfc,0x3b,0xaf,0xe9,0x7a, + 0xf6,0xa7,0xaf,0xe2,0xf8,0xff,0x8f,0xe3,0xfa,0xfe,0xbf,0xae,0xea,0xfa,0xfe,0xbf, + 0xaf,0xeb,0xfa,0xfe,0xbf,0xaf,0xeb,0xfd,0x07,0xff,0xbf,0xff,0xff,0xff,0xff,0xff, + 0xfc,0xdd,0xde,0xff,0xd7,0xf3,0x7d,0x2f,0xc7,0xfd,0xdf,0x7e,0xf7,0xfd,0xff,0xff, + 0xfb,0xff,0xff,0xff,0xff,0xbf,0xff,0xff,0xff,0xed,0xff,0xff,0xff,0xff,0xfe,0x5f, + 0x77,0xff,0xff,0x7f,0xdf,0xf7,0xfe,0xff,0xff,0xfd,0xf7,0xbf,0xff,0xaf,0xf7,0xdf, + 0xfd,0xff,0x7f,0xdf,0xff,0xef,0x7f,0xbf,0xf7,0xff,0xff,0x3f,0xff,0xff,0xfd,0xfd, + 0xff,0xff,0xff,0xff,0xfa,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xdf,0xdf, + 0xff,0xdf,0x7f,0xff,0xfe,0xff,0xff,0xbf,0xff,0xff,0xff,0xfe,0xff,0xbf,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf3,0xff,0xe3,0xf8,0xff, + 0xff,0xbf,0xff,0xff,0xfd,0xbf,0x0f,0xfb,0xe8,0xbd,0xff,0xf7,0xfd,0xdf,0xff,0xff, + 0xbf,0x7a,0xfe,0xbf,0xff,0xeb,0xff,0xff,0xfb,0xff,0xef,0xff,0xff,0xff,0xff,0xff, + 0xff,0xf2,0x7f,0xfe,0xff,0xbd,0xff,0xfd,0xff,0xfd,0xff,0xdd,0xfb,0xf5,0xff,0xbf, + 0xfe,0xff,0xd7,0xfd,0xff,0x7f,0xff,0xdd,0xff,0xdb,0xff,0xf6,0x7f,0xff,0x7f,0xff, + 0xff,0xbf,0xfd,0xff,0xff,0xff,0xff,0xfe,0x2f,0xff,0xff,0xff,0xff,0xef,0xdf,0xed, + 0xbf,0x3e,0xff,0xbd,0xee,0xff,0xbe,0xff,0xbf,0xef,0xfa,0xfb,0xaf,0xef,0xfb,0xff, + 0xff,0x3f,0xef,0xfb,0xfe,0xff,0xff,0xff,0xfb,0xff,0xff,0xf7,0xff,0xff,0xe9,0xfe, + 0xff,0xff,0xdf,0xff,0xff,0xf7,0xff,0xf7,0x7b,0xd3,0xf6,0xff,0xf9,0x5f,0xdf,0xd5, + 0xfd,0x7f,0xd7,0xf5,0xf1,0x7f,0xfb,0x5f,0xf4,0xfd,0x3f,0x4f,0xff,0xff,0xfd,0xdf, + 0xff,0xff,0xff,0xef,0xf9,0xbf,0xff,0xff,0xfd,0xff,0xef,0xff,0xff,0xff,0x6d,0xff, + 0x7f,0xff,0xfa,0xfd,0xff,0xff,0xd7,0xf5,0xef,0x7f,0xdf,0xf4,0xff,0x7b,0xff,0xdd, + 0xf7,0xfd,0xef,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0x27,0xff,0xff,0xff,0xff, + 0xff,0x17,0xc7,0xef,0xfc,0xee,0xff,0x87,0xef,0xfb,0xff,0xbd,0xff,0xff,0xdd,0x1f, + 0xff,0xff,0x77,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xfb,0xff,0xff,0xff,0xff, + 0xff,0xe8,0xff,0xff,0xff,0xff,0xff,0xfb,0xfe,0xff,0xff,0xb7,0xff,0xfd,0xff,0xff, + 0xfb,0xd7,0xff,0xff,0xff,0xb7,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xfd,0xff,0x7f,0xff,0xff,0xff,0xff,0xfe,0xd9,0xff,0xff,0xff,0xff,0xf7,0xdf,0xdf, + 0xfb,0xff,0xe9,0x6b,0xde,0xff,0xfd,0xdf,0x77,0xdc,0xf7,0x3b,0x7b,0xce,0xf7,0xfd, + 0xff,0x7f,0xdf,0xf7,0xfd,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xdf,0xef,0xe1,0xbf, + 0xff,0xff,0xff,0xff,0xff,0x5b,0x7f,0xdf,0xfd,0xaf,0xf9,0xbf,0xfe,0xbf,0xef,0x73, + 0xfd,0xf7,0xae,0xeb,0xfd,0xd7,0x3f,0xaf,0x6b,0xfa,0xfe,0xbd,0xff,0xff,0xfe,0xff, + 0xff,0xff,0xe3,0xfb,0xef,0x7f,0xff,0xff,0xff,0xff,0xff,0x7f,0xaf,0xff,0xfd,0xff, + 0xff,0xbf,0xff,0x9f,0xfe,0xfe,0xf7,0xff,0xf7,0xfd,0xff,0xff,0xb7,0xf7,0xfd,0xdf, + 0x7f,0xdf,0xef,0xff,0xff,0xef,0xff,0xff,0xff,0xff,0xbe,0x23,0xff,0xff,0xff,0xff, + 0xff,0xbf,0xfd,0x5e,0xcf,0xbe,0xff,0xd8,0x6e,0xff,0x93,0x67,0xbb,0x2e,0xfe,0xef, + 0xbf,0x2e,0xff,0xfe,0xfc,0xbb,0xff,0xcf,0xbf,0xf9,0xfb,0x36,0xff,0xff,0xff,0xff, + 0xff,0x11,0xaf,0xff,0xff,0xff,0xff,0xff,0x9b,0xeb,0xda,0xff,0xdf,0x9b,0x69,0xdf, + 0x36,0x7d,0xf7,0x69,0xff,0x9b,0xf7,0xe9,0xff,0xff,0xff,0xa7,0xff,0xfa,0xff,0xff, + 0xae,0xe6,0xff,0xff,0xff,0xff,0xff,0x59,0xbd,0xff,0xff,0xaf,0xff,0xff,0xf3,0xb7, + 0xff,0x2c,0xcb,0xf5,0xb7,0xbf,0xfb,0xd6,0xd2,0xfd,0x3a,0x7b,0xe6,0xff,0xba,0x7f, + 0xfb,0xfe,0xec,0xaf,0x2a,0xff,0xff,0xff,0xeb,0xff,0xff,0xff,0xff,0xef,0xb6,0xff, + 0xff,0x95,0xff,0xff,0xfc,0xff,0xff,0xcc,0xdb,0x7e,0x7f,0xf7,0xfd,0xfb,0xde,0x5f, + 0x97,0xe6,0x7e,0x5f,0xf7,0xff,0xff,0xff,0xdf,0x95,0xed,0x7f,0xff,0xff,0x9f,0xff, + 0xff,0xff,0xff,0xff,0x76,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xcd,0xf7,0xa5,0xbf, + 0x7f,0xcc,0xf7,0xbc,0x9b,0x57,0xdf,0xf7,0xff,0x7f,0xdf,0xb5,0x7d,0xeb,0x76,0xdc, + 0xf6,0xef,0xff,0xff,0xdf,0xf3,0x7f,0xff,0xff,0xff,0xfe,0x9b,0xff,0xff,0xfd,0xff, + 0xff,0xff,0xf7,0xff,0xf5,0xff,0xef,0xf7,0xdd,0xf7,0xab,0xd6,0xfb,0xfe,0xff,0xef, + 0xfb,0xde,0xaf,0xbd,0xe8,0x7b,0x5e,0xf7,0xeb,0xff,0xff,0xfd,0xaf,0xff,0xff,0xff, + 0xfd,0xc1,0xff,0xff,0xfa,0xff,0xff,0xff,0xfb,0xff,0xe6,0xf7,0xaf,0x7b,0xfb,0xf4, + 0xff,0xeb,0xeb,0xfa,0xff,0xaf,0xeb,0xde,0xfe,0xb7,0xaf,0x7b,0xfb,0xf7,0xbf,0xff, + 0xff,0x9e,0xff,0xff,0xff,0xff,0xff,0xec,0x7f,0xff,0xff,0x5f,0xff,0xff,0xff,0x43, + 0xf2,0x9c,0xf5,0xa3,0x4f,0x73,0xde,0xff,0xbd,0x6f,0x5b,0xe5,0xbd,0x68,0x7b,0xd7, + 0xf7,0xa1,0xef,0x7a,0x1e,0xff,0xff,0xca,0xd3,0xff,0xff,0xff,0xff,0xff,0xef,0xff, + 0xff,0xff,0xff,0xff,0xff,0xf6,0xdd,0xff,0xe7,0xff,0xf6,0xfd,0xff,0xff,0xd9,0xff, + 0xff,0xbf,0xff,0xff,0xff,0xbf,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xf7,0xfd,0xff, + 0xff,0xff,0xff,0xff,0xc1,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x7f,0x9f,0xe6,0xff, + 0xfe,0x7b,0x9f,0xff,0xf9,0xff,0xff,0xfa,0xff,0xff,0xff,0xfa,0xff,0xff,0xff,0xe3, + 0xff,0xf7,0xff,0xfe,0x7f,0x9f,0xff,0xff,0xff,0xff,0xfc,0x1f,0xff,0xbf,0xed,0xfb, + 0xfe,0xff,0x9f,0xe7,0x59,0xe6,0xfd,0x9f,0xe7,0xfb,0xd6,0x3d,0xbf,0xee,0xf6,0xf5, + 0xbf,0x6e,0xdb,0xf6,0xff,0xbd,0x6f,0xfb,0xfe,0xff,0x9f,0xe5,0xfb,0xfe,0xff,0xbf, + 0xfe,0xb6,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xfd,0xff,0x3f,0xff,0xfb, + 0xff,0xff,0x7f,0xff,0xff,0xff,0xbf,0xdf,0xdf,0xf6,0xff,0xbf,0xef,0xfb,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x78,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf, + 0xed,0xff,0xff,0xef,0xbf,0xee,0xff,0xff,0xff,0xff,0xff,0xdf,0xdf,0xff,0xff,0xff, + 0x7f,0xef,0xf7,0xfb,0xff,0xff,0xff,0xbf,0xef,0xff,0xff,0xff,0xff,0xfe,0x17,0xff, + 0xff,0xff,0xff,0xff,0xff,0xe2,0xf8,0xac,0x3d,0x6f,0xe3,0xf8,0xf5,0xbf,0x8f,0x5b, + 0xf6,0xfd,0x6f,0x5b,0xf6,0xbd,0xfd,0x6f,0xdb,0xd6,0xf5,0xbf,0xff,0xe3,0xfa,0xff, + 0xff,0xff,0xdf,0xff,0xf3,0xff,0xff,0xff,0xff,0xff,0xff,0x7c,0xff,0xbc,0xc9,0xeb, + 0xfc,0xff,0xbe,0xef,0xf3,0xfa,0xfe,0xbf,0xbb,0xee,0xfe,0xbf,0xef,0xbb,0xea,0xfb, + 0xbe,0xeb,0xff,0xfe,0xdf,0x3f,0xff,0xff,0xf9,0xf9,0xde,0x7f,0xff,0xff,0xff,0xff, + 0xff,0xff,0xbf,0xff,0xfb,0xf5,0xcf,0xbb,0xf7,0xd7,0xbe,0xfd,0x77,0x5c,0xe5,0xdd, + 0x77,0xdd,0xf7,0xf5,0xdf,0xf7,0x5d,0xd7,0x7f,0xff,0xd7,0xfd,0xff,0xff,0xff,0x7b, + 0xfe,0x0f,0xff,0xfe,0x9f,0xe7,0xf9,0xfe,0x7f,0x9d,0xe7,0xf9,0xbe,0x7f,0x9f,0xe3, + 0xf1,0xfe,0x6f,0x8b,0xe6,0xfe,0x3e,0x8f,0xe7,0xf8,0xfe,0x3f,0x8f,0xe3,0xf9,0xfe, + 0x7f,0x9f,0xe7,0xf9,0xfe,0x6f,0x8f,0x5d,0xff,0xff,0xff,0xff,0xff,0xfb,0xfd,0xff, + 0x9f,0xdf,0xf7,0xfd,0xff,0xff,0xdf,0x97,0xfd,0xff,0x7f,0xf7,0xfd,0xff,0x7f,0xdf, + 0xf7,0xfd,0xff,0x7f,0xdf,0xff,0xff,0xff,0x3f,0xff,0xff,0xfd,0xfe,0xfa,0xbf,0xff, + 0xfe,0xff,0xff,0xff,0x7e,0xb7,0xfd,0xef,0x7f,0xde,0xb7,0xfd,0xff,0x7b,0xdf,0xf7, + 0xed,0xff,0xdf,0xf2,0xed,0xfe,0xff,0xde,0xb7,0xfd,0xff,0x7f,0xff,0xf7,0xa5,0xff, + 0xff,0xff,0xbf,0x9e,0x67,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdf, + 0xff,0xff,0xff,0x7b,0xdf,0xf7,0xff,0xfe,0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xff,0xfd, + 0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xf7,0xe6,0xff,0xff,0xef,0xff,0xff, + 0xfd,0xfb,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xee,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xfe,0xff, + 0xf4,0xdf,0xf7,0xff,0xff,0xff,0xff,0xff,0x67,0xff,0xf7,0xff,0xff,0x6f,0xcb,0xf2, + 0xbd,0xbf,0x6b,0xd2,0xdd,0xad,0x6f,0xdb,0xff,0xf5,0xbf,0x6f,0xd3,0xff,0xff,0xff, + 0xff,0xdb,0xff,0xff,0xff,0xff,0xef,0x82,0xff,0xfe,0xb7,0xab,0xea,0xfa,0xce,0xbf, + 0xae,0xeb,0xf2,0xba,0xbb,0xab,0xeb,0xea,0xbe,0xbd,0xaf,0xda,0xf6,0xad,0xaf,0xca, + 0xda,0xb6,0xab,0xad,0xeb,0xfa,0xfe,0xbe,0xab,0xeb,0xfa,0xfe,0xbf,0xfd,0x7f,0xfb, + 0xff,0xff,0xff,0xff,0xfd,0xf7,0xdd,0xf3,0xff,0xff,0x37,0xdf,0xe9,0xfc,0xcc,0xbf, + 0xf7,0xe7,0x7d,0xcf,0x77,0xfe,0xf7,0x3d,0xcf,0xf7,0xff,0xff,0xfb,0xff,0xef,0xff, + 0xef,0xff,0xff,0xfe,0x47,0xff,0xff,0xff,0xf7,0xfd,0xff,0xfb,0xbf,0xf5,0xf7,0xff, + 0x6b,0xdf,0xf5,0xfb,0xbf,0x5f,0x7f,0xcf,0xfe,0xff,0xff,0xff,0xff,0xff,0x7f,0xdf, + 0xff,0xff,0xff,0xff,0xcf,0xff,0xff,0xfd,0xff,0x7f,0xad,0xbf,0xff,0xff,0xff,0xff, + 0xff,0xff,0xda,0xfe,0xdf,0xbd,0x77,0xde,0xdf,0xfb,0xdf,0xef,0xff,0xff,0xfd,0x7f, + 0x5f,0xdd,0xff,0xfd,0x7f,0x7f,0xdf,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xdf,0xf7, + 0x78,0x3f,0xef,0xff,0xff,0xff,0xff,0xf6,0x7d,0xff,0xff,0xfa,0xfe,0xbf,0xff,0xcb, + 0xf2,0xfe,0xbe,0xab,0xfa,0xfe,0xfd,0xff,0xfe,0xf2,0xff,0xff,0xaf,0xea,0xdf,0xff, + 0xff,0xaf,0xff,0xbf,0xff,0xff,0x7f,0x57,0xff,0xff,0x7f,0x7f,0xff,0xff,0xff,0xdf, + 0xff,0xfb,0xea,0xff,0xff,0xef,0x76,0xff,0xfb,0xfe,0xd7,0xdb,0xfb,0xff,0xf7,0xff, + 0xef,0xff,0xfe,0xff,0xbd,0xff,0xff,0xff,0xff,0xd7,0xff,0xff,0xff,0xe2,0xff,0xbf, + 0xff,0xff,0xfe,0xbb,0xfc,0xef,0xbf,0xff,0xef,0xff,0x7f,0xff,0xbf,0x7f,0xdb,0xf6, + 0xff,0xaf,0xff,0xff,0xff,0xff,0x6f,0xff,0xf2,0xdc,0xbf,0xff,0xff,0xef,0xd7,0xff, + 0xff,0xfe,0x9f,0xfe,0x5f,0xfe,0xff,0xff,0xff,0xf5,0xef,0x67,0xeb,0xf7,0xfd,0x3f, + 0x7f,0xd6,0x76,0xfd,0x6f,0x7f,0xd7,0xfd,0xff,0x5f,0xdf,0x75,0x7d,0xee,0x5f,0x9b, + 0xf5,0xfd,0x7f,0xff,0xff,0xff,0xff,0xff,0x7f,0xfe,0xab,0xf5,0xff,0xff,0xdf,0xff, + 0xff,0xef,0xff,0xfb,0xb7,0xff,0xfb,0xff,0xbf,0xb7,0xff,0xfb,0x7f,0xf6,0xef,0xbf, + 0xfe,0xdf,0xff,0xef,0x7f,0xde,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf9,0xbf, + 0xf6,0x7f,0xef,0xff,0x1f,0xff,0xff,0xff,0xf7,0xff,0xff,0xf5,0xfe,0xef,0xfe,0xdf, + 0xf7,0x1f,0xff,0x3d,0xdb,0xf4,0xff,0x3f,0xef,0x73,0xf4,0xfb,0x3f,0xef,0xe1,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xef,0xff,0xff,0xfd,0xff,0xff,0xff,0xff,0xff, + 0xff,0xb9,0xff,0x5f,0xff,0xfb,0xfe,0xfd,0xff,0xe7,0x7b,0xdb,0x9f,0xe7,0xff,0x7e, + 0x7f,0x9f,0xe7,0xff,0x7f,0x7f,0xff,0xfe,0xff,0xff,0xff,0xfb,0xff,0xfd,0xff,0xff, + 0xff,0xff,0xff,0xf7,0x75,0xfd,0x6e,0xff,0xf7,0xbf,0xff,0x7d,0xfe,0xb7,0xff,0xef, + 0x7b,0xff,0xdd,0xfb,0xff,0xde,0xff,0xfd,0xff,0xfb,0xdf,0xfb,0xff,0xdf,0xff,0xff, + 0xd7,0xff,0xff,0xfc,0x8f,0xff,0xff,0xff,0xff,0xfe,0x7f,0xbf,0xef,0x7b,0x7e,0x5b, + 0xaf,0xef,0xdb,0xfe,0xbf,0x9e,0xef,0xde,0xdf,0x97,0xed,0xfb,0x7e,0xdf,0xbf,0xef, + 0x5b,0xff,0xff,0xdf,0xfe,0xff,0xfe,0xff,0xff,0xfe,0xd5,0xff,0xff,0xff,0xff,0xff, + 0xef,0xf7,0xfb,0xff,0x7f,0x57,0xf7,0xf5,0xff,0x5f,0x5f,0xf7,0xf5,0xff,0xdf,0xd7, + 0xfd,0xfd,0x7f,0xdf,0xd6,0xfd,0xfd,0x5f,0xff,0xff,0xff,0xff,0xff,0xdf,0xbf,0xff, + 0xf8,0x3f,0xff,0xe7,0xcf,0xff,0xfe,0x7f,0xf3,0xef,0xbb,0xef,0xfb,0xb2,0xef,0xbb, + 0xee,0xd3,0xbe,0xed,0x6e,0xfb,0xbe,0xef,0xbb,0xee,0xd3,0xb4,0xec,0xfb,0xfe,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xf1,0x9a,0xbf,0xfe,0xbb,0xff,0xea,0xcf,0xfe,0xbf, + 0xfd,0x7f,0x79,0xd6,0x75,0xfd,0x7f,0x59,0xdf,0xf5,0x9f,0x3f,0xd7,0xf5,0xfc,0xff, + 0x59,0xde,0x77,0x38,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xfb,0xf5,0xeb,0xd7,0xff, + 0xff,0xff,0xfc,0xef,0x4f,0xce,0xb7,0xb5,0xef,0x7b,0xde,0xf7,0xbd,0xef,0x7a,0x5e, + 0xf7,0xef,0x7b,0xde,0xf7,0xbd,0xef,0x7a,0xde,0xb6,0xfd,0x3f,0xff,0xff,0xff,0xff, + 0xff,0xff,0xfe,0xf2,0x6f,0xff,0xff,0xff,0xff,0x3f,0xe5,0xff,0x7e,0x9f,0xa7,0xe9, + 0xfa,0x7e,0x9f,0xa7,0xe9,0xfa,0x7e,0xb7,0xe9,0xfa,0x7e,0x9f,0xa7,0xe9,0xfa,0x7e, + 0x9f,0x97,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0x4f,0xff,0xff,0xff,0xff,0xff, + 0xf3,0x2d,0xef,0xfe,0xdd,0xb5,0x6d,0xdb,0x76,0xcd,0xb5,0x6d,0x5b,0x57,0xb5,0x6d, + 0x5b,0x56,0xdf,0xb5,0x6d,0x5b,0x53,0xde,0xb7,0xff,0xff,0xff,0xff,0xff,0xaf,0xff, + 0xd5,0xb7,0xff,0xff,0xff,0xff,0xfd,0xf5,0xbf,0x7f,0x75,0x1d,0xe7,0x51,0xd4,0x77, + 0xdd,0xf7,0x59,0xd6,0xdd,0x67,0x59,0xd6,0x77,0xdd,0x67,0x59,0xd6,0x77,0xd6,0xff, + 0xff,0xff,0xff,0xff,0xf5,0x7f,0xdb,0x9f,0xff,0xff,0xfd,0xff,0xfe,0xf6,0xfd,0xaf, + 0xee,0xd3,0xb0,0xff,0xbf,0x4f,0xfb,0xde,0xf7,0xbf,0xfb,0xbe,0xf7,0xbb,0xee,0xdb, + 0xde,0xef,0xbf,0xfb,0xdb,0xff,0xff,0xff,0xff,0xff,0xfe,0xbf,0xfe,0xe6,0xff,0xff, + 0xff,0xff,0xff,0xd2,0x5e,0x85,0xbf,0x6b,0xda,0xf4,0xfd,0x2f,0x4f,0xd3,0xf4,0x3d, + 0x0e,0xd8,0xf4,0x3d,0x8f,0x69,0xd0,0xf6,0x3d,0x0f,0x49,0x7b,0xff,0xff,0xff,0xff, + 0xff,0xd7,0xff,0xf0,0xdf,0xff,0xff,0xff,0xff,0xfd,0xa7,0xed,0xf9,0xb6,0x2d,0xab, + 0x6e,0xda,0xb6,0xed,0xbb,0x6e,0xdb,0xed,0xbb,0x6e,0xdb,0xb6,0xad,0xbb,0x6e,0xdb, + 0xf6,0xbf,0x9f,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff, + 0x99,0xfe,0xfd,0xfe,0x7f,0x93,0xe4,0xf9,0x3e,0x4f,0x93,0xe4,0xf9,0x3f,0x93,0xe4, + 0xf9,0x3e,0x4f,0x93,0xe4,0xf9,0x3e,0x4f,0xfb,0xfe,0xbf,0xff,0xff,0xff,0xff,0xff, + 0x89,0xff,0xfb,0xfe,0xff,0xbf,0xe7,0xfb,0xee,0xfe,0x8f,0xa3,0xe9,0xfa,0x7e,0x97, + 0xa7,0xe9,0xfa,0x7f,0x23,0xe9,0xfa,0x3e,0x8f,0xa7,0xe8,0xfa,0x7e,0x9f,0x6e,0xfb, + 0xee,0xff,0xbf,0xef,0xfb,0xff,0xeb,0x6f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0x9f,0xf7,0xfd,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0x7f,0xf7,0xfd,0xff,0x7f,0xdf,0xf7, + 0xfd,0xff,0x7f,0xdf,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xaf,0xff,0xff, + 0xff,0xff,0xff,0xef,0xff,0xff,0xdb,0xfe,0xdf,0xb3,0xec,0xfb,0x3e,0xcf,0xb3,0xec, + 0xfc,0xdf,0xb3,0xed,0xfb,0x7e,0xcf,0xb7,0xec,0xfb,0x3f,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xdd,0xfe,0xff,0xff,0xff,0xff,0xf8,0xf5,0xad,0x6b,0xc2,0xda,0xe6, + 0x3d,0x8b,0x63,0xd8,0xe6,0x39,0x8f,0xd8,0xf6,0x39,0x8e,0x63,0x98,0xf6,0x39,0x8f, + 0x62,0xd6,0xf5,0xff,0xff,0xff,0xf7,0xff,0xff,0xfd,0xbf,0xff,0xff,0xff,0xff,0xdf, + 0x3e,0xaf,0xaa,0xec,0xfb,0x36,0xcd,0xb3,0xcc,0xf3,0x36,0xcf,0xb3,0xdb,0x3e,0xcf, + 0xb3,0xec,0xdb,0x3e,0xcf,0xb3,0xec,0xfa,0xbe,0x9f,0xff,0xff,0xfe,0x7f,0xfd,0x9d, + 0x63,0xff,0xff,0xff,0xdf,0xff,0xf7,0xf7,0xbd,0xdf,0xf7,0xdd,0xf3,0x7d,0xff,0x37, + 0xdf,0xf3,0xfc,0xde,0xdc,0xb3,0xfc,0xdf,0x57,0xcf,0xb3,0x7c,0xdf,0x57,0x7d,0xff, + 0xff,0xff,0xfe,0xdf,0xff,0xff,0xe6,0xff,0xbf,0xf9,0xfe,0x7f,0x9f,0xe6,0xf9,0xbe, + 0x77,0x9b,0xe6,0xf9,0x9e,0x6f,0x99,0xe6,0xf9,0xbe,0x79,0xe6,0xf9,0xbe,0x6e,0x9b, + 0xe6,0xe9,0xbe,0x6f,0x9b,0xe7,0xe1,0xfe,0x7e,0xbb,0xe7,0xf8,0xf7,0x1f,0xff,0xff, + 0xff,0xff,0xff,0x7f,0x7f,0xdf,0xf4,0x7f,0x3f,0xdf,0xf1,0xfc,0x7f,0x3f,0xc7,0xf1, + 0xff,0x1f,0xc7,0xf1,0xfc,0xff,0x1f,0xc7,0xf1,0xfd,0xff,0x7f,0x5e,0xff,0xff,0xf7, + 0x7f,0xff,0xef,0xeb,0xff,0xff,0xff,0xff,0xff,0xad,0xef,0x7b,0xde,0xb7,0xe5,0xfb, + 0x7e,0xdf,0xb7,0xe5,0xfb,0x7e,0xdf,0x6d,0xfb,0x7e,0xdf,0xb7,0x6d,0xfb,0x76,0xdf, + 0xb7,0xbd,0xeb,0xf7,0xff,0xff,0x6f,0xff,0xf9,0xed,0x7f,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0x7f,0xf7,0xfd,0xff, + 0x7f,0xdb,0x57,0xfd,0xf5,0x7f,0xdf,0xff,0xff,0xf5,0xff,0xff,0x5d,0xff,0xff,0x7e, + 0xcf,0xff,0xff,0xfd,0xff,0xfe,0xff,0xff,0xff,0xfe,0xfe,0xff,0xbf,0xef,0xfb,0xfe, + 0xff,0xbf,0xef,0xfc,0xff,0xbf,0xef,0xfb,0xe0,0xff,0xbe,0x0f,0xfb,0xff,0xff,0xfe, + 0x1f,0xff,0xe7,0xbf,0xff,0xf7,0x50,0xbf,0xff,0xff,0xff,0xff,0xdf,0xf2,0xff,0xff, + 0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0x7f,0xdb,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xfd,0xbf,0xff,0xeb, + 0xfa,0xbe,0xbd,0xae,0xeb,0xfa,0x5e,0xaf,0xab,0xea,0x7a,0xbe,0x3f,0xaf,0xeb,0x78, + 0xff,0x8f,0xeb,0xf2,0xfe,0x97,0xaf,0xeb,0xfa,0xee,0xb5,0xaf,0xea,0xfa,0xfe,0xbf, + 0xab,0xeb,0xff,0xa7,0xff,0xbf,0xff,0xff,0xfd,0xef,0xff,0xff,0xdf,0x7b,0xdf,0xf7, + 0x7d,0xff,0x7b,0xdd,0xbf,0xfd,0xfb,0xff,0xb3,0xfc,0xf3,0x37,0xdd,0x7f,0xff,0xfb, + 0xff,0x7f,0xff,0xff,0xf3,0xfd,0xff,0xff,0xff,0xee,0x7f,0xff,0xff,0xff,0x7f,0x97, + 0xef,0xfd,0xfe,0xef,0xde,0xb6,0xef,0xbf,0x67,0xbb,0xdf,0xff,0xbf,0xff,0xfe,0xff, + 0xbf,0xdf,0xfb,0xf7,0xf7,0xfb,0xfb,0xdf,0xff,0xfd,0xff,0xf7,0x7f,0xff,0xff,0xfb, + 0x97,0xff,0xff,0xff,0xff,0xff,0xff,0xeb,0xfe,0xfe,0xfe,0xff,0xfb,0xff,0xff,0x77, + 0xcf,0xfb,0xff,0xfb,0xff,0x6f,0xdf,0xfc,0xff,0xbf,0xef,0xff,0xff,0xff,0xfe,0xff, + 0xff,0xff,0x7f,0xff,0xff,0xff,0xcb,0xff,0xff,0xff,0xff,0xff,0xb7,0xcd,0xde,0xb4, + 0xbf,0x8f,0xa7,0xfb,0xff,0xbe,0xef,0xe6,0xfe,0xfb,0xef,0xa7,0xfe,0xfe,0xff,0xef, + 0xfb,0xfe,0xfe,0xce,0xef,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xf9,0x7f,0xff,0xff, + 0xfb,0xff,0xfd,0xff,0x7f,0xbb,0xe7,0xeb,0xff,0xfd,0xed,0xfd,0xfb,0xf7,0xf7,0xfc, + 0x9f,0xff,0xff,0xff,0x77,0xff,0xff,0xfb,0xff,0xb7,0xeb,0xff,0xff,0xf7,0xff,0xff, + 0xf7,0xff,0xfb,0xaf,0xff,0xfe,0xff,0xff,0xef,0xff,0xf7,0xff,0xbf,0xef,0xfb,0xce, + 0xff,0xfb,0xff,0xff,0xff,0xef,0xfa,0xfb,0xff,0xef,0xbf,0xee,0xfb,0xbe,0xe9,0xff, + 0xef,0xff,0xfd,0xff,0x7f,0xff,0xdf,0xff,0xff,0xc9,0xff,0xf5,0xff,0xf7,0xef,0xfe, + 0xff,0xf7,0xbf,0xff,0xff,0xff,0xff,0xfe,0xfb,0xfe,0xf7,0x3f,0xef,0x7f,0xff,0xf7, + 0xff,0xff,0xdb,0xff,0xdc,0xff,0xef,0xfb,0xbf,0xff,0xff,0xff,0xff,0xff,0x7b,0xfa, + 0x3f,0x7f,0xff,0xfd,0xff,0xff,0xff,0xfe,0xfb,0xff,0xdf,0xef,0xfd,0xff,0xff,0xff, + 0xde,0xff,0xfb,0xef,0xe7,0xfe,0xff,0xff,0xfe,0xbf,0xef,0xef,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xfd,0xff,0xb6,0xff,0xff,0xff,0xff,0xef,0xf1,0xbf,0x73,0xfa, + 0xce,0x5e,0xcf,0xff,0x7f,0xff,0xff,0x03,0xf1,0xdf,0xbf,0xc7,0xd1,0xff,0xf7,0xff, + 0x7f,0xff,0xfc,0x7f,0xff,0xc7,0xff,0xff,0xff,0xff,0xff,0xf7,0xf6,0xff,0xff,0xff, + 0xff,0xff,0xbf,0xff,0xfa,0x7f,0xdf,0xff,0xfe,0xdf,0xff,0xfe,0xff,0xff,0x7f,0x7f, + 0xbd,0xff,0x7f,0x7f,0xff,0xbf,0xbf,0xff,0xfe,0xdf,0xff,0xfd,0xff,0xff,0xff,0xff, + 0xff,0xff,0xfd,0x1f,0xff,0xde,0xf7,0xbf,0x7f,0xff,0xcf,0xff,0xff,0xeb,0xba,0xbe, + 0xf7,0x9d,0xef,0xbb,0xfe,0xf7,0xff,0x7d,0xdf,0xb7,0xff,0xff,0x3f,0xfe,0xff,0xbd, + 0x9f,0xff,0xff,0xf7,0xff,0xff,0xff,0xdf,0xff,0xd0,0xff,0xfb,0xfe,0xff,0xef,0xff, + 0xfb,0xff,0xff,0xff,0xef,0xff,0xfa,0xff,0xfd,0xf7,0xff,0x9e,0xff,0xef,0xfa,0xfe, + 0x7b,0xff,0xef,0xfd,0xff,0xff,0x9f,0xff,0xff,0xf8,0xff,0xff,0xff,0xeb,0xff,0xed, + 0x7f,0xfd,0x76,0xe7,0xff,0xff,0xff,0x9f,0xff,0xff,0xfb,0xff,0xff,0x7f,0xdf,0xbf, + 0xff,0xff,0x37,0xf3,0x6d,0x7f,0x3f,0xfd,0xb5,0xfb,0xff,0xf7,0xcf,0xbf,0xaf,0xfb, + 0xff,0xbf,0xbf,0xfd,0xff,0xfe,0xa3,0xff,0xfe,0x7d,0xff,0xde,0xfd,0x2b,0xfc,0xce, + 0xa7,0xcf,0xf1,0xff,0xfb,0xfe,0xfc,0xf9,0xfe,0xff,0xa7,0xa3,0x3e,0x1f,0x87,0xdc, + 0xeb,0xfd,0xff,0xbf,0xcd,0x7b,0xfd,0xcf,0xbf,0xfc,0xff,0xff,0x7d,0xaf,0xfd,0xa7, + 0xff,0x7f,0xdf,0x97,0x3c,0xda,0x2c,0xfb,0xfe,0xbf,0xff,0xdf,0xdf,0xfe,0xff,0xdf, + 0xfd,0xf7,0x67,0xfa,0xf0,0xff,0xaf,0xff,0xff,0x37,0xfb,0x9f,0x7f,0xfa,0xff,0xff, + 0xaf,0xff,0x5a,0x3d,0xf3,0xff,0xff,0xff,0xfb,0xfe,0xff,0xef,0x2d,0xff,0xff,0xff, + 0xff,0x5f,0x7b,0xe6,0x9f,0xff,0xff,0xfe,0xff,0xfb,0xeb,0xff,0xff,0xef,0xfd,0xfb, + 0xfa,0xdf,0xff,0xff,0xea,0xff,0xff,0xfd,0x6f,0xa6,0xff,0xff,0xff,0xfd,0xff,0x7f, + 0xdf,0xf7,0xcc,0xdf,0xff,0xff,0xff,0xe5,0x7f,0x7e,0x45,0xff,0xff,0xff,0xdf,0xff, + 0xcd,0x7f,0xff,0xff,0xff,0xfd,0xfb,0x5f,0xff,0xff,0xcd,0x7f,0xff,0xff,0x9f,0x66, + 0xff,0xff,0xed,0xff,0xf4,0xcf,0xfb,0xdf,0xbd,0x64,0xdf,0xfa,0xff,0xff,0xad,0xef, + 0x7b,0xdf,0xf7,0xff,0x7b,0xff,0xf7,0xfd,0xeb,0xff,0xde,0xbf,0xed,0x9f,0xff,0xdf, + 0xff,0xfd,0xff,0xff,0xff,0xf9,0x1b,0xff,0xf7,0xbf,0xf7,0xa9,0xdf,0x77,0xdd,0x67, + 0xeb,0xff,0x57,0xff,0xf5,0x69,0xef,0x6f,0xff,0xff,0xff,0x77,0xff,0xff,0x7d,0x5f, + 0xff,0xd5,0xf7,0x53,0xdf,0xff,0xff,0xff,0x7f,0xff,0xff,0xfd,0xf1,0xff,0xff,0xef, + 0xe7,0xfd,0xbf,0xef,0xde,0xfe,0xf7,0xff,0xeb,0xff,0xe6,0xa7,0xbf,0x6e,0x9f,0xe7, + 0x7e,0x6f,0xff,0xfe,0xbd,0x2f,0xff,0x9a,0xf7,0xb5,0x2f,0xfe,0xff,0xde,0xb9,0xff, + 0xff,0xff,0xe2,0x7f,0xff,0xff,0xfe,0xdb,0x97,0xfd,0xc9,0x7f,0xdc,0xff,0xfd,0x7f, + 0xfe,0x96,0xb7,0xf5,0xaa,0xf2,0xbf,0x29,0xff,0xf3,0xd4,0x35,0xcf,0xcb,0x5e,0x1c, + 0xb5,0xff,0xef,0xff,0xd4,0xbf,0xff,0xff,0xf3,0xcf,0xff,0xfe,0xdf,0xef,0xfb,0xff, + 0xf7,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xfb,0xf6,0xdd,0xff,0xdf,0xff,0xfd, + 0xff,0x7f,0xff,0xf7,0xbf,0xff,0x7b,0xff,0xf7,0xff,0xff,0x7b,0xff,0xff,0xe7,0xa5, + 0xff,0xff,0xef,0xff,0xfe,0xff,0xfe,0x7f,0xff,0xe7,0xff,0xff,0xff,0xff,0xff,0xf9, + 0x8e,0x7f,0x9f,0xb9,0xff,0xff,0x9f,0xe7,0xff,0xfe,0x7f,0xff,0xe7,0xff,0xfe,0x7f, + 0xff,0xe7,0xff,0xff,0xfe,0xff,0x9f,0xfd,0xbb,0xef,0xfb,0xbe,0xdf,0x97,0xef,0x59, + 0xfe,0xff,0xbf,0xef,0x5b,0xfe,0x7d,0x9f,0xe7,0xfe,0x7f,0xbf,0xe7,0xd9,0xfe,0xff, + 0x9f,0xef,0xf9,0xfe,0xff,0x8f,0xef,0xd9,0xfe,0xff,0xbf,0x7e,0x06,0xff,0x3f,0xff, + 0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0x3f,0xff,0xff, + 0xff,0xff,0xff,0xdb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdb,0xff,0xff, + 0xff,0xcf,0x78,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xbf,0xfd,0xff,0xff,0xff,0xff, + 0xff,0xff,0xbe,0xbf,0xff,0xef,0xfe,0xff,0xff,0xeb,0xfb,0xff,0xff,0xbf,0xff,0xfb, + 0xff,0xff,0xff,0xfd,0xfb,0xff,0xff,0xfb,0xff,0xdf,0xff,0x5f,0xf7,0xef,0x7f,0xfb, + 0xc3,0xd7,0xfc,0x3f,0x7f,0xfe,0xf7,0xfd,0xad,0xdf,0x63,0xf0,0xfb,0x0f,0xdf,0xf0, + 0xfc,0x3f,0x7f,0xe3,0xff,0xbc,0x3f,0xfb,0xe3,0xf7,0xfc,0xbf,0xff,0xdf,0xff,0xd3, + 0xff,0xe9,0xfe,0x7f,0xcf,0xff,0xd8,0xfa,0x7c,0xcb,0xe7,0xff,0xfe,0x7e,0xaf,0x63, + 0xc8,0xbe,0x3f,0xe3,0xf9,0xfe,0x3e,0xcf,0xe7,0xfe,0xff,0xff,0x8f,0xff,0xfe,0xfe, + 0x7e,0xcf,0xff,0xf9,0xff,0xfc,0x3f,0xfd,0x7e,0xdd,0xfd,0xff,0xff,0x7f,0x5e,0xb7, + 0xfd,0xff,0xff,0xde,0xf7,0xf7,0x7f,0xfe,0xcf,0xec,0xfb,0x76,0xcf,0xb7,0xed,0xff, + 0xdf,0xfd,0xb5,0xff,0xdf,0xff,0xdf,0xb7,0x7f,0xfb,0x7f,0xff,0x6f,0xfb,0xbf,0x9b, + 0xe7,0xf9,0xfe,0x67,0x8b,0xe3,0x79,0xbe,0x7f,0x9b,0xe2,0xf8,0xfe,0x37,0x9b,0x97, + 0xb8,0x6f,0x9b,0x83,0x61,0xbc,0x7e,0x1f,0xe6,0xe1,0xfe,0x76,0x1b,0xe3,0xe1,0xfe, + 0x6f,0x9f,0xe5,0xff,0xf5,0xff,0x7f,0xff,0xff,0xfc,0x7f,0xbf,0xff,0xf7,0xff,0xff, + 0x1f,0xef,0xf3,0xfe,0x7f,0x1f,0xf1,0xfc,0xff,0x3f,0xc7,0xf7,0xae,0xff,0xff,0xcf, + 0xff,0xfe,0xff,0x7f,0xc7,0xff,0xfd,0xff,0xf8,0xbf,0xfe,0xbf,0xef,0xfe,0xff,0xff, + 0xaf,0xf7,0xfe,0xfe,0xff,0xff,0xef,0xee,0xfe,0xbf,0xaf,0xea,0xde,0xad,0x9f,0xea, + 0xce,0xb6,0xff,0xeb,0x7f,0xf8,0xb7,0xff,0xcb,0x6f,0xee,0xb7,0xff,0xbf,0xff,0x47, + 0xff,0xd7,0xfd,0xfd,0x7f,0xff,0xf7,0xff,0xff,0xff,0xdf,0xff,0xfd,0xff,0xbf,0xcf, + 0xf7,0xfd,0xe2,0xde,0x77,0xfc,0xe7,0x79,0xdf,0xfb,0x9f,0xff,0x79,0xff,0xff,0x9d, + 0xff,0x79,0xff,0xf7,0xff,0xe2,0xff,0xfa,0xff,0x9f,0xaf,0xff,0xfe,0xff,0xdf,0xff, + 0xf9,0xff,0xff,0x9f,0xbf,0xef,0xfa,0xff,0xbb,0xfb,0xa6,0x7f,0xba,0x3e,0x99,0xff, + 0xe9,0xff,0xee,0x9d,0xff,0xe9,0xbf,0xbe,0x9f,0xfe,0x7f,0xfd,0x5f,0xff,0xff,0xff, + 0xf2,0xfd,0x3f,0x63,0x7e,0xf7,0xb7,0xff,0xff,0xff,0xf6,0x7f,0xdf,0xcf,0xfd,0xff, + 0xff,0x2f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0x9a,0xff,0xfe,0xbf,0x2c,0xeb,0xda,0xf4,0xbf,0xae,0xeb,0xfa,0xfe,0xbf, + 0xaf,0x6b,0xfa,0xfe,0xbf,0xaf,0xfa,0xee,0xa7,0xaf,0xe2,0xf8,0xfe,0xaf,0xaf,0xea, + 0xfa,0xfe,0xbf,0xab,0xeb,0xfa,0xbe,0xbf,0xf6,0x6f,0xff,0xe7,0xff,0xff,0xff,0xfd, + 0x3f,0xef,0xfb,0xff,0xff,0xf7,0xff,0x97,0xfc,0xd3,0x3f,0xef,0xee,0xff,0xff,0xdf, + 0xf3,0xff,0xff,0xbd,0xfd,0xf3,0xff,0xdb,0x3e,0xff,0xf7,0xff,0xff,0xff,0xff,0xc7, + 0xff,0xff,0xff,0xbf,0xef,0xfb,0xbe,0xb6,0xf5,0x7d,0xff,0x7f,0xbf,0xff,0xff,0x7f, + 0xcf,0xf7,0xf7,0x6e,0xff,0xfb,0xdb,0xff,0xff,0xd7,0xdf,0xf3,0xff,0xff,0xbf,0xfe, + 0xfe,0xfd,0xff,0x7f,0xdf,0xb9,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xaf,0xbf,0xff, + 0xff,0xff,0xbf,0xff,0xbf,0xae,0xef,0x3f,0xfa,0xfd,0xff,0xff,0xdf,0xdf,0xff,0xff, + 0xfb,0xff,0xdf,0xff,0xfd,0xff,0xf7,0xff,0xff,0xff,0xff,0xfb,0xbf,0xfe,0xaf,0xfb, + 0xef,0xff,0xff,0xff,0xbf,0x4b,0xff,0xff,0xfe,0xff,0x6b,0xda,0x7e,0xb9,0xfd,0xef, + 0xbb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xaf,0xff,0xff,0xfb,0xff,0xff,0xff, + 0xfd,0xfe,0x57,0xfb,0xd7,0xff,0xff,0x7f,0xff,0x3f,0xfe,0xfa,0xb5,0xfb,0xff,0xff, + 0xf5,0xbd,0x5d,0x55,0xff,0xd7,0xf6,0xff,0xef,0xf7,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xaa,0xbf,0x7e,0xff,0xfb,0xff,0xff,0xfe, + 0xff,0xbb,0xef,0xfd,0x7f,0xef,0xbb,0xfe,0xf3,0xff,0xdf,0xff,0xbb,0xbe,0xff,0xfb, + 0xfe,0xff,0x7e,0xef,0xdf,0xfd,0xff,0xbf,0xef,0xf7,0xfd,0xff,0x7f,0xaf,0xf9,0x5f, + 0xff,0x37,0xfb,0xff,0xbf,0xbf,0x6e,0xcf,0xb7,0xfb,0xff,0xef,0xcf,0xff,0xff,0xef, + 0xff,0xff,0xfd,0xd7,0x7f,0xff,0xff,0xff,0xff,0x6f,0x7f,0xdf,0xfb,0xbf,0xef,0xff, + 0xff,0xff,0xff,0xff,0xff,0xd3,0xef,0xfb,0xff,0xff,0xff,0xfd,0x7f,0x7e,0xbf,0xff, + 0x7f,0xff,0xfe,0xfb,0xff,0xfd,0xff,0xff,0xfe,0xff,0x7f,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xdc,0x6d,0xff,0xcf,0xff, + 0xff,0xff,0xff,0xff,0xfe,0xfd,0xff,0x7c,0x35,0xf7,0xfe,0xfb,0xfb,0xff,0xfd,0xd3, + 0xfe,0xfe,0xbd,0xef,0xff,0xdf,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xf7,0xff,0x2d,0xbf,0xff,0xff,0xff,0xff,0xfe,0xff,0xdf,0xff,0xff,0xff,0xdf,0xff, + 0xff,0xfb,0x7f,0xff,0xff,0xf3,0x73,0xf6,0xf7,0xfe,0xff,0xff,0xff,0xf7,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf1,0xff,0xbf,0xff,0xff,0x5f,0xff,0xfd, + 0xff,0xff,0xc2,0xfe,0xef,0xff,0xdf,0xfb,0xff,0x9f,0xef,0xf7,0xe7,0xfd,0xf3,0xbf, + 0xdf,0xf7,0xfd,0xff,0xff,0xff,0xff,0xff,0xbf,0xdf,0xde,0xff,0xff,0xff,0xfa,0x1f, + 0xff,0xff,0xff,0xeb,0xff,0xe7,0xaf,0xe7,0xbb,0xdf,0xff,0xef,0xff,0xff,0xbf,0xd7, + 0xde,0xf7,0x7e,0xed,0x97,0xf5,0xfb,0xfe,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xff, + 0xe3,0xff,0xff,0xfd,0xff,0x47,0xfe,0xff,0xff,0x7f,0xff,0xff,0xfb,0xfb,0xff,0x9f, + 0xf5,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xe7,0xf9,0xbf,0xec,0xdf,0x37,0xf9, + 0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xdf,0xfe,0xfd,0xef,0x7c,0x3f,0xff,0xff,0xff, + 0xff,0x3c,0xfb,0x32,0xcf,0xb7,0xff,0xff,0xff,0xfd,0x73,0xfc,0xff,0xff,0x8f,0xf2, + 0x7d,0xa6,0xef,0xff,0xfe,0x4d,0x9f,0xcd,0x7f,0xff,0xff,0xfe,0xff,0xff,0xff,0xff, + 0xff,0xf6,0xda,0xff,0x9f,0xff,0xf3,0xff,0xbf,0x16,0xa7,0xf5,0xff,0xff,0xff,0xfe, + 0x3e,0xff,0xd9,0x3f,0xfd,0x3b,0xff,0xb6,0x9b,0xff,0xe7,0xf9,0xb3,0xfb,0x3f,0xff, + 0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xf5,0x8b,0xdf,0xeb,0x7a,0xff,0xbf,0xff,0x4b, + 0xfa,0xbe,0xb1,0xad,0xeb,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xfb,0x3b,0x7b,0xff, + 0xff,0xfb,0xfb,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0x9e,0xf5,0x6f, + 0xed,0x79,0x5f,0xdf,0xff,0xe5,0x7b,0x5f,0xd7,0xb5,0xed,0x7f,0xff,0xff,0xff,0xfd, + 0xff,0xff,0xef,0xcf,0xff,0x7f,0xff,0xff,0xcf,0xff,0xff,0xff,0xff,0xff,0xff,0x7f, + 0xff,0xff,0xff,0xf3,0xf6,0x2f,0xbe,0xaf,0xff,0xfe,0xed,0xff,0xae,0x8b,0xf2,0xf9, + 0xfe,0xff,0xeb,0xff,0xfe,0xbf,0xef,0xff,0xfe,0xb7,0xfc,0xcf,0x7f,0xff,0xf7,0xfc, + 0xdf,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xff,0xff,0xff,0x89,0xbf,0xf5,0x7f,0xdf, + 0x77,0xff,0xf5,0x79,0x54,0x56,0x3d,0xff,0x7d,0x5f,0xff,0xd5,0xf7,0x7b,0xff,0xd7, + 0xff,0x69,0xdf,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0xfd,0xdf,0xff,0xff,0xff, + 0xff,0xdb,0x9f,0xfe,0xbf,0xaf,0xfb,0xff,0xfe,0xbe,0xae,0x6b,0xfa,0xe6,0xbf,0xaf, + 0x5f,0xfa,0xff,0xbe,0xff,0xfa,0xbf,0xb9,0xbf,0xff,0xff,0xff,0xbd,0x7d,0xff,0xff, + 0xff,0xff,0xbf,0xff,0xff,0xff,0xff,0xfe,0x37,0xff,0xd7,0xf5,0xfd,0xff,0xff,0xdf, + 0xf5,0xe9,0x7a,0x5e,0x97,0xf5,0xff,0xff,0x5f,0xdf,0xff,0xff,0x5b,0xf4,0x37,0x3f, + 0xff,0xf2,0xf4,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0x70,0xff, + 0xff,0xed,0xff,0xff,0xff,0xbf,0xe7,0xf9,0xfe,0xff,0xff,0xed,0xff,0xff,0xff,0xff, + 0xff,0xfb,0xff,0x9f,0x6f,0xdf,0xff,0xfd,0xef,0x67,0xff,0xff,0xff,0xb7,0xff,0xfb, + 0x7f,0xff,0xff,0xff,0xe9,0x9f,0xff,0xfe,0x7f,0xff,0xff,0xfa,0xfe,0x7f,0xff,0xeb, + 0xff,0xfe,0xff,0xff,0xef,0xff,0xff,0xff,0xaf,0x99,0xe7,0xb9,0xff,0xff,0x9f,0xe6, + 0x7f,0xbf,0xff,0xf9,0xff,0xff,0x9f,0xff,0xff,0xff,0xfd,0xf1,0xff,0xdb,0xfe,0xff, + 0xbf,0xef,0x9b,0xfe,0xd5,0xbb,0x6f,0xfb,0xe6,0xff,0xbe,0xef,0xfb,0xfe,0xf9,0xe7, + 0xf9,0xf6,0x7f,0xbf,0xe7,0xf9,0xfe,0xef,0xbf,0xef,0xfb,0xfe,0xff,0xbf,0xef,0xfb, + 0xf7,0xe5,0x6f,0xdb,0xff,0xff,0xff,0xff,0xf7,0xfe,0xff,0xff,0xcf,0xff,0xf6,0xff, + 0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xf6,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xfc,0xf6,0x0f,0xfd,0xff,0xff,0xff,0xff,0xff,0xff, + 0x7f,0xff,0xef,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xfa,0xfe,0xff, + 0xff,0xef,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xe1,0x7f, + 0xfd,0xff,0xff,0xdf,0xd7,0xff,0xf9,0x7f,0xff,0xf7,0xf5,0xff,0x7f,0x5f,0xd7,0xf5, + 0xfd,0x7f,0xd6,0xfe,0x3f,0x2f,0xdf,0xf0,0xfe,0x3d,0x7f,0xff,0xd7,0xff,0xfd,0x7f, + 0xdf,0xff,0xff,0xff,0xfc,0xbf,0xfe,0xdf,0xff,0xf9,0xfa,0x7f,0xdf,0xe7,0xfd,0xfb, + 0x7e,0x9f,0xb7,0xe9,0xfa,0x7c,0x9f,0xa7,0x5a,0x27,0xcf,0xb3,0xf9,0xfe,0x35,0xcf, + 0xa7,0xff,0xfa,0x7f,0xff,0xa7,0xf9,0xff,0xff,0xff,0xff,0x57,0xbf,0xb7,0xff,0xfb, + 0x7f,0xfd,0xff,0x7d,0xff,0xff,0xdf,0xff,0xfd,0xfb,0xff,0x5e,0xd7,0xff,0xfe,0x5f, + 0xbb,0x3d,0xef,0x7e,0xd7,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xff, + 0xff,0xe4,0xff,0xfb,0xf9,0xfe,0x6e,0x1f,0xc6,0xe1,0xf8,0x7f,0x8f,0xc7,0xf0,0xf8, + 0x7f,0x8b,0xc2,0xf9,0xf8,0x6b,0x87,0xf8,0xf8,0x6f,0x1b,0xe7,0xf1,0xfe,0x7e,0x1f, + 0xc7,0xf1,0xfc,0x6e,0x1f,0xe7,0xf9,0xfc,0xdf,0xff,0x5f,0xfb,0xfc,0xd9,0x7a,0xff, + 0x91,0xef,0xff,0x1e,0x4e,0xb1,0x65,0xff,0xba,0xff,0x91,0xad,0x3e,0xc7,0xf7,0x6c, + 0xfb,0x3f,0xdf,0x97,0xff,0xf9,0x7a,0xff,0x97,0xad,0xdb,0xff,0xff,0xff,0xcb,0xff, + 0xeb,0xff,0xff,0xbc,0x2f,0x9f,0xe6,0xf1,0xff,0xbf,0x09,0xe3,0xf0,0xbf,0xf7,0xff, + 0xe2,0xe9,0xa5,0x8b,0x7b,0xd9,0x9e,0x6d,0xeb,0x62,0xff,0xfe,0x2f,0xff,0xe2,0xff, + 0xbe,0x7f,0xff,0xff,0xfc,0x7f,0xff,0xff,0xef,0xf3,0xdf,0xf7,0xf1,0xdd,0x7f,0xfd, + 0xf7,0xfd,0xdf,0x7f,0xff,0xff,0xfd,0xff,0x65,0xc7,0xff,0xde,0x77,0x9c,0xff,0xf9, + 0xff,0xff,0x1f,0xff,0xf9,0xff,0xf7,0x9f,0xff,0xff,0xff,0x4f,0xff,0xff,0xfd,0xfe, + 0x77,0xd9,0xfe,0x7d,0xde,0xfe,0xd9,0xf6,0x6d,0x9f,0x7f,0xdf,0xf6,0x7d,0x9f,0xb9, + 0xbf,0xef,0x9e,0x67,0xbf,0xbe,0x7f,0xff,0x67,0xfd,0xfe,0x7f,0xde,0xe7,0xff,0xff, + 0xff,0xe9,0xff,0xf2,0xff,0xf9,0xff,0xff,0xf7,0xfc,0xbf,0x7f,0xff,0xdf,0xff,0xff, + 0xf6,0x7f,0xff,0xff,0xff,0xff,0xf6,0xfd,0xff,0xff,0xff,0xf6,0x7f,0xff,0xff,0xff, + 0xff,0xfe,0xbf,0xff,0xff,0xff,0xff,0xfa,0x2f,0xff,0x6b,0x7a,0xfe,0xbf,0xac,0xea, + 0xba,0xee,0xb7,0xaf,0xeb,0xfa,0xde,0x8f,0xab,0xea,0xfa,0x3f,0x8b,0xab,0xda,0xfe, + 0xbf,0xaf,0xa3,0xfa,0xfe,0xbf,0xa7,0xea,0xfa,0xfe,0xaf,0xaf,0xcb,0xfb,0x27,0xfd, + 0xff,0xfc,0xff,0x7f,0xff,0xf3,0xff,0xff,0xff,0xfd,0xff,0x7f,0xf7,0xdf,0xcd,0xff, + 0xdc,0xfe,0xcf,0x77,0x7f,0xff,0xfd,0xc5,0xf7,0xff,0xf3,0xff,0xfd,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xea,0x7f,0xff,0xff,0x7f,0x6f,0xdf,0xfa,0xbd,0xfd,0xff,0xff, + 0xf7,0xf7,0xff,0xfe,0xde,0x9f,0xed,0x3b,0xf6,0x77,0xfd,0xff,0x7f,0xcb,0xbf,0xfd, + 0xff,0xff,0xdf,0xff,0xfd,0xff,0x7f,0xdf,0xf7,0xf7,0xf9,0xd7,0xff,0xef,0xef,0xff, + 0xff,0xff,0xfb,0xf9,0xff,0xff,0xef,0xfb,0xff,0xbf,0x7d,0x4f,0xfe,0x7e,0xfb,0x7f, + 0xbf,0xff,0xff,0xff,0xfd,0xb7,0xfa,0xff,0xdf,0xff,0xff,0xfe,0xdf,0x7f,0xff,0xff, + 0xff,0xab,0xfd,0xed,0xbf,0xdf,0xff,0xff,0xe9,0xdf,0x72,0x9e,0xf3,0xff,0xff,0xdd, + 0xed,0xbf,0x65,0xdf,0xf6,0xad,0xeb,0xff,0xff,0xf7,0xff,0xeb,0xff,0xff,0xff,0xfb, + 0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xe0,0x7f,0xff,0x7f,0xff,0xff,0xff,0xf7,0x75, + 0xff,0xf6,0xff,0xf7,0xff,0xff,0xff,0xfd,0x7f,0xfe,0xfd,0xff,0xff,0xff,0xff,0x7f, + 0x7f,0xff,0xfb,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xed,0xff,0x6f,0xfb, + 0xfe,0xff,0xbe,0xef,0xeb,0xbf,0xff,0xfb,0xdf,0xbb,0xfe,0xff,0xec,0xfb,0xff,0xfe, + 0xfb,0xfb,0xbb,0xf5,0xff,0xbe,0xf5,0xfb,0xfe,0xff,0xbf,0xef,0xd7,0xf7,0xff,0xbf, + 0x7f,0xff,0xef,0xff,0xb1,0xff,0x3f,0xff,0xbf,0xaf,0xfb,0xff,0xff,0xef,0xff,0xff, + 0xff,0xff,0xcf,0xef,0xff,0xfe,0xfd,0xef,0xdb,0xff,0x7f,0xbd,0x3b,0xfb,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf3,0xff,0xea,0xbb,0xff,0xff,0xff,0xff, + 0x7f,0x9f,0xf6,0xfd,0xff,0x7f,0x1d,0xef,0xff,0xff,0x7f,0xb5,0xef,0xfd,0xef,0xe7, + 0xff,0xff,0x7a,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xf7,0xfd,0xff,0xff,0xff,0xbd, + 0xdf,0x57,0xff,0xff,0xff,0xfc,0x7f,0x1c,0xc7,0xef,0xec,0x7f,0xff,0xff,0x71,0xfe, + 0xff,0xaf,0xff,0x6b,0xfc,0x3f,0xbe,0xff,0xdc,0x5f,0xff,0xff,0x7f,0x7f,0xff,0x1f, + 0xdf,0xff,0xfe,0xff,0xff,0xcf,0xfb,0xe2,0xff,0xff,0xff,0xfd,0xf7,0xfd,0xff,0x77, + 0xfb,0x5b,0xfe,0xff,0xff,0xbb,0xdf,0x7b,0xff,0xbf,0x7f,0xbd,0x7f,0xef,0xff,0xdf, + 0xff,0xbf,0xff,0xf9,0xff,0xfb,0xbb,0xff,0xfb,0xdf,0xff,0xfe,0xdf,0x7e,0x1f,0xff, + 0xff,0xf6,0xff,0xff,0xf7,0xf7,0xff,0xfd,0xcf,0xf3,0xfe,0xb7,0xbf,0xef,0xff,0xed, + 0xf7,0xfe,0x7b,0xcf,0xbe,0xbf,0xff,0xfe,0xff,0x55,0xfd,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xbf,0xfb,0xb9,0xff,0xff,0xfe,0xbb,0xf7,0xf5,0xfe,0xff,0xed,0xbf,0xff, + 0xfd,0xfd,0xff,0xff,0x77,0xbf,0xfe,0xed,0x6f,0xba,0xff,0xff,0xbe,0xee,0xff,0xfe, + 0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x73,0x7f,0xff,0xff,0x35,0xff, + 0xff,0xfb,0xff,0xfd,0xcf,0xef,0xff,0xfe,0xff,0xff,0xff,0xef,0xff,0xef,0xfe,0xfd, + 0x7f,0xfe,0xef,0xfb,0xef,0xff,0xdf,0xcd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xfb,0x2f,0x6e,0xf5,0xff,0x7f,0x5e,0xd7,0xbf,0xfa,0xff,0xdf,0xaf,0xb7,0xef,0xff, + 0xff,0x57,0xf7,0xef,0x7f,0xbf,0xfd,0xfd,0xfa,0xff,0xdf,0xd9,0xef,0xfb,0xff,0x1f, + 0xbd,0xfd,0xfe,0x7f,0x5f,0xbf,0xff,0xe5,0xfe,0xa6,0x7f,0xdf,0xe7,0xf9,0xfe,0x7d, + 0x9f,0xf7,0xd9,0xf6,0x7f,0x9f,0x7f,0xfd,0xfe,0x7f,0x9f,0xf9,0xf7,0x7f,0x9f,0xaf, + 0xdd,0xfe,0xff,0x9f,0xa7,0xdd,0xf6,0x7f,0xdf,0xe7,0xdb,0xfb,0xfd,0xea,0x8f,0xff, + 0xff,0xf3,0xff,0x9f,0x27,0xaf,0xf3,0xfb,0x9f,0x33,0x9f,0xb7,0xfe,0xfe,0x3e,0x9f, + 0xd3,0xfd,0x9e,0xef,0xff,0xf9,0xff,0xfe,0xdf,0xff,0xfb,0xd7,0x3f,0x87,0xff,0xff, + 0xff,0xff,0xcf,0xfc,0x76,0xbf,0xff,0xf3,0x7f,0xea,0xfe,0x8b,0xfe,0xff,0xf9,0xfe, + 0xbf,0xf7,0xfc,0x3f,0x36,0x5f,0xfe,0xea,0xbf,0xdb,0xf3,0xff,0xff,0x3b,0xdf,0xff, + 0xbf,0xf3,0xff,0xfd,0xff,0xbf,0xff,0xff,0xfb,0xfd,0x70,0xf7,0xff,0xff,0xbf,0xff, + 0xfe,0xfe,0xe6,0xbf,0xff,0xfe,0xff,0xfe,0xf9,0xad,0xfb,0xfb,0xd4,0xfc,0xfa,0x7b, + 0xff,0xbf,0xfd,0xfb,0x7b,0xe6,0xbf,0xff,0xea,0xff,0xe6,0xb9,0xaf,0xff,0xff,0xff, + 0xbd,0x5b,0xff,0xff,0xdf,0xff,0xff,0xff,0x7e,0x57,0xff,0xff,0xff,0xff,0xdf,0xf5, + 0xfd,0xff,0x7e,0x7f,0x3b,0xff,0x7f,0xdf,0xff,0xfd,0xff,0x7e,0x57,0xff,0xed,0x7f, + 0xfe,0x57,0xb5,0xff,0xff,0xff,0xfd,0xbb,0xff,0xff,0xfe,0xec,0xbf,0xff,0xfb,0x77, + 0xff,0xff,0xaf,0xff,0xfb,0xfe,0xb7,0x6e,0xcf,0xff,0xed,0xfc,0xcf,0x7e,0xf4,0xbf, + 0xef,0xcf,0xff,0xff,0xfe,0xff,0xff,0xff,0xfb,0xff,0xff,0xeb,0xff,0xfe,0x6f,0xff, + 0xff,0x75,0x95,0xff,0xfd,0xdc,0xf7,0xff,0xf5,0x7f,0xff,0x77,0xd5,0x47,0x69,0xdf, + 0xf7,0xbf,0x7d,0xdf,0x75,0x95,0xf7,0x75,0xdf,0xf7,0xff,0xff,0x7f,0xff,0xf7,0xfd, + 0xff,0xfd,0x5f,0xf7,0x07,0xff,0xff,0xfb,0x7a,0xff,0xff,0xef,0xab,0x1f,0xfe,0xbf, + 0xff,0x4f,0xda,0xbf,0xbf,0xbf,0x5f,0xef,0xbd,0xbe,0x7b,0xfa,0xf5,0xbf,0xbf,0x4b, + 0xff,0xfe,0xbf,0xff,0xeb,0xfa,0xff,0xff,0xaf,0xe7,0xb9,0xbf,0xff,0xfd,0xff,0x5f, + 0xff,0xf7,0x3d,0x7f,0xff,0xd7,0xff,0xcd,0xf8,0x5b,0xdf,0xf7,0xcf,0xff,0xf4,0x17, + 0x0d,0xff,0x5f,0xdf,0xf7,0xfd,0x7f,0xff,0xd7,0xff,0xfd,0x7f,0x5f,0xff,0xf5,0xfd, + 0xf8,0x37,0xff,0xff,0xff,0xff,0xff,0xff,0xdb,0x7e,0xff,0xff,0xff,0xff,0xff,0xfd, + 0xff,0xff,0xff,0xfe,0xff,0x6d,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x37,0xff,0xff,0xff,0xff,0xfb,0xff,0xf9,0xbf, + 0xeb,0xff,0xff,0xff,0xbf,0xe7,0x9f,0xff,0xff,0xbf,0xeb,0xe6,0xf9,0xff,0x7f,0xff, + 0xff,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xec,0x7f,0xfe, + 0xff,0xbf,0xef,0xbb,0xfe,0x7b,0xbb,0xef,0xfb,0xfe,0xfb,0xbf,0xe3,0xdb,0xfe,0xe5, + 0xb3,0x79,0xbe,0x7f,0xbf,0xef,0xfb,0xfe,0xfb,0xbf,0xef,0xfb,0xd6,0xfd,0xbf,0x6f, + 0xfb,0xf6,0xfd,0xf8,0x9b,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xcf,0xff,0xff,0xbf,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xfd,0xbf,0x6f,0xff,0xf6,0xfd,0xbd,0xdb,0xff,0xff,0xff,0xff,0xff, + 0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0x7b,0xfe, + 0xef,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xf7,0xff,0xff,0x7f,0xdf, + 0xfa,0x5f,0xff,0xff,0xdf,0xd7,0xf5,0xfd,0x0f,0x5f,0xf7,0xff,0xfd,0x7f,0x5f,0xf8, + 0xbd,0xfd,0x7f,0x5f,0xfe,0x3b,0x0a,0x7f,0xf7,0xfd,0xfd,0x7f,0xdf,0xf7,0xff,0xff, + 0x7f,0xdf,0xf7,0xff,0xff,0x7b,0xfe,0x8f,0xff,0xff,0xf9,0xfa,0x7e,0x9f,0xa3,0xe9, + 0xfe,0x7f,0xff,0x27,0xe9,0xff,0x3e,0xdf,0xa7,0xe9,0xff,0xcd,0xe3,0xf8,0xfe,0x7f, + 0x9f,0xa7,0x79,0xfe,0x7f,0xff,0xb7,0xed,0xfb,0x7f,0xff,0xb7,0xe7,0x49,0xff,0xbf, + 0xfb,0x7f,0xff,0xff,0xff,0xdf,0xff,0xdf,0xff,0xff,0xfd,0x77,0xff,0xf7,0xff,0xff, + 0x7a,0xbd,0xfd,0x7d,0xff,0xdf,0xf7,0xff,0xff,0x7f,0xdf,0xff,0xfd,0xff,0x7f,0xdf, + 0xff,0xfd,0xdf,0xfe,0xbf,0xff,0xfe,0x6f,0x9f,0x87,0xe1,0xd8,0x7e,0x1b,0xe7,0xe9, + 0xfa,0x2e,0x1d,0xe3,0xf9,0xf8,0x2e,0x1f,0xe9,0xbe,0x6e,0x1b,0xa6,0xf9,0xf8,0x6f, + 0x9b,0x87,0xf8,0xf8,0x3f,0x8f,0x87,0xf8,0xfc,0x1d,0x57,0xff,0xfb,0xfd,0xfd,0x3b, + 0x4d,0xd3,0x74,0x5f,0x3f,0xef,0xd7,0xf4,0xed,0x3f,0xcf,0xd7,0xb4,0xff,0xcf,0xf3, + 0xfe,0xdf,0x3f,0xcf,0xd7,0x7c,0xff,0x3b,0xef,0xf3,0x7d,0xff,0x3b,0xff,0xf7,0xaf, + 0xf2,0xff,0xff,0xff,0xbf,0xa6,0xc9,0xd2,0xdc,0xbd,0x67,0xff,0xb2,0xec,0x9b,0x2d, + 0xed,0xfa,0xec,0xbb,0x69,0x76,0xdf,0xf7,0x66,0xd9,0xfa,0xfd,0xbf,0xee,0xdd,0xfb, + 0x74,0xff,0xb6,0xdf,0xfb,0xff,0xff,0xdf,0xff,0xef,0xf7,0xff,0xf7,0xfd,0xee,0x7f, + 0xdd,0xff,0xbd,0xff,0x77,0xd4,0xff,0x7f,0xff,0x53,0x9b,0xf5,0xcf,0xfb,0x9d,0xf7, + 0x7f,0xfe,0x73,0xfc,0xf7,0xff,0xdf,0x77,0xfd,0xf7,0xff,0xdf,0xff,0xbb,0xff,0xfd, + 0xfe,0xff,0xd8,0x76,0x1f,0x87,0x61,0x9f,0xf6,0x1d,0x86,0x68,0xbf,0xb7,0xfd,0x82, + 0x69,0xbe,0x1b,0xff,0xf1,0x98,0x67,0xff,0x86,0x7f,0x98,0x77,0xed,0x83,0xfe,0xd8, + 0x7f,0xef,0xff,0xf7,0x7f,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xef,0xdd,0xdf,0x7c,0xbf,0x6f,0xf6,0xfc,0xbb,0xff,0xff,0xdf,0xfc,0xbf,0xff, + 0xff,0xff,0xef,0xfd,0xff,0xff,0xff,0xff,0xfd,0xf6,0xab,0xff,0xfa,0xfe,0xaf,0xa7, + 0xeb,0xfa,0xbe,0xbf,0xaf,0xeb,0xfa,0xde,0xbf,0xaf,0xe8,0xba,0x3a,0x3f,0xa8,0xda, + 0xfe,0xaf,0xaf,0xeb,0xda,0xbe,0xaf,0xaf,0xea,0xfa,0xfc,0xbf,0xaf,0xeb,0xfa,0xff, + 0xe5,0xff,0xfc,0xfb,0x3f,0xff,0xbe,0xfd,0x7f,0xfe,0xff,0xf3,0x7f,0xdd,0xff,0x8f, + 0xf3,0x7f,0xff,0xbe,0xbf,0x5c,0xdf,0x7f,0xfe,0xff,0xff,0xff,0x3f,0xdf,0xff,0xfc, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x9f,0xfc,0xbf,0xeb,0xdf,0xdf,0xf7,0xbf,0x7f, + 0xdd,0xd2,0x7d,0xfe,0xf7,0xdf,0xf5,0xaf,0xfb,0x3b,0x7f,0xdf,0x7f,0xff,0xdf,0x77, + 0xa7,0xfb,0x2e,0xdf,0x9f,0xfc,0xbf,0xfd,0xdf,0xf7,0xfd,0xef,0xfe,0x47,0xfe,0xff, + 0xf7,0xff,0xff,0xff,0xbc,0xbf,0xbf,0xff,0xff,0xfe,0xff,0xfd,0x37,0xdf,0xbf,0xff, + 0xbe,0xff,0xef,0xfb,0xf7,0xbf,0xff,0xff,0x3f,0xfe,0xef,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xdf,0xe0,0xff,0x7f,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xfe,0xbb,0x8f,0x7e,0xdf,0xda,0xbf,0xaa,0xdf,0xf6,0x3f,0xff,0xfe,0xff,0xbf,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xf8,0x9f,0xff,0xff,0xff,0xff,0xfb, + 0xfd,0xfd,0xff,0xbf,0xf7,0xf7,0xff,0x7b,0x97,0xdf,0xff,0xf7,0xff,0xbb,0xf7,0xff, + 0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff, + 0xa3,0xff,0xff,0xbf,0x67,0xb7,0xee,0xfb,0xef,0xef,0xb9,0xff,0xfb,0x78,0xe7,0xbf, + 0xef,0xfb,0xbf,0x5e,0xef,0xde,0xff,0xfb,0x97,0xf7,0xff,0xf7,0xef,0xbf,0xfe,0xfb, + 0x7f,0xff,0xdf,0xff,0xff,0x6f,0xe4,0x7f,0xdf,0xbf,0xff,0x8f,0xf3,0xfd,0xfd,0xff, + 0xdb,0xff,0xfd,0xff,0x7f,0xd6,0x96,0xfd,0xdf,0xff,0xfb,0x9f,0xbb,0xff,0xdf,0xff, + 0xff,0xbf,0xff,0xdf,0xff,0xfd,0xbf,0xff,0xff,0xff,0xf7,0xfe,0xfe,0x6f,0xff,0xfb, + 0xff,0xbe,0xff,0xa7,0xfd,0x7f,0x7f,0xfb,0xe7,0x7f,0xfb,0xff,0x5d,0xf9,0xff,0xff, + 0xfb,0xfb,0xfd,0xdf,0x6f,0xff,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xfd,0xcd,0xbf,0xf7,0xff,0xbf,0xfd,0xdf,0xf3,0xff,0xfe,0x6f,0x3f,0xff, + 0xfb,0xdf,0x37,0xff,0xff,0xfa,0xff,0x4f,0xd3,0xff,0xff,0x35,0x8f,0xf7,0xdc,0xdf, + 0x1f,0xcf,0xf7,0xff,0xff,0xbf,0xff,0xff,0xff,0xfd,0xbf,0xfe,0xff,0xff,0xff,0x7b, + 0xff,0xbe,0xff,0xee,0xff,0xff,0xff,0xfd,0xed,0xff,0xff,0xff,0xed,0xea,0xfe,0xdf, + 0xff,0xeb,0xf9,0xfe,0xff,0x9f,0xfb,0xf9,0xfe,0xff,0xfb,0xf7,0xff,0xff,0xfd,0xfb, + 0xa7,0xff,0x7f,0xff,0xfd,0x7f,0xff,0xe7,0x3f,0xcb,0x5f,0xdf,0xf7,0xee,0x7d,0x7f, + 0xdf,0xf7,0xfe,0xff,0xff,0xff,0xff,0x7f,0x7f,0xed,0xbf,0xff,0x7f,0x7f,0xff,0xf7, + 0xff,0xff,0xff,0xff,0x7f,0xff,0xf2,0x7f,0xff,0xff,0xff,0xef,0xff,0xfe,0xff,0xff, + 0xe7,0xfb,0xf6,0xef,0xf9,0xfb,0xfb,0xf6,0xff,0xf7,0xff,0xff,0xbf,0xf3,0x6f,0xfd, + 0xff,0xff,0xff,0xef,0x7f,0xbe,0xff,0xfd,0xff,0xff,0xff,0xff,0xfc,0x53,0xff,0xff, + 0xfe,0xfd,0xff,0xef,0xef,0xff,0xfe,0xed,0x7f,0xef,0xff,0xef,0x7f,0xbf,0xef,0xff, + 0xff,0xef,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xfe,0xff,0xdf,0xef,0xff,0xff,0xff, + 0xff,0xff,0xfd,0xb0,0xff,0xfc,0xff,0xf3,0xf1,0xfb,0x3e,0xcf,0x1f,0xb1,0xfb,0x3f, + 0x57,0xf4,0xaf,0xd3,0xf7,0x7f,0xbf,0xff,0xfb,0xcb,0xff,0x65,0x6b,0xfc,0x1e,0x87, + 0x6d,0x7b,0xf6,0x7f,0xff,0xdf,0xff,0xff,0xff,0x5d,0x6b,0xeb,0xff,0xfe,0x6f,0xae, + 0xeb,0xf9,0xf6,0x7e,0x93,0x3e,0xe3,0xfe,0x43,0xff,0x7e,0xff,0x37,0xef,0xfc,0xf9, + 0x7b,0xed,0xfe,0xfc,0xba,0xee,0x6b,0x32,0xbf,0xdf,0xff,0xff,0xff,0xff,0xff,0xf7, + 0xaf,0x7f,0xfb,0xff,0xd6,0xdf,0xfc,0xeb,0xff,0xd6,0xff,0xbc,0xef,0xff,0x4a,0xf5, + 0xfc,0xed,0xfb,0xd7,0xdf,0xef,0xef,0xce,0xde,0xbf,0xef,0xff,0xfe,0xdf,0xbc,0xed, + 0xff,0xff,0xff,0xff,0xff,0xfb,0xdd,0xbf,0xff,0xff,0xf9,0xff,0xff,0xbd,0xff,0xfb, + 0xdf,0xdf,0x3f,0xff,0xf9,0x5e,0x7f,0x3f,0xfd,0xfb,0xad,0xf7,0xfd,0xf3,0xfe,0xd7, + 0xf7,0xff,0xf3,0xff,0xdf,0xbd,0xff,0xff,0xff,0xff,0xff,0xff,0xd5,0xbf,0xff,0xff, + 0xff,0xff,0x32,0xdb,0xb5,0x7f,0xbb,0x76,0xd5,0xf3,0x2d,0xef,0x57,0xff,0xf3,0x6d, + 0x1e,0xdf,0xbb,0x3f,0xff,0x27,0xdf,0xbb,0x7d,0xff,0x36,0xc9,0xb5,0x7f,0xff,0xff, + 0xff,0xff,0xfe,0x76,0xff,0xff,0xff,0xff,0xdf,0x57,0xfd,0x6f,0xff,0xd8,0x75,0xbd, + 0xf5,0x7d,0x5e,0xf5,0xbd,0xf7,0x7b,0xdb,0xdd,0xf7,0x7f,0xdf,0xf7,0xdd,0xaf,0xff, + 0xda,0x76,0xbd,0x6f,0xff,0xff,0xff,0xff,0xff,0x4e,0x7f,0xff,0xff,0xfd,0xee,0x6b, + 0xd6,0xbf,0xff,0xeb,0x7b,0x9e,0xf6,0xbd,0xaf,0x1f,0xfe,0xf7,0xbc,0x7f,0xde,0xfe, + 0xff,0xef,0x6b,0xfe,0xff,0xff,0xee,0x7a,0x1e,0xb7,0xff,0xff,0x7f,0xff,0xff,0xf9, + 0x93,0xff,0xff,0xff,0x1d,0x3d,0x43,0xfb,0xff,0xff,0xa1,0xca,0xd2,0x14,0x95,0x0f, + 0x7f,0xd3,0x5c,0x3f,0xf1,0x7f,0xdf,0xfd,0x25,0x4f,0x7f,0xfc,0xfd,0x2d,0xe3,0xfa, + 0x7f,0xff,0xe7,0xff,0xff,0xfc,0x03,0xe7,0xff,0xff,0xff,0xdb,0xf7,0xfd,0xff,0xff, + 0xd9,0xf7,0xfd,0xbf,0x7b,0xdf,0xfe,0xfd,0xbf,0x7f,0xff,0xff,0xff,0xff,0xda,0xf7, + 0xff,0xff,0x7f,0xde,0xf7,0xfd,0x8f,0xff,0xfe,0xff,0xff,0xff,0xf0,0x6d,0xff,0xff, + 0xff,0xf9,0xee,0x6f,0x9b,0xfe,0xf9,0xfe,0x7f,0x9e,0xe6,0xf9,0xff,0xeb,0x9e,0xe6, + 0xff,0xe7,0xff,0xfe,0xf9,0xee,0x7f,0xfb,0xe7,0xf9,0xfe,0x7f,0x9f,0xff,0xff,0xff, + 0xff,0xff,0xff,0x27,0xff,0x6f,0xfb,0xfe,0x7f,0x9c,0x62,0xfb,0x96,0x3f,0x9f,0xe7, + 0xf9,0xb6,0x75,0xbb,0xe7,0xf9,0xe7,0xbf,0xef,0xfb,0xee,0x7f,0x9f,0xef,0xb9,0xfe, + 0x7d,0x8f,0x63,0xfb,0xf6,0xff,0xbf,0xef,0xdf,0xb1,0xbf,0x6f,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf6,0xff,0xbf,0xff,0xff,0xfc,0xff,0xff,0xff, + 0xff,0xff,0xbf,0xff,0xff,0xfe,0xfd,0xbf,0x7f,0xff,0xf6,0xff,0xff,0xff,0xdb,0xd8, + 0xbf,0xf7,0xff,0xff,0xfe,0xff,0xbf,0xff,0xff,0xff,0xff,0xbf,0xef,0xfb,0xbe,0xbf, + 0xff,0xef,0xfb,0xb7,0xff,0xff,0xff,0xfe,0xbf,0xbf,0xff,0xfb,0xbe,0xdf,0xff,0xff, + 0xff,0x7f,0xff,0xff,0xfd,0xff,0x55,0xff,0xb7,0xff,0xff,0x8f,0x42,0xf8,0xf5,0xff, + 0x8f,0xc3,0xf8,0xf4,0xbd,0x0f,0xdf,0xfa,0xf4,0x3b,0xc7,0xff,0xf5,0xff,0x8f,0xcb, + 0xd7,0xfe,0x2f,0x8f,0xc2,0xf8,0xff,0xff,0x7f,0xff,0xff,0xff,0xe4,0xff,0xdb,0x7f, + 0xfd,0xf3,0xe8,0xff,0x3e,0x9f,0xf3,0xf8,0xdf,0x3e,0x8f,0xe3,0xe9,0xdf,0x3c,0x8f, + 0xec,0xdf,0xfe,0x9d,0xf3,0xec,0xfa,0x7f,0xef,0xf3,0xec,0xff,0x3f,0xff,0xb7,0xff, + 0xff,0xff,0xfe,0x9f,0xff,0xdf,0xff,0xfe,0xef,0xdf,0xf5,0xff,0xbf,0xff,0x5f,0xfe, + 0xff,0xf5,0x7d,0x7e,0xfe,0xfd,0xf9,0x53,0xff,0xff,0xff,0x6f,0x7f,0xff,0xff,0xff, + 0x5f,0x7f,0xf7,0xff,0xfd,0xdf,0xff,0xff,0xff,0xcb,0xff,0xef,0xe7,0xf9,0xfc,0x7e, + 0x1f,0xc7,0xe1,0xde,0x6e,0x9d,0xe7,0xe1,0xbe,0x2f,0x9f,0xe7,0xf1,0xae,0x1f,0xe7, + 0xe1,0xfc,0x3f,0x9f,0xa7,0x79,0xfa,0x37,0x9f,0x87,0xf8,0xf8,0x7f,0x9f,0xe7,0xf9, + 0x7f,0xff,0x3f,0xe7,0xf7,0xf5,0xcd,0x3f,0x5d,0xd3,0xfd,0xdf,0x3f,0x5c,0xf7,0xf5, + 0xff,0x3f,0x4e,0xf4,0xff,0xbf,0x5d,0xf3,0xfd,0xfd,0x77,0xef,0xf7,0xfc,0x7d,0x3f, + 0xff,0xf3,0x7f,0xff,0xff,0xfe,0x2f,0xff,0xb7,0xff,0xfa,0xdc,0xb7,0x35,0xcb,0xd3, + 0x5f,0xb7,0x25,0xcb,0x77,0xde,0xbf,0xa5,0xc9,0x76,0x95,0x77,0xeb,0xd2,0x5c,0xf7, + 0xaf,0xdf,0x7a,0xdc,0xf7,0xb5,0xdf,0xfb,0x75,0xff,0xff,0xff,0xd9,0xff,0xfd,0xff, + 0xff,0xfe,0x7f,0xdd,0xe7,0xfd,0xdf,0xf7,0xdf,0xf7,0xfd,0xdf,0xd7,0xff,0xf7,0xfd, + 0x9f,0x5f,0xff,0xfd,0xfe,0x77,0xff,0xf7,0xbf,0xfd,0x77,0xfd,0xc7,0xff,0xdf,0x7f, + 0xff,0xff,0xfb,0xbf,0xfe,0xdf,0xf7,0xef,0x87,0xf1,0xf8,0x76,0x1f,0xfe,0xe0,0xf8, + 0x7f,0x1f,0xfa,0xfe,0xf8,0x7e,0x9e,0x61,0xdf,0xf6,0x0f,0x83,0xff,0xf8,0x7f,0xef, + 0x83,0xff,0xf8,0x7f,0xed,0x87,0xff,0xff,0xff,0xb7,0xff,0xff,0xbf,0xff,0xbf,0xff, + 0xfb,0xff,0xff,0xbf,0xff,0xfb,0xff,0xfd,0xff,0x6e,0xdb,0xff,0xff,0x7f,0xff,0xf2, + 0xfd,0xbf,0xff,0xff,0xff,0xfd,0xbf,0xf7,0xdb,0xff,0xff,0xff,0xff,0xff,0xff,0xfc, + 0xbf,0xff,0xaf,0xeb,0xfa,0xde,0xbf,0xaf,0xeb,0xfa,0xfe,0xaf,0xa7,0xeb,0xf2,0xfa, + 0xae,0xaf,0xeb,0xf4,0x3f,0xaf,0xea,0xea,0xfe,0xbf,0xaf,0xeb,0xe8,0xfe,0xae,0x8f, + 0xeb,0xfa,0xfe,0xbf,0xaf,0xfc,0xdf,0xff,0xff,0xff,0xf7,0xdf,0xff,0x7f,0xfb,0xc7, + 0xff,0x1f,0x7d,0xff,0xfb,0xfb,0x77,0xcd,0xf3,0xeb,0xbf,0xfd,0xef,0xfd,0xdf,0x3f, + 0xff,0xf7,0xff,0xff,0xff,0xcf,0xff,0xef,0xff,0xff,0xff,0xff,0x91,0xff,0xff,0xf7, + 0xff,0xff,0xff,0xfd,0xf3,0xff,0xfb,0xbf,0xdd,0xf7,0xf1,0xff,0xfb,0xcf,0xf3,0xff, + 0xb7,0x7f,0xf7,0xfd,0xef,0xeb,0xff,0xf6,0xff,0xff,0x7b,0xea,0xff,0xff,0xff,0xff, + 0xdf,0xf7,0xe8,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xeb,0xff,0xfc,0xff,0xff, + 0xef,0xbd,0xfd,0xff,0x7f,0xdb,0xff,0xff,0xff,0xfd,0xef,0xf7,0xff,0xef,0xff,0x7f, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0x6f,0xfb,0xff,0xfe,0xfe,0xfb,0xff, + 0xef,0xff,0xde,0x7f,0xf7,0xef,0xff,0xfe,0xde,0xb7,0xaf,0xff,0xfa,0xfe,0xf3,0x7f, + 0xba,0xff,0xdf,0xff,0xff,0xfa,0x77,0xff,0xaf,0xff,0xdf,0xff,0xff,0xff,0xff,0x95, + 0xfe,0xff,0xdf,0xff,0x7f,0xff,0xf7,0xff,0xff,0x7f,0xff,0xf7,0xff,0xff,0x76,0xff, + 0xff,0xff,0xfe,0xb7,0x7f,0xff,0xff,0xff,0xff,0x7f,0xdf,0xfe,0xfd,0xff,0xff,0xdf, + 0xff,0xff,0xff,0xff,0xff,0xff,0xaf,0xff,0xff,0xfe,0xf3,0xbf,0xaf,0xff,0xff,0xfb, + 0xbc,0xef,0x3b,0xcf,0xfb,0x7f,0x7f,0xff,0xff,0x4c,0xef,0x97,0xff,0xfe,0x3e,0xff, + 0x3f,0xee,0xf3,0xff,0xef,0x3f,0xfe,0xff,0xff,0xff,0xff,0xfe,0xe5,0xff,0xff,0xfe, + 0xfd,0xbf,0xef,0xff,0xee,0xfd,0xbf,0x67,0xdb,0xf7,0xfd,0xff,0xff,0xff,0xfe,0xdf, + 0x5f,0xdf,0x7e,0xfd,0xff,0x7f,0xdf,0xf7,0xfd,0x7f,0xff,0xd7,0xff,0xff,0xff,0xf7, + 0xff,0xef,0xe2,0xfd,0x7f,0xff,0xff,0xbb,0xff,0xbf,0xbf,0xff,0x7e,0xfb,0x7e,0xfc, + 0xef,0xff,0x7f,0xff,0xbf,0xed,0xbf,0x7f,0xfb,0xfb,0xeb,0xff,0xfe,0xdf,0xff,0xff, + 0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xfc,0xdf,0xff,0xff,0xff,0xff,0x7f,0xff, + 0xff,0xef,0xf5,0x7f,0xff,0x37,0xff,0x53,0x7e,0xfd,0xff,0xdf,0xf4,0xfd,0x7f,0xfd, + 0xf7,0xfd,0xff,0xff,0xdf,0xdf,0x7f,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xc3, + 0xff,0xff,0xff,0xff,0xff,0xfd,0xfe,0xfd,0xff,0xff,0xff,0xe7,0xbf,0xfe,0x7f,0xf7, + 0xff,0xfb,0xfe,0xf7,0xef,0xff,0xfe,0xff,0xbf,0xbf,0xfb,0xf7,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0x78,0x57,0xff,0xff,0xfd,0xd7,0xff,0xff,0xff,0x4f,0xf7, + 0xff,0xff,0xbf,0x5d,0xf7,0x7f,0xff,0xff,0xff,0xfb,0xff,0x6f,0xff,0xd6,0xfd,0x6f, + 0xfb,0xdd,0xff,0xff,0xed,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0x85,0xfd,0xff,0xbd, + 0xfe,0xde,0xbf,0xaf,0xff,0xfe,0xde,0xbf,0xae,0xff,0xfe,0xdf,0xff,0xff,0xff,0xff, + 0xbf,0xef,0xff,0xff,0xff,0xbd,0xfe,0xf9,0xda,0xef,0xed,0xff,0xff,0xfe,0xff,0xff, + 0xff,0xff,0xc1,0xf7,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xff, + 0xfb,0xe7,0xff,0xff,0xff,0xff,0xb7,0xfe,0xff,0xff,0xff,0xfb,0xbf,0xff,0xbe,0xff, + 0xfd,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xd9,0x0f,0xff,0xff,0xff,0xec,0xfb,0xfe, + 0xcf,0xb1,0x3f,0x7f,0x7e,0x9f,0xf7,0xfe,0x7f,0x3e,0x9f,0xa3,0xfa,0x27,0x2f,0xb3, + 0xfc,0xcd,0xdf,0xcc,0xdd,0x3c,0xce,0x34,0xcf,0xe3,0xef,0xff,0xff,0xff,0xfd,0x66, + 0xbf,0xff,0xff,0xe9,0xff,0x7f,0xdd,0xf2,0xe5,0xef,0xff,0xdf,0xff,0xe7,0xdf,0xef, + 0xdf,0xf6,0xe6,0x6c,0xdd,0x97,0xfc,0xb9,0x7f,0xfd,0x97,0xa7,0xf9,0xfe,0x9f,0xff, + 0x7c,0xff,0x3b,0xff,0xfd,0x68,0xf7,0xff,0xfe,0xbf,0xbb,0xeb,0xfa,0xfe,0xbd,0x7e, + 0x6b,0xfb,0xfe,0xbd,0x3e,0x6b,0xfa,0xfe,0xbf,0xef,0xcf,0xfe,0xaf,0xef,0x5f,0x7a, + 0xf5,0xf9,0xab,0x4a,0xfb,0xbf,0xff,0xaf,0xfb,0xff,0xff,0xbc,0x1f,0xff,0xfe,0x57, + 0xf7,0xfd,0x7b,0x5f,0xdf,0xf7,0xcd,0x7f,0x7f,0xd7,0xb7,0xed,0x7f,0x5f,0xd7,0xf9, + 0xf3,0x7f,0xd7,0xf7,0xfd,0xff,0x5e,0x5f,0x35,0xfd,0x7f,0x7f,0xff,0xf7,0xfd,0xff, + 0xfe,0xfd,0xd3,0xff,0xff,0xff,0xfe,0xbf,0xbf,0xaf,0xfa,0xf5,0xf3,0x2f,0xeb,0xfa, + 0xfb,0xf6,0xff,0xef,0xfb,0xff,0xaf,0xff,0x53,0xfe,0xbb,0x7d,0x4b,0xff,0xcc,0xbf, + 0xff,0xeb,0xff,0xfe,0xbf,0xee,0xdf,0xef,0xea,0x7d,0xff,0xff,0xf7,0xd5,0xf7,0x7d, + 0xdf,0x77,0xbd,0xf5,0x7d,0x5f,0x57,0xdd,0xff,0x7d,0xdf,0x77,0xf5,0x7f,0xde,0x77, + 0xd5,0xef,0x7d,0x5f,0xf7,0xd5,0xff,0x7d,0x5f,0xff,0xdd,0x67,0x6b,0xff,0xf7,0x8f, + 0xff,0xff,0xeb,0xfa,0xfe,0xbf,0xaf,0xeb,0xeb,0xf6,0xb7,0xae,0x6b,0xdf,0xbe,0xb7, + 0xaf,0x6b,0xfe,0xb7,0xbd,0xab,0xfa,0xfa,0xed,0x2d,0xef,0xd2,0xfe,0xbf,0xaf,0xff, + 0xfa,0xff,0xbf,0xff,0xff,0x95,0xff,0xff,0xfd,0x7f,0x5f,0xd7,0xf5,0xfd,0xff,0x70, + 0x57,0xf5,0xfd,0x79,0x7b,0xd7,0xf5,0xc5,0x7f,0xd7,0xf7,0x3d,0x7f,0x5c,0xde,0xa5, + 0xfd,0xca,0x5f,0xd7,0xf5,0xff,0xff,0x7f,0xdf,0xff,0xff,0xcf,0xbf,0xef,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xfd,0xb7,0xff,0xff,0xfe,0x9d,0x9f,0xe7,0xff,0xff,0xff, + 0xff,0xdb,0x7e,0xdf,0xff,0x67,0xff,0xf6,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xfe,0x07,0xfe,0xbf,0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0x9b,0xff,0xff,0xff, + 0xef,0x9f,0xfe,0xff,0xff,0xff,0xff,0xf9,0xbf,0xff,0xff,0xe7,0xff,0xfe,0x67,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf4,0x7f,0xbe,0xff,0xbf,0x6f,0xdb,0xfe, + 0xed,0xbf,0xe6,0xdb,0xf6,0xff,0xbe,0xe3,0xfb,0x36,0xfd,0xbf,0xfb,0xfe,0x6f,0xbf, + 0xef,0xd8,0xf6,0xff,0x9f,0x6f,0xfb,0xf6,0xff,0xbf,0xef,0xfb,0xfe,0xf5,0xf8,0x9b, + 0xff,0xff,0xff,0xdf,0xf7,0xff,0xff,0x7f,0xff,0xdf,0xfd,0xff,0xff,0xff,0xff,0xfd, + 0xff,0x7f,0xef,0xff,0xff,0xbf,0xff,0xf7,0xf7,0xff,0xff,0x7f,0xff,0xf7,0xff,0xff, + 0xef,0xff,0xff,0xff,0xbd,0x83,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0x7f,0xfe,0xef,0xff,0xff,0xff,0xff, + 0xff,0xbf,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xbf,0xfe,0x7f,0xff,0xff,0xff, + 0xf7,0xfd,0xfd,0x7f,0xdf,0xf0,0xbd,0xff,0x7f,0x5f,0xd0,0xe5,0xfd,0x7f,0x5f,0xfd, + 0xff,0x0f,0x5f,0xd7,0xf4,0x3f,0x7f,0xc3,0xf7,0xf5,0xff,0x7f,0xff,0xf7,0xff,0xff, + 0xff,0xff,0xef,0xff,0xff,0xff,0xfa,0x7e,0x9f,0xa7,0xe9,0xda,0x3e,0x9f,0xa7,0xe9, + 0xf3,0x3e,0x9f,0xa7,0xe9,0xfe,0x9d,0xa3,0xe9,0xfa,0x7e,0xcf,0xa7,0x68,0xfa,0x7e, + 0x9f,0xa7,0xff,0xfa,0x7f,0xff,0xff,0xff,0xf8,0xff,0xff,0xff,0xff,0xdf,0xf7,0xfd, + 0xff,0x7f,0xef,0xf7,0xfd,0xff,0x7b,0xdf,0xff,0x75,0xfd,0x7f,0xb7,0xff,0xff,0x77, + 0x5f,0xf7,0xfd,0xff,0xbb,0xdd,0xd7,0xfd,0xdf,0xff,0xdf,0xff,0xff,0xff,0xff,0x3f, + 0xff,0xfe,0x7f,0x8b,0x82,0xe1,0xb8,0x2e,0x0f,0xe2,0xe0,0xb8,0x6e,0x1d,0xe7,0xf8, + 0xb8,0x2e,0x1a,0xe0,0xde,0x3e,0x0b,0x87,0x78,0xb8,0x3f,0x8b,0x82,0xf8,0xb8,0x7f, + 0x0b,0x87,0xf9,0xfe,0x7f,0x27,0xff,0xff,0xff,0xff,0x72,0xdc,0x97,0x2d,0xcb,0xff, + 0xcc,0xb3,0x25,0xcb,0xbf,0x5f,0xf7,0x2d,0xcb,0xdc,0xbb,0xf5,0xcb,0x12,0xef,0xf7, + 0x2f,0xff,0x32,0xff,0xf7,0x2f,0xfb,0x72,0xff,0xff,0xff,0xf0,0xff,0xff,0xff,0xff, + 0xaf,0x8b,0xe2,0xf8,0xbe,0x7d,0xeb,0xe2,0x78,0xbe,0x75,0xeb,0xfb,0xf8,0xfe,0x6b, + 0xe7,0x5e,0xbe,0x6f,0x9d,0x7a,0xf9,0xf7,0xaf,0x9f,0xfa,0xf9,0xff,0xaf,0x9f,0xff, + 0xff,0xfc,0x9f,0xff,0xff,0xff,0xfd,0xf7,0x7d,0xdf,0x77,0xdf,0xff,0x3d,0xdf,0x77, + 0xdf,0xff,0xff,0xdf,0x77,0xdb,0x7d,0xff,0xf7,0xdd,0xf7,0xff,0xdf,0x7f,0xfc,0xf7, + 0xff,0xdf,0x7f,0xbd,0xf7,0xff,0xff,0xff,0xe3,0xff,0xff,0xff,0xfe,0xbd,0xae,0xfb, + 0xda,0xf7,0xff,0xa6,0xe9,0xbe,0xef,0xff,0xff,0xef,0xdb,0xef,0xa6,0xff,0xfb,0xef, + 0x9b,0xff,0xeb,0xbf,0xfe,0x9b,0xff,0xeb,0xdf,0xfe,0xbb,0xff,0xff,0xff,0xf7,0x3f, + 0xff,0xff,0xff,0xdb,0xf6,0xff,0xff,0xff,0xf3,0xff,0xfd,0xbf,0xff,0xdb,0xff,0xfd, + 0xbf,0x6f,0xf6,0xfd,0xbf,0x7f,0xff,0xf6,0xff,0xff,0x6f,0x7f,0xdf,0xfd,0xff,0xff, + 0xdf,0xdf,0xff,0xff,0xe6,0xaf,0xff,0xfa,0xfe,0xbd,0xaf,0x6b,0xfa,0xbe,0xbf,0xab, + 0xeb,0xda,0xde,0xb3,0xaf,0xeb,0xda,0xf6,0xbf,0x6b,0xea,0xb6,0xbf,0x2b,0xab,0xfa, + 0xfa,0xbf,0xaf,0xeb,0xda,0xfe,0xb5,0xaf,0xeb,0xfa,0xff,0xc1,0xbf,0xff,0xff,0xfe, + 0x7f,0x9f,0xee,0xff,0xff,0xff,0xfb,0xf7,0xff,0xff,0x4f,0xbf,0xe7,0xf9,0xfe,0x9f, + 0xfc,0xef,0xff,0xff,0xff,0xee,0xfb,0xff,0xcf,0xff,0xbf,0xff,0x3f,0xff,0xff,0xef, + 0xff,0xf9,0x1f,0xfd,0xff,0xff,0xff,0xff,0xff,0x7f,0x7f,0x7e,0x7b,0xff,0xfe,0xff, + 0xf7,0xff,0xff,0xff,0xff,0xff,0xd5,0x6f,0x7f,0xff,0xff,0x9e,0xfd,0xf9,0x6f,0xff, + 0xbd,0xff,0xff,0xff,0xff,0xff,0xfe,0xfe,0x07,0xff,0xff,0xff,0xff,0xdf,0xf7,0xff, + 0xef,0xfb,0xff,0xfb,0xfd,0xff,0xfe,0xff,0xff,0xfd,0xff,0x3e,0xf7,0xf7,0xff,0xbf, + 0xfb,0xff,0xff,0xff,0xff,0x77,0xfb,0xff,0xf5,0xff,0xff,0xff,0xff,0xff,0xfe,0x7b, + 0xff,0xff,0xfd,0x7f,0x7f,0xff,0xf7,0xfd,0xaf,0xff,0xdf,0xff,0xf7,0x97,0xfd,0xdb, + 0x76,0xdf,0xbf,0xfa,0x3f,0xdf,0xef,0xeb,0xff,0xf6,0xbf,0xff,0x6a,0xff,0xbf,0xed, + 0xfd,0xff,0xff,0xff,0xfb,0xdf,0x7f,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0x76,0xf7, + 0xff,0xff,0xff,0xdf,0xdf,0xff,0xdb,0xf7,0xdb,0xff,0xfd,0x7f,0xfb,0xff,0xff,0xfd, + 0xff,0xff,0xbe,0xbf,0xff,0xff,0xff,0xbf,0xff,0xff,0xff,0xe1,0xfe,0xff,0xbf,0x7f, + 0x9f,0xcf,0xfb,0xfc,0xff,0xfb,0xff,0xf9,0x7f,0xff,0xf7,0xf5,0xfb,0xbe,0xfe,0xef, + 0xfb,0xff,0xff,0xff,0xef,0xff,0xff,0xef,0xff,0xee,0xfd,0x7e,0xff,0xdf,0xff,0xff, + 0x7f,0xea,0x7d,0xff,0xdf,0xff,0xcf,0xff,0xfc,0xbf,0xfd,0x7f,0xff,0xfd,0xff,0xef, + 0xff,0xff,0xfd,0xff,0x6f,0xe7,0xfd,0xef,0xff,0xfb,0xf3,0xbf,0xef,0xff,0xfb,0xf7, + 0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0xfe,0x0f,0xff,0xff,0xff,0xfe,0xff,0xff,0xef, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf9,0xff,0xff,0xff,0xfb,0xff,0xfd,0xff,0xff, + 0xff,0xaf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xcd,0xff, + 0xff,0xff,0xff,0x1f,0xef,0xf1,0xfe,0xff,0xbf,0xff,0xf1,0xff,0xf7,0x1f,0xff,0xf5, + 0xfd,0x7b,0x17,0xf3,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xbf,0xcf,0xfb,0xfd,0xff, + 0xbf,0xff,0xff,0xff,0xff,0x2f,0xff,0xff,0xff,0xfd,0xfd,0xff,0x7f,0xdd,0xfb,0xff, + 0xff,0xdb,0xff,0xfb,0xff,0xff,0xff,0xff,0xef,0xfe,0xbf,0xff,0xff,0xff,0xff,0xf7, + 0xff,0xf7,0xfa,0xff,0xdf,0xbf,0xfd,0xff,0xff,0xff,0xf7,0x73,0xff,0xff,0xfd,0xfd, + 0x7f,0x5f,0xd7,0xf5,0xff,0xff,0xff,0xf7,0xff,0xdf,0xbf,0xff,0xf7,0xfd,0xfa,0xde, + 0xb7,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xde,0xff,0xfd,0xff,0xfb,0xff,0xff, + 0xff,0xe0,0xff,0xff,0xff,0x7f,0xef,0xfb,0xfe,0xbf,0xaf,0xff,0xff,0xfe,0xff,0xff, + 0xff,0xff,0xfe,0xff,0xbf,0xf9,0xee,0xff,0xff,0xff,0xfd,0xbf,0xff,0xff,0xff,0xfb, + 0xff,0xfd,0xbf,0xff,0xff,0xff,0xff,0xec,0x1f,0x77,0xff,0xff,0xfd,0xfe,0xff,0xdf, + 0xef,0xff,0xff,0xff,0xe7,0xff,0xff,0xff,0xff,0xef,0xfb,0xfb,0xbf,0xef,0xff,0xbf, + 0x7f,0xff,0xff,0xff,0xff,0xff,0xbb,0xff,0xfb,0xef,0xff,0xfb,0xff,0xff,0xd2,0xff, + 0xff,0xff,0xff,0xef,0xf9,0xff,0x4f,0x9f,0xff,0xf3,0xfe,0x7f,0xff,0xec,0xbb,0xf6, + 0x7d,0x93,0xd9,0xf6,0xd7,0xb3,0xe9,0xfb,0x3e,0x7f,0xff,0xec,0xd9,0xef,0xfd,0x9f, + 0xef,0xff,0xff,0xff,0xcb,0x2b,0xff,0xff,0xfe,0x5d,0xff,0x7d,0xf9,0xf7,0xff,0xff, + 0x7f,0xdf,0xfe,0x8d,0x97,0x67,0xbf,0xee,0xae,0xfd,0xb3,0xf6,0x7d,0xff,0xe7,0xff, + 0xfe,0x7b,0x9e,0xe5,0xf9,0x7e,0xbf,0xff,0xff,0xff,0xd6,0x4f,0x7f,0xff,0xff,0x9f, + 0xf4,0xfc,0xff,0x4f,0xff,0xff,0xfd,0x3f,0xff,0xfe,0xfe,0xf5,0x3f,0x4f,0xce,0xf9, + 0xff,0xff,0xff,0xff,0xef,0xfb,0xff,0xff,0xf2,0xff,0xbf,0x5e,0xff,0xbf,0xff,0xff, + 0xfb,0xd5,0xbf,0xff,0xff,0xfb,0x7e,0xdf,0x37,0xed,0xff,0xff,0xff,0xb7,0xff,0xff, + 0x7f,0xdf,0xb7,0xed,0xfb,0x9f,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x5f, + 0xf7,0xe5,0xff,0xff,0xff,0xff,0xff,0xda,0x9f,0xff,0xff,0xff,0xbf,0x27,0xcd,0xf2, + 0x7d,0xff,0xff,0xfb,0xf7,0xff,0xfb,0x33,0xdb,0xf4,0x7d,0x9f,0xdd,0xf5,0x7d,0xff, + 0x7a,0xdf,0xf7,0xff,0xff,0x7f,0xde,0xf7,0xfc,0xdf,0x7f,0xff,0xff,0xff,0x16,0xff, + 0xbf,0xff,0xff,0xda,0x76,0xbd,0xf7,0x7f,0xff,0xff,0xdd,0xff,0xfd,0xdf,0x77,0xdd, + 0x67,0x63,0x76,0x3d,0xef,0xff,0xff,0x57,0xff,0xff,0xff,0xff,0x77,0xdd,0xff,0x7f, + 0xff,0xff,0xff,0xff,0x7e,0x7f,0xef,0xff,0xf9,0xbf,0xfe,0xfb,0xf7,0xef,0xff,0xff, + 0xff,0xbf,0xff,0xef,0xee,0x5f,0xb7,0xe9,0xfe,0xd3,0xdb,0xf9,0xff,0x4a,0xdf,0xf5, + 0xff,0xff,0x5e,0xfb,0x9e,0xff,0xfe,0x7f,0xff,0xff,0xfb,0xdf,0xff,0xff,0xff,0x37, + 0x3d,0xe3,0x73,0x5e,0xff,0xff,0xff,0x7b,0xff,0xf7,0x3d,0xed,0x7a,0x5e,0xbd,0xef, + 0x73,0xfc,0xaf,0x0d,0x61,0xf0,0xff,0xff,0x2d,0xea,0x7a,0x9c,0x3f,0x2f,0xff,0xff, + 0xfd,0xd1,0xff,0xff,0xff,0xff,0xdb,0x76,0x7d,0x9f,0x67,0xfb,0x7e,0xdd,0x9f,0xff, + 0xdf,0xf7,0xfd,0x8f,0x63,0xf6,0x7d,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0xff,0xde,0xf6, + 0x7d,0xff,0x6d,0xde,0xff,0xff,0xf9,0xd0,0x5f,0xff,0xff,0xfe,0xf9,0xfe,0x7f,0x99, + 0xe7,0xff,0x9f,0xff,0x9f,0xfe,0x79,0xfe,0x7f,0x9f,0xe7,0xfe,0x7f,0x9f,0xe7,0xf9, + 0xfe,0x7f,0x9f,0xff,0xf9,0xfe,0x7f,0x9f,0xe6,0x79,0xff,0xff,0xff,0xbe,0x67,0xff, + 0x6f,0xdb,0xbe,0x7f,0x8f,0xe7,0xf8,0xd6,0xff,0xbf,0xe3,0xfb,0xfe,0x5f,0x8f,0x63, + 0xf8,0xff,0x8f,0xe7,0xf9,0xfe,0x75,0x87,0xe7,0xfb,0xf6,0x7f,0x8f,0xe3,0xf9,0xfe, + 0x7f,0xbf,0xef,0xff,0x91,0xbf,0xcf,0xf7,0xfe,0xff,0xbf,0xef,0xff,0xfe,0xff,0xff, + 0xef,0xff,0xff,0xff,0xff,0x7f,0xfb,0xfe,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff, + 0xf6,0xff,0xbf,0xff,0xfb,0xff,0xff,0xff,0xff,0xfb,0xdf,0xbf,0xef,0xff,0xff,0xbe, + 0xbf,0xfb,0xef,0xfe,0xff,0xff,0xef,0xff,0xff,0xfe,0xff,0xff,0xfb,0xfe,0xf7,0xff, + 0xef,0xfb,0xbe,0xff,0xff,0xef,0xff,0x7e,0xbf,0xff,0xfe,0xfb,0xfe,0xff,0xff,0xfe, + 0xff,0x47,0xff,0xb7,0xff,0xeb,0x0e,0x42,0xf0,0xe4,0x3f,0xfe,0x5f,0x90,0xf5,0xff, + 0x8f,0x43,0x90,0xe4,0x2f,0x43,0xf2,0xf4,0x3f,0x0b,0xcb,0xfa,0xff,0xff,0x0f,0x43, + 0xf8,0xbc,0x3f,0x8f,0xff,0xff,0xff,0xfa,0xff,0xfb,0x7f,0x9f,0xa3,0xec,0xfa,0x3e, + 0xcd,0xf7,0xe9,0xfb,0x3e,0x9d,0xfb,0xe8,0xfb,0x3e,0xcf,0x6c,0xda,0x3e,0x8f,0xb3, + 0xec,0xff,0xbf,0xff,0x33,0x6c,0xff,0xbc,0x8f,0xfb,0xff,0xff,0xfe,0x77,0x0f,0xff, + 0xde,0xbf,0xff,0xcf,0x5f,0xee,0xf3,0xfd,0xff,0xf3,0xdf,0xff,0xff,0xfd,0x5b,0xd6, + 0xf5,0xfb,0x5f,0xff,0x97,0x6d,0xdb,0x7f,0xff,0xff,0xfd,0x5f,0x7f,0xef,0xfb,0xfe, + 0xdf,0xff,0xff,0xff,0xf3,0xff,0xef,0xe7,0xf8,0xde,0x7f,0x8f,0xe7,0xf8,0xfe,0x7f, + 0x9d,0xe7,0xf9,0xde,0x2f,0x9f,0xe7,0xf9,0xff,0x8f,0xe2,0x60,0xd8,0x3f,0x9f,0x87, + 0xf8,0xf8,0x77,0x9f,0x83,0xf9,0xf8,0x7f,0x9f,0xe1,0xd2,0x7f,0xff,0x7f,0xe7,0xfb, + 0xfe,0xff,0xbf,0xff,0xfb,0xf5,0xff,0xbf,0x5f,0xfb,0xff,0xff,0xff,0xef,0xff,0xff, + 0x9f,0xe7,0xf1,0xfc,0x7f,0x9f,0xff,0xf7,0xfe,0x7f,0xff,0xe7,0xf9,0xff,0xff,0xff, + 0xff,0x8f,0xff,0xbf,0xff,0xff,0x5f,0xd7,0xfd,0xff,0x7f,0x7e,0xbf,0xf5,0xeb,0xff, + 0x5f,0xf7,0xfd,0xff,0x7f,0xf7,0xfd,0xff,0x33,0xcc,0xf7,0xfc,0xdf,0xfb,0xcd,0xf7, + 0xfc,0xdf,0x7f,0xcd,0xff,0xff,0xff,0xf1,0xff,0xfd,0xff,0xff,0xff,0xff,0xfe,0xff, + 0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xbf,0xff,0xff,0xf9,0xde, + 0x77,0xff,0xe7,0xff,0xde,0x7f,0xff,0xe7,0xff,0xfe,0x7f,0xff,0xff,0xfd,0x3f,0xfe, + 0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xed,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xfe,0x8f,0xa3,0xff,0xfa,0x7f,0xef,0xa7,0xff,0xfa,0x7f,0xff, + 0xa7,0xff,0xff,0xff,0x57,0xff,0xff,0xff,0x7d,0xbf,0x6f,0xdb,0xf6,0xff,0xff,0xff, + 0xd9,0xff,0x7f,0xff,0x7f,0xd9,0xf6,0xff,0x6f,0xdb,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0x6f,0xdf,0xf6,0xff,0xff,0xff,0xff,0xff,0xec,0xbf,0xff,0xaf,0xeb,0xda, + 0xb6,0xad,0xab,0x69,0xfa,0xbc,0x9b,0xa7,0xea,0xfa,0xf6,0xae,0xaf,0xab,0xfa,0xae, + 0xad,0xeb,0xf8,0xfe,0xb7,0xad,0xeb,0x7a,0xfa,0xbd,0xaf,0xab,0xfa,0xfe,0xbf,0x2f, + 0xee,0xdf,0xff,0xff,0xff,0xf4,0xfd,0x3f,0x6d,0xd3,0xff,0xeb,0xbf,0x6f,0xff,0xfc, + 0xff,0x37,0xff,0xfb,0xbb,0xfb,0xcb,0xfb,0xfe,0xff,0xaf,0xc7,0x7f,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf1,0xff,0xff,0xf7,0xfe,0xff,0x2f,0xef,0xfa, + 0xfd,0xff,0xbb,0xcf,0xf7,0xfd,0x3f,0x4f,0xdf,0xeb,0xff,0xff,0xcf,0xfd,0xc7,0x7f, + 0xbf,0xf7,0xff,0xff,0xff,0xf9,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xeb,0x5f,0xff, + 0xfb,0xff,0xf7,0xef,0xfb,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef, + 0xff,0xff,0xbf,0x7f,0xff,0xbd,0xff,0xfa,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0x7f, + 0xff,0xff,0xff,0xfa,0xaf,0xfd,0xff,0xc7,0xff,0xbf,0xff,0xff,0xff,0xef,0xdf,0xff, + 0x9d,0xfc,0xff,0x7e,0x9b,0xaf,0xeb,0xfa,0xbf,0xad,0xbb,0xff,0xbf,0xef,0xf3,0x7f, + 0xbf,0xf6,0xaf,0xff,0x6b,0xdf,0xff,0xff,0xfd,0xff,0xbd,0xff,0xff,0xff,0xfd,0xf9, + 0xfe,0xff,0xd7,0xff,0xff,0x7f,0x7f,0xdf,0xfb,0xff,0xe5,0xff,0xdf,0xff,0xff,0x6f, + 0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x5f, + 0xff,0x3f,0xff,0xfb,0xff,0xf3,0xff,0xff,0xfd,0xef,0xff,0xbe,0xff,0xff,0xeb,0xff, + 0xff,0xff,0xff,0xed,0xef,0xff,0xfb,0xf7,0xff,0xbe,0xef,0xf7,0xed,0xfd,0xfe,0xef, + 0xff,0xff,0xbf,0xff,0xef,0xff,0xfe,0x87,0xfd,0x7b,0xf5,0xbf,0xff,0xff,0xff,0xfe, + 0xfd,0xff,0x7f,0xff,0xf7,0xff,0xff,0x6f,0xdf,0xf7,0x7f,0xf7,0xbb,0xff,0xef,0xfd, + 0xaf,0xff,0xfb,0xdf,0xfe,0xbf,0xfb,0xff,0xff,0xbf,0xff,0xff,0xbf,0xec,0xfd,0xff, + 0xfb,0xef,0xff,0xff,0xff,0xfd,0xdf,0xbf,0xed,0x7f,0xfe,0xdf,0xff,0xfb,0x7e,0xff, + 0x8b,0xbe,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0xff, + 0xff,0xff,0xdf,0xfd,0x1f,0xff,0xff,0xff,0xff,0xff,0xff,0x1f,0xff,0xff,0xff,0xdf, + 0x7f,0xef,0xff,0xfb,0xfe,0x5f,0xbe,0xe4,0xff,0xfd,0xff,0xff,0xff,0xff,0xaf,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x3f,0xff,0xab,0xbf,0xff,0xff,0xff,0xff, + 0xff,0x7a,0xff,0xff,0xed,0xff,0xef,0xff,0x37,0xf5,0xfb,0xff,0xf7,0xfe,0xb7,0x9e, + 0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xff, + 0xfa,0x7f,0xfd,0x7d,0xff,0xd7,0xff,0xfb,0xaf,0xcf,0x96,0x7d,0xcf,0xfa,0xff,0xf7, + 0xfd,0xeb,0x7f,0xff,0xff,0xff,0xbf,0xdf,0xff,0xfd,0xff,0x7f,0xdf,0xbf,0xfd,0xfb, + 0xff,0xdf,0xff,0xff,0xf6,0xff,0xff,0xc7,0xff,0xef,0xfa,0xee,0xff,0xff,0xef,0xff, + 0x7e,0x7f,0xff,0xee,0xfb,0xf6,0xb7,0xa7,0xed,0xff,0xff,0xfc,0xff,0xf0,0xff,0x7f, + 0x3f,0xdf,0xf3,0xff,0x7f,0x3f,0xf7,0xfb,0xff,0x7f,0xff,0xff,0xff,0x65,0xff,0xfd, + 0xfe,0xff,0xbf,0xff,0xfd,0xed,0xff,0xdf,0xdf,0xfb,0xfe,0xff,0x5f,0xd5,0xf5,0xdf, + 0xfe,0xff,0xff,0xfe,0xff,0xff,0xef,0xef,0xfe,0xff,0xff,0xaf,0xff,0xff,0xbf,0xff, + 0xff,0xff,0xdf,0xfa,0x8f,0xff,0xff,0xff,0xff,0xff,0x3f,0xcd,0x73,0xff,0xff,0xfe, + 0xcf,0xff,0xef,0xff,0x1f,0xf4,0xfa,0x7f,0xb3,0xef,0xfb,0xee,0xff,0xe6,0xe4,0xff, + 0xfe,0x4f,0xff,0xe7,0xdf,0xfe,0xff,0xff,0xcf,0xfc,0xf6,0xbf,0xff,0xff,0xff,0xff, + 0xf7,0xfb,0x9f,0x3d,0xff,0xfb,0xfb,0xff,0xfd,0xf9,0xf7,0xff,0x3f,0xfe,0x2c,0xff, + 0xff,0x7d,0xdf,0xff,0xdd,0x97,0xff,0xdf,0x7f,0xfd,0xff,0xff,0xdf,0xff,0xfb,0xf5, + 0x78,0xf7,0xff,0xff,0xf9,0xfe,0x6f,0x1b,0xf5,0xff,0xfc,0x7f,0xfb,0xc6,0xff,0xbf, + 0x3f,0xff,0xff,0xef,0xfb,0xca,0x92,0xbf,0xbe,0x7b,0xfb,0xff,0xff,0xff,0xff,0xff, + 0xfe,0xbf,0xff,0xff,0xff,0xfe,0xbc,0x5b,0xff,0xff,0xff,0x3f,0xfd,0xff,0x7e,0x7f, + 0xb7,0xff,0xff,0xff,0xdf,0xf7,0xe7,0xff,0xff,0xff,0xf9,0xf3,0x5e,0x57,0xf7,0xcd, + 0xff,0x7c,0xdf,0xff,0xcd,0xff,0xfe,0xd7,0xff,0xff,0xff,0xff,0xfd,0xab,0xff,0xff, + 0xfe,0xf5,0xff,0xff,0xff,0xff,0xf1,0xff,0x7f,0xef,0xd7,0xfe,0xff,0xf6,0xdb,0xb2, + 0xdf,0xec,0xdf,0x7f,0xde,0xf7,0xf6,0xcf,0x7f,0x75,0xf7,0xf7,0x5f,0x6f,0xff,0xf7, + 0xff,0xff,0xfb,0xf7,0x6f,0xff,0xff,0xf7,0xfd,0xff,0x7f,0xdf,0xf5,0x9d,0x4f,0x7f, + 0xde,0xf7,0xdd,0xf7,0x79,0xda,0x57,0xf7,0x6b,0xdf,0xf7,0xdd,0xfe,0xfd,0xdf,0xef, + 0xff,0xfe,0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xb7,0xc7,0x9f,0xff,0xfb,0xfa,0xfe, + 0xff,0xbf,0xeb,0xff,0xfe,0xbf,0xbf,0xbf,0xfb,0xff,0xfe,0xef,0xeb,0xdf,0xbf,0xaf, + 0x6b,0x7b,0xde,0xff,0xbf,0xfb,0xff,0xff,0xbf,0xfa,0x6b,0xff,0xff,0xff,0xff,0xf7, + 0xa5,0xfb,0xff,0xff,0xff,0x5f,0xdf,0xf7,0xff,0x7f,0xff,0xf7,0xff,0xff,0xff,0x7f, + 0xfb,0x37,0xfd,0x4d,0x9c,0xf5,0x35,0x43,0x70,0xdb,0xf7,0x3d,0xbf,0xf0,0xdb,0xff, + 0xad,0x7f,0xf0,0xff,0xff,0xff,0xf8,0x3f,0xff,0xf9,0xfe,0xdf,0xff,0xff,0xff,0xff, + 0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0x6d,0xfb,0x77,0xff,0x7f,0xdf,0xf7,0xfd,0xff, + 0x7f,0xdf,0xf7,0xfd,0xff,0x7f,0xde,0xfe,0xfd,0xff,0xff,0xff,0xff,0x17,0xff,0xff, + 0xff,0xef,0xf9,0xff,0xff,0xbf,0xef,0xfe,0xff,0xff,0x9f,0xff,0xfb,0xef,0xff,0xbe, + 0x7f,0xe7,0xf9,0xfe,0x7f,0x9f,0xfe,0x79,0xff,0xff,0x9f,0xff,0xf9,0xff,0xeb,0x9f, + 0xff,0xff,0xff,0xe0,0x7f,0xd6,0xff,0xbe,0x6f,0xdb,0xd6,0xcd,0xbe,0x6f,0x5b,0xfe, + 0xfd,0xbd,0x6e,0xf9,0xf6,0xcd,0x97,0xd9,0x7e,0x7f,0x9f,0xe7,0xd9,0xfe,0x7f,0x97, + 0x67,0x59,0xfe,0x3d,0xb3,0xe7,0xfb,0xfe,0xfd,0xf9,0x9b,0xfe,0xff,0xbf,0x6f,0xdf, + 0xff,0xfd,0xff,0x7f,0xff,0xfe,0xfd,0xff,0xef,0xff,0xfd,0xfd,0xbf,0xff,0xff,0xff, + 0xff,0xff,0xdb,0xff,0xff,0xbf,0x6f,0xfb,0xff,0xff,0x3f,0xff,0xff,0xff,0xff,0x3d, + 0xd3,0xfe,0xff,0xef,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xef,0xff, + 0xff,0xff,0xef,0xbf,0x7b,0xfe,0xff,0xbf,0xee,0xff,0xfe,0xdf,0xef,0xeb,0xff,0xff, + 0xbf,0xff,0xef,0xff,0xff,0xdf,0xff,0x7f,0xff,0xff,0x5f,0xff,0xfd,0xff,0x7f,0xde, + 0xff,0xf5,0xff,0xff,0x7f,0x97,0xfc,0x7d,0x7b,0xc2,0xfc,0xbd,0x0f,0xc3,0x90,0xf6, + 0xff,0x0f,0xef,0xb0,0xbe,0xff,0x8f,0x5f,0xf8,0xff,0xfd,0x7f,0xfa,0x2f,0xff,0xf7, + 0xea,0xf7,0x7e,0xdf,0xf7,0x6d,0xff,0xbe,0xaf,0xf7,0xee,0xfa,0x7f,0xff,0xab,0xec, + 0xfe,0xcd,0xa3,0xf8,0xfa,0x3f,0xbf,0xe3,0xff,0xfb,0x3f,0xff,0xfb,0xc9,0xff,0xbf, + 0xff,0xa7,0xff,0xc8,0xff,0xef,0xfd,0x77,0xdf,0xf7,0x7f,0xff,0x7f,0xfe,0xd7,0xfd, + 0xfd,0xff,0x5f,0xfd,0xfd,0xdf,0x5f,0xb7,0xf5,0x7b,0x5f,0x57,0xff,0xec,0xff,0x7f, + 0xd7,0xd7,0xfe,0xfd,0xff,0xf5,0xff,0xf5,0xdf,0xf9,0xbf,0xff,0xfe,0x2f,0x9f,0xe3, + 0xf9,0xfe,0x3f,0x9f,0xe2,0xf9,0xfe,0x3f,0x8b,0xe7,0xf8,0xbe,0x3f,0x9b,0xf8,0xbe, + 0x6e,0x0b,0x86,0xf9,0xb8,0x2f,0x8f,0x83,0xf9,0xf9,0x2f,0x9f,0x87,0xe8,0xbe,0x7f, + 0xd7,0xff,0xff,0xf5,0xff,0xff,0xff,0xff,0xfd,0xff,0x7f,0x5f,0xf7,0xfe,0xff,0x3f, + 0xff,0xd3,0xfc,0xff,0xdf,0xfb,0xfc,0xff,0xbf,0x7f,0xf7,0xff,0xff,0x3f,0xff,0xf9, + 0xf5,0xff,0xbf,0xff,0xff,0xff,0xf0,0xff,0xff,0xfe,0xaf,0xff,0xff,0xff,0xfe,0xbf, + 0xfb,0xea,0xff,0xfe,0xcf,0xff,0xff,0xfa,0x3e,0xf7,0xef,0x7f,0xdf,0x93,0x74,0xdf, + 0xfe,0xcd,0xff,0xb4,0xdf,0xff,0xcc,0xbf,0xf4,0xdf,0xef,0xff,0xff,0xdf,0xff,0x7f, + 0xf7,0xfd,0xff,0xff,0xff,0xf7,0xff,0xff,0x7f,0xdf,0xff,0xfe,0xff,0xff,0xdf,0xf3, + 0xfb,0x7f,0xef,0xf7,0x9f,0xe7,0xff,0xde,0x7f,0xfd,0xe7,0x7f,0xfe,0x17,0xff,0xe7, + 0xf7,0xff,0xff,0x9b,0xff,0xff,0xfa,0xff,0xff,0xff,0xfd,0xfb,0x7f,0xff,0xaf,0xff, + 0xfb,0x7f,0xdf,0xf7,0xed,0xfb,0xff,0xbf,0xff,0xfe,0xe9,0xfa,0x7f,0xfb,0xa3,0x7e, + 0xfa,0x77,0xff,0xba,0xff,0xfa,0x7e,0xff,0xff,0xfc,0x3f,0xff,0xff,0x2f,0xff,0xf2, + 0xfe,0xbf,0x2f,0xf3,0xfa,0xfc,0x9f,0x2f,0xdf,0xf7,0x7f,0xff,0xf7,0x7f,0xff,0xfd, + 0xf7,0xcb,0xf2,0xff,0xff,0x2f,0xff,0xf2,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfc, + 0xef,0xff,0xfa,0xfe,0xaf,0xaf,0xeb,0xfa,0xf6,0xaf,0xab,0xe9,0xfa,0x6c,0x9f,0xaa, + 0xeb,0x7a,0xfe,0xbf,0xeb,0xfa,0xbe,0xab,0xaf,0x6b,0xfa,0xb6,0xbf,0xaf,0x6b,0x7a, + 0xfe,0xb7,0xaf,0xeb,0xfa,0xff,0xf5,0xbf,0xff,0xfe,0xff,0xff,0xe7,0xff,0xdf,0x3f, + 0xff,0xbf,0xfb,0xd7,0xff,0x87,0xfb,0xff,0xff,0x37,0xb6,0xbc,0xff,0x1b,0xdb,0xbf, + 0xfc,0x7f,0xef,0xc7,0xfe,0xfc,0x7f,0xff,0xcf,0xff,0xff,0xff,0xfb,0x1f,0xff,0xff, + 0xff,0xff,0xf6,0xfb,0xe7,0x2d,0xff,0xff,0xfd,0xff,0x7f,0x73,0xbd,0xeb,0xfa,0xae, + 0xbf,0xbd,0x6b,0xd7,0xdd,0xdf,0xed,0xff,0xff,0xdf,0xdf,0xff,0xff,0xfb,0xff,0xff, + 0xff,0xef,0x7e,0x27,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xf7,0xff,0xfe, + 0xff,0xdf,0xff,0xfb,0xbc,0xff,0x7f,0xb3,0xb6,0xfd,0xff,0x77,0xfb,0xd7,0xbf,0x7d, + 0x7f,0xff,0xd7,0xff,0xf9,0x7e,0xff,0xff,0xff,0xb8,0xff,0xf8,0xfe,0xff,0xfb,0xe3, + 0xf8,0xd6,0x5f,0xab,0xfb,0xf8,0xfe,0x3f,0xbf,0x62,0xda,0xef,0xff,0xff,0xfa,0x7b, + 0xfd,0xaf,0xcb,0xff,0x9f,0xff,0xf9,0x63,0xff,0x96,0xbf,0xff,0xff,0xe8,0x7f,0xf8, + 0x1f,0xff,0xbd,0xf7,0xdf,0xff,0xff,0x7d,0xff,0xfd,0xf5,0xff,0xff,0xed,0xfd,0xf7, + 0xff,0xee,0xfe,0xff,0xff,0x5e,0xbf,0xe6,0xff,0x79,0xfd,0xff,0xff,0xf7,0xff,0xf7, + 0xff,0xff,0xff,0xff,0x7f,0xff,0xbb,0xfe,0xff,0xff,0x7f,0xbf,0x8e,0xf3,0xfe,0xce, + 0xfb,0xfe,0xeb,0xbf,0xef,0xf7,0xaf,0xea,0xee,0xe6,0xca,0xfb,0xbf,0xff,0xff,0xbe, + 0xff,0xff,0xff,0xff,0xbf,0xff,0xfc,0xff,0xf7,0xcf,0xff,0xbf,0xef,0x7f,0xff,0xff, + 0xff,0xef,0xff,0xef,0xff,0xf9,0xdf,0xfe,0xfe,0xff,0xff,0xdf,0xff,0xbc,0x6e,0xaf, + 0xf5,0xff,0xbf,0xf9,0xfb,0xb5,0xff,0xfb,0xff,0xfb,0xff,0xff,0xbf,0x7f,0xff,0xd7, + 0xff,0xfe,0xff,0x6f,0xdf,0xff,0xff,0xff,0xff,0xfe,0xfd,0x7d,0xbb,0xff,0xe7,0x7f, + 0xff,0x56,0xff,0xdf,0xff,0x7f,0x7b,0xfd,0x77,0xff,0xff,0xfb,0xff,0xff,0xfe,0xff, + 0xf7,0xff,0xff,0xcf,0xff,0xfe,0xff,0xfd,0xff,0xf1,0xff,0xfe,0xff,0xf7,0xff,0xff, + 0xff,0xfe,0xde,0xef,0xbf,0xf1,0xff,0xff,0xff,0x7d,0xff,0xff,0xdf,0x4f,0xff,0xdf, + 0xfb,0xfc,0xfb,0xf3,0xfc,0x77,0x3f,0xff,0x73,0xff,0xef,0x3f,0xff,0xff,0xff,0xfe, + 0x3f,0x7f,0xff,0xff,0xff,0xff,0xbf,0xff,0xef,0xff,0xff,0xfd,0xcd,0xfe,0xff,0xf7, + 0xf1,0xff,0xfe,0xeb,0x7f,0xfd,0xff,0xff,0xff,0xff,0xdf,0xf7,0xfd,0xff,0xff,0xd3, + 0xff,0xfd,0xff,0xff,0xff,0xf7,0x77,0xff,0xff,0xff,0xff,0x7f,0xdf,0xb7,0x7d,0xfb, + 0xb7,0x5d,0xf7,0xec,0xef,0x5f,0xcf,0xfb,0x9f,0x6b,0xfe,0xfb,0xed,0xff,0xef,0xdf, + 0xef,0xcd,0xfa,0xff,0xdf,0xaf,0xfd,0xce,0xfb,0xdf,0xff,0xff,0xc4,0x7f,0xff,0xff, + 0xff,0xcf,0xe3,0xf8,0x7e,0x3f,0xaf,0xfb,0xfc,0xfe,0xbf,0xcd,0xb1,0xef,0x7b,0xff, + 0xff,0xbf,0xff,0x7f,0xff,0xde,0xff,0xff,0xbf,0xff,0xfb,0xff,0xff,0x6f,0xf7,0xf7, + 0xff,0xff,0xfc,0xdf,0xef,0xff,0xff,0xeb,0xff,0xff,0xff,0xbf,0xff,0xff,0x7f,0xdf, + 0xdd,0xfb,0xfa,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0x3d,0xff,0xff,0xd5,0xff, + 0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xb0,0xff,0xff,0xd7,0x1f,0xff,0xfc, + 0x7c,0x57,0xff,0xc9,0xf3,0xff,0xcf,0x3f,0xdf,0xef,0xfd,0xce,0x3f,0xfb,0x3f,0xcf, + 0xf4,0xf7,0xf0,0x6e,0x9b,0xbf,0xed,0x53,0x3e,0xff,0xf3,0xe7,0xff,0xff,0xff,0xda, + 0x6b,0xff,0xf3,0xff,0xff,0xff,0xcf,0xfa,0x7f,0xfd,0xaf,0x7d,0xe9,0xf3,0xff,0xff, + 0xfd,0xff,0xff,0xee,0xe5,0xff,0xfe,0x5f,0xff,0x7d,0xb3,0x6e,0xbb,0xaf,0xff,0xbf, + 0xff,0xfb,0xff,0xff,0xff,0xd7,0xaf,0x7f,0xff,0xfe,0xfb,0xfe,0xbf,0xab,0x3f,0xff, + 0xe7,0xfc,0xff,0x2b,0xff,0xfe,0xfc,0xff,0xfe,0xff,0xfc,0xef,0xff,0xfb,0xe7,0xff, + 0xbf,0xef,0xd2,0xff,0xed,0x2f,0xef,0xff,0xff,0xbf,0xff,0xfb,0xe1,0xbf,0xff,0xff, + 0xfb,0x7e,0xd7,0x35,0xe5,0xfb,0xff,0xdf,0x37,0xe5,0x73,0xfe,0x5f,0x37,0xef,0xff, + 0xbf,0xb5,0xff,0xff,0x7f,0xdf,0xf7,0xfd,0xfb,0x5f,0xff,0xb5,0xe5,0xff,0xfc,0xdf, + 0xff,0xcf,0xdf,0xbe,0xff,0xff,0xff,0xbf,0xef,0x5f,0xff,0xf4,0x9f,0xff,0xff,0xfd, + 0x7f,0xff,0xff,0xff,0xfc,0x7f,0x5a,0xda,0xf7,0x7d,0xef,0x7b,0x7e,0xf7,0xbd,0xbf, + 0x7f,0xfb,0xf7,0xf6,0xdf,0x7f,0x6d,0xff,0xfe,0x66,0xff,0xff,0xff,0xff,0xdf,0x6f, + 0xbd,0xf6,0xeb,0xdf,0xf5,0x9d,0xef,0x7f,0xda,0xf7,0xdd,0xf7,0x5b,0x57,0xd5,0x4f, + 0xfd,0xdf,0xee,0x9d,0xf7,0x7f,0xdf,0xff,0xfd,0xf6,0xff,0xff,0x6d,0xbf,0xff,0x72, + 0x7f,0xff,0xff,0xff,0xff,0xeb,0xef,0xdf,0xff,0xaf,0x5f,0xff,0xda,0xbf,0xed,0x5f, + 0x1f,0xff,0xff,0xeb,0x7f,0xd5,0xfd,0x3e,0x6f,0xdb,0xde,0xff,0xad,0xff,0xfa,0xbf, + 0xff,0xff,0xff,0xff,0xff,0xfb,0xdf,0xff,0xff,0xff,0xff,0xfd,0x1f,0xff,0xf9,0xf5, + 0xe9,0xff,0xff,0xd7,0xf7,0xeb,0xfa,0xfe,0xff,0xf9,0x4f,0xd6,0xfc,0xa7,0x29,0xb1, + 0x73,0xdc,0xf5,0x3f,0xff,0x5b,0xdb,0xff,0x3d,0xbf,0xff,0xff,0xa3,0xff,0xff,0xff, + 0xff,0xfb,0xf7,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0xed,0xff,0xfe,0xdf,0xef,0xff, + 0xf7,0xfd,0xaf,0x7f,0xdf,0xf6,0xdd,0xff,0x7f,0xdf,0xff,0xfd,0xff,0x7f,0xdf,0xf6, + 0x7f,0xff,0xef,0x7f,0xff,0xff,0xff,0xff,0xef,0x67,0xff,0xee,0xff,0xff,0xff,0xff, + 0xfe,0xff,0xff,0xef,0xfb,0xff,0xfe,0x7f,0x9e,0xe7,0xf9,0xff,0xef,0x9b,0xe7,0xf9, + 0xbf,0xe7,0x9f,0xfe,0xf9,0xff,0xef,0xff,0xfe,0x27,0xff,0xef,0xfb,0xf6,0xfd,0x8d, + 0x6d,0x59,0xb6,0xfd,0xb5,0x6f,0x5b,0xee,0xdf,0xbe,0xef,0xbb,0xfd,0x9f,0xe5,0xf9, + 0xfe,0x5f,0x9b,0xe6,0xf9,0xfe,0x6d,0xbf,0xe3,0xd9,0xbe,0x7d,0x9e,0xef,0xff,0xb1, + 0xbf,0xff,0xff,0xf6,0xff,0x3f,0xef,0xfb,0xf6,0xfd,0xff,0xef,0xff,0xff,0xff,0xff, + 0xef,0xff,0xff,0xff,0xef,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xdb, + 0xff,0xfd,0xbf,0xff,0xff,0xd8,0xbf,0xff,0xff,0xff,0x7f,0xef,0xfb,0xfe,0xff,0x7f, + 0xff,0xfb,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xf7,0xbb,0xef,0xfb,0xbe,0xff,0xff, + 0xef,0xfb,0xfe,0xff,0xff,0xfd,0xff,0xfe,0xbf,0xff,0xff,0xff,0x87,0xfb,0xff,0xff, + 0xfd,0xff,0xef,0xff,0xb6,0x6b,0x7f,0xdf,0xd7,0xed,0xef,0x7f,0x7f,0x9f,0xe7,0xff, + 0x43,0xd1,0xfc,0xbf,0x2b,0xef,0x92,0xec,0xbd,0x2f,0xdf,0xf8,0xfe,0xff,0xaf,0xef, + 0xff,0xff,0xf2,0xff,0xff,0xff,0xff,0xa7,0xee,0xfe,0x7e,0xaf,0xf7,0xfd,0xfa,0xbf, + 0xdf,0x67,0xee,0xfe,0x77,0x8f,0xe8,0xfa,0x3f,0x8f,0xb3,0xff,0xfa,0x3f,0x8f,0xa3, + 0xe9,0xff,0xbf,0xff,0xfb,0xff,0xff,0xff,0xfe,0xcf,0xff,0xff,0xff,0xff,0xef,0x7f, + 0xff,0xfb,0x7d,0xff,0x7b,0x5f,0xff,0xfd,0xff,0x7b,0xff,0xdf,0xe9,0x5e,0xd7,0xf7, + 0xfd,0xff,0xff,0xfe,0xf7,0xff,0xfd,0x77,0xfd,0xff,0xff,0xfd,0x7f,0xff,0xff,0xd3, + 0xff,0xff,0xe7,0xf9,0xfe,0x3f,0x9b,0xe7,0xf9,0xfe,0x7f,0x8b,0xe7,0xf9,0xbe,0x6f, + 0x9f,0xe6,0xf9,0xaf,0x8f,0xe6,0xe0,0xf8,0x7f,0x9f,0x86,0xf9,0xf8,0x2f,0x9d,0x87, + 0xf9,0xf8,0x3f,0x9f,0xe7,0xfd,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf1, + 0xfd,0xfd,0x3f,0xff,0xfb,0xfe,0x7f,0xbf,0xff,0xfe,0xfd,0xff,0xdf,0xf7,0xfc,0x7d, + 0x7f,0xdf,0xd7,0xf5,0xff,0xbf,0x5f,0xff,0xff,0xff,0xff,0xff,0xcf,0xff,0xff,0xff, + 0xff,0xff,0xef,0xef,0xfe,0xff,0xff,0xff,0xa3,0xff,0xff,0xff,0xef,0xff,0xfe,0xff, + 0xf7,0xed,0xfb,0x33,0xcc,0xff,0xac,0xdb,0x7a,0xcc,0xbf,0xfc,0xcf,0xff,0xcd,0xff, + 0xff,0xff,0xdd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xf7,0xfd,0xff, + 0xff,0xef,0xff,0xfe,0xff,0xff,0xbb,0xf5,0xff,0x79,0xde,0x77,0xff,0xe7,0x7f,0xfe, + 0x57,0xfe,0xe7,0x7f,0xfe,0x77,0xff,0xff,0xfd,0xbf,0xff,0xff,0xff,0xff,0xff,0xff, + 0xbf,0xf7,0xfd,0xff,0x7e,0x9f,0xf7,0xfd,0xff,0x7f,0xdf,0xff,0xff,0xfe,0xbf,0xee, + 0x8f,0xa6,0x7f,0xfa,0x6f,0xff,0xa2,0xff,0xfa,0x7f,0xff,0xa7,0xff,0xff,0xff,0x83, + 0xff,0xff,0xff,0xfd,0x1b,0xef,0xff,0xf7,0xff,0xff,0x2f,0xd3,0xff,0xbf,0xdf,0x47, + 0xd1,0xf4,0xff,0xff,0xdb,0xff,0xfd,0xbf,0x6f,0xd9,0xf4,0xff,0xff,0xff,0xfd,0xf6, + 0xff,0xdf,0xee,0x7f,0xff,0xf4,0xff,0xff,0xaf,0xeb,0xfa,0xde,0xbf,0xad,0xea,0xfa, + 0xee,0xaf,0x2b,0xeb,0xf2,0x7e,0x9f,0xa5,0xe9,0xfc,0xaf,0xad,0xea,0xda,0x4e,0x8f, + 0xaf,0x62,0xfa,0xfe,0xbf,0xae,0xeb,0xfa,0xfe,0x9f,0xaf,0xfd,0x1b,0xfe,0xff,0xff, + 0xfb,0xfd,0xff,0xfd,0xef,0xfe,0xbf,0x3f,0xbe,0xf1,0xfe,0xfe,0xfe,0x8d,0xef,0x7b, + 0xb7,0x33,0xf3,0xf4,0xdd,0x37,0x0e,0x72,0xfc,0x7f,0xf7,0xcf,0x5f,0xfc,0xfd,0xfe, + 0xff,0xff,0xf1,0xff,0xff,0xf7,0xff,0xff,0xff,0x3f,0xff,0xfe,0xfe,0xbb,0xff,0xfb, + 0xfa,0xdf,0x7f,0xd1,0xff,0xf7,0xdf,0xdf,0xec,0xef,0x3b,0xde,0xcf,0xee,0xff,0x3f, + 0x73,0xef,0xff,0xfe,0xff,0xfb,0xff,0xff,0xe5,0x7f,0xff,0xff,0xff,0xff,0xff,0xff, + 0xfb,0xff,0xff,0xbb,0xff,0xff,0xdf,0xff,0xff,0xff,0xf7,0xfb,0xff,0xfb,0xff,0xf7, + 0xfd,0xfb,0xbf,0x7f,0x77,0xff,0xff,0xff,0x7f,0xff,0xf7,0xff,0xff,0xff,0xfe,0xaf, + 0xff,0xff,0xff,0xba,0xfe,0xff,0xff,0xeb,0xff,0xff,0xdf,0xa7,0xfb,0xfa,0xf6,0x9f, + 0xaf,0xea,0xde,0x37,0xe7,0x5d,0xaf,0x7e,0x7e,0xfd,0xdf,0xff,0xde,0xbf,0xf7,0x67, + 0xff,0xfe,0x9f,0xff,0xf9,0xd9,0xff,0xff,0xdf,0xff,0xad,0xfb,0xff,0xff,0xb7,0xf7, + 0x7f,0xfe,0xb6,0xf7,0xdf,0xeb,0xfa,0xfe,0xbf,0xef,0xff,0xf7,0xff,0xff,0xff,0x5f, + 0xff,0xff,0xf7,0x7f,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xd1,0x3f,0xff,0xff,0xf3, + 0xff,0xfe,0xef,0xff,0xbf,0xff,0xbf,0x7e,0xff,0xff,0xe3,0x76,0xff,0xff,0xef,0xee, + 0x7e,0xff,0xff,0x7f,0xfc,0x7b,0x3a,0xce,0xfe,0xbc,0xef,0xfb,0xcf,0xfd,0xfb,0xed, + 0xf9,0xfc,0x87,0xff,0xdf,0xff,0xff,0xff,0xed,0xfd,0xfe,0xef,0xbf,0xff,0xfb,0xff, + 0xbd,0xfe,0x7f,0xfb,0xf7,0xff,0x35,0xd3,0xff,0xff,0xff,0x7f,0xff,0xf5,0xff,0xff, + 0x7f,0xff,0xe7,0xbf,0xfe,0xff,0xff,0xff,0xc6,0xfd,0xfe,0xff,0xff,0xff,0xfd,0xff, + 0xe7,0xfe,0x7f,0xfe,0xdf,0xdd,0xfd,0xec,0x7f,0xf7,0xf7,0xf7,0xbb,0xff,0xff,0xf5, + 0xff,0x6f,0xef,0xdf,0xff,0xff,0xfb,0xdf,0xf7,0xbf,0xff,0x7f,0xff,0xff,0xff,0x1f, + 0xff,0xff,0xff,0xf1,0xfc,0x7b,0xff,0xc7,0xb1,0xfc,0x7f,0x1e,0xef,0xf3,0xfa,0xf7, + 0xbf,0xd7,0xf4,0xb5,0xbf,0xef,0xf7,0xdf,0xfb,0x7f,0xef,0x5b,0xd4,0x77,0xbd,0xff, + 0xfb,0xff,0xff,0xff,0xff,0x53,0xbe,0xff,0xff,0xff,0xcf,0xef,0xbe,0xfe,0xff,0xdb, + 0xf6,0xfd,0xff,0x7c,0xbf,0xf7,0xfd,0xff,0xfe,0xaf,0xf7,0xbf,0x2e,0xeb,0xfc,0xef, + 0xde,0xff,0xcf,0xef,0xfd,0xff,0xff,0xdf,0xff,0xff,0xff,0xf5,0x7f,0xe7,0xf7,0xfd, + 0xff,0xfe,0xff,0xbf,0xef,0xd7,0xff,0xff,0x37,0xed,0xff,0xad,0x8f,0xcf,0xdf,0xbf, + 0xdf,0x7e,0xee,0xfb,0xad,0xef,0xfe,0x5f,0xbb,0xff,0xcb,0xff,0xdf,0x7f,0xbf,0xff, + 0xff,0xfe,0x83,0xfd,0xfb,0xff,0xff,0xbf,0xff,0xfb,0xfd,0xfe,0xbf,0xcf,0xef,0xff, + 0xff,0xff,0xbf,0x7f,0xb3,0x3f,0x9f,0xee,0xfd,0xff,0x7f,0x7f,0xf1,0xfb,0xff,0xf6, + 0xb7,0xf5,0xf2,0xef,0xff,0xfe,0xff,0xff,0xdd,0xff,0xff,0xff,0xff,0xfd,0xff,0xff, + 0xff,0xf7,0xdf,0xff,0x75,0xff,0xff,0xfe,0xb9,0xff,0xff,0x7f,0xef,0xe5,0xff,0xff, + 0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xbf,0xff,0x67,0xf7,0xff,0xbf,0xff,0xfc,0x2f, + 0xff,0xff,0xff,0x3e,0xff,0xb3,0xef,0xfb,0xfc,0x1f,0xb3,0xef,0xf3,0xfe,0xfd,0x67, + 0xcd,0x7d,0xfb,0x9f,0xcd,0x7b,0x3e,0xd7,0x3f,0xef,0xf3,0x3e,0xcf,0x3f,0xff,0xff, + 0xff,0xff,0xff,0xff,0xed,0x13,0xbf,0xfe,0xff,0xe4,0xbf,0xef,0xcf,0xfe,0xff,0xb3, + 0x3c,0xfa,0xf2,0xfd,0xbf,0xfc,0xcb,0x91,0xfe,0x6f,0xdd,0x32,0xe4,0xba,0x7f,0xfb, + 0xf6,0xcf,0xd9,0xfe,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0x7e,0xb7,0xff,0xff,0xff, + 0xef,0xff,0xfe,0xbf,0xfc,0xaf,0xfa,0xfa,0xff,0xbf,0xf7,0x3f,0xfe,0xe6,0xb9,0xef, + 0xff,0xff,0xbf,0xef,0xfe,0xff,0xd3,0xff,0xff,0x3e,0xff,0xe7,0xff,0xff,0xff,0xff, + 0xff,0xfc,0x9f,0xff,0xff,0xff,0xf7,0xff,0xff,0x7f,0xff,0xb5,0xfd,0xfb,0x5f,0xdf, + 0xf3,0xff,0xff,0x7f,0xd7,0xf9,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0xfe,0x7f,0xff,0xe5, + 0xff,0xfc,0xff,0xff,0xff,0xff,0xff,0xed,0x49,0xff,0xeb,0xff,0xff,0xb7,0x2d,0xfb, + 0x37,0xdb,0xff,0xed,0xbf,0x7e,0xfd,0x87,0x7f,0xfb,0xfa,0xdf,0xfd,0xfd,0xd6,0xdf, + 0xb7,0xf7,0x4b,0x7f,0x6d,0xf7,0xb6,0xdf,0x7e,0x6d,0xf7,0xff,0xff,0xff,0xea,0x7f, + 0xd9,0x5f,0xff,0xdd,0x85,0x7d,0xda,0xff,0xfd,0xf7,0x7b,0xdf,0x76,0x16,0x4f,0x79, + 0xde,0x57,0xbf,0xbf,0xbf,0x77,0xdd,0xee,0xfd,0x5f,0x6f,0xbf,0xf6,0xfb,0xff,0xee, + 0xbf,0xff,0xff,0xff,0xf4,0x4f,0xff,0xaf,0xff,0xfe,0xbe,0xbd,0xef,0x7f,0xda,0xff, + 0xbe,0xaf,0xfb,0xde,0xf6,0xfe,0xef,0xab,0xc6,0xbf,0xbf,0xfb,0x9e,0xf0,0xf7,0xae, + 0x6f,0x6f,0xff,0xf6,0xfb,0x4b,0xff,0xf5,0xff,0xff,0xff,0x95,0xff,0xf5,0xff,0xff, + 0x7b,0xd4,0xd7,0x37,0xcd,0x5f,0xdc,0xf5,0x3d,0xf8,0x5a,0x3f,0xf7,0xfd,0x4a,0xd6, + 0xf6,0xfd,0xca,0x70,0xdb,0xf5,0x2d,0xbf,0xf3,0xdb,0xff,0xad,0xbf,0xf2,0xff,0xff, + 0xff,0xd3,0x1f,0xff,0xff,0xff,0xfd,0xff,0x7f,0xd9,0xf7,0xff,0xff,0x7f,0xdf,0xff, + 0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xdb,0xf7,0xfd,0xff,0x6d,0xde,0xf6,0xfd,0xff, + 0x6d,0xde,0xf6,0xfd,0xef,0xff,0xff,0xfd,0x47,0xff,0xff,0xff,0xff,0x9f,0xe7,0xf9, + 0xbe,0x7f,0xff,0xe7,0xf9,0xff,0xff,0x9f,0xff,0xff,0xfe,0x7f,0xff,0xff,0xee,0x7f, + 0x9f,0xfe,0xf9,0xff,0xfb,0x9f,0xfe,0x79,0xff,0xfb,0x9f,0xff,0xff,0xff,0xfa,0x7f, + 0xfe,0xff,0xbf,0xe3,0xf9,0x7e,0x7b,0x9f,0xed,0xf9,0xfe,0x7f,0xb7,0x63,0xdb,0x7e, + 0xdd,0x9f,0xfb,0xfe,0x5f,0x9f,0xe7,0xf9,0x6e,0x7f,0x9f,0xe7,0xf9,0xfe,0x3f,0x9f, + 0xe7,0xdb,0xfe,0xff,0xfb,0x5f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0x7f,0xf7,0xff,0xfd,0xff,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0xdb,0xff,0xff,0xfd,0xab,0xff,0xff,0xff,0xff, + 0xff,0xfb,0xfe,0xff,0xbf,0xff,0xfb,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xbb,0x7f, + 0xff,0xff,0xbf,0xef,0xff,0xfe,0xff,0xff,0xef,0xff,0xff,0xbf,0xff,0xed,0xff,0xff, + 0xff,0xf5,0x7f,0xff,0xff,0xff,0xf8,0xbe,0xb9,0x2f,0x4b,0xb7,0xf4,0xaf,0x0f,0x5f, + 0xf2,0xf5,0xfd,0x7f,0x43,0xf5,0xbf,0xba,0x43,0xd0,0xfe,0xff,0x8f,0xef,0xf8,0xfe, + 0xef,0x8f,0xee,0xf8,0xfd,0xff,0xfe,0xfe,0x6f,0xff,0xff,0xff,0xff,0xbf,0xef,0xa3, + 0xe8,0xfe,0x76,0x8f,0xe3,0xe9,0xfb,0x3e,0x9f,0xa7,0xec,0xff,0xaf,0xff,0xe8,0xfa, + 0x3f,0xff,0xfb,0xff,0xff,0xbf,0xff,0xfb,0xef,0xff,0xbe,0xdf,0xff,0xff,0xf4,0xff, + 0xff,0xff,0xfb,0xff,0xff,0xff,0xed,0x7b,0xdf,0xd7,0xed,0xe9,0x7f,0xdf,0xdf,0xf5, + 0xfd,0x3f,0x97,0x7f,0xdd,0x7a,0x5f,0xff,0xff,0x7f,0xff,0xee,0xff,0xfe,0xff,0xff, + 0xef,0xb7,0xff,0xff,0xfd,0xbf,0xef,0xfe,0x7f,0x9d,0xe7,0xf9,0xfe,0x2f,0x9b,0xe2, + 0xf9,0x9e,0x2f,0x8f,0xe2,0xf8,0xbe,0x3f,0x9e,0xf9,0xfe,0x26,0x09,0x87,0xf9,0xf8, + 0x7f,0x9f,0x87,0xf9,0xf8,0x3f,0x9f,0x83,0xf9,0xfe,0x7f,0x27,0xff,0xff,0xff,0xff, + 0xbf,0xe7,0xd1,0xfe,0x7f,0x3f,0xef,0xf3,0xfe,0x7f,0xff,0x4f,0xff,0xfd,0xff,0xdf, + 0xf3,0xfe,0x7b,0x9e,0x4f,0xfb,0xed,0xff,0xfe,0xcf,0xff,0xe7,0xff,0xbe,0xdf,0xff, + 0xff,0xea,0xff,0xff,0xff,0xff,0xfd,0xff,0x7a,0xdf,0xf7,0xef,0xfd,0x7e,0xdf,0xff, + 0xfd,0xe9,0xff,0xff,0xf7,0xff,0x7a,0x7f,0xf2,0x7c,0x8f,0xff,0xc8,0xbf,0xfc,0x89, + 0xff,0xc8,0xff,0xfc,0x8f,0xff,0xfe,0x7b,0x4f,0xff,0xff,0xff,0xfe,0xff,0xff,0xff, + 0xff,0xfc,0xff,0xff,0xcf,0xff,0xff,0xfd,0x7f,0xff,0xf7,0xff,0x7f,0xff,0xff,0x9f, + 0xe7,0x3f,0xee,0x7f,0xff,0xe7,0xff,0xfe,0x7f,0xfe,0xe7,0x7f,0xff,0xdf,0xb3,0x3f, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x9f,0xff,0xfb,0xff,0x7f,0xff,0xa7,0xfd, + 0xff,0xff,0xff,0xed,0xff,0xef,0xfb,0xf7,0xff,0xbe,0xff,0xfb,0xe7,0xff,0xbf,0xff, + 0xfb,0xbf,0xff,0xfd,0xd4,0x7f,0xff,0xff,0xf7,0xff,0xff,0xef,0xff,0xff,0xff,0xdf, + 0xff,0xff,0xff,0xca,0xf6,0xff,0xff,0x6f,0xf7,0xfd,0x3f,0xff,0xff,0xf4,0xff,0xdf, + 0x4f,0xff,0xf4,0xff,0xff,0x6f,0xff,0xff,0xff,0xff,0xff,0x2f,0xff,0xfa,0xfe,0xbf, + 0xaf,0xe9,0xf8,0x7e,0xbf,0xab,0xe9,0xfa,0xbe,0xbb,0xab,0x8b,0x7a,0xfa,0x8f,0x6b, + 0xf8,0xfe,0xbf,0xa3,0xe9,0xf2,0x3c,0x9f,0xab,0xeb,0xfa,0xf6,0xbf,0xaf,0xeb,0xfa, + 0xff,0xf1,0xbf,0xcf,0xff,0xff,0xcf,0xf3,0xfc,0x7f,0xbb,0xcd,0xf6,0xdc,0xff,0xf6, + 0xcf,0xff,0xff,0x5f,0xd7,0xfe,0xb9,0xff,0xff,0xff,0xe3,0xfe,0x7e,0xfd,0xcf,0xef, + 0xff,0xed,0xff,0xcf,0x7f,0xff,0xff,0xfc,0x9f,0xff,0xff,0xff,0xd3,0xea,0xfa,0xbf, + 0x5f,0xcf,0xff,0xba,0xbb,0x7c,0xf3,0xff,0xaf,0xef,0x7b,0xff,0xdf,0xfd,0xff,0xdf, + 0xf3,0xfd,0x7f,0xfe,0xcf,0xf7,0xff,0xfd,0xff,0xf7,0xff,0xff,0xff,0x7e,0xe7,0xdf, + 0xfd,0xff,0xdf,0xfb,0xff,0xff,0xff,0xff,0x6f,0xbf,0xfe,0xff,0x7f,0xff,0xff,0xff, + 0x6f,0xfb,0xff,0xaf,0xef,0xfb,0xf7,0xcf,0xfb,0xef,0xbe,0xff,0xfb,0xff,0xff,0xfa, + 0xfe,0xff,0xff,0xff,0xb4,0x7b,0xdf,0x7f,0xff,0xff,0xff,0xff,0xff,0xbb,0xff,0xc3, + 0xff,0x7c,0x3d,0xad,0xca,0xf8,0xbf,0x8f,0xab,0xba,0xde,0x5d,0xbb,0x6b,0xff,0x7e, + 0x9f,0xff,0x6b,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xfd,0x5f,0xef,0xff,0xff,0xff, + 0xff,0xff,0xff,0x9f,0xff,0xfe,0xfe,0xfe,0xef,0xda,0xff,0xee,0xbf,0xff,0xff,0x57, + 0xaf,0x7e,0xfd,0xf6,0xbd,0xff,0xeb,0xff,0xfe,0xbf,0xff,0xff,0xdf,0xff,0xff,0xff, + 0xff,0xd1,0xfe,0xbf,0xff,0xff,0xbf,0xef,0xfb,0xfe,0xdf,0xbd,0xef,0xfb,0xae,0xff, + 0x3d,0xef,0xf3,0xfa,0xee,0x8f,0xf3,0xdc,0x5f,0x2f,0xcf,0xfb,0xbf,0x3f,0xfb,0xfa, + 0xff,0x7f,0xaf,0xff,0xff,0xff,0xbf,0xff,0x6f,0xff,0xdf,0xfb,0xee,0xfa,0xbe,0xaf, + 0xbf,0xeb,0xfa,0xee,0xbf,0xaf,0x5e,0x3b,0xbd,0xef,0xaf,0x97,0xdd,0xbf,0x7f,0xdf, + 0xf6,0xfc,0xbd,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xdf,0x7f,0xff,0xff,0xcf,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xef,0xff,0xfd,0xbf,0xdb,0xdf,0xe7,0xbd, + 0xfe,0xda,0xff,0xbf,0x6e,0x3b,0xaf,0xbf,0xbf,0xff,0x5f,0xfb,0xfd,0x7b,0xff,0xff, + 0xff,0xff,0xff,0xff,0xe1,0xff,0xff,0xff,0xfd,0xff,0xef,0xfb,0xff,0xef,0x1f,0xef, + 0x2f,0xdb,0xfe,0x17,0xcf,0xff,0xde,0xfe,0x5b,0xfb,0xfc,0x7f,0xbf,0x7e,0xff,0xf7, + 0xff,0x3d,0xfd,0xf1,0xff,0xfb,0xff,0xff,0xff,0xff,0xfa,0x37,0xff,0xff,0xff,0xff, + 0xf6,0xff,0xbf,0xfb,0xf7,0xfd,0xff,0xff,0xff,0xfc,0xe9,0xf1,0xff,0xde,0xeb,0xef, + 0x7f,0xf7,0x77,0xff,0xff,0xff,0xff,0xeb,0xff,0xff,0xbf,0xff,0xff,0xff,0xff,0xff, + 0xff,0xa3,0xff,0xff,0xf5,0xdf,0x67,0xdf,0xb7,0xed,0xfb,0x6b,0xd5,0xb7,0x3d,0xeb, + 0x7d,0xd7,0xf3,0xbd,0xab,0xdf,0xf7,0x6d,0xf3,0x7e,0xde,0xbf,0xe5,0xff,0xbf,0xef, + 0xf7,0xff,0xff,0xff,0xf7,0xff,0xff,0xe6,0xff,0xff,0xff,0xbf,0xcf,0xf3,0x7c,0xdf, + 0x3f,0xcb,0xd3,0xfc,0xff,0x3f,0xdd,0xf1,0xed,0xfd,0x3d,0xf5,0xbd,0xff,0x7f,0xdf, + 0xb2,0xff,0xff,0xbf,0x7f,0xff,0x5c,0xdf,0xf7,0xfd,0xff,0xff,0xff,0xfb,0x9f,0xff, + 0xff,0xf7,0x7b,0xfe,0xff,0xbf,0xef,0xfb,0xfe,0xff,0xbf,0xef,0xff,0x7e,0xfe,0xf7, + 0xef,0xff,0xf7,0xf7,0xff,0xff,0xff,0x4f,0xff,0xf7,0xff,0x7f,0xff,0xbf,0xff,0xff, + 0xef,0xff,0xff,0xfe,0xcb,0xff,0xff,0xfd,0x32,0xfc,0xbb,0x2e,0xcb,0xfe,0xfc,0xbb, + 0x2e,0xfb,0xb2,0xef,0xba,0x6e,0xfb,0xbf,0xbb,0xee,0xfb,0xbf,0xef,0xff,0x4e,0xcf, + 0x3f,0xc4,0xfb,0xfe,0xfb,0xff,0xff,0xff,0xff,0xff,0xd0,0x3a,0xfc,0xff,0xef,0xf7, + 0xfc,0xbf,0x3a,0xdb,0xf7,0x9d,0x3f,0x3f,0xce,0x77,0xfc,0xcf,0x7f,0xcf,0xec,0xff, + 0x39,0xdc,0xe3,0xff,0xeb,0xff,0xf6,0x7f,0xff,0xff,0xff,0x7b,0xff,0xff,0xff,0xff, + 0xd7,0xef,0x5f,0xef,0xff,0xde,0xd7,0xbd,0xed,0x7b,0xde,0xf7,0xbd,0xed,0x7b,0xde, + 0xb7,0xbd,0xeb,0x7b,0xdf,0xb5,0xed,0x7a,0x5b,0xe7,0xff,0xbb,0xff,0xff,0xbf,0xef, + 0xfb,0xef,0xff,0xfe,0xbf,0xfe,0x7b,0xed,0xff,0xf7,0xff,0xfa,0x7e,0x9f,0xa7,0xe9, + 0xfa,0x7e,0x9f,0xa7,0xe9,0xfa,0x7e,0x9f,0xa7,0xe9,0xfa,0xdf,0xa7,0xe9,0xfa,0x7c, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xfe,0x57,0xff,0xcf,0xdc,0x9f,0xf5, + 0xbd,0x7f,0xfb,0x7e,0xdf,0xb7,0xed,0xfb,0x7e,0xdf,0xb7,0xed,0xdb,0x76,0xcd,0xb3, + 0x6c,0xde,0xd5,0xb7,0xed,0xef,0x7f,0x7e,0xb7,0xff,0xff,0xff,0xdf,0xf7,0xbf,0xff, + 0xff,0xff,0xff,0xfe,0xe6,0xdf,0xdd,0xaf,0xfd,0xdf,0x77,0xdd,0xf7,0x7d,0xde,0x75, + 0x9d,0xa7,0x71,0xd4,0x77,0x9d,0xa7,0x7e,0x77,0xdd,0x67,0x59,0xdf,0x6e,0x9e,0xef, + 0xff,0xff,0xff,0xff,0xf7,0x7f,0xff,0xf7,0xff,0xff,0x6c,0xdf,0xfe,0xff,0xff,0xbb, + 0xef,0xfb,0xbe,0xef,0xbc,0x2f,0xfb,0xfe,0xe6,0xbf,0xee,0xeb,0xfe,0xe9,0xef,0x1b, + 0xd6,0xef,0xeb,0xef,0xfa,0xfb,0xff,0xff,0xff,0xdf,0xfe,0xfd,0xff,0xeb,0xff,0xff, + 0xfb,0xdf,0xff,0x7f,0xff,0xfd,0xbf,0x4f,0xdb,0xf6,0xfd,0x2b,0x4f,0xd3,0xf6,0xad, + 0x3f,0x6b,0xd3,0xf6,0xff,0x4f,0xd2,0x76,0xfd,0xbd,0x3f,0x7b,0xff,0xff,0xff,0xc1, + 0xf3,0xdf,0x1f,0xfd,0x7f,0xff,0xff,0xb1,0xfe,0xff,0xff,0xfe,0xdf,0xb6,0xed,0xbb, + 0x6e,0xdb,0xb6,0xed,0xbb,0x6e,0xdb,0xb6,0xad,0xbb,0x6f,0xb6,0xed,0xab,0x6f,0xdb, + 0xf6,0xdf,0x9f,0xff,0xff,0xf7,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xee,0x7f,0xeb, + 0xff,0xfe,0x79,0xbe,0x4f,0x93,0xe4,0xf9,0x3e,0x4f,0x93,0xe4,0xf9,0x3e,0x4f,0x93, + 0xe4,0xfe,0x4f,0x93,0xe4,0xf9,0x3f,0xef,0xfb,0xff,0xff,0xfe,0x7f,0x9f,0xff,0xff, + 0xff,0xff,0xff,0xfe,0xc3,0xfb,0xef,0xfb,0xd2,0x3a,0x9f,0xa3,0xe8,0xfa,0x7e,0x9f, + 0xa7,0xe8,0xfa,0x5e,0x8f,0xa7,0xe8,0xfe,0x9f,0xa7,0xe8,0xfa,0x3d,0x9b,0x6e,0xfb, + 0xfe,0xff,0x9f,0xe7,0xfb,0xfe,0xff,0xb7,0xef,0xdf,0xb5,0xff,0xff,0xfb,0xfe,0x7f, + 0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0xdf,0xf7, + 0xfd,0xff,0x7d,0xbf,0x6f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf3, + 0xdd,0xbf,0xff,0xfe,0xfe,0xef,0xfb,0x3e,0xdf,0xb7,0xec,0xfb,0x3e,0xcf,0xb7,0xec, + 0xfb,0x7e,0xcf,0xb7,0xfb,0x3e,0xcf,0xb7,0xed,0xdf,0xf7,0xff,0xff,0xff,0xff,0xbf, + 0xef,0xff,0xff,0xff,0xff,0xfb,0xff,0x27,0xff,0xff,0xf5,0xff,0x0f,0x63,0xd8,0xf6, + 0x3d,0xaf,0x63,0xda,0xe6,0x3d,0xaf,0x6b,0xd8,0xf6,0x3f,0x6b,0x9a,0xf6,0xbd,0x8f, + 0xef,0xd6,0xfd,0xfd,0x7b,0xe3,0xf2,0xbf,0xff,0xff,0xff,0xff,0xff,0xf0,0xff,0xff, + 0xfe,0x9f,0xb3,0xec,0xfb,0x3e,0xcf,0xb3,0xcc,0xfb,0x3e,0xcd,0xb3,0xec,0xf3,0x34, + 0xcf,0xec,0xfb,0x3e,0xcd,0xb3,0xef,0xfa,0xbf,0x9f,0xa7,0xfe,0xfe,0x3f,0xff,0xff, + 0xff,0xff,0xff,0xfd,0x8f,0xff,0xff,0xd7,0xff,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0x3f, + 0xde,0xf5,0xfd,0xdb,0x7b,0xd7,0xf5,0xff,0x7b,0xdf,0xf7,0xfd,0xed,0xff,0xff,0xf7, + 0x75,0xff,0xdb,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xa3,0xfe,0xff,0xe3,0xf9,0xd8, + 0x66,0x19,0x86,0x61,0xbe,0x6e,0x1b,0x86,0xe9,0xbe,0x6f,0x9b,0xa6,0xe9,0xef,0x1b, + 0xe6,0xe9,0x9a,0x3f,0x9f,0xa6,0xf8,0xbc,0x7f,0x9b,0x87,0xf9,0xfc,0x7f,0x9f,0xe7, + 0xf6,0x7f,0xff,0xff,0x5f,0xd3,0xfc,0xff,0x3f,0xcf,0xf3,0xfd,0xff,0x7f,0xcf,0xf3, + 0xfc,0x7f,0x3f,0xcf,0xfc,0x7f,0x1f,0xcf,0xf3,0xfe,0xff,0x7f,0xdf,0xfb,0xbe,0xff, + 0x37,0xe7,0xff,0xff,0xff,0xff,0xff,0x8f,0xff,0xff,0xeb,0xfa,0xed,0xbb,0x6e,0xdb, + 0xb6,0x7f,0xbb,0x6e,0xdb,0xf6,0x7f,0xbf,0xef,0xdb,0xf5,0xbf,0x6f,0xf9,0xf6,0xfc, + 0xff,0xbf,0xdb,0xff,0x7d,0xff,0xe7,0xdf,0xff,0xfd,0xff,0xff,0xff,0xe8,0xff,0xff, + 0xfd,0x7f,0x6e,0x5b,0x96,0xe5,0xb9,0x7f,0xdf,0x97,0xe5,0xb5,0x7f,0xdf,0xf6,0xd5, + 0xb5,0xdf,0x97,0xfd,0xf5,0x6d,0x7b,0xfd,0xd7,0x7f,0xff,0x7b,0xfd,0xe7,0xff,0xfe, + 0x7f,0xff,0xff,0xf9,0xbb,0xfd,0xff,0xaf,0xfb,0x23,0xc8,0xf2,0x3c,0x8f,0x7b,0xc8, + 0xf2,0x3c,0x0f,0x7b,0xde,0xf0,0x3c,0x1b,0xc0,0xf7,0xbc,0x0f,0x07,0x7e,0xf0,0x67, + 0xfd,0x87,0xdf,0xb0,0x77,0xff,0x87,0xff,0xff,0xff,0xb7,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xef,0xef,0xfb,0xfd,0xff,0xbe,0xf7,0x7f, + 0xff,0xbd,0xff,0xcf,0xdb,0xff,0xbf,0xff,0xff,0xfd,0xf2,0x7f,0xff,0xff,0xff,0xbf, + 0xf2,0xff,0xff,0xab,0xeb,0xf8,0xbe,0xaf,0xaf,0xea,0xf8,0x7e,0x1f,0x85,0xea,0xfa, + 0x3e,0x9f,0xaf,0xeb,0xfe,0xbf,0xa7,0xe9,0xda,0x3e,0x8f,0xab,0xeb,0xfa,0xbe,0xbf, + 0x2e,0xeb,0xfa,0xde,0xbf,0xaf,0xfe,0x1f,0xff,0xff,0xff,0xfc,0xff,0x3f,0xcd,0xf3, + 0xfc,0x3f,0x7f,0xcf,0xf3,0x3e,0xfb,0xbf,0xed,0xbb,0x7f,0x3f,0xcf,0x73,0xfc,0xff, + 0xbf,0x3b,0xf3,0xff,0xef,0x3e,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xa9,0xff,0xff, + 0xff,0xbf,0x3f,0xcf,0xd3,0xec,0xff,0x7f,0xff,0xb1,0xfa,0x6c,0xff,0xbf,0xd5,0xbb, + 0xfb,0xcb,0xd7,0xde,0x72,0xdb,0x3e,0xdf,0xf3,0x7f,0xff,0xaf,0xef,0xef,0xff,0xff, + 0xff,0xff,0xff,0xee,0x6f,0xff,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xf7,0xfd,0xdb, + 0xff,0xff,0xfa,0xfe,0xbf,0xfe,0xfe,0xbf,0xdb,0x37,0x6f,0xf7,0xef,0xff,0xff,0xdf, + 0xfd,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x67,0xf7,0xff,0xeb,0xff,0xbf, + 0xff,0xff,0xfd,0xfa,0x76,0xff,0xaf,0xdb,0xfe,0x7f,0x9f,0xaf,0xe7,0xfa,0xbf,0xaf, + 0x4b,0xd9,0xe6,0x5d,0x9f,0xff,0xf8,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0x81,0xff,0xff,0xff,0xde,0xfd,0xbf,0xef,0xf3,0xff,0xef,0xfb,0xdd,0xff,0xff,0x7f, + 0xdf,0xf6,0xf7,0xff,0x37,0x7e,0xf6,0xbe,0xff,0x7f,0x7f,0xff,0xfa,0x7f,0xff,0xff, + 0xff,0xfd,0xfe,0xff,0xff,0xff,0xff,0x1f,0xff,0xff,0xff,0xff,0xfc,0x5f,0xdf,0xcf, + 0xef,0xaf,0xfe,0x3f,0xae,0x7b,0xff,0xff,0x37,0xfd,0xeb,0xfe,0xff,0xff,0xff,0xbc, + 0xff,0xfb,0xff,0xff,0xbf,0xef,0xbb,0xff,0xff,0xff,0xff,0xfb,0xfe,0x57,0xff,0xfb, + 0xfe,0xfd,0x7b,0x7f,0xd7,0xf6,0xff,0xff,0x4f,0xd6,0xb1,0x7c,0x7f,0x6f,0xdf,0x6f, + 0xff,0xff,0xfb,0x56,0xff,0xbf,0x7f,0xff,0xee,0xff,0xbf,0xef,0xcf,0xfe,0x7f,0xff, + 0xff,0xff,0xff,0xfa,0xed,0xff,0xff,0xff,0xff,0xdb,0xf7,0xfd,0xbf,0x7d,0xff,0xff, + 0xdb,0xef,0xff,0xef,0xfe,0xff,0xff,0x3f,0xef,0xf6,0xf5,0xff,0xef,0x7f,0xbf,0xfd, + 0xfd,0xff,0xfe,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0x9f,0xff,0xff,0xff,0xfb,0x7f, + 0xcf,0xff,0xfd,0xf1,0xff,0xfb,0xfd,0xff,0xdf,0xbf,0xf7,0xef,0x7f,0xd7,0xf6,0x1f, + 0xbf,0x6e,0x74,0x7f,0xff,0x05,0xef,0xdb,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xff, + 0xab,0xff,0xff,0xff,0xff,0xbf,0xff,0xfe,0xff,0xcf,0xaf,0xff,0xbe,0xff,0xfb,0xe3, + 0x7f,0xff,0xff,0xee,0xff,0xfd,0xaf,0xaf,0xff,0xef,0xff,0xfe,0xdf,0xff,0xff,0xff, + 0xff,0xee,0xff,0xff,0xff,0xff,0xf7,0x3f,0xff,0xff,0xf7,0xf3,0xf4,0xfd,0x3f,0xef, + 0xff,0x7f,0xfd,0x1f,0x5f,0xff,0xfd,0xff,0x7d,0xef,0xff,0xef,0xfb,0xdf,0xbb,0xed, + 0xfb,0xf6,0xff,0xbf,0x7e,0xdd,0x7f,0xff,0xff,0xff,0xff,0xff,0xfe,0x0f,0xf7,0xfd, + 0xff,0xfe,0xff,0xbb,0xef,0xeb,0xbf,0xdf,0xfe,0xed,0x7b,0x3f,0xff,0x9f,0xfe,0xff, + 0x3f,0xf7,0xaf,0xf5,0xff,0xff,0x76,0xfd,0xfd,0xfa,0x7f,0xff,0xef,0xff,0xff,0xf7, + 0xff,0xfe,0xff,0xf1,0xff,0xff,0xff,0xff,0x3e,0xf7,0xfd,0xff,0xff,0xfb,0xff,0xfd, + 0xff,0x7f,0xff,0xd7,0xf7,0xff,0xef,0xbd,0xbf,0xff,0xef,0xff,0xff,0xff,0x7f,0xdf, + 0xff,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xfa,0x2f,0xff,0xff,0xff,0xfe,0xff, + 0xbf,0xef,0xfb,0xff,0x4b,0xbf,0xef,0xfb,0xff,0x4f,0xb5,0xef,0xbb,0xff,0xbf,0xef, + 0xf9,0xfe,0xfb,0xbf,0xef,0xbb,0xff,0xff,0x7f,0xef,0xf3,0xff,0xff,0xff,0xff,0xfd, + 0x33,0xbf,0xff,0xff,0xff,0xdf,0xf7,0xcd,0xff,0x6a,0xff,0x7f,0xdd,0xff,0x7e,0xff, + 0xbe,0x9f,0xf7,0x7f,0x77,0xcb,0xff,0x7d,0xdf,0x6f,0xdd,0xf6,0xff,0xff,0xff,0xcd, + 0xff,0x7f,0xff,0xff,0xff,0xfd,0x64,0xb7,0xff,0xff,0xff,0xff,0xef,0xff,0xf3,0xbc, + 0xae,0x7e,0xff,0xf5,0xbf,0xef,0xfa,0xff,0xbf,0xbc,0xef,0xcb,0xf3,0xbd,0x6f,0xef, + 0xfe,0xfe,0xf9,0xaf,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xf3,0xbf,0x1f,0xff,0xff, + 0xff,0xff,0xed,0xfb,0xfe,0xdf,0xb3,0xff,0xff,0x7e,0xf7,0xff,0xff,0xff,0x7c,0xdf, + 0x9d,0x79,0x7e,0xf7,0x95,0xfd,0xff,0x5f,0xdf,0x95,0xff,0xf9,0x7f,0xff,0xff,0xff, + 0xff,0xfe,0xfd,0xd9,0xff,0xff,0xff,0xfe,0xbe,0xad,0xbb,0x23,0xd1,0x93,0x3f,0xfb, + 0xa3,0xfe,0xb3,0x2f,0xdb,0x7b,0xf5,0xfe,0xdb,0x23,0xff,0xff,0x6d,0xff,0xf6,0xdd, + 0xff,0xff,0xff,0x57,0xff,0xff,0xff,0xff,0xef,0xe2,0x7f,0xfb,0xff,0xff,0xd5,0xf5, + 0xbd,0xee,0xd9,0xbf,0xe7,0xfd,0x7f,0x7f,0xde,0xa7,0xd1,0x6e,0x7d,0xb7,0xfd,0xee, + 0x7f,0xdf,0xd7,0xb9,0xfd,0x7b,0x3d,0xff,0xff,0xe6,0xff,0xff,0xff,0xff,0xff,0xf6, + 0x2f,0xfe,0xff,0xff,0xfa,0xfe,0xff,0xaf,0xab,0xfa,0xf2,0xb7,0xef,0xeb,0xfa,0xf6, + 0xbf,0xed,0xbb,0xfe,0xff,0xbd,0xab,0xfe,0xff,0xbe,0xef,0xfb,0xea,0xff,0xfd,0x2f, + 0xff,0xff,0xff,0xff,0xff,0xff,0xa5,0xbf,0xff,0xff,0xff,0x5b,0xde,0xf5,0xbd,0x6f, + 0x70,0x56,0xf5,0xbd,0x6f,0x78,0x5e,0xf5,0xbd,0xef,0xd6,0xf7,0xbd,0x6f,0x5b,0xde, + 0xf5,0xbd,0xef,0x5f,0xff,0xa5,0xbf,0xff,0xff,0xff,0xff,0xff,0xf8,0x97,0xef,0xff, + 0xff,0xff,0xff,0xe7,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xff,0x9f,0xed,0xff,0xfe, + 0xff,0xed,0xff,0xfe,0xff,0xff,0xff,0xfb,0xfe,0xff,0xff,0xff,0xf9,0xff,0xff,0xff, + 0xff,0xff,0xfe,0x97,0xfe,0xbf,0xff,0xff,0xdb,0xff,0xff,0xbf,0xef,0x9b,0xf6,0xbd, + 0xff,0x67,0xfb,0xf7,0xff,0xff,0x63,0xf7,0xff,0xff,0x7b,0xd9,0xfe,0x7d,0x8f,0xeb, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xe8,0x7f,0xbe,0xff,0xbf,0xef,0x9b, + 0xd6,0xf1,0xbe,0x66,0xfb,0xbe,0xff,0xbf,0x6f,0xbb,0xf6,0xf5,0xbf,0x7b,0xfe,0xff, + 0xbf,0xef,0xfb,0xfe,0xf5,0xbb,0xef,0xdb,0xd6,0xff,0xbf,0xef,0xfb,0xfe,0xfd,0xf8, + 0x9f,0xff,0xff,0xff,0xff,0xdb,0xff,0xff,0xbf,0xcf,0xfb,0xfe,0xff,0xff,0x7f,0xff, + 0xf6,0xff,0xbf,0x6f,0xfe,0xff,0xff,0xef,0xff,0xff,0xff,0xbf,0xff,0xdf,0xfe,0xff, + 0xff,0xff,0xff,0xff,0xfd,0xbd,0x83,0xff,0xff,0xff,0xff,0xed,0xff,0xff,0xbf,0xfb, + 0xfd,0xfe,0xff,0xff,0xff,0xff,0xfe,0xff,0xef,0xef,0xff,0x7f,0xff,0xfb,0xff,0xff, + 0xff,0xdf,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xdf,0xf1,0x7f,0xff,0xff, + 0xfe,0xd6,0xb5,0xaf,0x6f,0xdb,0xf0,0xfd,0xaf,0x6b,0x5b,0xf6,0xfd,0xbf,0x6b,0x5b, + 0xfd,0xbf,0x6f,0xdb,0xf6,0xf5,0xad,0x6f,0xdb,0xf7,0xfd,0xed,0x6f,0xff,0xd7,0xff, + 0xff,0xff,0xff,0x2f,0xff,0xff,0xff,0xda,0xb7,0xad,0xbb,0x6e,0xfb,0x2e,0xe9,0xba, + 0x6a,0xbb,0xb7,0xab,0xab,0xea,0xbe,0xeb,0xeb,0x7a,0xbb,0xae,0xaf,0xaa,0xee,0xfe, + 0x7e,0xdf,0xbb,0xff,0xfa,0x7f,0xff,0xff,0xff,0xd8,0xff,0xff,0xff,0xff,0xdf,0xf7, + 0xfd,0xff,0x7f,0xff,0xf7,0x7d,0xff,0xff,0xdf,0xf7,0x7d,0xfd,0xf7,0xf7,0x7d,0xdf, + 0x7f,0xdf,0xf7,0x7f,0xcd,0x77,0xdf,0xb7,0xfd,0xff,0xff,0x5f,0xff,0xff,0xff,0xfb, + 0xbf,0xff,0xfe,0x7f,0x9b,0x87,0xe1,0xb8,0x6e,0x1d,0xc3,0xe8,0xf8,0x7e,0x0f,0xa6, + 0xf0,0xb8,0x6e,0x1b,0xe1,0xbc,0x6e,0x0f,0x86,0xe9,0xf8,0x2f,0x9b,0x83,0xf9,0xf8, + 0x7f,0x8b,0x87,0xf9,0xfe,0x7f,0x47,0xfd,0xff,0xff,0xff,0xbf,0x5f,0xf7,0xfd,0xff, + 0x7e,0x5f,0xf7,0xfd,0xfd,0x7f,0x5f,0xbf,0xfd,0xff,0x5f,0xf7,0xe5,0xfd,0x7f,0x7f, + 0xf7,0xfd,0xff,0x77,0xdf,0xd7,0xff,0xff,0xb7,0xff,0xff,0xff,0xf2,0xff,0xff,0xff, + 0xff,0xf6,0xdb,0xd3,0xec,0xfb,0x3f,0x6b,0xf6,0xed,0xbb,0x2e,0xab,0xfe,0xec,0xfb, + 0x4b,0xb3,0xf6,0xbb,0x2e,0xcf,0xee,0xec,0xff,0xef,0xcf,0xfb,0xed,0xff,0xf7,0x5f, + 0xff,0xff,0xfc,0x5f,0xff,0xff,0xff,0xfd,0xe7,0x75,0xde,0x77,0x9f,0xff,0xf5,0xde, + 0x77,0x9f,0xff,0xfb,0xfe,0x7f,0x9f,0xf9,0xdf,0xff,0x9f,0xe7,0xf7,0xde,0x7f,0xfd, + 0xe7,0x7f,0xde,0x7f,0xff,0xf7,0xff,0xff,0xff,0xc3,0xff,0xff,0xff,0xff,0xb2,0x7d, + 0x1b,0x26,0xc9,0xf5,0xfc,0x1b,0x26,0xc9,0xf3,0xfd,0xfb,0x27,0xc9,0xfc,0x8f,0x5f, + 0xc9,0xf2,0x7d,0xfb,0x27,0xdf,0xb8,0x3f,0xff,0x27,0xff,0xd8,0x7f,0xff,0xff,0xf3, + 0x37,0xff,0xff,0xff,0xff,0xf2,0xff,0xff,0xff,0xc9,0xf6,0xff,0x2f,0xc7,0x4a,0xf2, + 0x7f,0x3f,0xff,0xe2,0xfc,0xbf,0x4f,0xdf,0xf6,0xfd,0xff,0x6f,0xfd,0xff,0x7f,0xff, + 0xff,0xff,0xff,0xff,0xff,0xfe,0x8f,0xfe,0xfa,0x7e,0x8f,0xa2,0xe2,0xfa,0xbe,0xb5, + 0xaf,0x68,0xfa,0x5e,0xbf,0xaf,0xeb,0xf8,0xbe,0xbf,0xeb,0x7a,0xf6,0xbd,0xad,0x63, + 0xd8,0xd6,0xbf,0xab,0xeb,0xfa,0xfe,0xbf,0xaf,0xeb,0xfa,0xff,0xed,0xff,0xff,0xff, + 0xff,0xcb,0xf3,0xfc,0xff,0x3f,0xff,0x1f,0xfc,0xbf,0x33,0xb7,0xaf,0x3f,0x6f,0x3f, + 0xe1,0xfb,0xdf,0x3e,0xcf,0x9f,0xfc,0xbd,0xd7,0xff,0xff,0xfc,0xfb,0x3f,0xff,0xff, + 0xff,0xff,0xfb,0x9f,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0x7f,0xbe,0x3f,0xef,0xff, + 0xff,0xbf,0xff,0xed,0xf7,0xff,0x7f,0x7b,0xfd,0xff,0xdf,0x3f,0xff,0xff,0xff,0xdf, + 0xff,0xfb,0xff,0xbf,0xdf,0xff,0xff,0xff,0xfe,0xe7,0xfe,0xff,0xff,0xfd,0x7f,0x5f, + 0x57,0xd5,0xff,0xfb,0xff,0x95,0xd5,0xbb,0xaf,0xfb,0xff,0xf4,0xff,0x5d,0xff,0xe4, + 0xfd,0x7f,0xf3,0xd7,0x7f,0x6f,0xfd,0xff,0xd7,0xfd,0xff,0xff,0xff,0xff,0xff,0xe8, + 0x7f,0xff,0xff,0xff,0x8f,0xff,0xff,0xff,0xf3,0xff,0xeb,0xda,0xf6,0xbf,0x87,0xa1, + 0xff,0xde,0xde,0xab,0xff,0x7e,0xdf,0x3d,0x6d,0x9b,0xfe,0xb7,0xf7,0xfd,0xff,0x7f, + 0xdf,0xbf,0xff,0xff,0xff,0xf8,0xdf,0xef,0xff,0xff,0xfb,0xff,0xfe,0xff,0xbf,0xff, + 0xfd,0xbf,0x6d,0xdb,0xff,0x7f,0xfb,0xff,0xb7,0xf1,0xbf,0xff,0xfb,0xdd,0xf7,0x7f, + 0xdf,0xdb,0xdf,0xeb,0xff,0xff,0xff,0xdd,0xdf,0xff,0xff,0xff,0x89,0xff,0xff,0xff, + 0xff,0xf7,0x7f,0xfb,0xfc,0xff,0x37,0xcf,0xf3,0x7c,0x56,0xbf,0x2e,0xf3,0x5c,0xa6, + 0xef,0xbf,0xfe,0x7f,0x3f,0xef,0xf3,0xbe,0x6f,0xfb,0xfe,0xff,0xff,0xaf,0xff,0xff, + 0xff,0xff,0xe6,0x7f,0xff,0xbf,0xef,0xff,0xff,0xfc,0xaf,0xfb,0xd7,0xb4,0xfd,0x7f, + 0x5f,0xdd,0xf6,0xd5,0xff,0x7f,0x9f,0xfd,0x5f,0xff,0xff,0xf2,0xff,0xbb,0xff,0xdb, + 0xff,0xff,0xbf,0xff,0xff,0xff,0xff,0xef,0xff,0x2f,0xff,0xff,0xff,0xff,0xfb,0xff, + 0xef,0xff,0xdf,0xfd,0xff,0xff,0xff,0xfb,0x1e,0xdb,0xeb,0xfa,0xfb,0xcb,0xff,0x7d, + 0xff,0xff,0xbb,0xff,0xbd,0xd3,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf9, + 0xbb,0xff,0xff,0xff,0x1f,0xaf,0xef,0xfb,0xee,0xf7,0xff,0x7b,0xda,0xfe,0x3f,0xbf, + 0xaa,0xfb,0xfc,0x6b,0xeb,0xf8,0x77,0xbb,0xff,0xf3,0xbc,0xef,0x0f,0xef,0xf1,0xff, + 0xff,0x5f,0xff,0xff,0xff,0xdc,0x3f,0x7f,0xff,0xff,0xfb,0xfd,0xf7,0xfb,0xfc,0xfe, + 0xff,0xff,0x7d,0xdf,0xe7,0xff,0xff,0x7f,0xff,0x6f,0x7f,0xbf,0xef,0xfb,0xff,0xfe, + 0x7f,0x9f,0xfd,0xfd,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0x43,0xff,0x7d,0xff, + 0xbf,0x9f,0xff,0xff,0xb5,0x6f,0x77,0xdd,0xf7,0x7d,0xef,0xfa,0xff,0xf7,0x7d,0xfe, + 0xff,0xb7,0x3f,0xd9,0x6e,0x5f,0x97,0xef,0xf7,0xff,0xff,0xd7,0xff,0xff,0xff,0xff, + 0xff,0xff,0xe8,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbb,0xed,0xfb,0xf6,0xdf, + 0xb6,0xed,0xfb,0x7c,0x9f,0x37,0xff,0xfe,0xdf,0xe7,0xe7,0xf9,0x4e,0xbb,0xff,0xae, + 0xff,0xfa,0x7b,0xff,0xff,0xff,0xff,0xff,0xfd,0x9b,0xef,0xff,0xff,0xff,0xff,0xff, + 0xff,0xef,0xf3,0xfc,0xdb,0x3f,0xcf,0xfb,0xda,0xcf,0xd7,0xf7,0xff,0xff,0x5d,0xbf, + 0xfb,0xff,0x5f,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xc3, + 0xbf,0x5f,0xff,0xfe,0xdf,0xf1,0xfe,0x7f,0x92,0xe9,0xbb,0xee,0x9b,0xb2,0xec,0xbf, + 0xef,0xcb,0xf5,0x2b,0xee,0xd3,0xbe,0xa9,0xab,0xee,0x9a,0xa7,0xef,0xfb,0xec,0xff, + 0xff,0xff,0xff,0xff,0xff,0xdb,0x3f,0xff,0xff,0xff,0xdf,0xfe,0xfc,0xdf,0x36,0xb7, + 0xad,0xa7,0x53,0xda,0x77,0xfd,0xe7,0x7f,0xdc,0xfc,0xff,0x3a,0xd7,0xf3,0x3d,0xff, + 0x33,0xdf,0xe6,0xf6,0xe5,0xff,0xff,0xff,0xff,0xff,0xff,0xd6,0x6f,0x7f,0xff,0xff, + 0xfb,0xdf,0xff,0xef,0x5b,0xde,0x97,0xad,0xef,0x7a,0xde,0xb7,0xb5,0xef,0x7b,0x5f, + 0xb5,0xed,0x7b,0xde,0xd7,0xad,0xef,0x7a,0xdb,0xa7,0xbf,0xbb,0xff,0xff,0xff,0xff, + 0xff,0x3b,0xc0,0xff,0xff,0xff,0xff,0x7f,0xff,0x37,0xfd,0xfa,0x7e,0x9f,0xa7,0xe9, + 0xfa,0x7e,0x9f,0xa7,0xe9,0xfa,0x9f,0xa7,0xe9,0xfa,0x7e,0x9f,0xa7,0xe9,0xfa,0x7c, + 0xd7,0xf7,0xff,0xff,0xff,0xff,0xff,0xe7,0xdd,0x9f,0xff,0xff,0xff,0xef,0xff,0xff, + 0xf5,0x7d,0x5b,0x7e,0xcd,0xb3,0x6c,0xdb,0x36,0xcd,0xb3,0x6d,0x5e,0xdd,0xb5,0x6d, + 0xdb,0x7e,0xd5,0xb7,0x6d,0x4f,0x7f,0xd4,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x02, + 0xff,0xff,0xff,0xfd,0xdf,0xff,0xfe,0xff,0xbd,0xde,0x77,0xdd,0xa7,0x69,0xdf,0x77, + 0xdd,0xa7,0x7b,0x76,0x1d,0x67,0x61,0xde,0x75,0x9d,0x87,0x59,0xdf,0x79,0x9d,0xff, + 0xff,0xff,0xff,0xff,0xff,0x6c,0xdf,0xff,0xff,0xff,0xbf,0xff,0xfa,0xfe,0xbf,0xbb, + 0x2e,0xfb,0x9e,0xff,0xbb,0xee,0xfb,0xa6,0xec,0x6e,0xfb,0xde,0xff,0xbd,0x2f,0xfb, + 0xf6,0xf7,0xef,0x7b,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xf8,0x03,0xff,0xff,0xff, + 0xf7,0xef,0xfa,0x5b,0xd6,0xfd,0x87,0x6f,0xdb,0xf4,0xfd,0xbf,0x6a,0xda,0xb6,0xbf, + 0x6f,0xd0,0xf4,0xfd,0x07,0x43,0xd0,0x74,0x3d,0x21,0x6f,0x7f,0xff,0xff,0xff,0xff, + 0xff,0xff,0xe3,0xfe,0xff,0xff,0xff,0xfe,0xfe,0xff,0xff,0xfe,0xdb,0xb6,0xed,0xbb, + 0x6e,0xdb,0xb6,0xed,0xbb,0x6b,0xb6,0xed,0xbb,0x6e,0xdb,0xb6,0xed,0xbb,0x6f,0xdb, + 0xfe,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xe2,0x7f,0xeb,0xff,0xff,0xff,0xff,0xfb, + 0xfb,0xff,0xf9,0xae,0x4f,0x93,0xe4,0xf9,0x3e,0x4f,0x93,0xe4,0xfe,0x4f,0x93,0xe4, + 0xf9,0x3e,0x4f,0x93,0xe4,0xf9,0x3f,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xe7, + 0xfb,0xef,0xfb,0xfe,0xff,0xbf,0x6e,0xdb,0xf2,0x2e,0x8f,0xa3,0xe9,0xfa,0x1e,0x8f, + 0xa3,0xe8,0xfe,0x8f,0xa7,0xe9,0xfa,0x7e,0x9f,0xa7,0xe9,0xfa,0x75,0xbb,0xef,0xfb, + 0xfe,0xff,0xbf,0xef,0xdf,0xb1,0xff,0xff,0xff,0xff,0xff,0xff,0x6f,0xdb,0xf7,0x7f, + 0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xf7, + 0xfd,0xff,0x7f,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xdb,0xdf,0x3f,0xff,0xff,0xff, + 0xff,0xff,0xf7,0xfd,0xff,0xef,0xfb,0x7e,0xdf,0xb3,0xed,0xfb,0x7e,0xdf,0xb7,0xfb, + 0x7e,0xcf,0xb3,0xec,0xfb,0x3e,0xcf,0xb3,0xec,0xef,0xff,0xff,0xff,0xff,0xff,0xff, + 0xfd,0xff,0xd7,0xff,0xff,0xff,0xfd,0x7f,0x5f,0xf6,0xf5,0xaf,0x2f,0x6b,0x98,0xf6, + 0xbd,0x8f,0x6b,0xd8,0xf6,0x3f,0x63,0xda,0xf6,0x3d,0xaf,0x63,0xd8,0xf6,0x3d,0x8f, + 0x5b,0xf7,0xff,0xfd,0x7f,0xff,0xff,0xff,0xfc,0xff,0xdf,0xff,0xff,0xa7,0xe9,0xdb, + 0xb6,0xef,0xb3,0xcc,0xfb,0x34,0xcf,0xb3,0xec,0xfb,0x3c,0xcf,0x6c,0xf3,0x3e,0xcf, + 0xb3,0xec,0xfb,0x3e,0xcf,0xb3,0x6a,0xfe,0x7f,0xff,0xa7,0xff,0xff,0xff,0xee,0x5f, + 0xff,0xff,0xff,0xf5,0xff,0xff,0x5f,0xd7,0x7f,0xef,0x73,0xdf,0xf7,0xfc,0xff,0x7e, + 0xde,0xf7,0xff,0x7b,0xdf,0xf3,0xbd,0xef,0x3f,0xd7,0xf3,0xfd,0x7f,0xff,0xdd,0xff, + 0xf5,0xff,0xff,0xff,0xff,0xe1,0xff,0xff,0xe7,0xf8,0xb8,0x7e,0x0b,0xa3,0xf1,0xfe, + 0x6f,0x19,0xc6,0xf1,0xbc,0x6f,0x99,0xa6,0x71,0xe6,0x9b,0xe6,0xe1,0xb8,0x6f,0x1b, + 0x86,0xf9,0xba,0x7f,0x1b,0x87,0xf8,0xb8,0x7f,0x9f,0xe7,0xfc,0x7f,0xff,0xff,0xff, + 0xfb,0x74,0x6f,0x7f,0xdf,0xd1,0xfc,0x7f,0x3f,0xcf,0xf1,0xad,0xff,0x3f,0xcf,0xfc, + 0xff,0x1f,0xdf,0xf1,0xfc,0x7b,0x3f,0xc7,0xf3,0xfd,0xfb,0x3b,0xff,0xfb,0x7f,0xff, + 0xff,0xff,0x0f,0xff,0xff,0xff,0xff,0x74,0xbb,0x3f,0xdf,0xf2,0xff,0xbf,0x67,0xd9, + 0xf6,0xff,0xbf,0xe7,0xdb,0xf5,0xbf,0x6f,0xfb,0xb6,0xfd,0xbf,0xee,0xdb,0xfe,0x7c, + 0xff,0xe6,0xdf,0xff,0x75,0xff,0xff,0xfb,0xe0,0xff,0xff,0xff,0xff,0xff,0x7f,0xdf, + 0x57,0x59,0x77,0xdd,0x97,0x65,0xd9,0x77,0xdd,0xf7,0x55,0x99,0xd9,0x57,0x7d,0xd9, + 0x74,0x5d,0xb6,0x65,0xdf,0x75,0x75,0xbd,0xf7,0xff,0xff,0x7f,0xff,0xff,0xf8,0x3f, + 0xff,0xdf,0xff,0xfd,0x87,0x61,0xf8,0x7e,0x1b,0xfb,0xe0,0xf8,0x3e,0x0f,0xdb,0xfe, + 0xf8,0x3e,0x1b,0xe0,0xff,0xbe,0x8f,0x83,0xfe,0xfa,0x3f,0xef,0x83,0xff,0x9a,0x7f, + 0xfd,0x87,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0x7d,0xff,0xff,0xff,0xff,0xff,0xef, + 0xf7,0xff,0xff,0x7f,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xbf,0xff,0xff,0xf7,0xfd, + 0xff,0x7d,0xbf,0x7e,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xf6,0xff,0xff,0xaf,0xcb, + 0xda,0xfe,0xaf,0xab,0xeb,0x7a,0xbc,0xbf,0xab,0xeb,0xf8,0x9e,0x9f,0xab,0xeb,0x5e, + 0xaf,0xa7,0xeb,0x7a,0xde,0xbf,0xad,0xeb,0xba,0xbe,0xbf,0xab,0xeb,0xfa,0xbe,0xbf, + 0xaf,0xfc,0x1f,0xfe,0xff,0xff,0xff,0xff,0xff,0xcf,0xf3,0xfc,0xeb,0x7f,0xdc,0xfb, + 0x3f,0xff,0x3f,0xfe,0xf3,0x3f,0x33,0xfe,0xb7,0xbc,0xdf,0xff,0xcf,0xff,0x77,0xfe, + 0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xfb,0xd9,0xff,0xff,0xef,0xff,0xff,0xff,0xcf, + 0xf2,0xea,0xaf,0xff,0xdf,0xfb,0x7b,0xff,0xbd,0xdf,0xf4,0xfb,0xdf,0xdf,0x5e,0xfe, + 0xaf,0xf9,0xe8,0xef,0xff,0xff,0x7f,0x7f,0xf7,0xff,0xff,0xff,0xff,0xdf,0xe4,0x7b, + 0xfb,0xfc,0xff,0xff,0xff,0xff,0x7f,0xfb,0xf9,0xfb,0xff,0x6f,0xff,0xff,0xfd,0xff, + 0xed,0xf9,0x7d,0xbf,0xff,0xff,0xfd,0x7f,0xf7,0xb3,0xff,0xff,0xbf,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xfe,0x27,0xfd,0xff,0xff,0xfb,0xff,0xf7,0xae,0xfb,0xfb,0x7e, + 0x2f,0xef,0xfb,0xfe,0x7a,0xf7,0xeb,0xbf,0xfb,0xdf,0x9f,0xe3,0xfb,0xf6,0x7f,0x7f, + 0xd9,0xff,0xba,0xbf,0xff,0xff,0xf8,0xff,0xff,0xff,0xff,0xa1,0xff,0xff,0xff,0xff, + 0xef,0xff,0xfd,0xff,0xff,0xef,0xef,0xb7,0xf5,0xff,0xf6,0xb7,0xe7,0xfb,0xfe,0x3f, + 0x7f,0xf5,0xff,0xef,0xff,0xff,0xff,0xff,0xff,0xfb,0xbf,0xff,0xfd,0xbf,0xff,0xff, + 0xff,0xfb,0x1f,0xff,0xff,0xff,0xff,0xff,0xfe,0xfb,0xae,0xbf,0xfc,0x7f,0xfb,0xfe, + 0x6f,0xff,0x5f,0x9f,0xff,0xee,0xff,0xff,0xfb,0xbb,0xae,0xff,0xff,0xae,0xff,0xba, + 0xff,0xfb,0xff,0xff,0xff,0xff,0xfe,0xfe,0xe7,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xfa,0xfd,0xbf,0x5f,0xfb,0x75,0xff,0xff,0xff,0xfd,0xff,0xf9,0x7d,0xff,0xf5,0xed, + 0xff,0x7f,0xff,0xf7,0xff,0xbe,0xef,0xf9,0xff,0xff,0xff,0xff,0xff,0xdf,0xf8,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xf3,0xed,0xbb,0xdf,0xff,0xff,0xff,0xfb,0xff,0x7f, + 0x7f,0xfd,0xfe,0xff,0xb7,0xfe,0x7d,0xdf,0xff,0xf7,0xed,0xff,0xfd,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0x1f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xe3,0xfd, + 0x7c,0xed,0x7f,0xff,0xfc,0xff,0xff,0x47,0xf4,0x6d,0x1b,0xff,0xff,0xf7,0xff,0xfd, + 0xf9,0xfe,0x77,0xff,0xf7,0xff,0xff,0xff,0xff,0x3f,0xff,0x93,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xbb,0xfe,0xff,0xff,0xff,0xff,0xab,0xff,0xdf,0x7a,0xef, + 0xfd,0xf7,0xbf,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd, + 0xff,0xf0,0x3f,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xfe,0xef,0xbf,0xfb,0xbc,0xfd, + 0xf7,0xed,0xff,0xbe,0xcd,0xff,0x75,0x5f,0xef,0xfb,0xfd,0xbb,0xde,0xdf,0xff,0x7e, + 0xff,0x5f,0xff,0xff,0xff,0xfe,0xff,0xfe,0x8f,0xfd,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xef,0xdf,0xf7,0xfb,0xff,0xfd,0x7f,0x5e,0xf6,0xfb,0xff,0xdf,0x6f,0xff,0xff, + 0xfb,0xbb,0xff,0xfb,0xff,0xff,0xff,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xe1,0x7f, + 0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xdf,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xbb,0xff,0xfb,0xff,0xff,0xff,0xfb,0x7f,0xff,0x9f,0xf7,0xff,0xfe,0xff,0xff, + 0xff,0xff,0xff,0xff,0xf9,0x0f,0xff,0xff,0xf7,0xff,0xff,0x3f,0xff,0xe7,0xfc,0xff, + 0xff,0xff,0xfd,0xff,0x99,0x3e,0xff,0xfb,0xff,0x9f,0xe7,0xff,0x3f,0xfb,0x93,0xff, + 0xef,0x3f,0xd7,0xf3,0xff,0xff,0x3f,0x7f,0xff,0xcf,0xfc,0xc6,0xbf,0xff,0xff,0xff, + 0xff,0xf7,0xff,0xff,0xbf,0xd9,0xff,0xcf,0xff,0xfe,0xf3,0x6f,0xdf,0xf2,0xfe,0x2f, + 0xcb,0xaf,0xeb,0xff,0x77,0xff,0xff,0xff,0xef,0xfe,0xbf,0xff,0xff,0xff,0xff,0xfb, + 0xfd,0x70,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf9,0x7e,0xc7,0xbf, + 0xaf,0xef,0x7b,0xe6,0xff,0xfb,0x9b,0xff,0xff,0xff,0x2f,0xfa,0xf4,0xbc,0xaf,0x29, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbd,0x1b,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xec,0xdf,0x7c,0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xbd,0xff,0x7f,0xff,0xff, + 0xe5,0xf9,0x5e,0xd7,0xb5,0xe4,0x3f,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xdb,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xfa,0xfe,0xbe,0xac,0xdb,0x7b,0xdf,0xb3,0x3f,0xff, + 0x7e,0xc9,0xfc,0xdb,0x52,0xde,0xb7,0xff,0xff,0x6b,0xdb,0xf7,0xb5,0x5f,0x7f,0xff, + 0xf7,0xff,0xff,0xff,0xf1,0x6f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x57,0xd5,0xf4, + 0xe9,0xfe,0xdb,0xfe,0xa7,0x7f,0xdf,0x7b,0xaf,0xb9,0xea,0x57,0xd5,0xff,0xff,0xdf, + 0x7b,0xfd,0xfc,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xf6,0xa7,0xff,0xff,0xff,0xd7, + 0xff,0xf7,0xff,0xeb,0xda,0xff,0xaf,0xeb,0xab,0xfa,0xfe,0xf7,0xfb,0xef,0x6e,0xbe, + 0xbf,0xeb,0xd2,0xe6,0xbf,0xaf,0xef,0xfa,0xfe,0x9f,0xfb,0x5f,0xff,0xff,0xff,0xff, + 0xff,0x85,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0x79,0x5f,0xda,0xb7,0xfd,0x7f, + 0x7f,0xdf,0xff,0xfd,0xef,0x96,0xf7,0xbd,0x4a,0x52,0x96,0xf5,0x3d,0xe3,0x53,0xd7, + 0xaf,0xab,0xff,0xf2,0xbf,0xff,0xff,0xf9,0xbe,0x7f,0xff,0xff,0xff,0xff,0xff,0xff, + 0xfe,0x9f,0x9f,0x69,0xfb,0x7e,0xdf,0xff,0xed,0xfb,0xfe,0xff,0xff,0xff,0xf6,0xdd, + 0xbf,0xef,0xdf,0xff,0xfd,0xff,0x7f,0xdf,0xff,0xfd,0xff,0xff,0xff,0x9f,0x27,0xdf, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xe7,0xfb,0xe7,0xf9,0x9f,0xef,0xff,0xfe,0x7f, + 0xef,0xeb,0xfe,0x7f,0xbe,0x7f,0x9a,0xf7,0xb9,0xff,0xff,0x9f,0xe7,0xf9,0xff,0xff, + 0x9f,0xff,0xff,0xfb,0xec,0x7f,0xfe,0xff,0xbf,0xef,0xfb,0xfe,0xff,0xbf,0xef,0xb9, + 0xf6,0x7f,0xbe,0x6f,0x5b,0xf6,0xff,0xbb,0x5b,0xf6,0xfb,0x97,0xe7,0x9b,0xfe,0x5d, + 0xbf,0xe7,0xf8,0xfe,0x3f,0xbf,0xe7,0xfb,0xfe,0xff,0xf8,0x5b,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xfb,0xfc,0xff,0xbf,0xcf,0xff,0xfc,0xff,0xbf,0xcf,0xf7, + 0xff,0xff,0xff,0xdf,0xff,0xff,0x3f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xfd,0xcb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xbf,0xef,0xfb, + 0xff,0xfe,0xff,0xdf,0xef,0x7f,0xff,0xff,0xbf,0xef,0xff,0xfe,0xbf,0xff,0xef,0xff, + 0xff,0xff,0xff,0xef,0xff,0xff,0xff,0xf8,0x5f,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0x5f,0xd7,0xb6,0x3d,0xdb,0x5f,0xf7,0xb5,0xff,0xfb,0xdb,0xfd,0xaf,0x6f,0x4b,0xd2, + 0xbd,0xbd,0x2b,0x5b,0xfa,0xfe,0x6b,0x0f,0xfe,0xfa,0xff,0xff,0xff,0xfb,0x0f,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xe9,0xfa,0x7f,0xcb,0xb2,0xea,0xfe,0xbe,0x9f,0xfb, + 0x6a,0xde,0xed,0xab,0xe8,0xfa,0x3e,0xa9,0x23,0x6e,0xff,0xbf,0xef,0xe3,0xff,0xff, + 0xbf,0xff,0xff,0xff,0xd1,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xd7, + 0xbd,0xff,0x7b,0xdd,0xd7,0xf7,0xff,0xff,0xb7,0xff,0xeb,0xfe,0xfe,0xff,0xf5,0xfd, + 0x7b,0xfd,0xfd,0x7d,0xdf,0xff,0xff,0xff,0xff,0xdf,0xfa,0xbf,0xff,0xfe,0x7f,0x9f, + 0xe7,0xf9,0xfe,0x7f,0x9f,0xe6,0x78,0xde,0x3f,0x9b,0xe6,0xf9,0xbe,0x3f,0x9e,0xf9, + 0xbe,0x7e,0x1f,0x83,0xf8,0xb8,0x3e,0x9f,0x87,0xf9,0x98,0x7f,0x9f,0x87,0xf9,0xfe, + 0x7f,0x27,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf5,0xfd,0x3f,0x4f,0xdb,0xff,0xff, + 0x7f,0x5f,0xfb,0xfd,0xff,0xdf,0xf7,0xf5,0xfd,0x7f,0xdf,0xff,0xfd,0xff,0xff,0xff, + 0xf3,0xff,0xff,0xff,0xff,0xff,0xff,0xfa,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xfe, + 0xbf,0xa7,0xed,0x7e,0xdf,0xef,0xbb,0xeb,0xff,0xde,0xb7,0xef,0x7a,0xde,0xb3,0x2c, + 0xcb,0x7f,0xcd,0xf6,0xfc,0xdf,0x7e,0xcd,0xff,0xfc,0xdf,0xff,0xff,0xfc,0x9f,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xcf,0xf7,0xfd,0xfd,0x7f,0xef, + 0xff,0xfb,0x7f,0xff,0xff,0x9f,0xe7,0xff,0xfe,0x77,0x7f,0xe5,0xff,0xce,0x7f,0xff, + 0xe7,0xff,0xff,0xff,0x93,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xff, + 0xfb,0xfb,0xfe,0xff,0xa7,0xff,0xfb,0xff,0xef,0xfb,0xff,0xe9,0xfa,0x3f,0xff,0xa7, + 0xff,0xfa,0x6f,0xfb,0xa7,0xff,0xfa,0x7f,0xff,0xff,0xf1,0x7f,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xfd,0xff,0xff,0xff,0xff,0xde,0xfc,0xfd,0xbf,0x4f,0xef,0xef, + 0x0f,0xff,0xff,0xf6,0xff,0xff,0x2f,0xff,0xff,0x37,0xdf,0xff,0xfd,0xff,0xff,0xff, + 0xfe,0x8b,0xff,0xfa,0xfe,0xbf,0xab,0xea,0xfa,0xbe,0xaf,0xaf,0xeb,0xf8,0xfe,0xb3, + 0x2f,0xca,0xfa,0xf6,0xb7,0xeb,0xfa,0xbe,0xaf,0xa3,0xeb,0xfa,0xae,0x37,0xaf,0xeb, + 0xfa,0xfe,0xbf,0xaf,0xeb,0xf2,0xff,0x49,0xbf,0xff,0xfb,0xff,0xff,0xfb,0xff,0xff, + 0xff,0xcd,0xfb,0xfc,0xef,0xff,0xf9,0xff,0x70,0x7f,0xff,0xfe,0xbf,0xff,0x3f,0xc7, + 0xc6,0xfc,0xff,0xff,0xcf,0xfd,0xfc,0xff,0xff,0xcf,0xff,0xff,0xff,0xfd,0x1f,0xff, + 0xff,0xff,0xff,0xfb,0xff,0xff,0x7f,0xeb,0xfb,0x8c,0xfe,0xff,0xbf,0xff,0xfe,0xfd, + 0xff,0xff,0xf7,0xff,0x4f,0xd3,0xdf,0xf7,0x1b,0xff,0xd3,0xff,0xfe,0xff,0xff,0xef, + 0xff,0xff,0xff,0xfe,0x77,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x3f,0xde,0xff, + 0xb6,0xef,0xfb,0xea,0xff,0xee,0xff,0xfb,0xfd,0xbf,0x5f,0x6f,0xbe,0xbf,0xbf,0xef, + 0xfb,0xff,0xff,0xf7,0xff,0xff,0x7f,0xff,0xff,0xff,0xe0,0xff,0xff,0xff,0xff,0xfb, + 0xff,0xff,0xff,0xfb,0x7f,0xea,0xdb,0xfe,0xfd,0xaf,0xea,0x6a,0xff,0xf5,0xff,0xff, + 0xbb,0xff,0xff,0x3f,0xfa,0xff,0xbb,0xff,0xef,0x7f,0xf7,0xff,0xff,0xff,0xff,0xff, + 0xfe,0x9f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xfd,0x77,0xdf,0xfb,0xfd, + 0xf7,0xfb,0xea,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xdb,0x5f,0xef,0xff,0xf7,0x75, + 0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xab,0xff,0xff,0xff,0xff,0xfb,0xf7,0xff,0xfe, + 0xff,0xe7,0xff,0xdf,0xff,0xfe,0x3f,0xcf,0xeb,0xff,0xfe,0xef,0xfb,0xbf,0x5f,0x3f, + 0xff,0xff,0xfe,0xff,0x3b,0xff,0xff,0xbf,0xef,0xef,0xff,0xff,0xbf,0xfb,0x7f,0xff, + 0xff,0xff,0xff,0xff,0xff,0xb7,0x6f,0xbf,0xff,0xbf,0xff,0xff,0xd6,0xf4,0x6c,0xbf, + 0xef,0xf4,0xfc,0xbf,0xff,0x53,0xbf,0xbb,0xff,0x78,0xdd,0xe5,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xfe,0x6f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,0xff, + 0x7f,0xdf,0xdf,0xff,0xff,0xbf,0xff,0xfb,0xcf,0x3f,0xff,0xff,0xdf,0xff,0xff,0xff, + 0x7b,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xf1,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xdf,0xf7,0x4f,0xdf,0xff,0xff,0xbb,0xef,0xf3,0xbc,0x7b,0x47,0xff, + 0xfc,0xfd,0x3d,0xdf,0xf0,0xdc,0x7f,0x0f,0xff,0x7b,0xff,0xff,0xad,0xff,0xff,0xff, + 0xfb,0x3f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xf9,0xff,0xef,0xfd,0xbd, + 0xef,0x3c,0xdf,0xde,0xed,0xef,0xff,0xef,0xfb,0xfb,0xf7,0xdf,0xf7,0xf7,0xff,0xff, + 0xdf,0xff,0xfd,0xff,0xff,0xff,0xf7,0x07,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff, + 0xf7,0xf7,0xcf,0xff,0xf5,0xdd,0x32,0xdd,0xf3,0xff,0xff,0xde,0xff,0x08,0xce,0xb7, + 0xfd,0xf3,0xed,0xff,0xbf,0xfe,0xff,0xff,0xff,0xdb,0xff,0xff,0xff,0xfa,0x7f,0xff, + 0xff,0xff,0xff,0xff,0x7f,0xdf,0xff,0xf7,0xfb,0xb6,0xff,0x9f,0xed,0xf3,0x6c,0xfb, + 0xfd,0x6b,0xf7,0xdf,0xbf,0xfd,0xff,0x7c,0xdf,0xa7,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xf7,0xf9,0x5f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdc,0xff, + 0xdf,0xf5,0xfd,0xfb,0x7e,0xdf,0xff,0xed,0xff,0xff,0xfa,0xff,0xbf,0xff,0xdf,0xfb, + 0xff,0xff,0xfb,0xff,0xff,0xef,0xff,0xfb,0xff,0xff,0xc0,0xfe,0x7f,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xdf,0xf2,0x7c,0x7b,0xff,0x8c,0xf9,0x3e,0xff,0xb5,0xfa,0x7d, + 0xff,0xb3,0xef,0xf3,0xee,0xfe,0xd3,0xef,0xbf,0x3e,0xff,0xff,0xff,0xff,0xff,0xff, + 0xd1,0x6b,0xe7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf2,0xe7,0xff,0xff,0xfc, + 0x3f,0xcf,0xff,0xee,0x62,0x8f,0xfa,0xef,0xfb,0xfe,0xe9,0xaf,0x1f,0xff,0xf9,0xe7, + 0xff,0xff,0xff,0xff,0xff,0xff,0xd7,0x6f,0x7f,0xff,0xff,0x9a,0xff,0xff,0xff,0xff, + 0x9a,0xff,0xbf,0xfb,0xef,0x9d,0x73,0x4c,0xd2,0x6b,0x57,0xbf,0xd7,0xeb,0xff,0xf4, + 0xb7,0xbe,0x6b,0xff,0x93,0xff,0xfb,0xff,0xd2,0xff,0xff,0xff,0xfb,0xe9,0xff,0xff, + 0xff,0xf9,0x5f,0xff,0xff,0xff,0xfb,0x5f,0xdf,0xff,0xff,0xff,0xf6,0x7d,0x9f,0x6d, + 0x7b,0xdf,0xbe,0xe5,0x7f,0xfe,0xd7,0xf7,0xfd,0x7f,0xfe,0x7f,0xff,0xff,0xff,0x5f, + 0xff,0xff,0xcf,0xd8,0x3f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xaf,0xbf,0xfe,0xff, + 0xff,0xbc,0xdf,0xf7,0xd5,0xf6,0x7d,0xbf,0xd1,0xff,0x7d,0xeb,0x6f,0xfe,0xf7,0xac, + 0xcb,0x7a,0xcd,0xf7,0xff,0xff,0x7f,0xff,0xff,0xfe,0x76,0xff,0xff,0xff,0xff,0xdf, + 0xff,0xff,0xf5,0x7f,0xdf,0x77,0xbf,0xff,0x6b,0xd4,0xf6,0xbd,0x4f,0x7e,0xf7,0xbd, + 0x4f,0x7d,0x5f,0xf7,0xdd,0xf5,0x69,0x5f,0x5b,0xbf,0xff,0xff,0xdf,0xff,0xff,0xff, + 0x62,0xdf,0xff,0xff,0xff,0xaf,0xff,0xff,0xfe,0xbf,0xaf,0x5b,0xcf,0xfe,0xef,0xdf, + 0xf7,0xfd,0xfe,0xb5,0xea,0xc5,0xf4,0xb9,0xaf,0x4b,0x7b,0xfe,0xa9,0xaf,0x5f,0x6f, + 0xbf,0xff,0xae,0x7f,0xff,0xff,0xfa,0x5f,0xff,0xff,0xff,0xf5,0xff,0xff,0xff,0xd7, + 0xf5,0xfd,0xfd,0xff,0xff,0xff,0xff,0xcf,0xf2,0x94,0x99,0x63,0xfe,0xd4,0xa5,0x0d, + 0x7f,0x73,0xd6,0xa5,0x2f,0xff,0xfa,0xbf,0xf5,0x3f,0xff,0xff,0xff,0xb3,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xb9,0xe6,0x79,0x9f, + 0x7b,0xf6,0xfb,0x8f,0x7f,0xdf,0xff,0xfd,0xff,0x7f,0xde,0xff,0xfd,0xff,0xed,0xdf, + 0xff,0xff,0xff,0xed,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xfe,0x67,0x9f,0xe7,0xfe,0x6b,0xf9,0xe7,0xf9,0xff,0xff,0x9f,0xe7, + 0xf9,0xff,0xef,0x9f,0xfe,0x79,0xff,0xff,0xff,0xfe,0x67,0xff,0xef,0xfb,0xfe,0xff, + 0xbf,0xef,0xfb,0xfe,0xff,0xbf,0xef,0x5b,0x76,0xfd,0x9f,0x65,0xd9,0xfd,0x8e,0x6f, + 0xf9,0xfe,0x55,0xbf,0xe7,0xd8,0xfe,0x7f,0xbe,0xe3,0xfb,0xfe,0x5f,0xbf,0xef,0xff, + 0xb5,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xfd,0xfd, + 0xbf,0xdf,0xdb,0xff,0xff,0xdf,0xff,0xff,0xff,0xbf,0xff,0xf7,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xfb,0xd9,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xfb,0xff,0xfb,0xde,0xbf,0xae,0xfb,0xf7,0xff,0xbf,0xfb,0xfe,0xbf, + 0xff,0xef,0xff,0xfe,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xfe,0xff,0x15,0xff,0xff, + 0xff,0xff,0xff,0x5f,0xd7,0xe5,0xff,0xff,0xdf,0xb7,0xff,0xff,0xff,0xe3,0xf8,0xfc, + 0xbf,0x43,0xff,0xfc,0x3f,0x8e,0xde,0xf2,0xbc,0x29,0x0f,0x7f,0xf8,0xe5,0xef,0x8f, + 0xff,0xff,0xff,0xe2,0xff,0xff,0xff,0xff,0xff,0xe9,0xfa,0x7e,0x9f,0xff,0xf9,0xfe, + 0x7f,0xef,0xfb,0xfe,0xff,0xbc,0xcf,0x68,0xff,0xbf,0x8d,0xfb,0xed,0xfe,0x3f,0x8f, + 0xa3,0xfa,0xdf,0xbe,0x9f,0xfb,0xff,0xff,0xff,0xff,0x9f,0xfb,0xff,0xff,0xff,0xfd, + 0x7f,0x5e,0xd7,0xff,0xfb,0x7f,0xdf,0xff,0x7f,0xff,0xbb,0xf7,0xf7,0xf9,0xdf,0xff, + 0xf7,0xff,0xff,0x7f,0xdf,0xb7,0xf5,0x7f,0xff,0xef,0xff,0xfe,0xff,0xff,0xff,0xff, + 0xd3,0xff,0xff,0xe7,0xf9,0xfe,0x2f,0x8b,0xe2,0xf9,0xfe,0x6f,0x9b,0xe7,0xf9,0xfe, + 0x7f,0x9f,0xe3,0xf9,0xbf,0x9f,0xe6,0x61,0xd8,0x3f,0x9b,0x86,0x78,0xb8,0x7f,0x9f, + 0x87,0xf9,0xf8,0x7f,0x9f,0xe7,0xf1,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xe7, + 0xff,0xfc,0x7f,0x7f,0xef,0xfb,0xfe,0x7f,0xbf,0xc7,0xfd,0xff,0xbf,0xc7,0xb9,0xed, + 0xff,0x7e,0xcf,0xfb,0xe7,0xff,0x9e,0x5f,0xfb,0xef,0xff,0xff,0xfe,0xaf,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xef,0xfb,0x7f,0x3f,0xef,0xf3,0xef, + 0x7f,0xb7,0xfb,0xfb,0x27,0xc8,0xff,0xec,0x8d,0x7f,0x49,0xb7,0xfc,0x8b,0xff,0xc9, + 0xff,0xff,0xff,0xc8,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xfd, + 0xff,0xbf,0xff,0xff,0xff,0xff,0x7f,0xbf,0xfe,0xff,0x79,0xfe,0x77,0xfd,0xe7,0x7f, + 0xfe,0x7f,0xff,0xe7,0xff,0xee,0x7f,0xff,0xff,0xfd,0x3b,0xff,0xdf,0xff,0xff,0xff, + 0xff,0xff,0xf7,0xff,0xfe,0x7f,0xbf,0xef,0xff,0xff,0xff,0xff,0xbf,0xff,0xff,0xff, + 0xee,0xff,0xbb,0xff,0xbb,0xbf,0xff,0xbf,0xff,0xfb,0xff,0xff,0xbf,0xff,0xff,0xff, + 0xc7,0xff,0xff,0xff,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xf6,0xfd,0xbf, + 0x6b,0xd8,0xff,0xee,0xfb,0xdb,0xff,0xff,0xef,0xfe,0xfb,0xf6,0xff,0xff,0x4f,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xf6,0xff,0xff,0xab,0xea,0xfa,0xbe,0xbf,0xad,0xea, + 0xfa,0xfe,0x9f,0xa3,0xe9,0x68,0xba,0xb6,0xa7,0xe8,0xfc,0x2e,0xab,0xcb,0x7a,0xbe, + 0x2f,0xaf,0xaa,0xfa,0xd6,0xaf,0xa3,0xeb,0xfa,0xfe,0xbf,0xaf,0xfe,0x1f,0xff,0xff, + 0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xfb,0xdf,0xff,0x80,0xfd,0xff,0x5f,0xdf,0xf3, + 0x7f,0xfb,0xcd,0xff,0xff,0xff,0xff,0x4f,0x7f,0xff,0xdf,0xf7,0xff,0xff,0xfc,0xf7, + 0xff,0xff,0xff,0xb9,0x7d,0xbf,0xf7,0xff,0xff,0xfb,0x7f,0xff,0xff,0xfd,0xff,0xdf, + 0x7b,0xfb,0xff,0xf7,0xff,0xb2,0xef,0xff,0xcf,0xbf,0xef,0xff,0xff,0x77,0xef,0xf7, + 0xff,0xff,0x7f,0xf7,0xf7,0x7d,0xff,0xff,0xfd,0xe7,0x7d,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xb3,0xb6,0xec,0xc3,0x7f,0xff,0xff,0xfe,0xe6, + 0xf7,0xff,0xff,0x7a,0xe8,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xf7,0xfb,0xfe, + 0x4f,0x7f,0xff,0xff,0xff,0xff,0xbf,0xbf,0xef,0xff,0xff,0xff,0xfa,0xef,0x7a,0x7e, + 0xbd,0xa3,0x7d,0xee,0x1f,0xff,0xff,0xff,0xbf,0xfd,0xf7,0xe7,0xf9,0xf9,0xef,0xff, + 0xff,0xff,0x5f,0xfb,0xff,0xdf,0x38,0xff,0xff,0xbf,0xff,0xff,0xdf,0xfd,0xdf,0xbf, + 0xff,0xff,0xff,0xff,0xbf,0x5e,0xd7,0x75,0xfb,0xd9,0xef,0xbf,0xb7,0xff,0xfe,0xff, + 0xff,0xbf,0xff,0xfe,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0x1b,0xff,0xff, + 0xfb,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xef,0xdf,0xff,0xfb,0xff,0xff,0xbb,0xef, + 0xee,0x7f,0x97,0xff,0x7f,0xff,0xef,0xff,0xe7,0xdf,0xfc,0xe7,0xef,0x7f,0xff,0xff, + 0xff,0xfb,0xfe,0x23,0xff,0xfb,0xff,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xbd,0xff,0xfe,0xcf,0xf3,0x7b,0x3a,0xcd,0xbf,0xbf,0xff,0xef,0xd7,0xf7,0xe7, + 0xf7,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf6,0xfd,0xef,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xbb,0xd6,0xff,0xaf,0xf3,0xff, + 0xf7,0xfe,0xff,0xdf,0xff,0xee,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0x4f,0xff,0xff,0xff,0x7f,0xff,0xff,0xf7,0xff,0xff,0xfc,0xff,0xff,0xef,0xbb,0xda, + 0xf7,0xbf,0xef,0xe6,0xbe,0xbd,0x7f,0xff,0xfc,0xef,0x57,0xd7,0xfb,0xf6,0xef,0xbd, + 0xff,0xfb,0xff,0xff,0xff,0xff,0xd3,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdf, + 0xff,0xaf,0xff,0xfe,0xff,0x7f,0xf7,0xdb,0xae,0xb6,0x6d,0xfb,0xef,0xbd,0xf7,0x9f, + 0xff,0xff,0xff,0xdf,0xdf,0xfd,0xff,0xff,0xdf,0xfd,0xff,0xff,0xf0,0x3f,0xef,0xff, + 0xff,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xfd,0x7f,0xdf,0xf3,0x8f,0xaf,0x7e,0x5f, + 0xff,0xef,0xff,0xff,0x7f,0xff,0xff,0xfe,0xdd,0xff,0x7d,0x6f,0xff,0xff,0xff,0xbf, + 0xff,0xff,0xfe,0x0f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0x7b,0x7e,0xdf,0xf7,0xcd,0xfb,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xf2,0x7a, + 0xff,0x1b,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf1,0xff,0xff,0xdf,0xff,0xff,0xff, + 0xff,0xff,0xfe,0xfb,0xff,0xff,0xff,0xbf,0xef,0xff,0xfd,0xff,0x5f,0xfd,0xff,0xff, + 0xdf,0xff,0xff,0xff,0xff,0x7f,0xff,0xf7,0xbf,0xff,0xff,0xff,0xff,0xbf,0xbb,0xfc, + 0xaf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x3f,0xff,0xf1,0xf4,0xff, + 0x27,0xcd,0x73,0xff,0x9f,0xd7,0xbf,0xfe,0x7b,0x13,0xef,0x9f,0x3e,0xfb,0x13,0xef, + 0xbf,0x3e,0xff,0xff,0xff,0xfd,0xb3,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xef,0xff,0xff,0xfe,0xdf,0x2f,0xfd,0xff,0xce,0xf7,0xfe,0x97,0xe7,0xfa,0x6f, + 0xff,0xf3,0xff,0xff,0x2f,0xff,0xf7,0xff,0xff,0xff,0xff,0xfd,0x6a,0xb7,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x9a,0xf4,0xad,0x7f,0xfb,0x9d,0xf3,0x6c, + 0xf7,0xfd,0xfe,0xff,0xab,0xef,0xff,0xa6,0xbf,0xab,0x2b,0xff,0xbe,0xff,0xfb,0xff, + 0xff,0xff,0xbc,0x5f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf9,0x5f, + 0xd7,0xff,0xfd,0xff,0xfe,0x7f,0x9f,0xf9,0xff,0xdf,0xb5,0xfd,0xff,0xff,0xd7,0x95, + 0xe5,0x7f,0xff,0xdf,0xff,0xff,0xff,0xfe,0xfd,0xa1,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x6f,0xff,0xf7,0xfd,0xfd,0xdf,0xf3, + 0xdb,0xf7,0xbf,0xeb,0x7a,0xd5,0xf7,0xae,0xdf,0x7b,0xff,0xf7,0xff,0xff,0xef,0xee, + 0x7f,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xf7,0xfd,0xc7, + 0x7b,0xd4,0xf5,0x2f,0x53,0xd4,0x77,0xfd,0xf7,0x7d,0x5f,0x55,0xbd,0xf5,0x6b,0xff, + 0x77,0xff,0xff,0xff,0xff,0xf6,0xaf,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xaf,0x4b,0xff,0xfb,0xbc,0x5f,0xf7,0x5f,0x7f,0xdf,0x4f,0x7a,0xf4,0xff, + 0xaf,0xeb,0x9a,0xfe,0xbd,0x7b,0xef,0xff,0xe7,0xff,0xff,0xff,0xb1,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf5,0xfd,0x7f,0xff,0xdf,0xff,0xff,0xf9, + 0xbc,0xff,0xfd,0xc3,0x50,0xdf,0xf5,0x3d,0x4a,0x52,0xd7,0xff,0x8d,0xff,0xf2,0xff, + 0xff,0xff,0xfa,0x9f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xb7,0xff,0xb9,0xee,0x3e,0x67,0xb9,0xf7,0xfd,0xff,0xff,0xd9,0xf7,0xfd, + 0xef,0xef,0xdf,0xff,0xfd,0xef,0xff,0xff,0xfe,0x17,0xfe,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xe6,0x7f,0x9e, + 0x7f,0x9f,0xff,0xf9,0xfe,0x7f,0x9f,0xfe,0xb9,0xff,0xff,0x9f,0xff,0xff,0xff,0xf2, + 0x7f,0xee,0xff,0xbf,0xef,0xfb,0xfe,0xff,0xbf,0xef,0xfb,0xfe,0xff,0xbd,0x6d,0xfb, + 0x76,0xfd,0xb7,0x59,0x76,0xff,0x9f,0xe7,0xdb,0x7e,0x5f,0x9f,0xe5,0xfb,0xbe,0x3f, + 0xb7,0xe7,0xfb,0xfe,0xff,0xfb,0x5f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xef,0xfb,0xfd,0xfd,0xff,0xdf,0xfd,0xff,0xff,0xef,0xf3,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xcb,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xfb,0xff,0xfb,0xfe,0xff, + 0x6b,0xfb,0xff,0xbb,0xeb,0xff,0xfe,0xff,0xbf,0xef,0xff,0xff,0xff,0xff,0xef,0xff, + 0xff,0xff,0xfc,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f, + 0xde,0xd7,0xe7,0xff,0xff,0xfe,0xfe,0x3f,0xff,0xe3,0xf2,0xfd,0xfd,0x0e,0xcb,0xb0, + 0xf5,0xff,0x8f,0xff,0xf8,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xe7,0xf9,0xfa,0x77,0x9f,0xfb,0xfe,0xff,0xef,0xfb,0xfe, + 0xfb,0x3e,0xdf,0xa3,0x68,0xfe,0x3e,0xdf,0xfb,0xff,0xff,0xbf,0xff,0xff,0xff,0xc0, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0x7f,0xdf,0xdf, + 0x7f,0xff,0xff,0xbf,0xff,0xff,0xff,0xdf,0xf7,0xfe,0xdf,0x7f,0xcc,0x97,0xfe,0xdf, + 0xff,0xed,0xff,0xff,0xff,0xfd,0xbf,0xff,0xfe,0x7f,0x9f,0xe7,0xf9,0xfe,0x7f,0x9f, + 0xe7,0xf9,0xbe,0x6f,0x8b,0xe6,0xf9,0xfe,0x7f,0x9f,0x79,0xfe,0x76,0x0f,0x83,0xf9, + 0xf8,0x2f,0x9b,0x83,0xf9,0xf8,0x7f,0x9f,0x87,0xf9,0xfe,0x7f,0xd7,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf1,0xfc,0xfd,0x3f,0xe7,0xff,0xfe,0x7f, + 0xe7,0xfb,0xfe,0xfb,0x1e,0xdf,0xd3,0xee,0xff,0x1e,0xe7,0xf9,0xef,0xff,0x9e,0xff, + 0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff, + 0x9f,0xa7,0xff,0xff,0xbf,0xef,0xfe,0xff,0xbf,0xf2,0x3c,0x8f,0xfa,0xc8,0xd7,0xec, + 0x9f,0xff,0xc9,0xff,0xfc,0x9f,0xff,0xff,0xfe,0xdf,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xdf,0xf7,0xf5,0xff,0xff,0xff,0xff,0xfb,0xff,0xef,0xfb, + 0x9d,0xe7,0x7f,0xee,0x7f,0xfd,0xe5,0x7f,0xfe,0x7f,0xff,0xe7,0xff,0xff,0xff,0xcb, + 0xfe,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf9,0xfe,0x7e,0x9f,0xf7, + 0xff,0xff,0x7f,0xff,0xff,0xff,0xee,0xfb,0xb7,0xff,0xbb,0xff,0xbb,0xb7,0xff,0xbf, + 0xff,0xfb,0xff,0xff,0xff,0xf1,0x3f,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xdb,0xff,0xfd,0xbf,0x6f,0xe6,0xfd,0xbf,0xff,0xff,0xf7,0xf7, + 0xfb,0x6f,0xff,0xf2,0xff,0xff,0xcf,0xff,0xff,0xff,0xff,0xfe,0x4e,0xff,0xfa,0xfe, + 0xaf,0xab,0xeb,0xfa,0xbe,0xaf,0x2b,0xeb,0xfa,0xde,0xae,0xad,0xeb,0xea,0xba,0xbf, + 0xa8,0xea,0xfe,0xaf,0xaf,0x6a,0xfa,0xfa,0xbf,0xaf,0x6b,0xfa,0xfe,0xb7,0xaf,0xeb, + 0xfa,0xff,0xe5,0x9f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xff, + 0xf7,0xcf,0xff,0x7c,0xdf,0xdf,0xf3,0xfc,0xdb,0x6b,0xd5,0xff,0xfc,0x7b,0x3f,0xff, + 0x7f,0x7f,0xf7,0xff,0xff,0xff,0xff,0xff,0xf9,0x9f,0xfb,0xff,0xff,0xff,0xff,0xff, + 0xff,0x7f,0xff,0xf7,0xff,0xff,0xf9,0xee,0x2f,0xe6,0x9b,0x7f,0x73,0xed,0x75,0xff, + 0xff,0xf7,0xfc,0xad,0xbf,0xff,0xff,0xff,0xff,0xfd,0x7f,0xff,0xff,0xff,0xfe,0xa7, + 0xff,0xfc,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xf6,0xdf,0xff, + 0xbf,0xee,0xdb,0xbf,0xf5,0xfd,0xbe,0xfb,0xff,0xff,0xbd,0xeb,0xfe,0xff,0xbf,0xff, + 0xff,0xff,0xff,0xff,0xff,0xf8,0x3f,0x7f,0xfd,0xef,0xff,0xff,0xff,0xbf,0xff,0xff, + 0xff,0xff,0xf7,0xef,0xad,0xeb,0xda,0xd6,0xbd,0xca,0xfa,0xef,0xef,0xff,0xff,0xdf, + 0xfe,0xbf,0xff,0xeb,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xf5,0x9f,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xfb,0x67,0x5f,0x57,0xdd, + 0x7a,0x5d,0x7f,0xdf,0xff,0xdf,0xff,0xff,0xbf,0xef,0xbf,0xff,0xff,0xff,0xff,0xff, + 0xff,0xbf,0x31,0xff,0xff,0xff,0xff,0xdf,0xff,0xfb,0xff,0xff,0xdf,0xfe,0xff,0xbe, + 0xf7,0xff,0xbf,0xf9,0x7e,0xee,0xce,0xfb,0xff,0xf5,0xbb,0xff,0xfe,0xbc,0xff,0xff, + 0x3f,0xff,0xff,0xff,0xff,0xff,0xff,0x7e,0xe5,0x7f,0xff,0xff,0xef,0xff,0xfe,0xfc, + 0xff,0xef,0xff,0xf4,0xff,0xff,0xbf,0xfb,0xff,0xbe,0xde,0xaf,0xb6,0x7c,0xff,0xed, + 0xff,0xbf,0xff,0xbf,0x7f,0xfb,0xff,0xf7,0xbf,0xff,0xfb,0xff,0xff,0xff,0xec,0x0f, + 0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xb9,0xf9, + 0xff,0x7f,0xda,0xed,0xbf,0xfe,0x7f,0x7f,0xfd,0xfd,0xcf,0xef,0xf7,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0x7f,0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xf1,0xfc,0xde,0x7c,0xce,0xbb,0xff,0xa6,0x4e,0xe3,0xff,0xff,0xaf,0xc7,0xf3, + 0xdf,0xff,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xd6,0xbf,0x7f,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xcf,0xb7,0xef,0xfb,0x5f,0xb2,0xff,0xe1, + 0xfe,0x7f,0xff,0x9a,0xff,0x2e,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0x43,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd, + 0xfd,0x7f,0x4f,0xb7,0xbf,0xcf,0xfe,0x7f,0xbf,0xff,0xff,0xff,0xfb,0xfd,0xbf,0x7f, + 0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xe6,0xff,0xff,0xff,0xfd,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xb7,0xed,0xff,0xfc,0xff,0xf7,0xff,0xbf,0xfd,0xdf, + 0xff,0xff,0xff,0xff,0x7f,0xe7,0xff,0xff,0x7f,0xff,0xf7,0xff,0xff,0xff,0xfd,0x9f, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xf9,0xeb,0xfb,0xfb, + 0xdf,0xff,0xff,0xff,0xff,0xfe,0xff,0xdf,0xdf,0xff,0xff,0xf5,0xbf,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xbf,0xd0,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xff, + 0xff,0xfc,0xfd,0x1f,0xff,0xbe,0x7e,0x7f,0x73,0xfb,0x5e,0x7f,0xa7,0xff,0xf6,0x7e, + 0xff,0xff,0xef,0xfe,0x7e,0x1f,0x13,0xef,0xff,0xff,0xff,0xd3,0x6b,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xef,0xcf,0x9f,0xff,0xca,0xfc,0xee, + 0xeb,0xbf,0xf7,0xfe,0xff,0xcf,0xff,0xff,0xfd,0xff,0xcf,0xf9,0xff,0xff,0xff,0xff, + 0xff,0xd6,0xef,0x7c,0xaf,0x4b,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0x7e,0xff,0xdf,0xdf,0x35,0x4f,0x5f,0xd7,0x2b,0xff,0xff,0xff,0xfb,0xff,0xff,0xe7, + 0xff,0xab,0xfe,0xff,0xbf,0xff,0xff,0xfb,0xc5,0xff,0xf5,0xcd,0x7f,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7e,0x6f,0x3f,0xe7,0xb9,0xff,0xbf,0x6d,0x7f, + 0xff,0xff,0xff,0xff,0xff,0xfe,0x77,0x35,0xff,0xff,0xff,0xff,0xff,0xe7,0xda,0xbf, + 0x7f,0xff,0xff,0xff,0xff,0xfe,0xbf,0xff,0xff,0xfa,0xff,0xff,0xaf,0xfb,0x33,0x1f, + 0xf7,0x7f,0xdf,0x99,0xf6,0x7d,0xeb,0x7a,0xff,0xf7,0xec,0xdf,0x7f,0xdd,0xf7,0xff, + 0xff,0x7f,0xff,0xff,0xfe,0xe6,0xff,0xfd,0xff,0x7f,0xff,0xff,0xd5,0xff,0xff,0xff, + 0x57,0xff,0xf5,0x7d,0xfa,0xe9,0xbd,0x4f,0x52,0xf5,0x3d,0x8f,0x7d,0x5f,0x57,0xff, + 0xff,0xbf,0xff,0xfb,0x7d,0xff,0xff,0xff,0xff,0xff,0xff,0x78,0xdf,0xfa,0xfe,0xbf, + 0xff,0xff,0xd2,0xf5,0xff,0xff,0xeb,0xff,0xfe,0xbd,0xe9,0x7f,0x9d,0xff,0x75,0x76, + 0xdd,0xfe,0xb9,0xae,0x6b,0x57,0xff,0xb7,0xff,0xff,0xfa,0xbf,0xff,0xff,0xff,0xff, + 0xff,0xf9,0x1b,0xff,0x5f,0xd7,0xff,0xff,0xff,0x5f,0xff,0xff,0xfd,0x7f,0xff,0xd7, + 0x97,0xf7,0xba,0xf3,0xff,0xaf,0xed,0xf3,0xd4,0xb5,0x29,0x7f,0xf0,0xff,0xff,0x0f, + 0x7f,0x58,0xff,0xff,0x0f,0xff,0xff,0xff,0xc3,0x7e,0xdf,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0x9f,0xe9,0xff,0xfe,0xd9,0x9e,0xe7,0xe6,0x79,0x9f,0x63, + 0xdf,0xff,0xfd,0xff,0xe7,0xdf,0xfe,0xfd,0xff,0xff,0xdf,0xff,0xff,0xff,0xe6,0x7f, + 0xe7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xfe,0xf9,0xbe,0x7f, + 0x99,0xff,0xfe,0x7f,0x99,0xe6,0xf9,0xff,0xff,0x9f,0xff,0xf9,0xff,0xeb,0x9f,0xff, + 0xf9,0xff,0xff,0xff,0xff,0x07,0xff,0xef,0xfb,0xfe,0xff,0xbf,0xef,0xfb,0xfe,0xff, + 0xb7,0xef,0xbb,0xb6,0x65,0x9f,0x67,0xdb,0xf7,0x8f,0x67,0xf9,0xc6,0x7f,0xb7,0xe7, + 0xfb,0xfe,0x7d,0xbe,0xe3,0xfb,0xfe,0x7f,0xbf,0xef,0xdf,0x95,0xbf,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xbf,0xdf,0xdf,0xfd,0xff, + 0x7f,0xff,0xfe,0xff,0xbf,0xff,0xff,0xff,0xfd,0xbf,0xff,0xff,0xff,0xff,0xff,0xff, + 0xdb,0xde,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xbf,0xbf,0xaf,0xef,0xfe,0xff,0xaf,0xfb,0xbe,0xbf,0xff,0xef,0xff,0xfe,0xbf, + 0xff,0xff,0xff,0xfe,0xff,0xff,0xfd,0xff,0xe5,0xff,0xff,0xff,0xff,0xff,0xfe,0xff, + 0xff,0xff,0xff,0xff,0xd7,0xf5,0xff,0xdb,0x67,0xf8,0xff,0xfe,0xe3,0xf8,0xf4,0x3f, + 0x0e,0xdf,0x90,0xff,0xff,0x0f,0xff,0xd0,0xff,0xff,0x8f,0xff,0xff,0xff,0xf2,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfa,0x76,0x9f,0xe2,0xdc,0xff, + 0xbf,0xef,0xfe,0xff,0xb6,0x8f,0x33,0xed,0xfa,0x37,0xef,0xe3,0xfe,0xfa,0x3f,0xff, + 0xfb,0xff,0xff,0xff,0xfe,0x9f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xfd,0xd7,0xfd,0x7d,0x7f,0xff,0xff,0xff,0xff,0xff,0xfd,0xfc,0xcf,0x7b,0x57, + 0xff,0xfd,0x5f,0xf7,0x4f,0xff,0xbf,0x5f,0xff,0xff,0xff,0x83,0xff,0xff,0xe7,0xf9, + 0xfe,0x7f,0x9f,0xe7,0xf9,0xfe,0x7f,0x9f,0xe2,0xf8,0xbe,0x66,0x9d,0xe7,0xf9,0x77, + 0x9d,0xe7,0xe0,0xf8,0x3f,0x8b,0x87,0xf9,0xb8,0x7f,0x8b,0x87,0xf9,0xf8,0x7f,0x9f, + 0xe7,0xfd,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0x9f,0xff,0xff,0xff,0xfd,0x7f,0xc7, + 0xdb,0xf4,0xdf,0x9f,0xef,0xfe,0xff,0x9f,0x4f,0xf7,0xfc,0xff,0xbf,0xff,0xf3,0xff, + 0xff,0x9f,0xff,0xfb,0xff,0xff,0xff,0xff,0x6f,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xaf,0xeb,0xfa,0x7e,0xde,0xfd,0xff,0x7d,0xf7,0xfd,0xe9,0xb3, + 0xec,0xdf,0xf6,0xdf,0xfe,0x6d,0xff,0xfe,0xdf,0xff,0x6d,0xff,0xff,0xff,0xe0,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0x7f,0xff,0xf7,0xff, + 0xff,0xbf,0xfb,0xff,0xff,0xf9,0xde,0x77,0xff,0xe7,0x7f,0xde,0x5f,0xff,0xe7,0xff, + 0xfe,0x7f,0xff,0xff,0xfc,0x3b,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xff,0xff, + 0xff,0xff,0xa7,0xef,0x7f,0xdf,0xff,0xf7,0xff,0xff,0xff,0xfc,0x8f,0x23,0x7f,0xf2, + 0x6d,0xfb,0x26,0xdf,0xf2,0x7f,0xff,0x27,0xff,0xff,0xff,0x87,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x5b,0xb6,0xfe,0x67, + 0xdb,0xff,0xff,0xff,0xff,0xff,0xf6,0xff,0xff,0x67,0xff,0xff,0xef,0xff,0xff,0xff, + 0xff,0xea,0xff,0xff,0xa9,0xeb,0xfa,0xbe,0xaf,0xaf,0xeb,0xfa,0xfe,0xb7,0xad,0xeb, + 0xfa,0xbe,0xbe,0xad,0xaa,0xfa,0xbe,0xab,0xe9,0xf8,0xbe,0xaf,0xaf,0x6a,0xfa,0xf6, + 0xbf,0xad,0xeb,0xfa,0xfe,0xbf,0xaf,0xdc,0x5f,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xd7,0xf3,0x7f,0x1e,0xc7,0xf7,0xff, + 0xef,0xff,0xff,0x9f,0xfd,0xbd,0xdf,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0x81,0x7f, + 0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xf3,0xfe,0x7f,0xff,0x6f,0xbb,0xff,0xfd,0x7f, + 0xab,0x7f,0x3d,0xf7,0xb7,0xef,0xef,0xff,0xff,0xff,0xdf,0xef,0x7f,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xe6,0x7f,0xf7,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xfb,0xfd,0xff,0xcf,0xff,0x73,0xbf,0xfb,0xfe,0xfb,0xd7,0xff,0xff,0xff,0xff, + 0xfe,0xb7,0xae,0xff,0xfd,0xff,0xbd,0xff,0xff,0xff,0xfa,0x07,0xff,0xff,0xdf,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xeb,0xfe,0xfe,0x3f,0xaf,0xe3,0xff,0xbf, + 0x83,0xfd,0xef,0xff,0xef,0xa7,0xbf,0xff,0xff,0xff,0x9f,0xff,0xbf,0xff,0xff,0xff, + 0xff,0xb1,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xd6, + 0x7d,0xef,0xf5,0xfe,0xff,0x1f,0xfb,0xff,0xff,0xfd,0xff,0xf6,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x1f,0xff,0x3f,0xef,0xf3,0xff,0xbf,0x3f, + 0xc7,0xb3,0xde,0xff,0xbf,0xef,0xf3,0xfc,0x7f,0xfb,0xff,0xe7,0xff,0xdf,0xf7,0xff, + 0xff,0xff,0x3f,0xf7,0xff,0xfc,0x7f,0xf7,0xff,0x53,0xff,0xff,0xff,0xfe,0x87,0xff, + 0xdf,0xf3,0xfd,0xff,0x7f,0xdf,0xff,0xfd,0xbf,0x4f,0xdf,0xf1,0xfd,0xff,0xfe,0xfb, + 0xfe,0xff,0xef,0xff,0xff,0xff,0xff,0xf7,0xdf,0xf7,0xf7,0xbf,0x7f,0xd7,0xfe,0xdf, + 0xff,0x7f,0xff,0xff,0xba,0xff,0xbe,0xfe,0xfb,0xef,0xfb,0xbb,0xff,0xff,0xbf,0xfc, + 0xfe,0x7f,0xff,0xef,0xff,0xff,0xff,0xef,0x1f,0xff,0xfd,0xff,0xfe,0xff,0xfb,0xdf, + 0xbf,0xff,0xbb,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xfc,0x5f,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xbf,0xf7,0xef, + 0xff,0xff,0xff,0xff,0xbf,0xfd,0xff,0xff,0xff,0xbf,0xf5,0xff,0xbf,0xff,0xff,0xff, + 0xff,0xfb,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xfe,0xdf,0xdf, + 0xef,0xfe,0xbf,0xff,0xfe,0x7f,0xbf,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf5,0x3f,0xff,0xff,0xdf,0xf7,0xfd,0xff,0x7f, + 0xdf,0xff,0xff,0xff,0xff,0xdf,0xff,0xf5,0xff,0xef,0xff,0xff,0xff,0xff,0xff,0xff, + 0xdf,0xdd,0x77,0x5d,0xd7,0x7d,0xff,0x7f,0xd7,0xff,0xff,0xff,0xff,0xff,0x6b,0xff, + 0xff,0xf3,0xff,0xff,0xbf,0xcf,0xf3,0xff,0xfe,0xbf,0xfb,0xff,0xff,0xcf,0xf7,0xff, + 0xfc,0x3d,0xff,0xff,0xff,0x7e,0xdf,0xf7,0xfd,0xfa,0x7f,0x9f,0xff,0xe5,0xf3,0xff, + 0xff,0xff,0xff,0xff,0xf5,0xff,0xff,0xfe,0xff,0x7f,0xd7,0xfd,0xff,0x7f,0xff,0xff, + 0xff,0xdd,0xf7,0xf7,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xd3,0xff,0xff,0xfe, + 0xf7,0xf5,0xdf,0xf3,0xff,0x7f,0xfd,0xff,0xff,0xff,0xff,0x33,0xff,0x9f,0xe7,0xf9, + 0xfe,0x7f,0x9f,0xe7,0xf9,0xfe,0x7f,0x9f,0xe7,0xf9,0xfe,0x7d,0x9f,0xe5,0xfe,0x7f, + 0x9f,0xe7,0xf9,0xfe,0x7f,0x9f,0xf7,0xf9,0x7f,0x7f,0x9f,0xe7,0xe1,0xfe,0x7f,0x9f, + 0xfe,0xc7,0xff,0xfb,0xfa,0xff,0xaf,0xef,0xeb,0xfe,0xfb,0x3f,0xef,0xfb,0xda,0xff, + 0x3e,0xef,0xfb,0xfe,0xfe,0xcf,0xbb,0xdc,0xfe,0xbf,0xef,0xfb,0xef,0xff,0xbf,0xdf, + 0xbb,0xfc,0xfe,0xbe,0xef,0xfb,0xff,0xa8,0xef,0xfe,0x7f,0xdf,0xf7,0xfb,0xff,0x77, + 0xcf,0xb5,0xfd,0xf7,0x7d,0xde,0xef,0x7d,0x9e,0xff,0xbd,0x73,0xfe,0xde,0x3f,0x8f, + 0xfb,0x7a,0xdf,0xbf,0xc7,0x7b,0xf8,0x3f,0xbf,0xaf,0xfb,0xfa,0xff,0xec,0x1f,0xff, + 0xfb,0xff,0xff,0xbf,0xff,0xff,0xff,0xf7,0xff,0xde,0xff,0xff,0x5f,0xdf,0xff,0xf9, + 0xff,0xef,0xbf,0xfd,0xfa,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xbf,0xfb,0xfa,0xff, + 0xdf,0xff,0xff,0xfd,0x93,0xff,0xfb,0xde,0xff,0xb7,0xef,0xfb,0xfe,0xff,0x9f,0xef, + 0xfb,0xfe,0xf7,0x9f,0xef,0xfa,0xfe,0xff,0xef,0xfb,0xfa,0xee,0xbd,0xef,0x73,0xfe, + 0x9f,0xef,0xef,0xef,0xfe,0xff,0x3f,0xef,0xf3,0xff,0xfa,0x7f,0xfc,0xff,0x3f,0xcf, + 0xb3,0xfc,0xff,0x3e,0xef,0xb3,0xfc,0xff,0x3f,0x4d,0xf3,0xfc,0xef,0xbf,0xfb,0xfc, + 0xff,0xbe,0xef,0xf3,0xfe,0xff,0x3f,0xef,0xf3,0xfe,0xff,0x3f,0xef,0xf3,0xfe,0xff, + 0xff,0xee,0xff,0xaf,0xeb,0xfa,0xfe,0xff,0xaf,0xeb,0xfa,0xfe,0xbf,0xaf,0xeb,0xfb, + 0xee,0xbf,0xbf,0xf7,0xfd,0x7b,0xbf,0xb7,0xdd,0xfe,0xff,0xdf,0xed,0xfd,0xde,0xdb, + 0xdf,0xef,0xfd,0xfe,0xff,0xbf,0xff,0xfd,0xff,0xf9,0xfe,0xff,0xbf,0xe5,0xfb,0xfe, + 0xff,0xbf,0xef,0xfb,0xfe,0xff,0x97,0xef,0xf9,0x7e,0x5f,0xe5,0xf9,0x7e,0x5f,0x97, + 0xe5,0xf9,0x7e,0xff,0xbf,0xef,0xf9,0xfe,0x5f,0xb7,0xe5,0xf9,0x7f,0xfc,0xbc,0xff, + 0x7f,0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xf6,0xfd,0xff,0x7f, + 0xfe,0xff,0x9f,0x7d,0xfe,0xff,0xdd,0xf7,0xef,0xde,0xff,0x7d,0xff,0xef,0xdf,0xff, + 0xfd,0xef,0x7f,0xff,0x97,0xff,0xff,0xfd,0xff,0x7f,0xff,0xf7,0xfd,0xff,0x7b,0xdf, + 0xf7,0xbd,0xff,0xff,0xdf,0xfd,0xf7,0xff,0x7f,0xff,0xf7,0xfd,0xff,0xff,0xdf,0xfe, + 0xfd,0xbf,0xef,0xdf,0xff,0xed,0xbb,0xff,0xff,0xff,0xf2,0xfb,0xff,0xff,0xff,0xdf, + 0xf7,0xdd,0xd7,0x5f,0xdb,0xf7,0xfd,0xbf,0x7f,0xdf,0xf7,0xf5,0xff,0x7f,0xb7,0xfd, + 0xbf,0x7d,0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xd6,0xfd,0xf7,0x7f,0xdf,0xf7,0xfd,0xdf, + 0xfd,0x1f,0xfe,0xbf,0xcf,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xe7,0xfe,0xff,0xef,0xf3,0xfb,0xff,0xb7,0xff,0xf2,0xff,0xff, + 0xff,0xbf,0xfa,0xf7,0xff,0xff,0xff,0xab,0xff,0xf5,0xff,0x7f,0xdf,0x77,0x7d,0xff, + 0x7f,0xdf,0xf7,0xfd,0xff,0x7d,0xdf,0xf5,0xfd,0x7f,0x7e,0x77,0xfd,0xff,0x7f,0xdf, + 0xf7,0xfd,0xff,0x3f,0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0x77,0xdd,0xff,0xfd,0x7b,0xff, + 0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb, + 0xfe,0xff,0xef,0xfb,0x3e,0xff,0xff,0xea,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xcf, + 0xdf,0xff,0xff,0xfe,0x0f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0xff,0xff, + 0xff,0xdf,0xff,0xfb,0xff,0xf7,0x9d,0xfb,0xdf,0xf7,0x9d,0xf7,0xff,0xdf,0xff,0xff, + 0xef,0xfd,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xbf,0xfd,0xfd,0xff,0xff,0xff,0xbf, + 0xef,0xff,0xff,0xff,0xff,0xaf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xbe,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0x7f,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xb7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xdf,0xfc,0xff,0xff,0xff,0xec,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xbf,0xfd,0xf3, + 0x7d,0xb7,0xdd,0xf3,0x7d,0xff,0xd7,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf, + 0xff,0xff,0xfa,0xfd,0x5f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xfb,0xdf,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xbf,0xef,0xff, + 0xf2,0x7f,0xff,0xfb,0xfe,0xff,0xbf,0xef,0xfb,0xfe,0xcf,0xbf,0xec,0xfb,0xfe,0xff, + 0xbf,0xef,0xfb,0xfe,0xff,0xef,0xfb,0xfe,0xff,0x8f,0xef,0xfb,0xfe,0xff,0xbf,0xef, + 0xfb,0xfe,0xcf,0xbb,0xee,0xfb,0xfe,0x8f,0xff,0xef,0xf3,0xfc,0xff,0x3f,0xcf,0xf3, + 0xf8,0xff,0x3f,0x8f,0xf3,0xfe,0xff,0x3f,0xef,0xfb,0xfb,0xbf,0xef,0xfb,0xfc,0xfd, + 0xbf,0xef,0x73,0xfc,0xff,0x3f,0xcf,0xf3,0xf8,0xfe,0x3f,0x8f,0xff,0xe9,0xff,0xff, + 0xbb,0xfe,0xfb,0xbf,0xef,0xfb,0xee,0xfb,0xbf,0xef,0xbb,0xee,0xff,0xbf,0xef,0x7f, + 0xdf,0x7d,0xff,0x7f,0xdf,0xfb,0xbd,0xff,0xff,0xfe,0xff,0xbf,0xef,0xfb,0xff,0xff, + 0xff,0xff,0xff,0xfa,0x3f,0xfe,0xee,0xfb,0xbe,0xef,0xbb,0xee,0xff,0xbe,0xef,0xbb, + 0xee,0xfb,0xaf,0xef,0xfa,0xf7,0xbd,0xfb,0xde,0xf7,0xbd,0xfe,0xeb,0xdf,0xbf,0xfb, + 0xbe,0xef,0xfb,0xfe,0xfb,0xfe,0xee,0xfb,0xbf,0xff,0xc7,0xff,0x7f,0xb5,0xad,0x7b, + 0x5a,0xd6,0xb5,0x6d,0xfb,0x5a,0xdf,0xb5,0xee,0xeb,0x52,0xfb,0x6e,0xdb,0xed,0xbb, + 0x6e,0xd9,0x7f,0xed,0xb7,0xb5,0xad,0x6b,0x52,0xf6,0xb5,0xf9,0xfb,0xfe,0xff,0xe2, + 0x18,0xff,0xff, diff --git a/board/ar405/init.S b/board/ar405/init.S new file mode 100644 index 0000000..03eedb5 --- /dev/null +++ b/board/ar405/init.S @@ -0,0 +1,280 @@ +//------------------------------------------------------------------------------+ +// +// This source code has been made available to you by IBM on an AS-IS +// basis. Anyone receiving this source is licensed under IBM +// copyrights to use it in any way he or she deems fit, including +// copying it, modifying it, compiling it, and redistributing it either +// with or without modifications. No license under IBM patents or +// patent applications is to be implied by the copyright license. +// +// Any user of this software should understand that IBM cannot provide +// technical support for this software and will not be responsible for +// any consequences resulting from the use of this software. +// +// Any person who transfers this source code or any derivative work +// must include the IBM copyright notice, this paragraph, and the +// preceding two paragraphs in the transferred software. +// +// COPYRIGHT I B M CORPORATION 1995 +// LICENSED MATERIAL - PROGRAM PROPERTY OF I B M +//------------------------------------------------------------------------------- + +//----------------------------------------------------------------------------- +// Function: ext_bus_cntlr_init +// Description: Initializes the External Bus Controller for the external +// peripherals. IMPORTANT: For pass1 this code must run from +// cache since you can not reliably change a peripheral banks +// timing register (pbxap) while running code from that bank. +// For ex., since we are running from ROM on bank 0, we can NOT +// execute the code that modifies bank 0 timings from ROM, so +// we run it from cache. +// Bank 0 - Flash bank 0 +// Bank 1 - CAN0, CAN1, CAN2, CAN3 +// Bank 2 - Expansion Bus +// Bank 3 - 16552 +// Bank 4 - FPGA internal (ADC, DAC, etc.) +// Bank 5 - Flash bank 1 (dummy) +//----------------------------------------------------------------------------- +#include +#include + +#define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */ + +#include +#include + +#include +#include + + + .globl ext_bus_cntlr_init +ext_bus_cntlr_init: + mflr r4 // save link register + bl ..getAddr +..getAddr: + mflr r3 // get address of ..getAddr + mtlr r4 // restore link register + addi r4,0,14 // set ctr to 10; used to prefetch + mtctr r4 // 10 cache lines to fit this function + // in cache (gives us 8x10=80 instrctns) +..ebcloop: + icbt r0,r3 // prefetch cache line for addr in r3 + addi r3,r3,32 // move to next cache line + bdnz ..ebcloop // continue for 10 cache lines + + //------------------------------------------------------------------- + // Delay to ensure all accesses to ROM are complete before changing + // bank 0 timings. 200usec should be enough. + // 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles + //------------------------------------------------------------------- + addis r3,0,0x0 + ori r3,r3,0xA000 // ensure 200usec have passed since reset + mtctr r3 +..spinlp: + bdnz ..spinlp // spin loop + + //----------------------------------------------------------------------- + // Memory Bank 0 (Flash Bank 0) initialization + //----------------------------------------------------------------------- + addi r4,0,pb0ap + mtdcr ebccfga,r4 + addis r4,0,0x9201 + ori r4,r4,0x5480 + mtdcr ebccfgd,r4 + + addi r4,0,pb0cr + mtdcr ebccfga,r4 + addis r4,0,0xFFC5 // BAS=0xFFC,BS=0x2(4MB),BU=0x3(R/W), + ori r4,r4,0xA000 // BW=0x1(16 bits) + mtdcr ebccfgd,r4 + + //----------------------------------------------------------------------- + // Memory Bank 5 (Flash Bank 1) initialization (dummy for flash_init only!!!) + //----------------------------------------------------------------------- + addi r4,0,pb5ap + mtdcr ebccfga,r4 + addis r4,0,0x9201 + ori r4,r4,0x5480 + mtdcr ebccfgd,r4 + + addi r4,0,pb5cr + mtdcr ebccfga,r4 + addis r4,0,0xFF85 // BAS=0xFF8,BS=0x2(4MB),BU=0x3(R/W), + ori r4,r4,0xA000 // BW=0x1(16 bits) + mtdcr ebccfgd,r4 + + //----------------------------------------------------------------------- + // Memory Bank 1 (CAN0, 1, 2, 3) initialization + //----------------------------------------------------------------------- + addi r4,0,pb1ap + mtdcr ebccfga,r4 + addis r4,0,0x0100 + ori r4,r4,0x0380 // enable Ready, BEM=0 + mtdcr ebccfgd,r4 + + addi r4,0,pb1cr + mtdcr ebccfga,r4 + addis r4,0,0xF001 // BAS=0xF00,BS=0x0(1MB),BU=0x3(R/W), + ori r4,r4,0x8000 // BW=0x0(8 bits) + mtdcr ebccfgd,r4 + + //----------------------------------------------------------------------- + // Memory Bank 2 (Expension bus) initialization + //----------------------------------------------------------------------- + addi r4,0,pb2ap + mtdcr ebccfga,r4 + addis r4,0,0x0100 + ori r4,r4,0x0280 // disable Ready, BEM=0 + mtdcr ebccfgd,r4 + + addi r4,0,pb2cr + mtdcr ebccfga,r4 + addis r4,0,0xF011 // BAS=0xF01,BS=0x0(1MB),BU=0x3(R/W), + ori r4,r4,0x8000 // BW=0x0(8 bits) + mtdcr ebccfgd,r4 + + //----------------------------------------------------------------------- + // Memory Bank 3 (16552) initialization + //----------------------------------------------------------------------- + addi r4,0,pb3ap + mtdcr ebccfga,r4 + addis r4,0,0x0100 + ori r4,r4,0x0380 // enable Ready, BEM=0 + mtdcr ebccfgd,r4 + + addi r4,0,pb3cr + mtdcr ebccfga,r4 + addis r4,0,0xF021 // BAS=0xF02,BS=0x0(1MB),BU=0x3(R/W), + ori r4,r4,0x8000 // BW=0x0(8 bits) + mtdcr ebccfgd,r4 + + //----------------------------------------------------------------------- + // Memory Bank 4 (FPGA internal - DAC, ADC, etc) initialization + //----------------------------------------------------------------------- + addi r4,0,pb4ap + mtdcr ebccfga,r4 + addis r4,0,0x0100 + ori r4,r4,0x5380 // enable Ready, BEM=0 + mtdcr ebccfgd,r4 + + addi r4,0,pb4cr + mtdcr ebccfga,r4 + addis r4,0,0xF031 // BAS=0xF02,BS=0x0(1MB),BU=0x3(R/W), + ori r4,r4,0xc000 // BW=0x10(32 bits) + mtdcr ebccfgd,r4 + + nop // pass2 DCR errata #8 + blr + +//----------------------------------------------------------------------------- +// Function: sdram_init +// Description: Configures SDRAM memory banks. +// Auto Memory Configuration option reads the SDRAM EEPROM +// via the IIC bus and then configures the SDRAM memory +// banks appropriately. If Auto Memory Configuration is +// is not used, it is assumed that a 32MB 12x8(2) non-ECC DIMM is +// plugged, ie. the DIMM that shipped wih the Eval board. +//----------------------------------------------------------------------------- + .globl sdram_init + +sdram_init: + + mflr r31 + + //------------------------------------------------------------------- + // Set MB0CF for bank 0. (0-16MB) Address Mode 4 since 12x8(4) + //------------------------------------------------------------------- + addi r4,0,mem_mb0cf + mtdcr memcfga,r4 + addis r4,0,0x0004 + ori r4,r4,0x6001 + mtdcr memcfgd,r4 + + //------------------------------------------------------------------- + // Set the SDRAM Timing reg, SDTR1 and the refresh timer reg, RTR. + // To set the appropriate timings, we need to know the SDRAM speed. + // We can use the PLB speed since the SDRAM speed is the same as + // the PLB speed. The PLB speed is the FBK divider times the + // 405GP reference clock, which on the Walnut board is 33Mhz. + // Thus, if FBK div is 2, SDRAM is 66Mhz; if FBK div is 3, SDRAM is + // 100Mhz; if FBK is 3, SDRAM is 133Mhz. + // NOTE: The Walnut board supports SDRAM speeds of 66Mhz, 100Mhz, and + // maybe 133Mhz. + //------------------------------------------------------------------- + mfdcr r5,strap // determine FBK divider + // via STRAP reg to calc PLB speed. + // SDRAM speed is the same as the PLB + // speed. + rlwinm r4,r5,4,0x3 // get FBK divide bits + +..chk_66: + cmpi %cr0,0,r4,0x1 + bne ..chk_100 + addis r6,0,0x0085 // SDTR1 value for 66Mhz + ori r6,r6,0x4005 + addis r7,0,0x03F8 // RTR value for 66Mhz + b ..sdram_ok +..chk_100: + cmpi %cr0,0,r4,0x2 + bne ..chk_133 + addis r6,0,0x0086 // SDTR1 value for 100Mhz + ori r6,r6,0x400D + addis r7,0,0x05F0 // RTR value for 100Mhz + b ..sdram_ok +..chk_133: + addis r6,0,0x0107 // SDTR1 value for 133Mhz + ori r6,r6,0x4015 + addis r7,0,0x07F0 // RTR value for 133Mhz + +..sdram_ok: + //------------------------------------------------------------------- + // Set SDTR1 + //------------------------------------------------------------------- + addi r4,0,mem_sdtr1 + mtdcr memcfga,r4 + mtdcr memcfgd,r6 + + //------------------------------------------------------------------- + // Set RTR + //------------------------------------------------------------------- + addi r4,0,mem_rtr + mtdcr memcfga,r4 + mtdcr memcfgd,r7 + + //------------------------------------------------------------------- + // Delay to ensure 200usec have elapsed since reset. Assume worst + // case that the core is running 200Mhz: + // 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles + //------------------------------------------------------------------- + addis r3,0,0x0000 + ori r3,r3,0xA000 // ensure 200usec have passed since reset + mtctr r3 +..spinlp2: + bdnz ..spinlp2 // spin loop + + //------------------------------------------------------------------- + // Set memory controller options reg, MCOPT1. + // Set DC_EN to '1' and BRD_PRF to '01' for 16 byte PLB Burst + // read/prefetch. + //------------------------------------------------------------------- + addi r4,0,mem_mcopt1 + mtdcr memcfga,r4 + addis r4,0,0x8080 // set DC_EN=1 + ori r4,r4,0x0000 + mtdcr memcfgd,r4 + + //------------------------------------------------------------------- + // Delay to ensure 10msec have elapsed since reset. This is + // required for the MPC952 to stabalize. Assume worst + // case that the core is running 200Mhz: + // 200,000,000 (cycles/sec) X .010 (sec) = 0x1E8480 cycles + // This delay should occur before accessing SDRAM. + //------------------------------------------------------------------- + addis r3,0,0x001E + ori r3,r3,0x8480 // ensure 10msec have passed since reset + mtctr r3 +..spinlp3: + bdnz ..spinlp3 // spin loop + + mtlr r31 // restore lr + blr diff --git a/board/ar405/ppcboot.lds b/board/ar405/ppcboot.lds new file mode 100644 index 0000000..00269f4 --- /dev/null +++ b/board/ar405/ppcboot.lds @@ -0,0 +1,154 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +SECTIONS +{ + .resetvec 0xFFFFFFFC : + { + *(.resetvec) + } = 0xffff + + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + /* WARNING - the following is hand-optimized to fit within */ + /* the sector layout of our flash chips! XXX FIXME XXX */ + + cpu/ppc4xx/start.o (.text) + board/ar405/init.o (.text) + cpu/ppc4xx/traps.o (.text) + cpu/ppc4xx/interrupts.o (.text) + cpu/ppc4xx/serial.o (.text) + cpu/ppc4xx/cpu_init.o (.text) + cpu/ppc4xx/speed.o (.text) + cpu/ppc4xx/405gp_enet.o (.text) + common/dlmalloc.o (.text) + ppc/crc32.o (.text) + ppc/extable.o (.text) + ppc/zlib.o (.text) + + common/cmd_boot.o (.text) + common/cmd_bootm.o (.text) + common/cmd_flash.o (.text) + common/cmd_mem.o (.text) + common/cmd_nvedit.o (.text) + common/console.o (.text) + common/lists.o (.text) + common/board.o (.text) + common/main.o (.text) + net/net.o (.text) + + . = env_offset; + common/environment.o(.text) + + *(.text) + *(.fixup) + *(.got1) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(.rodata) + *(.rodata1) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + } + _end = . ; + PROVIDE (end = .); +} diff --git a/board/ar405/ppcboot.lds.debug b/board/ar405/ppcboot.lds.debug new file mode 100644 index 0000000..7e7b925 --- /dev/null +++ b/board/ar405/ppcboot.lds.debug @@ -0,0 +1,131 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + /* WARNING - the following is hand-optimized to fit within */ + /* the sector layout of our flash chips! XXX FIXME XXX */ + + cpu/mpc8xx/start.o (.text) + common/dlmalloc.o (.text) + ppc/vsprintf.o (.text) + ppc/crc32.o (.text) + ppc/extable.o (.text) + + common/environment.o(.text) + + *(.text) + *(.fixup) + *(.got1) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(.rodata) + *(.rodata1) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x0FFF) & 0xFFFFF000; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(4096); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(4096); + __init_end = .; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + } + _end = . ; + PROVIDE (end = .); +} + diff --git a/board/canbt/Makefile b/board/canbt/Makefile new file mode 100644 index 0000000..12b2fa8 --- /dev/null +++ b/board/canbt/Makefile @@ -0,0 +1,47 @@ +# +# (C) Copyright 2000 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +OBJS = $(BOARD).o flash.o +SOBJS = init.o + +$(LIB): $(OBJS) $(SOBJS) + $(AR) crv $@ $^ + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +sinclude .depend + +######################################################################### diff --git a/board/canbt/canbt.c b/board/canbt/canbt.c new file mode 100644 index 0000000..81773a1 --- /dev/null +++ b/board/canbt/canbt.c @@ -0,0 +1,276 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include "canbt.h" +#include + + +/* ------------------------------------------------------------------------- */ + +#if 0 +#define FPGA_DEBUG +#endif + +#define FPGA_PRG_SLEEP 32 /* fpga program sleep-time */ + +#define IBM405GP_GPIO0_OR 0xef600700 /* GPIO Output */ +#define IBM405GP_GPIO0_TCR 0xef600704 /* GPIO Three-State Control */ +#define IBM405GP_GPIO0_ODR 0xef600718 /* GPIO Open Drain */ +#define IBM405GP_GPIO0_IR 0xef60071c /* GPIO Input */ + +/* fpga configuration data - generated by bit2inc */ +const unsigned char fpgadata[] = +{ +#include "fpgadata.c" +}; + + +/****************************************************************************** + * + * fpga_boot - Load fpga-image into fpga + * + */ +static int fpga_boot(void) +{ + int i,j,index,len; + unsigned char b; + int size = sizeof(fpgadata); + + /* display infos on fpgaimage */ + index = 15; + for (i=0; i<4; i++) + { + len = fpgadata[index]; +#ifdef FPGA_DEBUG + printf("FPGA: %s\n", &(fpgadata[index+1])); +#endif + index += len+3; + } + + /* search for preamble 0xFF2X */ + for (index = 0; index < size-1 ; index++) + { + if ((fpgadata[index] == 0xff) && ((fpgadata[index+1] & 0xf0) == 0x20)) + break; + } +#ifdef FPGA_DEBUG + printf("FPGA: configdata starts at position 0x%x\n",index); + printf("FPGA: length of fpga-data %d\n", size-index); +#endif + + /* + * Setup port pins for fpga programming + */ + out32(IBM405GP_GPIO0_ODR, 0x00000000); /* no open drain pins */ + out32(IBM405GP_GPIO0_TCR, 0x07000000); /* setup for output */ + out32(IBM405GP_GPIO0_OR, 0x07000000); /* set output pins to high (default) */ + +#ifdef FPGA_DEBUG + printf("%s\n",((in32(IBM405GP_GPIO0_IR) & 0x00800000) == 0) ? "NOT DONE" : "DONE" ); +#endif + + /* + * Init fpga by asserting and deasserting PROGRAM* + */ + out32(IBM405GP_GPIO0_OR, 0x03000000); + udelay(FPGA_PRG_SLEEP*1000); +#ifdef FPGA_DEBUG + printf("%s\n",((in32(IBM405GP_GPIO0_IR) & 0x00800000) == 0) ? "NOT DONE" : "DONE" ); +#endif + out32(IBM405GP_GPIO0_OR, 0x07000000); + udelay(FPGA_PRG_SLEEP*1000); +#ifdef FPGA_DEBUG + printf("%s\n",((in32(IBM405GP_GPIO0_IR) & 0x00800000) == 0) ? "NOT DONE" : "DONE" ); +#endif + + /* write configuration-data into fpga... */ + for (i=index; i +#include +#include + +flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ + +/*----------------------------------------------------------------------- + * Functions + */ +static ulong flash_get_size (vu_long *addr, flash_info_t *info); + +int flash_write (uchar *, ulong, ulong); +flash_info_t *addr2info (ulong); + +static int write_word (flash_info_t *info, ulong dest, ulong data); +static void flash_get_offsets (ulong base, flash_info_t *info); + +/*----------------------------------------------------------------------- + * Protection Flags: + */ +#define FLAG_PROTECT_SET 0x01 +#define FLAG_PROTECT_CLEAR 0x02 + + +#ifdef CONFIG_ADCIOP +#define ADDR0 0x0aa9 +#define ADDR1 0x0556 +#define FLASH_WORD_SIZE unsigned char +#endif + +#if defined(CONFIG_CPCI405) || defined(CONFIG_AR405) || defined(CONFIG_CANBT) +#define ADDR0 0x5555 +#define ADDR1 0x2aaa +#define FLASH_WORD_SIZE unsigned short +#endif + +/*----------------------------------------------------------------------- + */ + +unsigned long flash_init (void) +{ + unsigned long size_b0, size_b1; + int i; + uint pbcr; + unsigned long base_b0, base_b1; + + /* Init: no FLASHes known */ + for (i=0; iflash_id & FLASH_VENDMASK) == FLASH_MAN_SST) { + for (i = 0; i < info->sector_count; i++) + info->start[i] = base + (i * 0x00010000); + } else { + if (info->flash_id & FLASH_BTYPE) { + /* set sector offsets for bottom boot block type */ + info->start[0] = base + 0x00000000; + info->start[1] = base + 0x00004000; + info->start[2] = base + 0x00006000; + info->start[3] = base + 0x00008000; + for (i = 4; i < info->sector_count; i++) { + info->start[i] = base + (i * 0x00010000) - 0x00030000; + } + } else { + /* set sector offsets for top boot block type */ + i = info->sector_count - 1; + info->start[i--] = base + info->size - 0x00004000; + info->start[i--] = base + info->size - 0x00006000; + info->start[i--] = base + info->size - 0x00008000; + for (; i >= 0; i--) { + info->start[i] = base + i * 0x00010000; + } + } + } +} + +/*----------------------------------------------------------------------- + */ +void flash_print_info (flash_info_t *info) +{ + int i; + int k; + int size; + int erased; + volatile unsigned long *flash; + + if (info->flash_id == FLASH_UNKNOWN) { + printf ("missing or unknown FLASH type\n"); + return; + } + + switch (info->flash_id & FLASH_VENDMASK) { + case FLASH_MAN_AMD: printf ("AMD "); break; + case FLASH_MAN_FUJ: printf ("FUJITSU "); break; + case FLASH_MAN_SST: printf ("SST "); break; + default: printf ("Unknown Vendor "); break; + } + + switch (info->flash_id & FLASH_TYPEMASK) { + case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n"); + break; + case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n"); + break; + case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n"); + break; + case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n"); + break; + case FLASH_SST800A: printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n"); + break; + case FLASH_SST160A: printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n"); + break; + default: printf ("Unknown Chip Type\n"); + break; + } + + printf (" Size: %ld MB in %d Sectors\n", + info->size >> 20, info->sector_count); + + printf (" Sector Start Addresses:"); + for (i=0; isector_count; ++i) { + /* + * Check if whole sector is erased + */ + if (i != (info->sector_count-1)) + size = info->start[i+1] - info->start[i]; + else + size = info->start[0] + info->size - info->start[i]; + erased = 1; + flash = (volatile unsigned long *)info->start[i]; + size = size >> 2; /* divide by 4 for longword access */ + for (k=0; kstart[i], + info->protect[i] ? " (RO)" : " " +#else + printf (" %08lX%s%s", + info->start[i], + erased ? " E" : " ", + info->protect[i] ? "RO " : " " +#endif + ); + } + printf ("\n"); +} + +/*----------------------------------------------------------------------- + */ + + +/*----------------------------------------------------------------------- + */ + +/* + * The following code cannot be run from FLASH! + */ +static ulong flash_get_size (vu_long *addr, flash_info_t *info) +{ + short i; + FLASH_WORD_SIZE value; + ulong base = (ulong)addr; + volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr; + + /* Write auto select command: read Manufacturer ID */ + addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; + addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055; + addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090; + +#ifdef CONFIG_ADCIOP + value = addr2[2]; +#else + value = addr2[0]; +#endif + + switch (value) { + case (FLASH_WORD_SIZE)AMD_MANUFACT: + info->flash_id = FLASH_MAN_AMD; + break; + case (FLASH_WORD_SIZE)FUJ_MANUFACT: + info->flash_id = FLASH_MAN_FUJ; + break; + case (FLASH_WORD_SIZE)SST_MANUFACT: + info->flash_id = FLASH_MAN_SST; + break; + default: + info->flash_id = FLASH_UNKNOWN; + info->sector_count = 0; + info->size = 0; + return (0); /* no or unknown flash */ + } + +#ifdef CONFIG_ADCIOP + value = addr2[0]; /* device ID */ + // printf("\ndev_code=%x\n", value); +#else + value = addr2[1]; /* device ID */ +#endif + + switch (value) { + case (FLASH_WORD_SIZE)AMD_ID_LV400T: + info->flash_id += FLASH_AM400T; + info->sector_count = 11; + info->size = 0x00080000; + break; /* => 0.5 MB */ + + case (FLASH_WORD_SIZE)AMD_ID_LV400B: + info->flash_id += FLASH_AM400B; + info->sector_count = 11; + info->size = 0x00080000; + break; /* => 0.5 MB */ + + case (FLASH_WORD_SIZE)AMD_ID_LV800T: + info->flash_id += FLASH_AM800T; + info->sector_count = 19; + info->size = 0x00100000; + break; /* => 1 MB */ + + case (FLASH_WORD_SIZE)AMD_ID_LV800B: + info->flash_id += FLASH_AM800B; + info->sector_count = 19; + info->size = 0x00100000; + break; /* => 1 MB */ + + case (FLASH_WORD_SIZE)AMD_ID_LV160T: + info->flash_id += FLASH_AM160T; + info->sector_count = 35; + info->size = 0x00200000; + break; /* => 2 MB */ + + case (FLASH_WORD_SIZE)AMD_ID_LV160B: + info->flash_id += FLASH_AM160B; + info->sector_count = 35; + info->size = 0x00200000; + break; /* => 2 MB */ +#if 0 /* enable when device IDs are available */ + case (FLASH_WORD_SIZE)AMD_ID_LV320T: + info->flash_id += FLASH_AM320T; + info->sector_count = 67; + info->size = 0x00400000; + break; /* => 4 MB */ + + case (FLASH_WORD_SIZE)AMD_ID_LV320B: + info->flash_id += FLASH_AM320B; + info->sector_count = 67; + info->size = 0x00400000; + break; /* => 4 MB */ +#endif + case (FLASH_WORD_SIZE)SST_ID_xF800A: + info->flash_id += FLASH_SST800A; + info->sector_count = 16; + info->size = 0x00100000; + break; /* => 1 MB */ + + case (FLASH_WORD_SIZE)SST_ID_xF160A: + info->flash_id += FLASH_SST160A; + info->sector_count = 32; + info->size = 0x00200000; + break; /* => 2 MB */ + + default: + info->flash_id = FLASH_UNKNOWN; + return (0); /* => no or unknown flash */ + + } + + /* set up sector start adress table */ + if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) { + for (i = 0; i < info->sector_count; i++) + info->start[i] = base + (i * 0x00010000); + } else { + if (info->flash_id & FLASH_BTYPE) { + /* set sector offsets for bottom boot block type */ + info->start[0] = base + 0x00000000; + info->start[1] = base + 0x00004000; + info->start[2] = base + 0x00006000; + info->start[3] = base + 0x00008000; + for (i = 4; i < info->sector_count; i++) { + info->start[i] = base + (i * 0x00010000) - 0x00030000; + } + } else { + /* set sector offsets for top boot block type */ + i = info->sector_count - 1; + info->start[i--] = base + info->size - 0x00004000; + info->start[i--] = base + info->size - 0x00006000; + info->start[i--] = base + info->size - 0x00008000; + for (; i >= 0; i--) { + info->start[i] = base + i * 0x00010000; + } + } + } + + /* check for protected sectors */ + for (i = 0; i < info->sector_count; i++) { + /* read sector protection at sector address, (A7 .. A0) = 0x02 */ + /* D0 = 1 if protected */ +#ifdef CONFIG_ADCIOP + addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]); + info->protect[i] = addr2[4] & 1; +#else + addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]); + if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) + info->protect[i] = 0; + else + info->protect[i] = addr2[2] & 1; +#endif + } + + /* + * Prevent writes to uninitialized FLASH. + */ + if (info->flash_id != FLASH_UNKNOWN) { +#if 0 /* test-only */ +#ifdef CONFIG_ADCIOP + addr2 = (volatile unsigned char *)info->start[0]; + addr2[ADDR0] = 0xAA; + addr2[ADDR1] = 0x55; + addr2[ADDR0] = 0xF0; /* reset bank */ +#else + addr2 = (FLASH_WORD_SIZE *)info->start[0]; + *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ +#endif +#else /* test-only */ + addr2 = (FLASH_WORD_SIZE *)info->start[0]; + *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ +#endif /* test-only */ + } + + return (info->size); +} + + +/*----------------------------------------------------------------------- + */ + +void flash_erase (flash_info_t *info, int s_first, int s_last) +{ + volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]); + volatile FLASH_WORD_SIZE *addr2; + int flag, prot, sect, l_sect; + ulong start, now, last; + int i; + + if ((s_first < 0) || (s_first > s_last)) { + if (info->flash_id == FLASH_UNKNOWN) { + printf ("- missing\n"); + } else { + printf ("- no sectors to erase\n"); + } + return; + } + + if (info->flash_id == FLASH_UNKNOWN) { + printf ("Can't erase unknown flash type - aborted\n"); + return; + } + + prot = 0; + for (sect=s_first; sect<=s_last; ++sect) { + if (info->protect[sect]) { + prot++; + } + } + + if (prot) { + printf ("- Warning: %d protected sectors will not be erased!\n", + prot); + } else { + printf ("\n"); + } + + l_sect = -1; + + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts(); + + /* Start erase on unprotected sectors */ + for (sect = s_first; sect<=s_last; sect++) { + if (info->protect[sect] == 0) { /* not protected */ + addr2 = (FLASH_WORD_SIZE *)(info->start[sect]); + if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) { + addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; + addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; + addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080; + addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; + addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; + addr2[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */ + for (i=0; i<50; i++) + udelay(1000); /* wait 1 ms */ + } else { + addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; + addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; + addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080; + addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; + addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; + addr2[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */ + } + l_sect = sect; + } + } + + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); + + /* wait at least 80us - let's wait 1 ms */ + udelay (1000); + + /* + * We wait for the last triggered sector + */ + if (l_sect < 0) + goto DONE; + + start = get_timer (0); + last = start; + addr = (FLASH_WORD_SIZE *)(info->start[l_sect]); + while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) { + if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + printf ("Timeout\n"); + return; + } + /* show that we're waiting */ + if ((now - last) > 1000) { /* every second */ + putc ('.'); + last = now; + } + } + +DONE: + /* reset to read mode */ + addr = (FLASH_WORD_SIZE *)info->start[0]; + addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ + + printf (" done\n"); +} + + +/*----------------------------------------------------------------------- + * Copy memory to flash, returns: + * 0 - OK + * 1 - write timeout + * 2 - Flash not erased + */ + +int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +{ + ulong cp, wp, data; + int i, l, rc; + + wp = (addr & ~3); /* get lower word aligned address */ + + /* + * handle unaligned start bytes + */ + if ((l = addr - wp) != 0) { + data = 0; + for (i=0, cp=wp; i0; ++i) { + data = (data << 8) | *src++; + --cnt; + ++cp; + } + for (; cnt==0 && i<4; ++i, ++cp) { + data = (data << 8) | (*(uchar *)cp); + } + + if ((rc = write_word(info, wp, data)) != 0) { + return (rc); + } + wp += 4; + } + + /* + * handle word aligned part + */ + while (cnt >= 4) { + data = 0; + for (i=0; i<4; ++i) { + data = (data << 8) | *src++; + } + if ((rc = write_word(info, wp, data)) != 0) { + return (rc); + } + wp += 4; + cnt -= 4; + } + + if (cnt == 0) { + return (0); + } + + /* + * handle unaligned tail bytes + */ + data = 0; + for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { + data = (data << 8) | *src++; + --cnt; + } + for (; i<4; ++i, ++cp) { + data = (data << 8) | (*(uchar *)cp); + } + + return (write_word(info, wp, data)); +} + +/*----------------------------------------------------------------------- + * Write a word to Flash, returns: + * 0 - OK + * 1 - write timeout + * 2 - Flash not erased + */ +static int write_word (flash_info_t *info, ulong dest, ulong data) +{ + volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]); + volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest; + volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data; + ulong start; + int flag; + int i; + + /* Check if Flash is (sufficiently) erased */ + if ((*((volatile FLASH_WORD_SIZE *)dest) & + (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) { + return (2); + } + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts(); + + for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++) + { + addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; + addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055; + addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0; + + dest2[i] = data2[i]; + + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); + + /* data polling for D7 */ + start = get_timer (0); + while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != + (data2[i] & (FLASH_WORD_SIZE)0x00800080)) { + if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + return (1); + } + } + } + + return (0); +} + +/*----------------------------------------------------------------------- + */ diff --git a/board/canbt/fpgadata.c b/board/canbt/fpgadata.c new file mode 100644 index 0000000..f1e9d96 --- /dev/null +++ b/board/canbt/fpgadata.c @@ -0,0 +1,431 @@ + 0x00,0x09,0x0f,0xf0,0x0f,0xf0,0x0f,0xf0,0x0f,0xf0,0x00,0x00,0x01,0x61,0x00,0x08, + 0x63,0x62,0x74,0x2e,0x6e,0x63,0x64,0x00,0x62,0x00,0x0b,0x73,0x30,0x35,0x78,0x6c, + 0x76,0x71,0x31,0x30,0x30,0x00,0x63,0x00,0x0b,0x32,0x30,0x30,0x31,0x2f,0x30,0x31, + 0x2f,0x31,0x31,0x00,0x64,0x00,0x09,0x31,0x37,0x3a,0x35,0x34,0x3a,0x32,0x33,0x00, + 0x65,0x00,0x00,0x1a,0xa2,0xff,0x20,0x0d,0x50,0x9f,0x5f,0xff,0x7b,0xbf,0xaf,0xeb, + 0xfa,0xfe,0xef,0xeb,0xfb,0xff,0xfb,0xaf,0xef,0xe4,0xff,0xfe,0xfe,0xff,0xbf,0xef, + 0xfb,0xff,0xbf,0xef,0xfb,0xba,0xef,0xbf,0xff,0xd1,0xfe,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xff,0x8b,0xef,0xfb,0xde,0xff,0xbf,0xef, + 0xfb,0xff,0xbf,0xef,0xfb,0xf6,0xff,0xbf,0xff,0xd7,0xfd,0xff,0xbf,0xef,0xfb,0xfe, + 0xff,0xbf,0xfb,0xfe,0xff,0x8f,0xef,0xfb,0xff,0x4f,0x7f,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x96,0x7f,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfc,0xbf,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xf1,0x7f,0xff,0xfd,0xfd,0x7f,0x5f,0xd7, + 0xf7,0x7f,0x7f,0xd7,0xfc,0xff,0xff,0x7f,0xe2,0xff,0xff,0xff,0xfe,0xff,0xff,0xef, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xd5,0x6f,0xff,0xf7,0xff,0x3f,0x7f,0xff, + 0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xeb,0xff,0xdf,0xff,0xfe,0xff,0xff,0xff, + 0xfb,0xff,0xff,0xbf,0xf7,0xff,0xff,0xff,0x27,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xf7,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xef,0xff,0xf7,0xfd,0xff,0x7d,0xcf,0xf7, + 0xff,0x7f,0xdf,0xf7,0xfd,0xff,0x77,0xfe,0x9f,0xff,0xef,0xbb,0xfe,0x7f,0xbf,0xef, + 0xfe,0xbb,0xbf,0xef,0x7b,0xfe,0xff,0xf8,0xbf,0xfe,0x77,0x9f,0xe7,0x39,0xfe,0x7f, + 0xa7,0xf9,0xdc,0x55,0x9f,0x67,0xff,0xfe,0x7f,0xff,0xbe,0xef,0xfb,0xfe,0xbf,0xbf, + 0x7b,0xfe,0xeb,0xbf,0xef,0xfb,0xff,0xe0,0xf5,0xf9,0xfe,0x7f,0x9f,0xe6,0xd9,0xff, + 0x9f,0xe6,0xf9,0xfe,0x77,0x9f,0xed,0xd1,0xff,0xfd,0xff,0x7f,0xdf,0xf7,0xfd,0xff, + 0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xff,0xf3,0xff,0xef,0xfb,0xfe,0xff,0xbb,0xef,0xf2, + 0xff,0x3e,0xef,0xdb,0xfe,0xef,0xff,0xa7,0xff,0xdb,0xd6,0xf9,0xbe,0x6f,0x9b,0xf5, + 0xbf,0x6f,0x5b,0xe6,0xfd,0xbe,0xfe,0xce,0xff,0xff,0xbf,0xff,0xdf,0xdf,0xff,0xff, + 0xff,0xde,0xfe,0xdf,0xff,0xff,0xff,0x1f,0xff,0xfd,0x7f,0x7f,0xfb,0xff,0xfb,0xff, + 0xbb,0xbf,0xf7,0xff,0xff,0x7f,0xee,0xbf,0xff,0xff,0xfd,0xff,0xff,0xdf,0xff,0xff, + 0xf7,0xdb,0xfd,0xff,0xff,0xff,0xfd,0x7f,0xff,0xff,0xff,0xfe,0xfd,0xff,0xfe,0xbf, + 0xff,0xfb,0xff,0xfd,0xff,0xff,0xfa,0xff,0xff,0x5f,0xdf,0xf5,0xfd,0xff,0x7f,0xf7, + 0xfc,0xff,0x7b,0xdf,0xf7,0xff,0xe9,0xff,0xf4,0xf7,0xff,0xff,0xff,0xff,0xfe,0xff, + 0xff,0xff,0xff,0xfd,0xff,0xff,0x9b,0xbe,0xef,0xef,0x7b,0xfe,0xff,0xbf,0xff,0xff, + 0xff,0xdf,0xff,0xff,0xff,0xef,0x77,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xfa,0x0f,0xfe,0xff,0xff,0xff,0xdd,0xff,0xff,0x77,0xf7, + 0xff,0xfd,0xde,0xff,0xff,0xff,0x9f,0xff,0xfb,0x7d,0xff,0xff,0xbf,0xff,0xff,0xfb, + 0xfb,0xff,0xff,0xff,0xbf,0xba,0x3f,0xfe,0xbd,0xf7,0xff,0xff,0xff,0xff,0xff,0xff, + 0xef,0xff,0xf7,0xff,0xff,0x7c,0x7f,0xfe,0xbf,0xff,0xfd,0xff,0xff,0xff,0xfd,0xff, + 0xbf,0xff,0xfb,0xff,0xdf,0xf4,0xff,0xbf,0xff,0xff,0xff,0xfb,0x7c,0xff,0xe7,0xfb, + 0xff,0x5f,0xbf,0xed,0xfd,0xcd,0xff,0xff,0xff,0xff,0xf9,0xcd,0xf4,0xf7,0x7f,0xd9, + 0xff,0xfd,0xff,0x7f,0xff,0xeb,0x7f,0xff,0xff,0xdf,0xfb,0xed,0xff,0xff,0x9e,0xe7, + 0xff,0xfe,0x7f,0x97,0xff,0x67,0xff,0xff,0xff,0xff,0xff,0xff,0xcf,0xfc,0xff,0xbf, + 0xcf,0xf3,0x7c,0xff,0xff,0xcf,0xff,0xff,0xff,0xff,0xff,0xff,0xf6,0xbf,0x75,0xdf, + 0xf7,0xfc,0xff,0x7f,0xfc,0x1f,0xff,0xff,0xf7,0xff,0xfd,0x7d,0x9f,0xeb,0xdf,0x77, + 0x1d,0xe7,0xf1,0x7f,0xfd,0xbf,0xff,0xff,0xaf,0xff,0xfe,0xff,0xbf,0xfb,0xfd,0xff, + 0xff,0xc5,0xeb,0xff,0xfd,0x7f,0xff,0xff,0x7f,0xff,0xfd,0xfc,0xff,0xb7,0xff,0xff, + 0xff,0xbf,0xff,0xff,0xe2,0xaf,0xff,0xff,0xff,0xff,0x3f,0xcf,0x73,0xff,0x3f,0xff, + 0xe7,0xfc,0xff,0xff,0x49,0xbf,0xff,0xab,0xff,0xfe,0x7f,0x9f,0xeb,0xff,0xff,0xff, + 0xbf,0xf3,0xff,0xf7,0xdb,0xde,0x6b,0xfa,0xe7,0xbc,0xf7,0x3f,0xcf,0xff,0xf7,0xff, + 0x9f,0xf3,0xff,0xed,0x02,0xfe,0x57,0x3d,0xe5,0xf3,0xec,0xff,0xbf,0xf9,0xec,0xff, + 0x9f,0xef,0xf3,0xf6,0x67,0xdf,0xff,0xff,0xd7,0xff,0xdf,0xf7,0x9f,0x75,0xdf,0xf7, + 0x5d,0xef,0x75,0xf8,0x03,0xff,0xf7,0xfd,0x6f,0x7b,0xff,0xff,0x7f,0xdb,0xf6,0xfd, + 0xbf,0x6f,0xfa,0xce,0x37,0xfe,0xbf,0xaf,0xfb,0xed,0xf5,0x75,0x77,0xfd,0xff,0x7d, + 0x5f,0xf7,0xef,0xb6,0x3f,0xfd,0x7f,0xdf,0xdf,0xfe,0xcf,0xba,0xfb,0xfe,0xff,0xba, + 0xef,0xfb,0xff,0xea,0xfb,0xff,0xe7,0xf9,0xff,0xfb,0xb6,0xff,0xef,0xfb,0xb6,0xff, + 0xbb,0x6e,0xe7,0x9d,0xff,0xff,0xef,0xfb,0xff,0xff,0xbf,0xef,0xfe,0xff,0xff,0xef, + 0xff,0xfe,0x2f,0xf1,0xff,0xfb,0xbe,0xef,0xbf,0x77,0x1d,0xc7,0xdb,0x77,0xfd,0xe7, + 0x7f,0xdf,0xfe,0x66,0xff,0xff,0xef,0xfb,0xf6,0xff,0xbf,0xef,0xfd,0xff,0xbf,0x6f, + 0xfb,0xff,0xff,0x6f,0xff,0xfe,0xff,0xbf,0xef,0xbb,0xef,0xbe,0xff,0xbe,0xee,0xfb, + 0xee,0xff,0xff,0xdf,0xff,0x5f,0xd7,0xf7,0xff,0x9f,0xef,0xfe,0x7f,0xbf,0xef,0xfb, + 0xfe,0xff,0xfd,0x3f,0xfe,0x9f,0xa7,0xf9,0xff,0xbf,0xef,0xfe,0xff,0xbf,0xef,0xfb, + 0xfe,0xff,0xfa,0x7f,0xfd,0x7f,0xdf,0xdf,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xe8,0xff,0xfa,0xf8,0xbe,0x6e,0x5f,0xf7,0xed,0xf6,0x1f,0xc7,0xe9,0xfe, + 0x7e,0x9f,0xe5,0xff,0xff,0xfd,0x7f,0x7c,0xfb,0xff,0xdf,0xed,0xbb,0xae,0x7b,0xfe, + 0xfd,0xbf,0xeb,0xff,0xff,0xfa,0xff,0xbf,0x77,0xdf,0xf7,0xfe,0x77,0x9f,0xe7,0xf9, + 0xfe,0x7f,0xd7,0xff,0xd7,0xfd,0xfd,0xfc,0xff,0x3f,0xcb,0xb9,0xff,0x7f,0x5f,0xf7, + 0xfd,0xfd,0x2f,0x7f,0xaf,0xe9,0xfe,0xef,0xf7,0xfd,0x7f,0xd7,0xf3,0xfc,0x7f,0x7f, + 0xd7,0xfe,0x4f,0xff,0xf7,0xf3,0xff,0xfd,0xff,0x7f,0xfa,0xff,0x3f,0xaf,0xe9,0xfa, + 0xef,0xf7,0xb9,0xff,0xe8,0xfa,0x7e,0x95,0xaf,0x69,0xde,0x8f,0xab,0xeb,0x7a,0xfe, + 0xbf,0xfe,0x7f,0xdb,0xef,0xff,0xff,0xbf,0xff,0xbf,0xf3,0xfe,0xbf,0x33,0xcf,0xf3, + 0xff,0x64,0x7f,0xff,0xbf,0xea,0x7e,0xbe,0xad,0x75,0x2d,0xf7,0x7b,0xee,0xea,0xbf, + 0xff,0xb1,0xff,0xff,0xbf,0xff,0xf3,0xff,0xff,0xfd,0xff,0xbf,0xfb,0xfe,0xef,0xbf, + 0xf7,0xbb,0x8f,0xfb,0xdf,0xff,0xff,0xb7,0xef,0xd6,0xbd,0xad,0xe3,0xfa,0x7e,0x2f, + 0xfc,0xa1,0xfb,0xdf,0xff,0xfb,0xff,0xef,0x77,0xc3,0x7f,0x6f,0xde,0xfe,0xfd,0xff, + 0xfe,0x87,0xff,0xff,0xfa,0xff,0xff,0xd5,0xee,0xeb,0xdf,0xbb,0xcf,0x63,0xfe,0xef, + 0xfb,0x8b,0xff,0x73,0xce,0x77,0xaf,0xfe,0x4f,0xcf,0xfc,0xfd,0x7b,0x5f,0xf3,0xff, + 0xe9,0x3f,0xff,0xa7,0xbd,0xef,0xff,0xd7,0xdf,0xbf,0xde,0xfe,0xef,0xbf,0xdb,0xff, + 0xf8,0x3f,0xff,0xff,0x3d,0xcf,0xe3,0xf8,0xb7,0x4f,0xf4,0xfb,0xfe,0xff,0xef,0xff, + 0xfa,0xff,0xdf,0xbf,0xbf,0xeb,0xfb,0xf9,0xfe,0xef,0xff,0xf7,0xf7,0xff,0xef,0xff, + 0xf1,0xbf,0xff,0xee,0xf3,0x9b,0xab,0xcd,0xfe,0xbc,0x93,0x3d,0xff,0x7b,0xed,0xf7, + 0xa3,0xff,0xfb,0xff,0x5f,0x3f,0xfd,0xeb,0xf7,0xe5,0xef,0xf7,0x9d,0xff,0xe7,0xff, + 0x97,0xff,0xef,0xff,0xbf,0x7f,0xff,0xdf,0xfb,0xef,0xdd,0xff,0xff,0xff,0xff,0xff, + 0x6b,0xf9,0xfd,0x2f,0xfb,0x3e,0xcc,0xf3,0x5b,0xbf,0xed,0x79,0xff,0x7f,0xbf,0xfd, + 0x9a,0xfa,0xff,0xdf,0xf7,0x7c,0xd9,0xfe,0xbf,0xfd,0xba,0x7f,0xdf,0xff,0xff,0x7c, + 0xa5,0xff,0xdd,0x3e,0x6b,0xd2,0xe7,0xe9,0xee,0xdb,0x76,0xcd,0xb7,0x5e,0x9e,0xf0, + 0x6f,0xff,0xbf,0x7e,0xd7,0x95,0xff,0xff,0xf7,0xaf,0x6b,0xda,0xf6,0xff,0x3f,0x76, + 0x7f,0xf3,0xde,0x96,0xaf,0xe9,0xff,0x6d,0xbd,0x5b,0x7e,0xcd,0xbc,0x7e,0xdf,0x8d, + 0x3f,0x8f,0xb9,0xba,0x75,0x97,0x6f,0xfb,0xfb,0x9e,0xf7,0xbd,0xff,0xf7,0xec,0xcb, + 0x6f,0xef,0xeb,0xfe,0xbf,0xaf,0xf7,0x46,0xf4,0xbf,0xef,0xfb,0xe7,0xff,0xfb,0xd7, + 0xff,0xff,0xf6,0x7d,0x7f,0x5f,0xfb,0xbe,0x6d,0xdb,0xf6,0xfd,0xad,0xef,0xff,0x67, + 0xf9,0xfd,0xff,0x1f,0xe7,0xd9,0xee,0x3b,0x5e,0xf3,0xbc,0xef,0x2f,0xcf,0xfa,0x97, + 0xfb,0xf6,0x7c,0xff,0xef,0x9b,0xfe,0x7f,0x7f,0xf3,0xfc,0xfd,0x3d,0xcf,0xfb,0x9f, + 0xf9,0xbf,0x63,0xfb,0xb6,0x2d,0xdf,0x7b,0xfa,0xf4,0xbf,0xaf,0xfb,0x77,0xeb,0x7f, + 0xdb,0xed,0xf3,0xbf,0x6f,0x9f,0xf6,0xfe,0xf5,0xb9,0x6f,0x5b,0xbe,0xdf,0xe8,0xff, + 0xdf,0xff,0xfe,0xff,0x7f,0xfe,0xf7,0xff,0xfd,0xef,0x7f,0xde,0xff,0xff,0xe1,0xff, + 0xbf,0xef,0x1e,0x5f,0xf9,0xee,0xff,0x4b,0xfe,0xff,0xaf,0xef,0x7b,0xff,0x8b,0xff, + 0xfc,0xbb,0xbe,0x9d,0xf3,0xfe,0xfe,0x8b,0xfb,0x7e,0xff,0xae,0xef,0xff,0x63,0xff, + 0xff,0xff,0xdb,0xfb,0xf7,0xff,0xbd,0x7b,0xdf,0xf7,0x7d,0xef,0x77,0xfe,0x8f,0xff, + 0xff,0x9d,0xe7,0xe3,0xf8,0x7f,0x9a,0xf8,0xbe,0x2e,0xcb,0xb6,0xf9,0xff,0x1f,0xff, + 0xff,0xff,0xfc,0xf7,0x7e,0xe7,0xfc,0x7f,0x7f,0xdf,0xf7,0xff,0xff,0xfb,0xbf,0xff, + 0xbf,0xff,0xe9,0xf3,0xf9,0xff,0xef,0xfa,0xfe,0xbf,0x2f,0xcf,0xff,0xfc,0x7f,0xff, + 0x7f,0xff,0xff,0x1f,0xc7,0xff,0xb7,0xff,0xff,0xf4,0xfd,0x37,0xff,0xe0,0xdf,0xfe, + 0xdf,0xf7,0xe6,0xff,0x1f,0xdf,0xbd,0xff,0x7f,0xc7,0xf1,0xfd,0xff,0xec,0xff,0xf7, + 0xfd,0x3f,0x2b,0xeb,0xf7,0xff,0xaf,0xeb,0xba,0xfe,0xbf,0x2f,0xff,0x23,0xfe,0xf6, + 0x1d,0xae,0xeb,0xfa,0xde,0x3d,0xe8,0xf8,0xfe,0x1f,0xa4,0xeb,0xff,0x27,0xff,0xfd, + 0xff,0xff,0x9b,0xcb,0xea,0xef,0x7f,0xce,0xf0,0xfc,0xff,0xfb,0xfe,0x67,0xff,0xff, + 0xff,0xe3,0xfc,0xae,0xdf,0x76,0xaf,0xf5,0xf7,0x7f,0xff,0xff,0xfb,0x5f,0xfb,0xfb, + 0xbf,0xef,0xbf,0xed,0xf7,0xdf,0xfd,0x7f,0x5d,0xd7,0xef,0x7f,0xf9,0x1e,0xfe,0xff, + 0x83,0xe1,0xfa,0xfe,0xbc,0xed,0xee,0xfb,0xaf,0xaf,0xe3,0xff,0xe9,0x7f,0xff,0x7f, + 0x7f,0xef,0xd6,0xf7,0xb6,0x37,0x67,0xfb,0xfd,0x6f,0xde,0xff,0xe4,0x7f,0xff,0xed, + 0xfd,0xfb,0xf3,0x9a,0xf6,0xef,0xff,0xf3,0xef,0xbf,0xfb,0xff,0x81,0x7e,0xd5,0xfd, + 0xbf,0xed,0xfe,0xf3,0xfd,0x7f,0xfd,0xe5,0xfe,0xbb,0xff,0xff,0x93,0xfd,0x7f,0xeb, + 0xef,0xfb,0xff,0xfb,0xf3,0x9f,0xfd,0xff,0xef,0xff,0xff,0xdf,0x97,0xff,0xfd,0xd4, + 0xff,0x9f,0xff,0x2f,0x77,0xfe,0x3f,0x1f,0xe0,0xff,0xbf,0x3e,0xcb,0xff,0x7f,0x7f, + 0xff,0xff,0xff,0xef,0xef,0xff,0xdf,0xbf,0xf7,0x7f,0xff,0x7e,0x5f,0xfd,0xd7,0xd7, + 0xb5,0x7b,0xfe,0x5f,0xfc,0xe8,0x7e,0xdf,0xf7,0xfd,0xff,0xf8,0xbf,0xff,0xbf,0xef, + 0xfb,0xf7,0xff,0xb7,0xf1,0x4e,0xef,0x7d,0xe6,0x73,0xff,0xfa,0x5f,0xfd,0x7b,0xb7, + 0xf7,0xff,0xbf,0x7e,0xaf,0xfb,0x3f,0xfa,0x37,0xef,0xff,0xe2,0xaf,0x9f,0xdf,0xfd, + 0x7e,0x6e,0x7b,0x3f,0xf3,0xff,0xff,0xbf,0xef,0xbf,0xff,0x59,0xbf,0xab,0xff,0xf3, + 0xff,0xed,0xf6,0xeb,0xff,0xff,0xaf,0xff,0xbf,0x7f,0xf7,0xe2,0x7f,0x39,0x9f,0xf4, + 0xbc,0xf7,0x5b,0x7e,0xaf,0xff,0xfc,0xd3,0x72,0xf5,0x6d,0x92,0xdc,0xf3,0xff,0xfd, + 0x79,0xef,0xdf,0x3d,0x7f,0xff,0xff,0xff,0xef,0xf9,0xf7,0x07,0xff,0xe5,0xdf,0xff, + 0xdf,0xf3,0x6f,0xff,0xed,0xff,0xa9,0xee,0x6b,0x7d,0xfb,0x83,0xff,0xef,0x7d,0xaf, + 0x7f,0xef,0x77,0xff,0x7f,0xff,0x57,0xfe,0xa6,0xd3,0xc8,0xb7,0xff,0xbf,0xef,0xeb, + 0x57,0xff,0xb7,0xef,0xdf,0xfe,0xbd,0x3f,0x4f,0x9f,0xbe,0x3f,0xff,0x9f,0x7f,0xd4, + 0xbf,0xbd,0xff,0xf7,0x9f,0xfd,0x4a,0xfa,0xbb,0xbf,0x3c,0xff,0xff,0x4f,0xfb,0x75, + 0xbf,0x1f,0xff,0xfe,0x3f,0xb7,0x5f,0xf3,0x77,0xbf,0x89,0xff,0xff,0x63,0xfb,0xe7, + 0xff,0xff,0xff,0xfe,0x7f,0xbe,0x7f,0xf9,0xff,0xff,0xf1,0xff,0xd8,0xfe,0xef,0x95, + 0x6f,0xfb,0xf7,0xb7,0xef,0x99,0xfe,0xff,0x9f,0xfe,0x97,0xff,0x3e,0xff,0xff,0xce, + 0xff,0xbf,0x7f,0xff,0xff,0x3e,0xef,0xbf,0xff,0xff,0x8f,0xfe,0xff,0xff,0xff,0xbb, + 0xfb,0xff,0xff,0xff,0xfe,0xfb,0xbf,0xff,0xff,0xff,0x5f,0xff,0xee,0xff,0xec,0x3f, + 0x7e,0x5f,0xbf,0xff,0x7f,0x4b,0xfe,0xfe,0xff,0xf8,0x3f,0xf7,0xef,0x77,0xf8,0xfb, + 0x3c,0x9f,0xf9,0xf7,0x76,0xcf,0xfb,0xfd,0xff,0xfa,0x3f,0xff,0x7e,0x7e,0xf7,0xef, + 0xfd,0xff,0xff,0xff,0xf9,0x73,0xfc,0xff,0xff,0xe8,0xff,0xff,0xf8,0xfe,0x66,0x5f, + 0xe7,0xf9,0xff,0x9f,0xe3,0xe5,0xfe,0x7f,0x9f,0xfd,0xff,0xfd,0xff,0xbf,0xcf,0xff, + 0xfd,0xff,0x67,0xfb,0xf6,0xff,0xff,0x67,0xff,0x93,0xff,0xff,0xff,0x7f,0xbb,0x7f, + 0xeb,0xfe,0xbf,0xf7,0xfd,0xb2,0xfe,0xff,0xff,0x13,0xff,0xf7,0xf7,0xff,0x38,0xff, + 0xff,0xf9,0xff,0xff,0xdf,0x8d,0xfd,0xff,0xfd,0x6f,0xff,0xfd,0xed,0xfe,0xcf,0xf7, + 0xff,0xfb,0x7f,0xdf,0xfc,0xfb,0x7b,0x7f,0xff,0x9f,0xff,0x7e,0xfd,0xff,0xec,0xbb, + 0xc7,0xff,0xff,0xff,0xff,0xdf,0xf2,0x77,0xfe,0x3f,0xff,0x6b,0x7a,0x3e,0x9b,0xaf, + 0xc9,0xde,0xbf,0x2f,0xeb,0xfa,0xbe,0x3f,0xfd,0x6f,0xff,0xef,0xff,0xf7,0x7c,0xdf, + 0xff,0xfd,0x1f,0xff,0x2c,0xb7,0xef,0xbf,0x70,0x7f,0xdf,0xff,0xe9,0xfe,0xcf,0xf7, + 0xf7,0xff,0xdf,0xfa,0x7f,0xff,0xff,0xff,0xb9,0x77,0xff,0xff,0xff,0xdf,0xec,0xef, + 0xf0,0xff,0xff,0xfe,0xff,0xdf,0xff,0xef,0xc3,0x9f,0xe3,0x3f,0xff,0xdc,0xb7,0xa0, + 0xfe,0xdf,0x9f,0xeb,0xfe,0xfb,0xf7,0x6b,0xa3,0xff,0xef,0xff,0xff,0xff,0xd7,0xdf, + 0x73,0x7f,0xff,0xfb,0xe7,0xff,0xef,0xed,0x87,0xff,0xfe,0x7f,0xef,0xff,0xfb,0xff, + 0xee,0xff,0xf9,0xbf,0x7f,0xf6,0xff,0xfb,0x4f,0xff,0xff,0xd6,0xff,0x7d,0x7f,0xfd, + 0xcb,0xff,0xfe,0xff,0xdf,0xf3,0xff,0xf2,0x3f,0xff,0xff,0xff,0xbf,0x7f,0xff,0xff, + 0xbf,0xbf,0xff,0xfd,0xef,0xfb,0xff,0xfd,0x1f,0xff,0xfd,0xff,0xd7,0xaf,0xf8,0xfe, + 0x0f,0xff,0x3a,0xff,0xff,0xcf,0xdf,0xc4,0xef,0xbf,0xff,0xef,0xff,0xff,0x7a,0xbe, + 0x9d,0xdf,0xfd,0xff,0xff,0x9b,0x7f,0xe1,0xff,0x95,0xf9,0x6f,0xdf,0xb7,0x3f,0xea, + 0xfe,0xff,0xff,0xe7,0xfb,0x5f,0xff,0xdb,0xff,0xfb,0xfe,0xff,0x3b,0xff,0xff,0xef, + 0xff,0x7b,0xfe,0xfe,0xff,0xbd,0xff,0xb7,0xff,0xef,0xfd,0xfe,0xff,0x7f,0xff,0xff, + 0xff,0xf7,0xff,0xfd,0xff,0x7f,0xfb,0x4b,0xff,0xbe,0x7e,0xd3,0xbf,0xcd,0x39,0xff, + 0xdf,0xc9,0xfb,0x3c,0xfb,0x9f,0xff,0x1a,0xff,0x7f,0xff,0xa7,0xbf,0xda,0x76,0xbf, + 0xe4,0xff,0xff,0xdc,0xfa,0xff,0x78,0x3d,0xfe,0xf1,0xf3,0xec,0x9a,0xde,0xff,0xfd, + 0x1f,0xbe,0xad,0x7e,0x7d,0xfe,0xf7,0x6f,0xfd,0xf3,0x77,0xdd,0x37,0xfd,0xff,0xfd, + 0xbf,0xcd,0x7b,0xfc,0xfd,0x9f,0x6c,0x7f,0xfb,0xfe,0xf5,0x3d,0xff,0xb3,0xdf,0xad, + 0xbb,0xb7,0xdb,0xff,0xfc,0xcf,0xb5,0x3f,0x67,0x7d,0xee,0x77,0xf5,0xa7,0x7f,0x57, + 0xdd,0xaf,0x7f,0xd6,0xfb,0xec,0xdb,0x7f,0xef,0xfb,0xfa,0xe7,0xaf,0xef,0x9e,0xbd, + 0x7f,0xeb,0x7f,0xff,0xff,0xfb,0xb4,0xff,0xdf,0xff,0xbd,0xe3,0x5f,0xdc,0xad,0x4b, + 0xff,0xd4,0xaf,0xff,0xef,0xff,0x87,0xff,0xfe,0xff,0x1f,0x5f,0xff,0xf5,0xff,0x5b, + 0xff,0xf5,0xff,0xb7,0xdf,0x79,0x5f,0xff,0xfe,0xbf,0x9e,0x7f,0xfb,0xe7,0xfe,0x7f, + 0xfb,0xe7,0xff,0xff,0xff,0xfe,0x9f,0xff,0xbe,0x6f,0xf8,0xfe,0xcf,0x9f,0xf9,0xd6, + 0xcf,0x9d,0x6f,0xfb,0xf7,0xef,0x6f,0xff,0xf6,0xfb,0xfe,0xff,0xff,0xef,0xfe,0xef, + 0xff,0xef,0xff,0xfe,0xdf,0xfe,0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0xbf,0xfb,0x7f, + 0xff,0xbf,0xff,0xff,0xff,0xc5,0xfe,0xf5,0xff,0xef,0xc3,0xf7,0xf4,0x3f,0xe3,0xd7, + 0xfe,0x39,0xfb,0xfb,0xff,0x93,0xff,0xe9,0xde,0xbf,0x8f,0x37,0x68,0xdf,0xef,0x27, + 0xfe,0xfa,0x7f,0xef,0xff,0x87,0xff,0xdf,0xfd,0xff,0x5e,0xdf,0xd5,0xff,0xb3,0xdf, + 0xfd,0xf5,0xff,0xff,0xff,0xaf,0xff,0xbf,0x9f,0xe6,0xe0,0xf9,0x2e,0x5f,0xe0,0xf8, + 0x7e,0x0b,0x87,0xf1,0xfd,0x1f,0xff,0x5f,0xf7,0xfc,0xff,0x7f,0xff,0xff,0xfd,0x3f, + 0xef,0xf7,0xf7,0xff,0xfb,0xbf,0xfe,0xbf,0xef,0xf9,0xd3,0xfd,0xfb,0x7f,0xb2,0xfd, + 0xfb,0x7f,0xcf,0xf7,0xff,0x7f,0xfd,0xff,0xff,0xf7,0x4d,0xc7,0xf8,0xbf,0x9c,0xc7, + 0xb9,0xfc,0x5f,0x9f,0xea,0xff,0xfb,0xff,0xf7,0xed,0x3b,0xd7,0xcf,0xfc,0x8d,0xa7, + 0xc9,0xda,0x3c,0x1f,0xf4,0xbf,0xf2,0xfd,0x39,0x6f,0xdf,0xfa,0xff,0xff,0xff,0xff, + 0xfc,0xbf,0x6f,0xff,0x43,0xff,0xee,0xbd,0x0f,0x61,0xda,0x5e,0xad,0xeb,0xf8,0x7e, + 0xbb,0xaf,0xe9,0xff,0xd7,0xff,0xff,0xad,0x7d,0x3f,0xcf,0xf3,0x9f,0x3f,0xe3,0xf1, + 0xfc,0xfc,0x1f,0xfe,0x87,0xff,0x7d,0x7f,0xe3,0xfe,0xa7,0xbe,0xd7,0xe6,0xfd,0xdf, + 0xab,0xdf,0xff,0xeb,0xdf,0xff,0xff,0xf6,0xfb,0xbf,0xff,0xbf,0xd5,0xdf,0xfd,0xdb, + 0xff,0xf5,0xff,0xfe,0x9f,0xff,0xf7,0xef,0x7d,0xd3,0xf6,0xf7,0xff,0xff,0xf7,0xff, + 0x0f,0xfb,0xff,0xcf,0x7f,0xf7,0xfd,0xbf,0xff,0xfd,0xf7,0x9d,0x7d,0x7f,0xff,0xff, + 0xbd,0xff,0xdf,0xec,0x7f,0xfe,0x7f,0xbf,0x77,0xbf,0x7c,0xee,0xcd,0x7f,0x7c,0xdf, + 0xff,0x8b,0xff,0x8d,0xff,0xff,0xfc,0xef,0xff,0x1b,0xf7,0x7c,0x7f,0xff,0xf5,0xfd, + 0x6b,0x7f,0xff,0x83,0xef,0xfc,0xfb,0xff,0xfd,0xef,0xfb,0x79,0xb7,0xff,0xff,0xff, + 0xff,0xbd,0xdd,0x67,0xdf,0xef,0x7f,0xbf,0x9e,0xf7,0xff,0xf4,0xff,0x3f,0xcf,0xf3, + 0xfc,0xf7,0xbf,0x2f,0xbf,0xdb,0xff,0xff,0xff,0xff,0x7b,0xef,0x77,0xdf,0xf7,0xfd, + 0xff,0x7f,0x7e,0xdf,0xff,0x4f,0xb7,0xdd,0xff,0xff,0xff,0xbb,0x7e,0xff,0xb7,0xee, + 0x79,0xff,0xf9,0x37,0xff,0xfd,0xef,0xb1,0xef,0xd9,0xd6,0xfd,0x7f,0xdf,0xbf,0xf7, + 0xff,0xff,0xf7,0x7f,0xff,0xff,0x37,0xf7,0xff,0xff,0xff,0xbd,0xff,0xff,0x7e,0xff, + 0xde,0xef,0xf4,0xbf,0x9f,0xbf,0xff,0xfa,0x7f,0x9f,0xb5,0xfb,0x5e,0xff,0xbf,0xff, + 0xfb,0xff,0x79,0xaf,0xae,0xff,0xff,0x74,0xff,0x3f,0x67,0xfc,0xff,0xff,0x7f,0xf9, + 0xff,0xf7,0x83,0xdf,0x39,0x9f,0xff,0xdf,0xf7,0x3d,0xff,0xef,0xeb,0x3f,0xff,0xf5, + 0xed,0x6d,0x96,0xfe,0x5b,0x3f,0xfd,0xff,0xef,0xfb,0xff,0xf9,0x7f,0xff,0xff,0xff, + 0xf9,0xf6,0x47,0xbf,0x6d,0xff,0xff,0xb5,0xbf,0x7f,0xfb,0xff,0xf7,0x7f,0xef,0xff, + 0xdf,0xfa,0xd3,0xfc,0x7b,0xfd,0x67,0xf9,0xfc,0xff,0xf7,0xff,0xec,0xff,0xdf,0xff, + 0xbe,0xce,0x37,0xfb,0xf7,0xff,0xff,0xee,0xf0,0xbf,0xef,0xfe,0xfa,0xbf,0xbf,0xeb, + 0xff,0xb7,0x6f,0xff,0xef,0x7f,0xde,0xf7,0xad,0x6f,0xde,0xf7,0xbd,0x6f,0x78,0xd6, + 0xff,0xf8,0x3f,0xff,0xdf,0xff,0xfc,0xff,0x6f,0xc7,0xfd,0xff,0x3f,0xdf,0xf3,0x7d, + 0xff,0x81,0xbf,0xff,0xff,0xff,0xf6,0x3d,0xff,0x7f,0xf6,0xff,0x8f,0x67,0xd9,0xff, + 0xff,0xf9,0xff,0xfb,0xd6,0xdf,0xbf,0x6f,0xdb,0xff,0xbe,0x6f,0xfb,0xfe,0xff,0xbf, + 0x7a,0xa6,0xff,0xfe,0xef,0xff,0xec,0xfb,0x3e,0xff,0xec,0xfb,0xfe,0xef,0xbb,0xe6, + 0xff,0x6f,0xff,0xfe,0xff,0xff,0xef,0xfb,0xff,0xff,0xfb,0xff,0xfe,0xff,0xbf,0xfb, + 0xfc,0x5f,0xff,0xfb,0xf7,0xfd,0xbf,0x6f,0xdb,0xf5,0xbf,0x6f,0xdb,0xf6,0xfd,0xbf, + 0xff,0xbf,0xf7,0xaf,0xf7,0xfa,0xbb,0xae,0xeb,0xea,0xbb,0xbf,0xab,0xba,0xfe,0xff, + 0xf7,0x7f,0xff,0xf7,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff, + 0xfa,0xff,0xfe,0xf9,0xfe,0x7e,0x5f,0x97,0xe5,0xfe,0x1f,0x87,0xe1,0xf8,0x7e,0x1f, + 0xfd,0xff,0xff,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0xff,0xf7,0xfd,0xff,0x7f,0xdf,0xf7, + 0x83,0xff,0xfb,0xff,0xff,0xbb,0x3e,0xcf,0xb7,0xfb,0x3e,0xdb,0xb3,0xed,0xfb,0x7f, + 0xc3,0xff,0xff,0xfd,0xff,0xf8,0xfe,0x3f,0x8b,0xf9,0xfe,0x7f,0x9f,0xe7,0x79,0xfe, + 0x0f,0xff,0xed,0xff,0xff,0xcf,0xf3,0xfc,0xff,0xc9,0xf2,0x7c,0x9f,0x27,0xc9,0xee, + 0xdb,0xff,0xf7,0xd9,0xf4,0xff,0xff,0xf7,0xf4,0xff,0xff,0xf7,0xdf,0xff,0xff,0xf7, + 0x3f,0xf7,0xe9,0xda,0xee,0xbf,0xa5,0xeb,0xde,0xaf,0xa7,0xe9,0xda,0x7e,0xaf,0xf2, + 0x7b,0xfb,0xff,0x7f,0xf7,0xff,0xff,0x7f,0xef,0xff,0xdf,0xbf,0xff,0x7f,0xbf,0x62, + 0x7f,0xff,0xff,0xe6,0xf7,0xff,0xfe,0xfd,0x7f,0xdf,0xeb,0xfd,0xfd,0xff,0xff,0x99, + 0xd7,0xff,0xff,0xff,0xbb,0xff,0xff,0xfd,0xff,0xff,0xff,0x37,0xff,0xff,0xbf,0xf3, + 0xdf,0xff,0xdf,0xf7,0xfd,0xf7,0x7d,0xee,0x9d,0xff,0x7f,0xff,0x3f,0xff,0xfe,0xe3, + 0x7f,0xff,0xff,0xf7,0xfd,0xf7,0x7f,0xb6,0x9f,0xfd,0xff,0x6f,0xfb,0xff,0xff,0xa7, + 0xff,0xee,0xbb,0xff,0xfd,0xb7,0xfe,0xef,0xff,0xbb,0xff,0xfb,0x3f,0x7f,0xfa,0x0f, + 0xff,0x6f,0xc9,0xff,0xfc,0x7f,0x5d,0xdf,0xbc,0xff,0xf7,0xcf,0xff,0xff,0xfa,0xbf, + 0xff,0x9f,0xed,0xff,0x9f,0xff,0xf5,0x9f,0x5b,0xbf,0xff,0xbf,0x7f,0xef,0xf2,0x3f, + 0xff,0xff,0x37,0xfb,0xe0,0xc8,0x77,0x5f,0xff,0xfc,0x77,0xef,0xff,0xff,0x60,0xff, + 0xff,0xfe,0xbf,0xff,0xfb,0xff,0x78,0xbf,0xff,0xfd,0xff,0xff,0xff,0xff,0xd5,0x9f, + 0xff,0xfd,0x4d,0xfe,0xfe,0x6d,0x5e,0xef,0xff,0xff,0xff,0xef,0xff,0xfb,0xc3,0xff, + 0xfd,0xbe,0xbf,0xb7,0xff,0xf7,0xff,0xfe,0xef,0xff,0xfa,0xff,0xfd,0xff,0xc6,0x7d, + 0xff,0xfd,0xde,0xff,0xfe,0xff,0xbb,0xff,0xdf,0xff,0xef,0xff,0xef,0xee,0xaf,0xec, + 0x3f,0xff,0xfb,0x5e,0xdf,0xb7,0xfb,0x5f,0x5f,0xf7,0xf7,0xff,0xff,0xe6,0x5f,0xff, + 0xe7,0xfb,0xff,0xfd,0xdf,0xe7,0xfe,0xfd,0xff,0xf7,0xeb,0xfb,0xff,0xf8,0x0f,0xe7, + 0xff,0xf7,0xef,0x7f,0x5e,0xcd,0x7c,0x9b,0x35,0xef,0xff,0xff,0xff,0xfb,0x6b,0xeb, + 0xff,0xff,0xdf,0xff,0xfc,0x53,0xff,0x91,0xcc,0xbf,0xff,0xff,0xfd,0xfa,0xf7,0xff, + 0x7f,0xfd,0x27,0xff,0xfa,0xff,0xfa,0x6a,0xfe,0x66,0xbf,0xff,0x5b,0xe1,0xbf,0xfe, + 0xff,0xfb,0x57,0xff,0xb5,0xff,0xfc,0xd7,0xf6,0xe5,0x7f,0xfc,0xff,0x9b,0xff,0xeb, + 0xff,0xfa,0xf7,0xaf,0xa9,0xb7,0xff,0xa6,0xdb,0x52,0xff,0xff,0xfe,0x76,0xff,0xd5, + 0xff,0x7d,0xef,0x57,0xd3,0xef,0xff,0x4f,0x9d,0x65,0x7f,0xff,0xff,0xe7,0xff,0xaf, + 0xfb,0xd2,0xf6,0xbd,0xaf,0xbf,0xfe,0xbc,0xef,0x6b,0xff,0xff,0x7d,0x1f,0xff,0x5f, + 0xf7,0xf5,0x85,0x79,0xcf,0xff,0xff,0x39,0x73,0x57,0xff,0xff,0xcc,0xbf,0xef,0xf7, + 0xff,0xff,0x1f,0xe9,0xd9,0xff,0xff,0x69,0xd7,0xfe,0xdf,0xff,0xe8,0x7f,0xeb,0xff, + 0xff,0xfe,0x9f,0xe7,0xff,0xff,0xff,0xe7,0x9f,0xfe,0xff,0xff,0xec,0x3f,0xee,0xff, + 0xbf,0xef,0xdb,0xfe,0x7f,0xef,0xf9,0xd6,0x7f,0xb3,0xef,0xdf,0x8d,0xbf,0xef,0xff, + 0xff,0xf9,0xbf,0xff,0xff,0xff,0xff,0xef,0xbf,0xff,0xff,0x7f,0xb3,0xff,0x7f,0xff, + 0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0x7e,0xff,0xff,0xff,0xff,0xc5,0xff,0xdf,0xff, + 0xed,0x7b,0xff,0xdb,0xfd,0x7f,0x6e,0xf2,0xf5,0xff,0xff,0xff,0xaf,0xff,0xeb,0xfd, + 0xda,0xbf,0xdf,0xaf,0xda,0x76,0xbf,0xb3,0xe9,0xff,0xff,0xff,0x1f,0xff,0x7f,0xff, + 0xff,0xf9,0xfe,0x5f,0xf5,0xfd,0x7f,0xdd,0xf7,0xff,0xff,0xfc,0xbf,0xff,0xbd,0x7f, + 0x5f,0xb6,0xe4,0xbe,0x6b,0xe2,0xf0,0xfe,0x6f,0x9f,0xe7,0xfe,0x7f,0xff,0x7b,0x6f, + 0xdf,0xf4,0xed,0x3f,0xf3,0xf4,0x6b,0x1f,0x5f,0xff,0xff,0xfc,0xff,0xfb,0xfc,0xdd, + 0x3f,0xc9,0xf2,0x7f,0xb7,0xeb,0xfb,0xfe,0xbf,0xff,0xff,0xe5,0xff,0xfd,0xf1,0xfc, + 0xfd,0x17,0x45,0xfe,0xdf,0xd7,0xfd,0xff,0x7f,0xff,0xff,0xc3,0xdf,0xef,0x3b,0x67, + 0xf1,0xa6,0xe9,0xfe,0xdf,0xa7,0xef,0x7e,0xff,0xff,0xff,0xc7,0xff,0xff,0xfa,0xfc, + 0xbf,0xfe,0xdf,0xff,0xff,0x4f,0xfe,0xbf,0xef,0xdf,0xfc,0xce,0x7f,0xfa,0xfe,0xbb, + 0x8d,0xeb,0xba,0xb7,0xae,0xe8,0xfa,0x7e,0x8f,0xaf,0xff,0xdf,0xff,0xfe,0xff,0xfd, + 0x7f,0xdc,0xcd,0xff,0x7b,0xf7,0xe7,0xbf,0xff,0xff,0xf9,0x1e,0xfd,0xff,0x7e,0x7d, + 0xef,0x7e,0xfb,0x7e,0x7f,0xff,0x7f,0xff,0xdf,0xff,0xef,0x7f,0xff,0xbf,0xff,0xf7, + 0x3f,0xcb,0x7f,0x7f,0xff,0xff,0xcf,0xff,0x7d,0xff,0xee,0x7f,0xfa,0xfe,0x3d,0x8e, + 0xe3,0xfa,0xbf,0xaf,0x6a,0xdf,0xff,0xfb,0xff,0xfe,0x9d,0xff,0xf6,0xfd,0xff,0x7f, + 0xef,0xf6,0xe5,0xdb,0xfb,0xff,0x7f,0xfe,0xff,0xff,0x89,0xff,0xff,0xde,0xef,0xfe, + 0x4d,0xf3,0xb8,0xbf,0xae,0xfb,0xbf,0xff,0xf7,0xfe,0x97,0xff,0xff,0xfb,0xe9,0x3f, + 0x5f,0x57,0xf4,0x6f,0x1f,0xc3,0xf6,0xdd,0xff,0xf6,0x6f,0xff,0xff,0xff,0xff,0xff, + 0xf8,0xff,0xef,0xe7,0xff,0xff,0xef,0x4b,0xbf,0xfe,0x9d,0xfe,0xff,0xcd,0xe3,0xd7, + 0xff,0xfd,0x56,0xff,0xff,0xf7,0xfb,0xf3,0xff,0xfb,0xaf,0xff,0xfd,0xf5,0xfb,0xdf, + 0xff,0xef,0x8f,0xf7,0xbf,0xff,0xf9,0xfd,0xff,0xf1,0x75,0xdb,0xe7,0xb1,0xe7,0x7d, + 0xfb,0x1f,0xf7,0xfd,0x7f,0x7e,0xfd,0xc3,0xff,0xe4,0xf5,0x7e,0xfd,0xfd,0xef,0x5b, + 0xfe,0x5f,0x8f,0xe3,0x68,0xee,0xbf,0x2f,0xbe,0xc1,0xd7,0xfd,0xff,0xff,0x5b,0xcf, + 0xf3,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xda,0xff,0xff,0xff,0xbf,0xcf,0xff, + 0xfc,0x9f,0xcf,0xff,0xff,0xff,0xfe,0xef,0xfd,0x17,0xbf,0xff,0xfc,0xe8,0xbf,0x3b, + 0xcd,0x9c,0xff,0x3f,0xcf,0xf3,0x8f,0xbf,0xde,0x6b,0x7f,0xff,0x2d,0xdb,0xd6,0xfd, + 0xbf,0x7b,0xb6,0xfd,0xbf,0x6f,0xcf,0x7f,0xb4,0x1b,0xff,0xfe,0x77,0xad,0xeb,0x7a, + 0xde,0xbd,0xeb,0x7a,0xde,0xb7,0xff,0x67,0xfc,0x1f,0xfd,0xff,0xb9,0xdb,0xfe,0xfd, + 0xbf,0xfb,0xd6,0xf5,0xbd,0x6f,0xff,0x75,0xed,0x6f,0xe3,0xff,0xdd,0x3d,0xef,0x63, + 0xd6,0xfd,0xef,0x7f,0xd6,0xf7,0xfd,0xcf,0x6c,0x7f,0xff,0xfe,0xef,0xfd,0xbf,0xff, + 0xff,0xff,0xbf,0xff,0xff,0xff,0xfb,0xb6,0xe1,0xff,0xff,0xff,0x6f,0xdf,0xf7,0xfd, + 0xff,0xdf,0xf7,0xfd,0xff,0x7f,0xfb,0xff,0xb1,0xff,0xff,0xfb,0xde,0xfb,0xbe,0xef, + 0xbe,0xfb,0xbe,0xef,0xbb,0xef,0xf3,0xfe,0xa7,0xff,0xff,0xff,0x7f,0xf3,0xfc,0xff, + 0x3f,0xf3,0xfc,0xff,0x3f,0xcf,0x73,0xff,0x87,0xff,0x6f,0xfb,0xf2,0xf4,0xbd,0x2f, + 0x5a,0xd4,0xbd,0x2f,0x4b,0xd6,0xfd,0xfa,0x5f,0xfc,0xff,0xfe,0x65,0xf9,0x7e,0x5f, + 0xb5,0xf9,0x7e,0x5f,0x97,0xef,0x9b,0xfb,0xbf,0xef,0xff,0xfe,0xfd,0xef,0x7b,0xde, + 0xfd,0xef,0x7b,0xde,0xf7,0xbf,0xef,0xfc,0x7f,0xff,0xfe,0x5b,0xff,0xff,0xff,0xfe, + 0xff,0xef,0xff,0xff,0xfe,0xde,0xff,0xe6,0xff,0xff,0x7e,0x89,0xf7,0xfd,0xdf,0x7f, + 0xf7,0xfd,0xff,0x7d,0xdf,0xfb,0xff,0xd8,0xff,0x6f,0xed,0x77,0x7f,0xdf,0xf7,0xef, + 0x7d,0xdf,0xf7,0xfd,0xfb,0xff,0xff,0x93,0xff,0xff,0xe2,0xf8,0xbe,0x2f,0x8b,0xe6, + 0xbe,0x2f,0x8b,0xe2,0xf9,0xbe,0x7f,0xb7,0xff,0xff,0xfe,0xfd,0xff,0x7f,0xdf,0xfd, + 0xbf,0x7f,0xdf,0xf7,0xfd,0xff,0xfe,0x0f,0xff,0xbf,0xff,0xfa,0xfe,0xbf,0xaf,0xfa, + 0x7e,0xbf,0xaf,0xeb,0xfb,0xff,0xfd,0xdf,0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0xef, + 0xff,0xff,0xff,0xff,0xfd,0xff,0xfa,0x3f,0xfe,0xff,0xfd,0xfd,0xff,0xff,0xdf,0xfd, + 0xff,0xff,0xff,0xff,0xfb,0x7f,0xfb,0x7f,0xff,0xff,0x7f,0xcb,0xb2,0x7c,0xbf,0xcb, + 0xd2,0x6c,0xbf,0x2f,0xcb,0xff,0xd6,0xff,0xff,0xaf,0x6b,0x72,0xfc,0xaf,0x0f,0x72, + 0x3c,0x0f,0x25,0xe9,0xba,0x7f,0xcd,0xff,0xff,0xff,0x9f,0xbd,0xef,0xf8,0xff,0xbf, + 0xef,0xfb,0xfe,0xff,0xdf,0xfd,0xa1,0xff,0x7f,0xfb,0xed,0xfb,0xfe,0xeb,0xdf,0xff, + 0x7f,0xfe,0xff,0xff,0xff,0xde,0x97,0xfa,0xff,0xff,0xff,0xfd,0xf6,0xff,0xe3,0xfe, + 0xff,0xbb,0xff,0xff,0x7f,0xfe,0x4e,0x7f,0xae,0xeb,0xf7,0xf6,0xff,0xbf,0xfa,0xff, + 0x9d,0xff,0xfb,0xd8,0xff,0xfa,0x4f,0xff,0x9d,0x6b,0xff,0x7f,0x7f,0xdd,0x5d,0xff, + 0xff,0xff,0xff,0x5f,0xff,0xf8,0x9f,0xfd,0xbf,0xcf,0x3b,0xff,0xeb,0xff,0x0f,0xfb, + 0xef,0xff,0xbf,0xef,0xff,0xef,0x3f,0xff,0xff,0x7f,0xef,0xff,0xbf,0xe7,0x7b,0xe4, + 0xff,0xbf,0xff,0xff,0xff,0xe4,0x9f,0xf7,0x7a,0xff,0xfa,0x5f,0xff,0xbe,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xec,0xfe,0xff,0xff,0xfe,0xff,0xef,0x3f,0xd4,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xbb,0xdf,0xff,0xff,0xff,0xef,0xdb,0xbe,0xf3,0xff,0xff, + 0xff,0xff,0xff,0xff,0xfb,0x66,0xfd,0xfb,0x6f,0xdf,0xff,0xfd,0xff,0x7b,0xb6,0xdf, + 0xfe,0xff,0xf7,0xff,0xde,0xef,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xf7,0xff,0xbf, + 0xef,0xff,0xff,0xdf,0xfe,0x5f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0x7f, + 0xdf,0xfe,0xff,0xff,0xfb,0x8d,0xe6,0xff,0xbf,0xff,0x9f,0xbf,0xdf,0xfc,0xff,0xff, + 0xff,0xff,0xff,0xff,0x7d,0x6f,0xe9,0xff,0x3b,0xef,0xf3,0x7f,0xf3,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xea,0xff,0xfb,0x66,0xb9,0xf7,0xf9,0xff,0xff,0xfb,0xfd,0xff, + 0xff,0xff,0xff,0xff,0xf5,0xb7,0xf6,0xfd,0x7f,0xf7,0xdf,0xff,0xff,0xfc,0xdf,0xff, + 0xff,0xff,0xff,0xef,0x3b,0xff,0xef,0x72,0xff,0xf7,0xe9,0xff,0xff,0xff,0xe9,0xff, + 0xff,0xff,0xff,0xfe,0x86,0xff,0xd6,0x85,0x7f,0xef,0x77,0xbf,0xff,0xff,0x7b,0xff, + 0xff,0xff,0xff,0xf4,0x47,0xff,0xbd,0xeb,0xff,0xff,0xae,0xfe,0x7f,0xff,0xbf,0xff, + 0xff,0xff,0xff,0xf7,0x9f,0xff,0x5f,0xd7,0xff,0xfd,0xef,0xfe,0xbf,0xeb,0xff,0xff, + 0xff,0xff,0xff,0xf3,0x3f,0xff,0xf7,0xfe,0xff,0x7f,0x5f,0xff,0xff,0xff,0x4d,0xfb, + 0x7f,0xff,0xfd,0xf1,0x7f,0xff,0xdb,0xff,0xbf,0xfe,0x7f,0xff,0xff,0xbf,0x67,0xfb, + 0xff,0xff,0xff,0xee,0x7f,0xfe,0xed,0xbd,0x6f,0xf8,0xfe,0xff,0xee,0x5a,0xfe,0xfb, + 0xbf,0x6f,0xdf,0xa1,0xbf,0xff,0x9b,0xff,0xfb,0xfe,0xff,0xff,0xff,0xbe,0xef,0xfb, + 0xf7,0xff,0x7f,0xdb,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xfe,0xfe,0xff,0xbf, + 0xff,0xff,0xff,0x36,0xff,0xff,0xff,0xef,0x7b,0xe3,0xff,0xfd,0x7f,0x6f,0xdf,0xfd, + 0xfb,0x7f,0xfe,0xab,0xdf,0xf2,0xdd,0xdb,0xbf,0xef,0xff,0x5a,0x7e,0xaf,0xf7,0xcd, + 0xfb,0x7f,0xee,0xdf,0xfe,0xff,0xff,0xbd,0xdf,0xff,0xff,0xff,0xfd,0x7f,0xff,0xf7, + 0xfd,0xff,0xf9,0x8f,0x7f,0xfe,0x7f,0x8f,0xe7,0x79,0xfe,0x7f,0xe6,0xf9,0xfe,0x3f, + 0x8f,0xe7,0xfe,0x7f,0xdf,0xff,0xff,0xd7,0xfe,0xff,0xff,0xd1,0xfd,0xff,0xff,0xff, + 0xd7,0xff,0xa4,0xff,0xff,0xff,0xff,0xaf,0xfd,0xff,0xff,0xaf,0xff,0xff,0xff,0xff, + 0xaf,0xff,0xe1,0xff,0x75,0xff,0x7f,0xdf,0xff,0xff,0xfe,0x5f,0xff,0xff,0xff,0xff, + 0x5f,0xff,0xeb,0xff,0xeb,0x7b,0xfe,0xf7,0xfd,0xff,0xfe,0x9f,0xfd,0xff,0xff,0xfe, + 0xbf,0xff,0x17,0xff,0xdf,0xff,0xfd,0x9f,0xff,0xff,0xdf,0xff,0x7f,0xff,0xff,0xff, + 0xff,0xfc,0x2b,0xff,0xfa,0x7e,0xbd,0xaf,0xeb,0xfa,0xb7,0xaf,0xe9,0xfa,0xfe,0x87, + 0xaf,0xfc,0x5f,0xff,0xbb,0xbf,0x35,0xff,0x3f,0xfe,0xff,0xfe,0x3f,0xff,0xff,0xff, + 0xef,0xbd,0x9f,0xff,0xfd,0xfe,0x7f,0xfd,0xff,0xff,0x7e,0xfc,0xf3,0xef,0xfd,0xff, + 0xff,0xeb,0x7f,0xbf,0xff,0xfb,0xf4,0xbd,0xff,0xde,0x7f,0xcf,0xff,0xff,0xff,0xff, + 0xff,0xe4,0xff,0xfb,0xf6,0x7f,0xaf,0xff,0xff,0xff,0xaf,0xfb,0x58,0x6e,0x3f,0xbf, + 0xff,0xb5,0xfe,0xfd,0xd7,0xff,0xef,0xff,0xff,0xdc,0xdf,0xdf,0x7b,0xbe,0xff,0xef, + 0xff,0xf2,0xff,0xff,0xff,0xf6,0xff,0xf7,0xdf,0xfa,0xbf,0xff,0xf1,0xf7,0xdf,0xff, + 0xfe,0xb7,0xff,0xfe,0xf7,0x7f,0xbe,0xff,0xd7,0xb0,0x7b,0xff,0xff,0xff,0xff,0xff, + 0xfe,0xcf,0xff,0xff,0xfb,0xff,0xfd,0xf3,0xff,0xe7,0xff,0xf7,0xfb,0xff,0xff,0xff, + 0x7d,0x9f,0xff,0xff,0xff,0x71,0xbf,0xff,0xff,0xd7,0xff,0xff,0x3f,0xcd,0xff,0xfe, + 0xfc,0xbf,0xff,0xef,0xfb,0xbb,0xff,0xff,0xff,0xae,0x77,0xfd,0xdf,0xf7,0xfe,0xfd, + 0xfc,0x7f,0xff,0xf3,0xcf,0xf1,0xbf,0xf7,0xf7,0xff,0x6f,0xfa,0xff,0xbf,0xff,0xff, + 0xfa,0x7f,0xfe,0x3d,0xbf,0xe6,0xfe,0xff,0xbf,0xff,0xff,0x7f,0xdf,0xff,0xff,0xff, + 0xe1,0xff,0xfd,0xf9,0x7f,0x3d,0xff,0xff,0xdf,0xfd,0xfd,0xff,0xff,0xff,0xff,0xff, + 0xa8,0xff,0xef,0x9f,0xdf,0xff,0xbe,0x6f,0xfe,0xff,0xff,0xef,0xff,0xff,0xff,0xfc, + 0x56,0xbf,0xcf,0x3f,0xff,0x7f,0x7c,0xc7,0xfc,0x7f,0xff,0xdf,0xff,0xff,0xff,0x57, + 0xef,0x7f,0xad,0xfd,0x9f,0x7e,0xff,0xa7,0x3a,0xff,0xf9,0xbf,0xeb,0xff,0xfe,0xbc, + 0x5b,0xff,0x7f,0xfb,0xbf,0xfd,0xff,0x4c,0xf5,0xff,0xff,0x7c,0xff,0xff,0xff,0xdf, + 0xbe,0xfe,0xbf,0xed,0x9c,0xfb,0xff,0xb3,0x6b,0xd7,0xfe,0x97,0xfc,0xdf,0xff,0xf9, + 0x6f,0xfd,0xd6,0xfb,0x75,0xf7,0x7f,0xda,0xdd,0xff,0xff,0xf6,0xfa,0xbf,0xfb,0x6e, + 0x7b,0xfa,0xff,0xbf,0xff,0xef,0xfe,0xbf,0xaf,0xff,0xfb,0xfe,0xbf,0xff,0xff,0x89, + 0xbf,0xf7,0xff,0xff,0xbf,0xdf,0xff,0xff,0x5f,0xff,0xff,0x7f,0xff,0xff,0xff,0xd2, + 0xff,0xff,0xb7,0xcd,0xf7,0xff,0xff,0x7f,0xff,0xff,0xff,0x37,0xdf,0xff,0xdf,0xd5, + 0xff,0xff,0x9f,0xff,0xcf,0xff,0xfe,0xff,0xff,0xff,0xfd,0x9f,0xff,0xff,0xfe,0x67, + 0xff,0xef,0xfb,0xfe,0xbf,0xbf,0xed,0xfe,0xdf,0xbd,0x6b,0x5b,0xfe,0xff,0xfb,0x9b, + 0xff,0xff,0xbe,0xef,0xbf,0xff,0xff,0xbf,0xff,0xfe,0xfb,0xbe,0xff,0xff,0xdd,0x3f, + 0xff,0xfe,0xff,0xbf,0xff,0xff,0xfd,0xff,0xff,0xef,0xfe,0xff,0xff,0xff,0xf7,0x5f, + 0xff,0xfb,0xdf,0xd7,0xff,0xff,0xfb,0xd7,0xbf,0xed,0x3b,0xff,0xff,0xff,0xa0,0xff, + 0xff,0x7f,0xaf,0xab,0xff,0xff,0x3f,0xa7,0xff,0xf2,0x3f,0xef,0xff,0xff,0xcd,0xff, + 0xff,0xff,0x7f,0xff,0xff,0xef,0xdb,0x5f,0xff,0xe5,0xff,0xf7,0xff,0xff,0xf3,0xff, + 0xff,0xe6,0xf9,0xfe,0x7f,0x9f,0xe6,0xbe,0x7f,0x8b,0xc7,0xf9,0xfe,0x7f,0x57,0xff, + 0xff,0xfd,0xff,0x3f,0xff,0xd3,0xfd,0x3f,0xef,0xd7,0xad,0xff,0xff,0xff,0xcf,0xff, + 0xff,0xfb,0xff,0x7f,0xff,0xaf,0xfa,0x7f,0xdf,0xaf,0xef,0xff,0xff,0xfc,0x5f,0xff, + 0x7f,0xf7,0xff,0xff,0xff,0x4f,0xe7,0xff,0xff,0x7f,0xf7,0xff,0xff,0xfa,0xbf,0xee, + 0xff,0xad,0xff,0x7f,0xfe,0xb7,0xf9,0xff,0x7f,0xb5,0xbd,0xff,0xff,0xf9,0x3f,0xf5, + 0xff,0xaf,0xca,0xd4,0xf5,0x3f,0xfb,0xff,0xf5,0xbd,0x6f,0xff,0xff,0xd0,0xff,0xbb, + 0x27,0xea,0xd2,0xf4,0xaf,0xab,0x7a,0x7c,0xbf,0xae,0xeb,0xfa,0xff,0xd1,0xef,0xff, + 0xf7,0xd7,0xc7,0xff,0xe8,0xff,0x7f,0xff,0xb3,0x7d,0xdf,0xff,0xff,0xc1,0xff,0xfe, + 0xb7,0xfd,0xff,0xff,0xfb,0xfd,0xfd,0xff,0x7c,0xff,0xff,0xff,0xfe,0x37,0xff,0x7d, + 0xff,0xbd,0x4f,0xff,0xdf,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xcf,0xff,0xef, + 0x61,0xd8,0xfd,0xdf,0xa7,0xf6,0x7f,0xdf,0xaf,0xfb,0xff,0xff,0x7e,0x1f,0xff,0xff, + 0xde,0xe7,0xdf,0xfd,0xaf,0xd7,0xff,0xf7,0xaf,0xff,0xff,0xff,0xfc,0x3f,0xf6,0x1f, + 0xfd,0xf3,0xff,0xef,0xff,0xbf,0xff,0xff,0xff,0xbf,0xff,0xff,0xfa,0x6f,0xff,0xbf, + 0xff,0xd7,0xff,0xff,0xff,0x79,0xef,0xff,0xbf,0xff,0xfb,0xff,0xfc,0xff,0x7f,0xff, + 0xeb,0xfb,0xff,0xff,0xfa,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xf9,0xff,0xf1,0xfb, + 0xbf,0xff,0xff,0xff,0x3d,0xfd,0xff,0xfe,0x7f,0xff,0xff,0xed,0xeb,0xff,0xfd,0xff, + 0xff,0xff,0xff,0xff,0xf9,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0x67,0x7f,0xd7,0xec, + 0xff,0x3e,0xff,0xff,0xef,0xfe,0xff,0xff,0xff,0xff,0xff,0xfe,0x02,0xf7,0xe9,0x73, + 0xd7,0xef,0xff,0xff,0xf7,0xff,0xff,0xff,0xfd,0xff,0xff,0xfa,0x9f,0xff,0xdd,0xef, + 0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xfa,0x2d,0xff,0xcf,0xfd, + 0xef,0xff,0xf2,0xe9,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xcc,0x6f,0xff,0x3f,0x7f, + 0xc7,0xf3,0xe6,0xd3,0x8f,0xff,0xff,0xff,0xff,0xff,0xfd,0x6c,0xff,0xff,0xff,0xdc, + 0xf7,0xfb,0xfa,0x7f,0xa7,0xff,0xff,0xff,0xff,0xff,0xfb,0xfc,0xb7,0x3f,0xfd,0xd3, + 0xf7,0xdf,0xfe,0xe7,0xef,0xff,0xff,0xff,0xff,0xff,0xfd,0xf9,0xff,0xff,0xff,0xff, + 0xf7,0xef,0xcb,0xb5,0xbb,0x7f,0xff,0xff,0xff,0xff,0xff,0xe2,0xff,0xfd,0xe7,0xfb, + 0xdf,0x77,0x7f,0xad,0xfe,0xff,0xff,0xff,0xff,0xff,0xb6,0xc7,0xff,0xff,0xbf,0xef, + 0x9f,0xbf,0xaf,0xfa,0xf1,0xff,0xff,0xff,0xff,0xff,0x7a,0x8f,0xff,0xff,0xdf,0xff, + 0xed,0xff,0xfb,0xff,0xeb,0xff,0xff,0xff,0xff,0xff,0xf9,0x3f,0xed,0xfb,0x7c,0xdf, + 0x6f,0xff,0xf7,0xff,0x1f,0xff,0xff,0xff,0xff,0xff,0xf7,0x5f,0xef,0xfb,0xf6,0x7f, + 0xff,0xff,0xdb,0xfd,0x9f,0xff,0xff,0xff,0xff,0xff,0xe2,0x7f,0xe6,0xdb,0xbf,0xed, + 0xfb,0xfe,0xe5,0xef,0x5b,0xfe,0xff,0xbf,0xef,0xff,0xa1,0xbf,0xdf,0xfb,0xee,0xfb, + 0xff,0xff,0xbb,0xfb,0xbf,0xff,0xff,0xff,0xff,0xfd,0xcb,0xff,0xff,0xdf,0xef,0xff, + 0xff,0xff,0xbf,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0x07,0xff,0xff,0xbd,0xef,0xfe, + 0xff,0xfe,0xff,0xee,0x7f,0xff,0xff,0xff,0xff,0xfe,0x6d,0xff,0x77,0xee,0xbe,0xbf, + 0xdf,0xfa,0xff,0x2f,0x9f,0xff,0xff,0xff,0xff,0xff,0x9f,0xff,0x7f,0xd7,0x7f,0xff, + 0xff,0x5d,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xf1,0x3f,0xff,0xf9,0x3e,0x3b,0xcf, + 0xe2,0xbe,0x7f,0xe6,0xf9,0xfe,0x7f,0x9f,0xe7,0xfd,0x5f,0xff,0xbf,0xdf,0x79,0xd5, + 0xe7,0xff,0xdf,0xf7,0xff,0xff,0xff,0xff,0xfd,0xe2,0xff,0xff,0xec,0xff,0x6f,0xcb, + 0xf7,0xff,0xef,0xfb,0xff,0xff,0xff,0xff,0xff,0xf1,0xff,0xf6,0xe3,0x51,0xf6,0x57, + 0x55,0xfe,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xc3,0xff,0xfd,0xbb,0xe7,0xb9,0xae, + 0xeb,0x7d,0xf7,0xef,0xff,0xff,0xff,0xff,0xef,0xf7,0xff,0xd3,0xf7,0xff,0xff,0xff, + 0xfb,0xfc,0xbf,0xff,0xff,0xff,0x7f,0xfd,0xdd,0x8f,0xff,0xda,0xae,0x37,0x23,0xe9, + 0xfa,0x3b,0x83,0xea,0xfa,0xde,0xbf,0xaf,0xdc,0xdd,0xff,0xcf,0xf1,0xfc,0xff,0xff, + 0x5f,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xfa,0x1f,0xfe,0xff,0xff,0xff,0xff,0xfb, + 0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xeb,0x6f,0xff,0x7f,0x5f,0xd7,0xff,0xf6, + 0xfe,0x7f,0xff,0xf7,0xff,0xff,0xff,0xef,0xf0,0x7f,0xff,0xfe,0xbe,0xff,0x23,0xff, + 0xff,0x8f,0xdf,0xff,0xff,0xff,0xfd,0xff,0xcd,0xfe,0xff,0xfd,0x9f,0xfd,0xdf,0xdf, + 0xfc,0xbf,0xff,0xaf,0xff,0xff,0xfb,0xff,0xe9,0xff,0xf3,0xff,0xff,0xfe,0xff,0xff, + 0xfd,0xef,0xee,0xff,0xff,0xff,0xff,0xff,0x46,0xff,0xfb,0xff,0xfb,0xf7,0xff,0xfb, + 0xf7,0xff,0x5f,0xff,0xff,0xff,0xff,0xff,0x6f,0xff,0xff,0xff,0xf7,0xff,0xff,0xff, + 0x0f,0xff,0xdf,0xff,0xff,0xff,0xff,0xfd,0x1f,0xfe,0xff,0xfb,0xdf,0xff,0xfe,0xff, + 0xde,0x7f,0xff,0xff,0xff,0xff,0xff,0xf8,0x37,0xff,0xff,0xff,0xff,0x6f,0xff,0xff, + 0xbf,0xff,0xbf,0xff,0xff,0xff,0xff,0xf7,0x6b,0xff,0xff,0xff,0xff,0x5e,0x4f,0xff, + 0xbf,0xef,0xff,0xff,0xfb,0xf7,0xff,0xe6,0xff,0xfa,0xff,0xfe,0xff,0xff,0xff,0xbb, + 0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xa5,0xfe,0xef,0xff,0xff,0xff,0xff,0xff,0x7f, + 0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0x83,0xbf,0xf9,0xfe,0x7f,0x9f,0xe7,0xf8,0xff, + 0x9e,0xe7,0xf9,0xbe,0x7e,0x1f,0xfe,0xa7,0xff,0xfb,0xfa,0xbf,0xbf,0xef,0xfb,0xdb, + 0xbf,0xef,0xfb,0x7e,0xfe,0xbf,0xff,0xef,0xff,0xef,0xfa,0xfe,0xff,0xbb,0xef,0xfe, + 0xf7,0xbd,0xef,0xfb,0xfe,0xff,0xfd,0x5f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef, + 0xff,0xff,0xfe,0xff,0xff,0xff,0xfd,0xbf,0xff,0xbf,0xe9,0xfb,0xde,0xf7,0xbf,0xfb, + 0xde,0xf7,0xbf,0xef,0xfb,0xff,0xf9,0x7f,0xfc,0xfd,0x3f,0xcf,0xf3,0xec,0xff,0xcf, + 0xf3,0xfc,0xff,0x3f,0xcf,0xff,0xe2,0xef,0xfb,0xfe,0xff,0xbf,0xef,0xfb,0xff,0x3f, + 0xcf,0xfb,0xfe,0xfe,0xbf,0xff,0xd9,0xff,0xf9,0x7e,0x5f,0x97,0xe5,0xf9,0x7f,0x97, + 0xe5,0xf9,0x7e,0x5f,0x97,0xff,0xa3,0xff,0xf6,0xfd,0xbf,0x7f,0xdf,0xf7,0xff,0x7e, + 0xdf,0xf7,0xfd,0xff,0x7f,0xff,0x97,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xf7,0xff,0xff,0xf7,0xff,0xfe,0xcf,0xff,0xdf,0xf5,0xdd,0xff,0x7d,0xdf,0xed,0xff, + 0x7e,0xdf,0xf7,0xfd,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xff, + 0xff,0xff,0xff,0xff,0xf7,0xfe,0x3f,0xff,0xdf,0xf7,0xfd,0xff,0x3f,0xdf,0xfd,0xff, + 0x7f,0xdf,0xf5,0xfd,0xef,0xfb,0x7b,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xdf,0xf2,0xff,0xff,0xff,0xff,0xdf,0xff,0xef,0xfe,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xef,0xff,0xff,0x3f,0xff,0xdf,0xfd,0xbf,0xff, + 0xff,0xff,0xff,0xff,0xfb,0xc3,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xc7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xff, + 0xff,0xff,0xff,0xfe,0xfc,0x9f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xff, + 0xff,0xff,0xff,0xfe,0xff,0x3f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xfb,0x7f,0xff,0xfb,0xfe,0xff,0xbf,0xef,0xfb,0xff,0xbf,0xef, + 0xf8,0xfe,0xff,0xbf,0xf6,0xff,0xfc,0xff,0xbf,0xef,0xfb,0xfe,0xfe,0xef,0xfb,0xfe, + 0xfd,0xbf,0xcf,0xff,0xe1,0xff,0xff,0xff,0xff,0xfb,0xfe,0xff,0xbd,0xfb,0xfe,0xef, + 0xff,0xff,0xff,0xff,0x83,0xff,0xff,0xeb,0xbe,0xef,0xbf,0xee,0xfe,0xef,0xbf,0xaf, + 0xeb,0xff,0xff,0xfe,0xe7,0xff,0x77,0xbf,0xbb,0xfe,0xbb,0xbf,0xef,0xfe,0xf6,0xfd, + 0xfb,0xbb,0x7e,0x8f,0x0f,0xff,0xff, diff --git a/board/canbt/init.S b/board/canbt/init.S new file mode 100644 index 0000000..5ebff2f --- /dev/null +++ b/board/canbt/init.S @@ -0,0 +1,267 @@ +//------------------------------------------------------------------------------+ +// +// This source code has been made available to you by IBM on an AS-IS +// basis. Anyone receiving this source is licensed under IBM +// copyrights to use it in any way he or she deems fit, including +// copying it, modifying it, compiling it, and redistributing it either +// with or without modifications. No license under IBM patents or +// patent applications is to be implied by the copyright license. +// +// Any user of this software should understand that IBM cannot provide +// technical support for this software and will not be responsible for +// any consequences resulting from the use of this software. +// +// Any person who transfers this source code or any derivative work +// must include the IBM copyright notice, this paragraph, and the +// preceding two paragraphs in the transferred software. +// +// COPYRIGHT I B M CORPORATION 1995 +// LICENSED MATERIAL - PROGRAM PROPERTY OF I B M +//------------------------------------------------------------------------------- + +//----------------------------------------------------------------------------- +// Function: ext_bus_cntlr_init +// Description: Initializes the External Bus Controller for the external +// peripherals. IMPORTANT: For pass1 this code must run from +// cache since you can not reliably change a peripheral banks +// timing register (pbxap) while running code from that bank. +// For ex., since we are running from ROM on bank 0, we can NOT +// execute the code that modifies bank 0 timings from ROM, so +// we run it from cache. +// Bank 0 - Flash bank 0 +// Bank 1 - Flash bank 1 +// Bank 2 - CAN0, CAN1, CAN2, Codeswitch (0x000,0x100,0x200,0x400) +// Bank 3 - IDE (CompactFlash) +// Bank 4 - Quart +// Bank 5 - not used +// Bank 6 - not used +// Bank 7 - not used +//----------------------------------------------------------------------------- +#include +#include + +#define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */ + +#include +#include + +#include +#include + + + .globl ext_bus_cntlr_init +ext_bus_cntlr_init: + mflr r4 // save link register + bl ..getAddr +..getAddr: + mflr r3 // get address of ..getAddr + mtlr r4 // restore link register + addi r4,0,14 // set ctr to 10; used to prefetch + mtctr r4 // 10 cache lines to fit this function + // in cache (gives us 8x10=80 instrctns) +..ebcloop: + icbt r0,r3 // prefetch cache line for addr in r3 + addi r3,r3,32 // move to next cache line + bdnz ..ebcloop // continue for 10 cache lines + + //------------------------------------------------------------------- + // Delay to ensure all accesses to ROM are complete before changing + // bank 0 timings. 200usec should be enough. + // 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles + //------------------------------------------------------------------- + addis r3,0,0x0 + ori r3,r3,0xA000 // ensure 200usec have passed since reset + mtctr r3 +..spinlp: + bdnz ..spinlp // spin loop + + //----------------------------------------------------------------------- + // Memory Bank 0 (Flash Bank 0) initialization + //----------------------------------------------------------------------- + addi r4,0,pb0ap + mtdcr ebccfga,r4 + addis r4,0,0x9201 + ori r4,r4,0x5480 + mtdcr ebccfgd,r4 + + addi r4,0,pb0cr + mtdcr ebccfga,r4 + addis r4,0,0xFFC5 // BAS=0xFFC,BS=0x2(4MB),BU=0x3(R/W), + ori r4,r4,0xA000 // BW=0x1(16 bits) + mtdcr ebccfgd,r4 + + //----------------------------------------------------------------------- + // Memory Bank 5 (Flash Bank 1) initialization (dummy for flash_init only!!!) + //----------------------------------------------------------------------- + addi r4,0,pb5ap + mtdcr ebccfga,r4 + addis r4,0,0x9201 + ori r4,r4,0x5480 + mtdcr ebccfgd,r4 + + addi r4,0,pb5cr + mtdcr ebccfga,r4 + addis r4,0,0xFF85 // BAS=0xFF8,BS=0x2(4MB),BU=0x3(R/W), + ori r4,r4,0xA000 // BW=0x1(16 bits) + mtdcr ebccfgd,r4 + + //----------------------------------------------------------------------- + // Memory Bank 1 (CAN/USB Bank 1) initialization (ADDR=0xf0000000) + //----------------------------------------------------------------------- + addi r4,0,pb1ap + mtdcr ebccfga,r4 + addis r4,0,0x0100 + ori r4,r4,0x53c0 // enable Ready, BEM=1 + mtdcr ebccfgd,r4 + + addi r4,0,pb1cr + mtdcr ebccfga,r4 + addis r4,0,0xF001 // BAS=0xF00,BS=0x0(1MB),BU=0x3(R/W), + ori r4,r4,0x8000 // BW=0x0(8 bits) + mtdcr ebccfgd,r4 + + //----------------------------------------------------------------------- + // Memory Bank 2 (misc_io, LEDs) initialization (ADDR=0xf0100000) + //----------------------------------------------------------------------- + addi r4,0,pb2ap + mtdcr ebccfga,r4 + addis r4,0,0x0000 + ori r4,r4,0x04c0 // disable Ready, BEM=1 + mtdcr ebccfgd,r4 + + addi r4,0,pb2cr + mtdcr ebccfga,r4 + addis r4,0,0xF011 // BAS=0xF01,BS=0x0(1MB),BU=0x3(R/W), + ori r4,r4,0x8000 // BW=0x0(8 bits) + mtdcr ebccfgd,r4 + + //----------------------------------------------------------------------- + // Memory Bank 3 (can_features) initialization (ADDR=0xf0200000) + //----------------------------------------------------------------------- + addi r4,0,pb3ap + mtdcr ebccfga,r4 + addis r4,0,0x0100 + ori r4,r4,0x04c0 // disable Ready, BEM=1 + mtdcr ebccfgd,r4 + + addi r4,0,pb3cr + mtdcr ebccfga,r4 + addis r4,0,0xF021 // BAS=0xF02,BS=0x0(1MB),BU=0x3(R/W), + ori r4,r4,0xA000 // BW=0x1(16 bits) + mtdcr ebccfgd,r4 + + nop // pass2 DCR errata #8 + blr + +//----------------------------------------------------------------------------- +// Function: sdram_init +// Description: Configures SDRAM memory banks. +// Auto Memory Configuration option reads the SDRAM EEPROM +// via the IIC bus and then configures the SDRAM memory +// banks appropriately. If Auto Memory Configuration is +// is not used, it is assumed that a 32MB 12x8(2) non-ECC DIMM is +// plugged, ie. the DIMM that shipped wih the Eval board. +//----------------------------------------------------------------------------- + .globl sdram_init + +sdram_init: + + mflr r31 + + //------------------------------------------------------------------- + // Set MB0CF for bank 0. (0-16MB) Address Mode 4 since 12x8(4) + //------------------------------------------------------------------- + addi r4,0,mem_mb0cf + mtdcr memcfga,r4 + addis r4,0,0x0004 + ori r4,r4,0x6001 + mtdcr memcfgd,r4 + + //------------------------------------------------------------------- + // Set the SDRAM Timing reg, SDTR1 and the refresh timer reg, RTR. + // To set the appropriate timings, we need to know the SDRAM speed. + // We can use the PLB speed since the SDRAM speed is the same as + // the PLB speed. The PLB speed is the FBK divider times the + // 405GP reference clock, which on the Walnut board is 33Mhz. + // Thus, if FBK div is 2, SDRAM is 66Mhz; if FBK div is 3, SDRAM is + // 100Mhz; if FBK is 3, SDRAM is 133Mhz. + // NOTE: The Walnut board supports SDRAM speeds of 66Mhz, 100Mhz, and + // maybe 133Mhz. + //------------------------------------------------------------------- + mfdcr r5,strap // determine FBK divider + // via STRAP reg to calc PLB speed. + // SDRAM speed is the same as the PLB + // speed. + rlwinm r4,r5,4,0x3 // get FBK divide bits + +..chk_66: + cmpi %cr0,0,r4,0x1 + bne ..chk_100 + addis r6,0,0x0085 // SDTR1 value for 66Mhz + ori r6,r6,0x4005 + addis r7,0,0x03F8 // RTR value for 66Mhz + b ..sdram_ok +..chk_100: + cmpi %cr0,0,r4,0x2 + bne ..chk_133 + addis r6,0,0x0086 // SDTR1 value for 100Mhz + ori r6,r6,0x400D + addis r7,0,0x05F0 // RTR value for 100Mhz + b ..sdram_ok +..chk_133: + addis r6,0,0x0107 // SDTR1 value for 133Mhz + ori r6,r6,0x4015 + addis r7,0,0x07F0 // RTR value for 133Mhz + +..sdram_ok: + //------------------------------------------------------------------- + // Set SDTR1 + //------------------------------------------------------------------- + addi r4,0,mem_sdtr1 + mtdcr memcfga,r4 + mtdcr memcfgd,r6 + + //------------------------------------------------------------------- + // Set RTR + //------------------------------------------------------------------- + addi r4,0,mem_rtr + mtdcr memcfga,r4 + mtdcr memcfgd,r7 + + //------------------------------------------------------------------- + // Delay to ensure 200usec have elapsed since reset. Assume worst + // case that the core is running 200Mhz: + // 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles + //------------------------------------------------------------------- + addis r3,0,0x0000 + ori r3,r3,0xA000 // ensure 200usec have passed since reset + mtctr r3 +..spinlp2: + bdnz ..spinlp2 // spin loop + + //------------------------------------------------------------------- + // Set memory controller options reg, MCOPT1. + // Set DC_EN to '1' and BRD_PRF to '01' for 16 byte PLB Burst + // read/prefetch. + //------------------------------------------------------------------- + addi r4,0,mem_mcopt1 + mtdcr memcfga,r4 + addis r4,0,0x8080 // set DC_EN=1 + ori r4,r4,0x0000 + mtdcr memcfgd,r4 + + //------------------------------------------------------------------- + // Delay to ensure 10msec have elapsed since reset. This is + // required for the MPC952 to stabalize. Assume worst + // case that the core is running 200Mhz: + // 200,000,000 (cycles/sec) X .010 (sec) = 0x1E8480 cycles + // This delay should occur before accessing SDRAM. + //------------------------------------------------------------------- + addis r3,0,0x001E + ori r3,r3,0x8480 // ensure 10msec have passed since reset + mtctr r3 +..spinlp3: + bdnz ..spinlp3 // spin loop + + mtlr r31 // restore lr + blr diff --git a/board/canbt/ppcboot.lds b/board/canbt/ppcboot.lds new file mode 100644 index 0000000..d0ba004 --- /dev/null +++ b/board/canbt/ppcboot.lds @@ -0,0 +1,154 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +SECTIONS +{ + .resetvec 0xFFFFFFFC : + { + *(.resetvec) + } = 0xffff + + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + /* WARNING - the following is hand-optimized to fit within */ + /* the sector layout of our flash chips! XXX FIXME XXX */ + + cpu/ppc4xx/start.o (.text) + board/canbt/init.o (.text) + cpu/ppc4xx/traps.o (.text) + cpu/ppc4xx/interrupts.o (.text) + cpu/ppc4xx/serial.o (.text) + cpu/ppc4xx/cpu_init.o (.text) + cpu/ppc4xx/speed.o (.text) + cpu/ppc4xx/405gp_enet.o (.text) + common/dlmalloc.o (.text) + ppc/crc32.o (.text) + ppc/extable.o (.text) + ppc/zlib.o (.text) + + common/cmd_boot.o (.text) + common/cmd_bootm.o (.text) + common/cmd_flash.o (.text) + common/cmd_mem.o (.text) + common/cmd_nvedit.o (.text) + common/console.o (.text) + common/lists.o (.text) + common/board.o (.text) + common/main.o (.text) + net/net.o (.text) + + . = env_offset; + common/environment.o(.text) + + *(.text) + *(.fixup) + *(.got1) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(.rodata) + *(.rodata1) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + } + _end = . ; + PROVIDE (end = .); +} diff --git a/board/canbt/ppcboot.lds.debug b/board/canbt/ppcboot.lds.debug new file mode 100644 index 0000000..7e7b925 --- /dev/null +++ b/board/canbt/ppcboot.lds.debug @@ -0,0 +1,131 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + /* WARNING - the following is hand-optimized to fit within */ + /* the sector layout of our flash chips! XXX FIXME XXX */ + + cpu/mpc8xx/start.o (.text) + common/dlmalloc.o (.text) + ppc/vsprintf.o (.text) + ppc/crc32.o (.text) + ppc/extable.o (.text) + + common/environment.o(.text) + + *(.text) + *(.fixup) + *(.got1) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(.rodata) + *(.rodata1) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x0FFF) & 0xFFFFF000; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(4096); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(4096); + __init_end = .; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + } + _end = . ; + PROVIDE (end = .); +} + diff --git a/board/cogent/dipsw.c b/board/cogent/dipsw.c index d88b5b3..018cc76 100644 --- a/board/cogent/dipsw.c +++ b/board/cogent/dipsw.c @@ -4,7 +4,7 @@ unsigned char dipsw_raw(void) { - return cma_mbio_reg_read(&((cma_mbio_dipsw *)CMA_MB_DIPSW_BASE)->dip_val); + return cma_mb_reg_read(&((cma_mb_dipsw *)CMA_MB_DIPSW_BASE)->dip_val); } unsigned char diff --git a/board/cogent/flash.c b/board/cogent/flash.c index 523ea0e..0239e47 100644 --- a/board/cogent/flash.c +++ b/board/cogent/flash.c @@ -41,15 +41,7 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ /*----------------------------------------------------------------------- * Functions */ -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt); static int write_word (flash_info_t *info, ulong dest, ulong data); -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info); - -/*----------------------------------------------------------------------- - * Protection Flags: - */ -#define FLAG_PROTECT_SET 0x01 -#define FLAG_PROTECT_CLEAR 0x02 /*----------------------------------------------------------------------- */ @@ -337,7 +329,7 @@ flash_init(void) */ #if CFG_MONITOR_BASE == CFG_FLASH_BASE - (void)flash_protect(FLAG_PROTECT_SET, + flash_protect(FLAG_PROTECT_SET, CFG_MONITOR_BASE, CFG_MONITOR_BASE+CFG_MONITOR_LEN-1, &flash_info[0]); @@ -345,75 +337,14 @@ flash_init(void) #ifdef CFG_ENV_IS_IN_FLASH /* ENV protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, - CFG_ENV_ADDR, - CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1, - &flash_info[0]); + flash_protect(FLAG_PROTECT_SET, + CFG_ENV_ADDR, + CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1, + &flash_info[0]); #endif return total; } -/*----------------------------------------------------------------------- - * Check or set protection status for monitor sectors - * - * The monitor always occupies the _first_ part of the _first_ Flash bank. - */ -static int -flash_protect(int flag, ulong from, ulong to, flash_info_t *info) -{ - ulong b_end = info->start[0] + info->size - 1; /* bank end address */ - int rc = 0; - int first = -1; - int last = -1; - int i; - - if (to < info->start[0]) { - return (0); - } - - for (i=0; isector_count; ++i) { - ulong end; /* last address in current sect */ - short s_end; - - s_end = info->sector_count - 1; - - end = (i == s_end) ? b_end : info->start[i + 1] - 1; - - if (from > end) { - continue; - } - if (to < info->start[i]) { - continue; - } - - if (from == info->start[i]) { - first = i; - if (last < 0) { - last = s_end; - } - } - if (to == end) { - last = i; - if (first < 0) { - first = 0; - } - } - } - - for (i=first; i<=last; ++i) { - if (flag & FLAG_PROTECT_CLEAR) { - info->protect[i] = 0; - } else if (flag & FLAG_PROTECT_SET) { - info->protect[i] = 1; - } - if (info->protect[i]) { - rc = 1; - } - } - return (rc); -} - - /*----------------------------------------------------------------------- */ void @@ -588,83 +519,6 @@ flash_erase(flash_info_t *info, int s_first, int s_last) } } -/*----------------------------------------------------------------------- - */ - -flash_info_t * -addr2info(ulong addr) -{ - flash_info_t *info; - int i; - - for (i=0, info=&flash_info[0]; i= info->start[0]) && - (addr < (info->start[0] + info->size)) ) { - return (info); - } - } - - return (NULL); -} - -/*----------------------------------------------------------------------- - * Copy memory to flash. - * Make sure all target addresses are within Flash bounds, - * and no protected sectors are hit. - * Returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - target range includes protected sectors - * 8 - target address not in Flash memory - */ -int -flash_write (uchar *src, ulong addr, ulong cnt) -{ - int i; - ulong end = addr + cnt - 1; - flash_info_t *info_first = addr2info (addr); - flash_info_t *info_last = addr2info (end ); - flash_info_t *info; - - if (cnt == 0) { - return (0); - } - - if (!info_first || !info_last) { - return (8); - } - - for (info = info_first; info <= info_last; ++info) { - ulong b_end = info->start[0] + info->size; /* bank end addr */ - short s_end = info->sector_count - 1; - for (i=0; isector_count; ++i) { - ulong e_addr = (i == s_end) ? b_end : info->start[i + 1]; - - if ((end >= info->start[i]) && (addr < e_addr) && - (info->protect[i] != 0) ) { - return (4); - } - } - } - - /* finally write data to flash */ - for (info = info_first; info <= info_last && cnt>0; ++info) { - ulong len; - - len = info->start[0] + info->size - addr; - if (len > cnt) - len = cnt; - if ((i = write_buff(info, src, addr, len)) != 0) { - return (i); - } - cnt -= len; - addr += len; - src += len; - } - return (0); -} - /*----------------------------------------------------------------------- * Copy memory to flash, returns: * 0 - OK @@ -673,7 +527,7 @@ flash_write (uchar *src, ulong addr, ulong cnt) * 3 - write error */ -static int +int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt) { ulong cp, wp, data; @@ -777,8 +631,7 @@ write_word(flash_info_t *info, ulong dest, ulong data) case FLASH_MAN_INTEL|FLASH_28F800_B: case FLASH_MAN_AMD|FLASH_AM29F800B: /* not yet ... - retval = cmbf_write_word(info, - (cmbf_addr_t)dest, (cmbf_word_t)data); + retval = cmbf_write_word((cmbf_addr_t)dest, (cmbf_word_t)data); */ retval = 3; break; diff --git a/board/cogent/lcd.c b/board/cogent/lcd.c index 97685e6..e5e0c75 100644 --- a/board/cogent/lcd.c +++ b/board/cogent/lcd.c @@ -60,14 +60,14 @@ static char init_line0[LCD_LINE_LENGTH+1] = "PPCBoot Cogent "; static char init_line1[LCD_LINE_LENGTH+1] = "mjj, 11 Aug 2000"; static inline unsigned char -lcd_read_status(cma_mbio_lcd *clp) +lcd_read_status(cma_mb_lcd *clp) { /* read the Busy Status Register */ - return (cma_mbio_reg_read(&clp->lcd_bsr)); + return (cma_mb_reg_read(&clp->lcd_bsr)); } static inline void -lcd_wait_not_busy(cma_mbio_lcd *clp) +lcd_wait_not_busy(cma_mb_lcd *clp) { /* * wait for not busy @@ -83,27 +83,27 @@ lcd_wait_not_busy(cma_mbio_lcd *clp) } static inline void -lcd_write_command(cma_mbio_lcd *clp, unsigned char cmd) +lcd_write_command(cma_mb_lcd *clp, unsigned char cmd) { lcd_wait_not_busy(clp); /* write the Command Register */ - cma_mbio_reg_write(&clp->lcd_cmd, cmd); + cma_mb_reg_write(&clp->lcd_cmd, cmd); } static inline void -lcd_write_data(cma_mbio_lcd *clp, unsigned char data) +lcd_write_data(cma_mb_lcd *clp, unsigned char data) { lcd_wait_not_busy(clp); /* write the Current Character Register */ - cma_mbio_reg_write(&clp->lcd_ccr, data); + cma_mb_reg_write(&clp->lcd_ccr, data); } static inline void lcd_dis(int addr, char *string) { - cma_mbio_lcd *clp = (cma_mbio_lcd *)CMA_MB_LCD_BASE; + cma_mb_lcd *clp = (cma_mb_lcd *)CMA_MB_LCD_BASE; int pos, linelen; linelen = LCD_LINE_LENGTH; @@ -118,7 +118,7 @@ lcd_dis(int addr, char *string) void lcd_init(void) { - cma_mbio_lcd *clp = (cma_mbio_lcd *)CMA_MB_LCD_BASE; + cma_mb_lcd *clp = (cma_mb_lcd *)CMA_MB_LCD_BASE; int i; /* configure the lcd for 8 bits/char, 2 lines and 5x7 dot matrix */ @@ -209,7 +209,7 @@ lcd_printf(const char *fmt, ...) void lcd_heartbeat(void) { - cma_mbio_lcd *clp = (cma_mbio_lcd *)CMA_MB_LCD_BASE; + cma_mb_lcd *clp = (cma_mb_lcd *)CMA_MB_LCD_BASE; #if 0 static char rotchars[] = { '|', '/', '-', '\\' }; #else diff --git a/board/cogent/mb.c b/board/cogent/mb.c index 72867ae..420e01f 100644 --- a/board/cogent/mb.c +++ b/board/cogent/mb.c @@ -67,8 +67,8 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PA12 */ { 0, 0, 0, 0, 0, 0 }, /* PA11 */ { 0, 0, 0, 0, 0, 0 }, /* PA10 */ { 0, 0, 0, 0, 0, 0 }, - /* PA9 */ { 0, 0, 0, 0, 0, 0 }, - /* PA8 */ { 0, 0, 0, 0, 0, 0 }, + /* PA9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC2 TXD */ + /* PA8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC2 RXD */ /* PA7 */ { 0, 0, 0, 0, 0, 0 }, /* PA6 */ { 0, 0, 0, 0, 0, 0 }, /* PA5 */ { 0, 0, 0, 0, 0, 0 }, @@ -169,14 +169,14 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PD18 */ { 0, 0, 0, 0, 0, 0 }, /* PD17 */ { 0, 0, 0, 0, 0, 0 }, /* PD16 */ { 0, 0, 0, 0, 0, 0 }, - /* PD15 */ { 0, 0, 0, 0, 0, 0 }, - /* PD14 */ { 0, 0, 0, 0, 0, 0 }, + /* PD15 */ { 1, 1, 1, 0, 0, 0 }, /* I2C SDA */ + /* PD14 */ { 1, 1, 1, 0, 0, 0 }, /* I2C SCL */ /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */ { 0, 0, 0, 0, 0, 0 }, - /* PD9 */ { 0, 0, 0, 0, 0, 0 }, - /* PD8 */ { 0, 0, 0, 0, 0, 0 }, + /* PD9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC1 TXD */ + /* PD8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC1 RXD */ /* PD7 */ { 0, 0, 0, 0, 0, 0 }, /* PD6 */ { 0, 0, 0, 0, 0, 0 }, /* PD5 */ { 0, 0, 0, 0, 0, 0 }, diff --git a/board/cogent/mb.h b/board/cogent/mb.h index 9f086c3..e37a39c 100644 --- a/board/cogent/mb.h +++ b/board/cogent/mb.h @@ -29,7 +29,7 @@ #define _COGENT_MB_H /* - * Motherboard Address Map + * Cogent Motherboard Address Map * * The size of a Cogent motherboard address space is 256 Mbytes (i.e. 28 bits). * @@ -41,21 +41,24 @@ * is free for whatever. * * The location of the motherboard address space in the physical address space - * of the cpu is given by CFG_CMA_MB_BASE. This value is determined by the cpu - * module plugged into the motherboard and is configured elsewhere. + * of the cpu is given by CMA_MB_BASE. This value is determined by the cpu + * module plugged into the motherboard and is configured above. * * Motherboard I/O devices mapped into the area (0xE000000-0xFFFFFFF) * generally only use byte lane 0 (D0-7) for their transfers, i.e. only * 8 bit, or 1 byte, transfers can take place, so all the registers are - * only 8 bits wide. I/O registers within the devices are 8 bytes apart. + * only 8 bits wide. The exceptions are the motherboard flash, which uses + * byte lanes 0 and 1 (i.e. 16 bits), and the mapped PCI address space. * - * For big endian addressing, the register will be at byte 7 (the address - * + 7). For little endian addressing, the register will be at byte 0 (the - * address + 0). To learn the endianess we must include + * I/O registers within the mapped motherboard devices are 64 bit aligned + * i.e. they are 8 bytes apart. For big endian addressing, the 8 bit register + * will be at byte 7 (the address + 7). For little endian addressing, the + * register will be at byte 0 (the address + 0). To learn the endianess + * we must include * * Take the CMA102 and CMA111 motherboards as examples... * - * The CMA102 has three CMABus I/O Expansion slots and no PIC bridge. The 3 + * The CMA102 has three CMABus I/O Expansion slots and no PCI bridge. The 3 * CMABus slots are each mapped directly onto the three general I/O slots. * * The CMA111 has only one CMABus I/O Expansion slot, but has a V360EPC PCI @@ -90,7 +93,7 @@ #define CMA_MB_SLOT3_SIZE 0x2000000 #endif -#if (CMA_MB_CAPS & CMA_MB_CAP_PCIEXT) +#if (CMA_MB_CAPS & CMA_MB_CAP_PCI_EXT) #define CMA_MB_EXTPCI_BASE (CFG_CMA_MB_BASE+0xa000000) #define CMA_MB_EXTPCI_SIZE 0x4000000 #endif @@ -137,7 +140,7 @@ #define CMA_MB_SER2B_BASE (CMA_MB_SER2_BASE+0x00) #define CMA_MB_SER2A_BASE (CMA_MB_SER2_BASE+0x40) #endif -#if defined(CONFIG_CMA302) +#if defined(CONFIG_CMA302) && defined(CONFIG_CMA302_SLOT1) #define CMA_MB_S1KBM_BASE (CMA_MB_SLOT1CFG_BASE+0x200) #endif #if (CMA_MB_CAPS & CMA_MB_CAP_KBM) && !defined(COGENT_CMA150) @@ -150,7 +153,7 @@ #if (CMA_MB_CAPS & CMA_MB_CAP_SLOT2) #define CMA_MB_SLOT2CFG_BASE (CFG_CMA_MB_BASE+0xf200000) -#if defined(CONFIG_CMA302) +#if defined(CONFIG_CMA302) && defined(CONFIG_CMA302_SLOT2) #define CMA_MB_S2KBM_BASE (CMA_MB_SLOT2CFG_BASE+0x200) #endif #define CMA_MB_SLOT2CFG_SIZE 0x400 @@ -169,7 +172,7 @@ #if (CMA_MB_CAPS & CMA_MB_CAP_SLOT3) #define CMA_MB_SLOT3CFG_BASE (CFG_CMA_MB_BASE+0xf300000) -#if defined(CONFIG_CMA302) +#if defined(CONFIG_CMA302) && defined(CONFIG_CMA302_SLOT3) #define CMA_MB_S3KBM_BASE (CMA_MB_SLOT3CFG_BASE+0x200) #endif #define CMA_MB_SLOT3CFG_SIZE 0x400 @@ -240,10 +243,10 @@ typedef unsigned char value; #endif } -cma_mbio_reg; +cma_mb_reg; extern __inline__ unsigned char -cma_mbio_reg_read(volatile cma_mbio_reg *reg) +cma_mb_reg_read(volatile cma_mb_reg *reg) { unsigned char data = reg->value; __asm__ __volatile__ ("eieio" : : : "memory"); @@ -251,7 +254,7 @@ cma_mbio_reg_read(volatile cma_mbio_reg *reg) } extern __inline__ void -cma_mbio_reg_write(volatile cma_mbio_reg *reg, unsigned char data) +cma_mb_reg_write(volatile cma_mb_reg *reg, unsigned char data) { reg->value = data; __asm__ __volatile__ ("eieio" : : : "memory"); @@ -262,17 +265,17 @@ cma_mbio_reg_write(volatile cma_mbio_reg *reg, unsigned char data) /* MK48T02 RTC registers */ typedef struct { - cma_mbio_reg sram[2040];/* Battery-Backed SRAM */ - cma_mbio_reg clk_ctl; /* Clock Control Register */ - cma_mbio_reg clk_sec; /* Clock Seconds Register */ - cma_mbio_reg clk_min; /* Clock Minutes Register */ - cma_mbio_reg clk_hour; /* Clock Hour Register */ - cma_mbio_reg clk_day; /* Clock Day Register */ - cma_mbio_reg clk_date; /* Clock Date Register */ - cma_mbio_reg clk_month; /* Clock Month Register */ - cma_mbio_reg clk_year; /* Clock Year Register */ + cma_mb_reg sram[2040];/* Battery-Backed SRAM */ + cma_mb_reg clk_ctl; /* Clock Control Register */ + cma_mb_reg clk_sec; /* Clock Seconds Register */ + cma_mb_reg clk_min; /* Clock Minutes Register */ + cma_mb_reg clk_hour; /* Clock Hour Register */ + cma_mb_reg clk_day; /* Clock Day Register */ + cma_mb_reg clk_date; /* Clock Date Register */ + cma_mb_reg clk_month; /* Clock Month Register */ + cma_mb_reg clk_year; /* Clock Year Register */ } -cma_mbio_rtc; +cma_mb_rtc; #endif @@ -281,16 +284,16 @@ cma_mbio_rtc; /* ST16C522 Serial I/O */ typedef struct { - cma_mbio_reg ser_rhr; /* Receive Holding Register (R, DLAB=0) */ - cma_mbio_reg ser_ier; /* Interrupt Enable Register (R/W, DLAB=0) */ - cma_mbio_reg ser_isr; /* Interrupt Status Register (R) */ - cma_mbio_reg ser_lcr; /* Line Control Register (R/W) */ - cma_mbio_reg ser_mcr; /* Modem Control Register (R/W) */ - cma_mbio_reg ser_lsr; /* Line Status Register (R) */ - cma_mbio_reg ser_msr; /* Modem Status Register (R/W) */ - cma_mbio_reg ser_spr; /* Scratch Pad Register (R/W) */ + cma_mb_reg ser_rhr; /* Receive Holding Register (R, DLAB=0) */ + cma_mb_reg ser_ier; /* Interrupt Enable Register (R/W, DLAB=0) */ + cma_mb_reg ser_isr; /* Interrupt Status Register (R) */ + cma_mb_reg ser_lcr; /* Line Control Register (R/W) */ + cma_mb_reg ser_mcr; /* Modem Control Register (R/W) */ + cma_mb_reg ser_lsr; /* Line Status Register (R) */ + cma_mb_reg ser_msr; /* Modem Status Register (R/W) */ + cma_mb_reg ser_spr; /* Scratch Pad Register (R/W) */ } -cma_mbio_serial; +cma_mb_serial; #define ser_thr ser_rhr /* Transmit Holding Register (W, DLAB=0) */ #define ser_brl ser_rhr /* Baud Rate Divisor Low Byte (R/W, DLAB=1) */ @@ -301,11 +304,11 @@ cma_mbio_serial; /* ST16C522 Parallel I/O */ typedef struct { - cma_mbio_reg par_rdr; /* Port Read Data Register (R) */ - cma_mbio_reg par_sr; /* Status Register (R) */ - cma_mbio_reg par_cmd; /* Command Register (R) */ + cma_mb_reg par_rdr; /* Port Read Data Register (R) */ + cma_mb_reg par_sr; /* Status Register (R) */ + cma_mb_reg par_cmd; /* Command Register (R) */ } -cma_mbio_parallel; +cma_mb_parallel; #define par_wdr par_rdr /* Port Write Data Register (W) */ #define par_ios par_sr /* I/O Select Register (W) */ @@ -318,10 +321,10 @@ cma_mbio_parallel; /* HT6542B PS/2 Keyboard/Mouse Controller */ typedef struct { - cma_mbio_reg kbm_rdr; /* Read Data Register (R) */ - cma_mbio_reg kbm_sr; /* Status Register (R) */ + cma_mb_reg kbm_rdr; /* Read Data Register (R) */ + cma_mb_reg kbm_sr; /* Status Register (R) */ } -cma_mbio_kbm; +cma_mb_kbm; #define kbm_wdr kbm_rdr /* Write Data Register (W) */ #define kbm_cmd kbm_sr /* Command Register (W) */ @@ -333,10 +336,10 @@ cma_mbio_kbm; /* HD44780 LCD Display */ typedef struct { - cma_mbio_reg lcd_ccr; /* Current Character Register (R/W) */ - cma_mbio_reg lcd_bsr; /* Busy Status Register (R) */ + cma_mb_reg lcd_ccr; /* Current Character Register (R/W) */ + cma_mb_reg lcd_bsr; /* Busy Status Register (R) */ } -cma_mbio_lcd; +cma_mb_lcd; #define lcd_cmd lcd_bsr /* Command Register (W) */ @@ -345,9 +348,9 @@ cma_mbio_lcd; /* 8-Position Configuration Switch */ typedef struct { - cma_mbio_reg dip_val; /* Dip Switch value (R) */ + cma_mb_reg dip_val; /* Dip Switch value (R) */ } -cma_mbio_dipsw; +cma_mb_dipsw; #if (CMA_MB_CAPS & CMA_MB_CAP_PCI) @@ -513,7 +516,7 @@ typedef unsigned long reserved9[7]; /* 0xe4 */ #endif } /* 0x100 */ -cma_mbio_v360epc; +cma_mb_v360epc; #endif diff --git a/board/cogent/serial.c b/board/cogent/serial.c index b4422fc..96ec468 100644 --- a/board/cogent/serial.c +++ b/board/cogent/serial.c @@ -25,44 +25,44 @@ void serial_init(ulong cpu_clock, int baudrate) { - cma_mbio_serial *mbsp = (cma_mbio_serial *)CMA_MB_SERIAL_BASE; + cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE; - cma_mbio_reg_write(&mbsp->ser_ier, 0x00); /* turn off interrupts */ + cma_mb_reg_write(&mbsp->ser_ier, 0x00); /* turn off interrupts */ serial_setbrg(cpu_clock, baudrate); - cma_mbio_reg_write(&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */ - cma_mbio_reg_write(&mbsp->ser_mcr, 0x03); /* RTS/DTR */ - cma_mbio_reg_write(&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */ + cma_mb_reg_write(&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */ + cma_mb_reg_write(&mbsp->ser_mcr, 0x03); /* RTS/DTR */ + cma_mb_reg_write(&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */ } void serial_setbrg(ulong cpu_clock, int baudrate) { - cma_mbio_serial *mbsp = (cma_mbio_serial *)CMA_MB_SERIAL_BASE; + cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE; unsigned int divisor; unsigned char lcr; if ((divisor = br_to_div(baudrate)) == 0) divisor = DEFDIV; - lcr = cma_mbio_reg_read(&mbsp->ser_lcr); - cma_mbio_reg_write(&mbsp->ser_lcr, lcr|0x80);/* Access baud rate(set DLAB)*/ - cma_mbio_reg_write(&mbsp->ser_brl, divisor & 0xff); - cma_mbio_reg_write(&mbsp->ser_brh, (divisor >> 8) & 0xff); - cma_mbio_reg_write(&mbsp->ser_lcr, lcr); /* unset DLAB */ + lcr = cma_mb_reg_read(&mbsp->ser_lcr); + cma_mb_reg_write(&mbsp->ser_lcr, lcr|0x80);/* Access baud rate(set DLAB)*/ + cma_mb_reg_write(&mbsp->ser_brl, divisor & 0xff); + cma_mb_reg_write(&mbsp->ser_brh, (divisor >> 8) & 0xff); + cma_mb_reg_write(&mbsp->ser_lcr, lcr); /* unset DLAB */ } void serial_putc(const char c) { - cma_mbio_serial *mbsp = (cma_mbio_serial *)CMA_MB_SERIAL_BASE; + cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE; if (c == '\n') serial_putc('\r'); - while ((cma_mbio_reg_read(&mbsp->ser_lsr) & LSR_THRE) == 0) + while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_THRE) == 0) ; - cma_mbio_reg_write(&mbsp->ser_thr, c); + cma_mb_reg_write(&mbsp->ser_thr, c); } void @@ -75,54 +75,56 @@ serial_puts(const char *s) int serial_getc(void) { - cma_mbio_serial *mbsp = (cma_mbio_serial *)CMA_MB_SERIAL_BASE; + cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE; - while ((cma_mbio_reg_read(&mbsp->ser_lsr) & LSR_DR) == 0) + while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) == 0) ; - return ((int)cma_mbio_reg_read(&mbsp->ser_rhr) & 0x7f); + return ((int)cma_mb_reg_read(&mbsp->ser_rhr) & 0x7f); } int serial_tstc(void) { - cma_mbio_serial *mbsp = (cma_mbio_serial *)CMA_MB_SERIAL_BASE; + cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE; - return ((cma_mbio_reg_read(&mbsp->ser_lsr) & LSR_DR) != 0); + return ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) != 0); } -#endif /* CONFIG_8xx_CONS_NONE */ +#endif -#if (CONFIG_COMMANDS & CFG_CMD_KGDB) && (CMA_MB_CAPS & CMA_MB_CAP_SERPAR) +#if (CONFIG_COMMANDS & CFG_CMD_KGDB) && \ + (CMA_MB_CAPS & CMA_MB_CAP_SERPAR) && \ + defined(CONFIG_KGDB_NONE) -#if CONFIG_KGDB_SER_INDEX == 1 +#if CONFIG_KGDB_INDEX == 1 #define CMA_MB_KGDB_SER_BASE CMA_MB_SERIALA_BASE -#elif CONFIG_KGDB_SER_INDEX == 2 +#elif CONFIG_KGDB_INDEX == 2 #define CMA_MB_KGDB_SER_BASE CMA_MB_SERIALB_BASE -#elif CONFIG_KGDB_SER_INDEX == 3 && (CMA_MB_CAPS & CMA_MB_CAP_SER2) +#elif CONFIG_KGDB_INDEX == 3 && (CMA_MB_CAPS & CMA_MB_CAP_SER2) #define CMA_MB_KGDB_SER_BASE CMA_MB_SER2A_BASE -#elif CONFIG_KGDB_SER_INDEX == 4 && (CMA_MB_CAPS & CMA_MB_CAP_SER2) +#elif CONFIG_KGDB_INDEX == 4 && (CMA_MB_CAPS & CMA_MB_CAP_SER2) #define CMA_MB_KGDB_SER_BASE CMA_MB_SER2B_BASE #else -#error CONFIG_KGDB_SER_INDEX must be configured for Cogent motherboard serial +#error CONFIG_KGDB_INDEX must be configured for Cogent motherboard serial #endif void kgdb_serial_init(void) { - cma_mbio_serial *mbsp = (cma_mbio_serial *)CMA_MB_KGDB_SER_BASE; + cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE; unsigned int divisor; if ((divisor = br_to_div(CONFIG_KGDB_BAUDRATE)) == 0) divisor = DEFDIV; - cma_mbio_reg_write(&mbsp->ser_ier, 0x00); /* turn off interrupts */ - cma_mbio_reg_write(&mbsp->ser_lcr, 0x80); /* Access baud rate(set DLAB)*/ - cma_mbio_reg_write(&mbsp->ser_brl, divisor & 0xff); - cma_mbio_reg_write(&mbsp->ser_brh, (divisor >> 8) & 0xff); - cma_mbio_reg_write(&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */ - cma_mbio_reg_write(&mbsp->ser_mcr, 0x03); /* RTS/DTR */ - cma_mbio_reg_write(&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */ + cma_mb_reg_write(&mbsp->ser_ier, 0x00); /* turn off interrupts */ + cma_mb_reg_write(&mbsp->ser_lcr, 0x80); /* Access baud rate(set DLAB)*/ + cma_mb_reg_write(&mbsp->ser_brl, divisor & 0xff); + cma_mb_reg_write(&mbsp->ser_brh, (divisor >> 8) & 0xff); + cma_mb_reg_write(&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */ + cma_mb_reg_write(&mbsp->ser_mcr, 0x03); /* RTS/DTR */ + cma_mb_reg_write(&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */ printf("[on cma10x serial port B] "); } @@ -130,12 +132,12 @@ kgdb_serial_init(void) void putDebugChar(int c) { - cma_mbio_serial *mbsp = (cma_mbio_serial *)CMA_MB_KGDB_SER_BASE; + cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE; - while ((cma_mbio_reg_read(&mbsp->ser_lsr) & LSR_THRE) == 0) + while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_THRE) == 0) ; - cma_mbio_reg_write(&mbsp->ser_thr, c & 0xff); + cma_mb_reg_write(&mbsp->ser_thr, c & 0xff); } void @@ -151,27 +153,27 @@ putDebugStr(const char *str) int getDebugChar(void) { - cma_mbio_serial *mbsp = (cma_mbio_serial *)CMA_MB_KGDB_SER_BASE; + cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE; - while ((cma_mbio_reg_read(&mbsp->ser_lsr) & LSR_DR) == 0) + while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) == 0) ; - return ((int)cma_mbio_reg_read(&mbsp->ser_rhr) & 0x7f); + return ((int)cma_mb_reg_read(&mbsp->ser_rhr) & 0x7f); } void kgdb_interruptible(int yes) { - cma_mbio_serial *mbsp = (cma_mbio_serial *)CMA_MB_KGDB_SER_BASE; + cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE; if (yes == 1) { printf("kgdb: turning serial ints on\n"); - cma_mbio_reg_write(&mbsp->ser_ier, 0xf); + cma_mb_reg_write(&mbsp->ser_ier, 0xf); } else { printf("kgdb: turning serial ints off\n"); - cma_mbio_reg_write(&mbsp->ser_ier, 0x0); + cma_mb_reg_write(&mbsp->ser_ier, 0x0); } } -#endif /* CFG_CMD_KGDB */ +#endif diff --git a/board/cpci405/flash.c b/board/cpci405/flash.c index cd2f81d..4723583 100644 --- a/board/cpci405/flash.c +++ b/board/cpci405/flash.c @@ -31,21 +31,8 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ * Functions */ static ulong flash_get_size (vu_long *addr, flash_info_t *info); - -int flash_write (uchar *, ulong, ulong); -flash_info_t *addr2info (ulong); - -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt); static int write_word (flash_info_t *info, ulong dest, ulong data); static void flash_get_offsets (ulong base, flash_info_t *info); -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info); - -/*----------------------------------------------------------------------- - * Protection Flags: - */ -#define FLAG_PROTECT_SET 0x01 -#define FLAG_PROTECT_CLEAR 0x02 - #ifdef CONFIG_ADCIOP #define ADDR0 0x0aa9 @@ -114,10 +101,10 @@ unsigned long flash_init (void) flash_get_offsets (base_b0, &flash_info[0]); /* monitor protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, - base_b0+size_b0-CFG_MONITOR_LEN, - base_b0+size_b0-1, - &flash_info[0]); + flash_protect(FLAG_PROTECT_SET, + base_b0+size_b0-CFG_MONITOR_LEN, + base_b0+size_b0-1, + &flash_info[0]); if (size_b1) { /* Re-do sizing to get full correct info */ @@ -126,15 +113,15 @@ unsigned long flash_init (void) flash_get_offsets (base_b1, &flash_info[1]); /* monitor protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, - base_b1+size_b1-CFG_MONITOR_LEN, - base_b1+size_b1-1, - &flash_info[1]); + flash_protect(FLAG_PROTECT_SET, + base_b1+size_b1-CFG_MONITOR_LEN, + base_b1+size_b1-1, + &flash_info[1]); /* monitor protection OFF by default (one is enough) */ - (void)flash_protect(FLAG_PROTECT_CLEAR, - base_b0+size_b0-CFG_MONITOR_LEN, - base_b0+size_b0-1, - &flash_info[0]); + flash_protect(FLAG_PROTECT_CLEAR, + base_b0+size_b0-CFG_MONITOR_LEN, + base_b0+size_b0-1, + &flash_info[0]); } else { flash_info[1].flash_id = FLASH_UNKNOWN; flash_info[1].sector_count = -1; @@ -146,73 +133,13 @@ unsigned long flash_init (void) return (size_b0 + size_b1); } -/*----------------------------------------------------------------------- - * Check or set protection status for monitor sectors - * - * The monitor always occupies the _first_ part of the _first_ Flash bank. - */ -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info) -{ - ulong b_end = info->start[0] + info->size - 1; /* bank end address */ - int rc = 0; - int first = -1; - int last = -1; - int i; - - if (to < info->start[0]) { - return (0); - } - - for (i=0; isector_count; ++i) { - ulong end; /* last address in current sect */ - short s_end; - - s_end = info->sector_count - 1; - - end = (i == s_end) ? b_end : info->start[i + 1] - 1; - - if (from > end) { - continue; - } - if (to < info->start[i]) { - continue; - } - - if (from == info->start[i]) { - first = i; - if (last < 0) { - last = s_end; - } - } - if (to == end) { - last = i; - if (first < 0) { - first = 0; - } - } - } - - for (i=first; i<=last; ++i) { - if (flag & FLAG_PROTECT_CLEAR) { - info->protect[i] = 0; - } else if (flag & FLAG_PROTECT_SET) { - info->protect[i] = 1; - } - if (info->protect[i]) { - rc = 1; - } - } - return (rc); -} - - /*----------------------------------------------------------------------- */ static void flash_get_offsets (ulong base, flash_info_t *info) { int i; - /* set up sector start adress table */ + /* set up sector start address table */ if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) { for (i = 0; i < info->sector_count; i++) info->start[i] = base + (i * 0x00010000); @@ -446,7 +373,7 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) } - /* set up sector start adress table */ + /* set up sector start address table */ if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) { for (i = 0; i < info->sector_count; i++) info->start[i] = base + (i * 0x00010000); @@ -617,81 +544,6 @@ DONE: printf (" done\n"); } -/*----------------------------------------------------------------------- - */ - -flash_info_t *addr2info (ulong addr) -{ - flash_info_t *info; - int i; - - for (i=0, info=&flash_info[0]; i= info->start[0]) && - (addr <= (info->start[0] + info->size - 1)) ) { - return (info); - } - } - - return (NULL); -} - -/*----------------------------------------------------------------------- - * Copy memory to flash. - * Make sure all target addresses are within Flash bounds, - * and no protected sectors are hit. - * Returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - target range includes protected sectors - * 8 - target address not in Flash memory - */ -int flash_write (uchar *src, ulong addr, ulong cnt) -{ - int i; - ulong end = addr + cnt - 1; - flash_info_t *info_first = addr2info (addr); - flash_info_t *info_last = addr2info (end ); - flash_info_t *info; - - if (cnt == 0) { - return (0); - } - - if (!info_first || !info_last) { - return (8); - } - - for (info = info_first; info <= info_last; ++info) { - ulong b_end = info->start[0] + info->size; /* bank end addr */ - short s_end = info->sector_count - 1; - for (i=0; isector_count; ++i) { - ulong e_addr = (i == s_end) ? b_end : info->start[i + 1]; - - if ((end >= info->start[i]) && (addr < e_addr) && - (info->protect[i] != 0) ) { - return (4); - } - } - } - - /* finally write data to flash */ - for (info = info_first; info <= info_last && cnt>0; ++info) { - ulong len; - - len = info->start[0] + info->size - addr; - if (len > cnt) - len = cnt; - if ((i = write_buff(info, src, addr, len)) != 0) { - return (i); - } - cnt -= len; - addr += len; - src += len; - } - return (0); -} - /*----------------------------------------------------------------------- * Copy memory to flash, returns: * 0 - OK @@ -699,7 +551,7 @@ int flash_write (uchar *src, ulong addr, ulong cnt) * 2 - Flash not erased */ -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) { ulong cp, wp, data; int i, l, rc; diff --git a/board/cpci405/init.S b/board/cpci405/init.S index c5fd09d..def057b 100644 --- a/board/cpci405/init.S +++ b/board/cpci405/init.S @@ -165,13 +165,6 @@ ext_bus_cntlr_init: ori r4,r4,0x8000 // BW=0x0(8 bits) mtdcr ebccfgd,r4 - cmpi cr0,0,r9,0x0 // check if I cache was off when we - // started - bne ..ebc_done // if it was on, leave on - addis r4,r0,0x0000 // if it was off, disable - mticcr r4 // restore iccr - isync -..ebc_done: nop // pass2 DCR errata #8 blr diff --git a/board/etx094/etx094.c b/board/etx094/etx094.c index f2f9931..ecbbe56 100644 --- a/board/etx094/etx094.c +++ b/board/etx094/etx094.c @@ -12,7 +12,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License @@ -30,56 +30,51 @@ static long int dram_size (long int, long int *, long int); /* ------------------------------------------------------------------------- */ -#define _NOT_USED_ 0xFFFFFFFF +#define _NOT_USED_ 0xFFFFFFFF const uint sdram_table[] = { - /* - * Single Read. (Offset 0 in UPMA RAM) - */ - 0x1F0DFC04, 0xEEAFBC04, 0x11AF7C04, 0xEFBAFC00, - 0x1FF5FC47, /* last */ - /* - * SDRAM Initialization (offset 5 in UPMA RAM) - * - * This is no UPM entry point. The following definition uses - * the remaining space to establish an initialization - * sequence, which is executed by a RUN command. - * - */ - 0x1FF5FC34, 0xEFEABC34, 0x1FB57C35, /* last */ - /* - * Burst Read. (Offset 8 in UPMA RAM) - */ - 0x1F0DFC04, 0xEEAFBC04, 0x10AF7C04, 0xF0AFFC00, - 0xF0AFFC00, 0xF1AFFC00, 0xEFBAFC00, 0x1FF5FC47, /* last */ - _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, - _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, - /* - * Single Write. (Offset 18 in UPMA RAM) - */ - 0x1F0DFC04, 0xEEABBC00, 0x01B27C04, 0x1FF5FC47, /* last */ - _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, - /* - * Burst Write. (Offset 20 in UPMA RAM) - */ - 0x1F0DFC04, 0xEEABBC00, 0x10A77C00, 0xF0AFFC00, - 0xF0AFFC00, 0xE1BAFC04, 0x1FF5FC47, /* last */ - _NOT_USED_, - _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, - _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, - /* - * Refresh (Offset 30 in UPMA RAM) - */ - 0x1FFD7C84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04, - 0xFFFFFC84, 0xFFFFFC07, /* last */ - _NOT_USED_, _NOT_USED_, + + /* single read (offset 0x00 in upm ram) */ + + 0xEECEFC24, 0x100DFC24, 0xE02FBC04, 0x01AA7C04, + 0x1FB5FC00, 0xFFFFFC05, _NOT_USED_, _NOT_USED_, + + /* burst read (offset 0x08 in upm ram) */ + + 0xEECEFC24, 0x100DFC24, 0xE0FFBC04, 0x10FF7C04, + 0xF0FFFC00, 0xF0FFFC00, 0xF0FFFC00, 0xFFFFFC00, + 0xFFFFFC05, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, - /* - * Exception. (Offset 3c in UPMA RAM) - */ - 0x7FFFFC07, /* last */ - _NOT_USED_, _NOT_USED_, _NOT_USED_, + + /* single write (offset 0x18 in upm ram) */ + + 0xEECEFC24, 0x100DFC24, 0xE02BBC04, 0x01A27C00, + 0x1FB5FC05, _NOT_USED_, _NOT_USED_, _NOT_USED_, + + /* burst write (offset 0x20 in upm ram) */ + + 0xEECEFC24, 0x103DFC24, 0xE0FBBC00, 0x10F77C00, + 0xF0FFFC00, 0xF0FFFC00, 0xF0FFFC04, 0xFFFFFC05, + + /* init part1 (offset 0x28 in upm ram)*/ + + 0xEFFAFC3C, 0x1FF4FC34, 0xEFFCBC34, 0x1FFC3C34, + 0xFFFC3C35, _NOT_USED_, _NOT_USED_, _NOT_USED_, + + /* refresh (offset 0x30 in upm ram) */ + + 0xEFFEBC0C, 0x1FFD7C04, 0xFFFFFC04, 0xFFFFFC05, + + /* init part2 (offset 0x34 in upm ram) */ + + 0xFFFEBC04, 0xEFFC3CB4, 0x1FFC3C34, 0xFFFC3C34, + 0xFFFC3C34, 0xEFE83CB4, 0x1FB57C35, _NOT_USED_, + + /* exception (offset 0x3C in upm ram) */ + + 0xFFFFFC05, _NOT_USED_, _NOT_USED_, _NOT_USED_, + }; /* ------------------------------------------------------------------------- */ @@ -120,7 +115,7 @@ int checkboard (void) long int initdram (int board_type) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *)CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; long int size_b0, size_b1, size8, size9; @@ -132,7 +127,7 @@ long int initdram (int board_type) * with two SDRAM banks or four cycles every 31.2 us with one * bank. It will be adjusted after memory sizing. */ - memctl->memc_mptpr = CFG_MPTPR_2BK_8K; + memctl->memc_mptpr = CFG_MPTPR_1BK_4K; memctl->memc_mar = 0x00000088; @@ -155,15 +150,14 @@ long int initdram (int board_type) /* perform SDRAM initializsation sequence */ - memctl->memc_mcr = 0x80004105; /* SDRAM bank 0 */ - udelay(1); - memctl->memc_mcr = 0x80004230; /* SDRAM bank 0 - execute twice */ + memctl->memc_mcr = 0x80004128; /* Init Part 1*/ + memctl->memc_mcr = 0x80004734; /* Init Part 2*/ udelay(1); if (board_type == 0) { /* "L" type boards have only one bank SDRAM */ - memctl->memc_mcr = 0x80006105; /* SDRAM bank 1 */ + memctl->memc_mcr = 0x80006105; /* SDRAM bank 1 */ udelay(1); - memctl->memc_mcr = 0x80006230; /* SDRAM bank 1 - execute twice */ + memctl->memc_mcr = 0x80006230; /* SDRAM bank 1 - execute twice */ udelay(1); } @@ -235,7 +229,7 @@ long int initdram (int board_type) */ memctl->memc_or2 = ((-size_b0) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM; memctl->memc_br2 = ((CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V) - + size_b1; + + size_b1; } else { unsigned long reg; /* @@ -262,7 +256,7 @@ long int initdram (int board_type) */ memctl->memc_or3 = ((-size_b1) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM; memctl->memc_br3 = ((CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V) - + size_b0; + + size_b0; } else { unsigned long reg; /* @@ -296,7 +290,7 @@ long int initdram (int board_type) static long int dram_size (long int mamr_value, long int *base, long int maxsize) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *)CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; volatile long int *addr; long int cnt, val; diff --git a/board/etx094/flash.c b/board/etx094/flash.c index 5d8560a..f4b1dd2 100644 --- a/board/etx094/flash.c +++ b/board/etx094/flash.c @@ -26,24 +26,12 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ -/*----------------------------------------------------------------------- - * Protection Flags: - */ -#define FLAG_PROTECT_SET 0x01 -#define FLAG_PROTECT_CLEAR 0x02 - /*----------------------------------------------------------------------- * Functions */ static ulong flash_get_size (vu_long *addr, flash_info_t *info); - -int flash_write (uchar *, ulong, ulong); -flash_info_t *addr2info (ulong); - -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt); static int write_word (flash_info_t *info, ulong dest, ulong data); static void flash_get_offsets (ulong base, flash_info_t *info); -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info); /*----------------------------------------------------------------------- */ @@ -96,10 +84,10 @@ unsigned long flash_init (void) flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]); /* monitor protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, - CFG_FLASH_BASE, - CFG_FLASH_BASE+CFG_MONITOR_LEN-1, - &flash_info[0]); + flash_protect(FLAG_PROTECT_SET, + CFG_FLASH_BASE, + CFG_FLASH_BASE+CFG_MONITOR_LEN-1, + &flash_info[0]); if (size_b1) { memctl->memc_or1 = CFG_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000); @@ -113,10 +101,10 @@ unsigned long flash_init (void) flash_get_offsets (CFG_FLASH_BASE + size_b0, &flash_info[1]); /* monitor protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, - CFG_FLASH_BASE, - CFG_FLASH_BASE+CFG_MONITOR_LEN-1, - &flash_info[1]); + flash_protect(FLAG_PROTECT_SET, + CFG_FLASH_BASE, + CFG_FLASH_BASE+CFG_MONITOR_LEN-1, + &flash_info[1]); } else { memctl->memc_br1 = 0; /* invalidate bank */ @@ -130,69 +118,6 @@ unsigned long flash_init (void) return (size_b0 + size_b1); } -/*----------------------------------------------------------------------- - * Check or set protection status for monitor sectors - * - * The monitor always occupies the _first_ part of the _first_ Flash bank. - */ -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info) -{ - int rc = 0; - int first = -1; - int last = -1; - int i; - ulong b_end; - - if ((info->flash_id == FLASH_UNKNOWN) && - (to < info->start[0]) ) { - return (0); - } - - b_end = info->start[0] + info->size - 1; /* bank end address */ - - for (i=0; isector_count; ++i) { - ulong end; /* last address in current sect */ - short s_end; - - s_end = info->sector_count - 1; - - end = (i == s_end) ? b_end : info->start[i + 1] - 1; - - if (from > end) { - continue; - } - if (to < info->start[i]) { - continue; - } - - if (from == info->start[i]) { - first = i; - if (last < 0) { - last = s_end; - } - } - if (to == end) { - last = i; - if (first < 0) { - first = 0; - } - } - } - - for (i=first; i<=last; ++i) { - if (flag & FLAG_PROTECT_CLEAR) { - info->protect[i] = 0; - } else if (flag & FLAG_PROTECT_SET) { - info->protect[i] = 1; - } - if (info->protect[i]) { - rc = 1; - } - } - return (rc); -} - - /*----------------------------------------------------------------------- */ static void flash_get_offsets (ulong base, flash_info_t *info) @@ -210,7 +135,7 @@ static void flash_get_offsets (ulong base, flash_info_t *info) return; } - /* set up sector start adress table */ + /* set up sector start address table */ if (info->flash_id & FLASH_BTYPE) { /* set sector offsets for bottom boot block type */ info->start[0] = base + 0x00000000; @@ -428,7 +353,7 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) info->start[i] = base + (i * 0x00002000); } } else { /* AMD and Fujitsu types */ - /* set up sector start adress table */ + /* set up sector start address table */ if (info->flash_id & FLASH_BTYPE) { /* set sector offsets for bottom boot block type */ info->start[0] = base + 0x00000000; @@ -557,81 +482,6 @@ void flash_erase (flash_info_t *info, int s_first, int s_last) printf (" done\n"); } -/*----------------------------------------------------------------------- - */ - -flash_info_t *addr2info (ulong addr) -{ - flash_info_t *info; - int i; - - for (i=0, info=&flash_info[0]; i= info->start[0]) && - (addr < (info->start[0] + info->size)) ) { - return ((info->flash_id == FLASH_UNKNOWN) ? NULL : info); - } - } - - return (NULL); -} - -/*----------------------------------------------------------------------- - * Copy memory to flash. - * Make sure all target addresses are within Flash bounds, - * and no protected sectors are hit. - * Returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - target range includes protected sectors - * 8 - target address not in Flash memory - */ -int flash_write (uchar *src, ulong addr, ulong cnt) -{ - int i; - ulong end = addr + cnt - 1; - flash_info_t *info_first = addr2info (addr); - flash_info_t *info_last = addr2info (end ); - flash_info_t *info; - - if (cnt == 0) { - return (0); - } - - if (!info_first || !info_last) { - return (8); - } - - for (info = info_first; info <= info_last; ++info) { - ulong b_end = info->start[0] + info->size; /* bank end addr */ - short s_end = info->sector_count - 1; - for (i=0; isector_count; ++i) { - ulong e_addr = (i == s_end) ? b_end : info->start[i + 1]; - - if ((end >= info->start[i]) && (addr < e_addr) && - (info->protect[i] != 0) ) { - return (4); - } - } - } - - /* finally write data to flash */ - for (info = info_first; info <= info_last && cnt>0; ++info) { - ulong len; - - len = info->start[0] + info->size - addr; - if (len > cnt) - len = cnt; - if ((i = write_buff(info, src, addr, len)) != 0) { - return (i); - } - cnt -= len; - addr += len; - src += len; - } - return (0); -} - /*----------------------------------------------------------------------- * Copy memory to flash, returns: * 0 - OK @@ -640,7 +490,7 @@ int flash_write (uchar *src, ulong addr, ulong cnt) * 4 - Flash not identified */ -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) { ulong cp, wp, data; int i, l, rc; diff --git a/board/fads/flash.c b/board/fads/flash.c index 5177fa9..67f5e33 100644 --- a/board/fads/flash.c +++ b/board/fads/flash.c @@ -26,24 +26,24 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ +#if defined(CFG_ENV_IS_IN_FLASH) +# ifndef CFG_ENV_ADDR +# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET) +# endif +# ifndef CFG_ENV_SIZE +# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE +# endif +# ifndef CFG_ENV_SECT_SIZE +# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE +# endif +#endif + /*----------------------------------------------------------------------- * Functions */ static ulong flash_get_size (vu_long *addr, flash_info_t *info); - -int flash_write (uchar *, ulong, ulong); -flash_info_t *addr2info (ulong); - -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt); static int write_word (flash_info_t *info, ulong dest, ulong data); static void flash_get_offsets (ulong base, flash_info_t *info); -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info); - -/*----------------------------------------------------------------------- - * Protection Flags: - */ -#define FLAG_PROTECT_SET 0x01 -#define FLAG_PROTECT_CLEAR 0x02 /*----------------------------------------------------------------------- */ @@ -98,7 +98,18 @@ unsigned long flash_init (void) flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]); /* monitor protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, CFG_FLASH_BASE,CFG_FLASH_BASE+CFG_MONITOR_LEN-1, &flash_info[0]); + flash_protect(FLAG_PROTECT_SET, + CFG_FLASH_BASE, + CFG_FLASH_BASE+CFG_MONITOR_LEN-1, + &flash_info[0]); + +#ifdef CFG_ENV_IS_IN_FLASH + /* ENV protection ON by default */ + flash_protect(FLAG_PROTECT_SET, + CFG_ENV_ADDR, + CFG_ENV_ADDR+CFG_ENV_SIZE-1, + &flash_info[0]); +#endif if (size_b1) { @@ -111,7 +122,18 @@ unsigned long flash_init (void) flash_get_offsets (CFG_FLASH_BASE + size_b0, &flash_info[1]); /* monitor protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, CFG_FLASH_BASE, CFG_FLASH_BASE+CFG_MONITOR_LEN-1, &flash_info[1]); + flash_protect(FLAG_PROTECT_SET, + CFG_FLASH_BASE, + CFG_FLASH_BASE+CFG_MONITOR_LEN-1, + &flash_info[1]); + +#ifdef CFG_ENV_IS_IN_FLASH + /* ENV protection ON by default */ + flash_protect(FLAG_PROTECT_SET, + CFG_ENV_ADDR, + CFG_ENV_ADDR+CFG_ENV_SIZE-1, + &flash_info[1]); +#endif } else { @@ -128,91 +150,19 @@ unsigned long flash_init (void) return (size_b0 + size_b1); } -/*----------------------------------------------------------------------- - * Check or set protection status for monitor sectors - * - * The monitor always occupies the _first_ part of the _first_ Flash bank. - */ -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info) -{ - ulong b_end = info->start[0] + info->size - 1; /* bank end address */ - int rc = 0; - int first = -1; - int last = -1; - int i; - - if (to < info->start[0]) { - return (0); - } - - for (i=0; isector_count; ++i) { - ulong end; /* last address in current sect */ - short s_end; - - s_end = info->sector_count - 1; - - end = (i == s_end) ? b_end : info->start[i + 1] - 1; - - if (from > end) { - continue; - } - if (to < info->start[i]) { - continue; - } - - if (from == info->start[i]) { - first = i; - if (last < 0) { - last = s_end; - } - } - if (to == end) { - last = i; - if (first < 0) { - first = 0; - } - } - } - - for (i=first; i<=last; ++i) { - if (flag & FLAG_PROTECT_CLEAR) { - info->protect[i] = 0; - } else if (flag & FLAG_PROTECT_SET) { - info->protect[i] = 1; - } - if (info->protect[i]) { - rc = 1; - } - } - return (rc); -} - - /*----------------------------------------------------------------------- */ static void flash_get_offsets (ulong base, flash_info_t *info) { int i; - /* set up sector start adress table */ - if (info->flash_id & FLASH_BTYPE) - { - /* set sector offsets for bottom boot block type */ - for (i = 0; i < info->sector_count; i++) - { + /* set up sector start address table */ + if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) { + /* set sector offsets for uniform sector type */ + for (i = 0; i < info->sector_count; i++) { info->start[i] = base + (i * 0x00040000); } } - else - { - /* set sector offsets for top boot block type */ - i = info->sector_count - 1; - for (; i >= 0; i--) - { - info->start[i] = base + i * 0x00040000; - } - } - } /*----------------------------------------------------------------------- @@ -231,14 +181,13 @@ void flash_print_info (flash_info_t *info) { case FLASH_MAN_AMD: printf ("AMD "); break; case FLASH_MAN_FUJ: printf ("FUJITSU "); break; + case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break; default: printf ("Unknown Vendor "); break; } switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_AM040B: printf ("AM29F040B (4 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM040T: printf ("AM29F040T (4 Mbit, top boot sect)\n"); + case FLASH_AM040: printf ("29F040 or 29LV040 (4 Mbit, uniform sectors)\n"); break; case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n"); break; @@ -309,9 +258,9 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) value = addr[0]; - switch (value) + switch (value + (value << 16)) { - case AMD_MANUFACT:case 0x01: + case AMD_MANUFACT: info->flash_id = FLASH_MAN_AMD; break; @@ -331,7 +280,7 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) switch (value) { case AMD_ID_F040B: - info->flash_id += FLASH_AM040B; + info->flash_id += FLASH_AM040; info->sector_count = 8; info->size = 0x00200000; break; /* => 2 MB */ @@ -391,7 +340,7 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) } #if 0 - /* set up sector start adress table */ + /* set up sector start address table */ if (info->flash_id & FLASH_BTYPE) { /* set sector offsets for bottom boot block type */ info->start[0] = base + 0x00000000; @@ -556,81 +505,6 @@ DONE: printf (" done\n"); } -/*----------------------------------------------------------------------- - */ - -flash_info_t *addr2info (ulong addr) -{ - flash_info_t *info; - int i; - - for (i=0, info=&flash_info[0]; i= info->start[0]) && - (addr < (info->start[0] + info->size)) ) { - return (info); - } - } - - return (NULL); -} - -/*----------------------------------------------------------------------- - * Copy memory to flash. - * Make sure all target addresses are within Flash bounds, - * and no protected sectors are hit. - * Returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - target range includes protected sectors - * 8 - target address not in Flash memory - */ -int flash_write (uchar *src, ulong addr, ulong cnt) -{ - int i; - ulong end = addr + cnt - 1; - flash_info_t *info_first = addr2info (addr); - flash_info_t *info_last = addr2info (end ); - flash_info_t *info; - - if (cnt == 0) { - return (0); - } - - if (!info_first || !info_last) { - return (8); - } - - for (info = info_first; info <= info_last; ++info) { - ulong b_end = info->start[0] + info->size; /* bank end addr */ - short s_end = info->sector_count - 1; - for (i=0; isector_count; ++i) { - ulong e_addr = (i == s_end) ? b_end : info->start[i + 1]; - - if ((end >= info->start[i]) && (addr < e_addr) && - (info->protect[i] != 0) ) { - return (4); - } - } - } - - /* finally write data to flash */ - for (info = info_first; info <= info_last && cnt>0; ++info) { - ulong len; - - len = info->start[0] + info->size - addr; - if (len > cnt) - len = cnt; - if ((i = write_buff(info, src, addr, len)) != 0) { - return (i); - } - cnt -= len; - addr += len; - src += len; - } - return (0); -} - /*----------------------------------------------------------------------- * Copy memory to flash, returns: * 0 - OK @@ -638,7 +512,7 @@ int flash_write (uchar *src, ulong addr, ulong cnt) * 2 - Flash not erased */ -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) { ulong cp, wp, data; int i, l, rc; diff --git a/board/genietv/flash.c b/board/genietv/flash.c index 58085c5..6f6cdf1 100644 --- a/board/genietv/flash.c +++ b/board/genietv/flash.c @@ -30,20 +30,8 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ * Functions */ static ulong flash_get_size (vu_long *addr, flash_info_t *info); - -int flash_write (uchar *, ulong, ulong); -flash_info_t *addr2info (ulong); - -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt); static int write_word (flash_info_t *info, ulong dest, ulong data); static void flash_get_offsets (ulong base, flash_info_t *info); -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info); - -/*----------------------------------------------------------------------- - * Protection Flags: - */ -#define FLAG_PROTECT_SET 0x01 -#define FLAG_PROTECT_CLEAR 0x02 /*----------------------------------------------------------------------- */ @@ -64,7 +52,10 @@ unsigned long flash_init (void) flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]); /* Monitor protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, CFG_FLASH_BASE,CFG_FLASH_BASE+CFG_MONITOR_LEN-1, &flash_info[0]); + flash_protect(FLAG_PROTECT_SET, + CFG_FLASH_BASE, + CFG_FLASH_BASE+CFG_MONITOR_LEN-1, + &flash_info[0]); size_b1 = 0 ; @@ -77,66 +68,6 @@ unsigned long flash_init (void) return (size_b0 + size_b1); } -/*----------------------------------------------------------------------- - * Check or set protection status for monitor sectors - * - * The monitor always occupies the _first_ part of the _first_ Flash bank. - */ -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info) -{ - ulong b_end = info->start[0] + info->size - 1; /* bank end address */ - int rc = 0; - int first = -1; - int last = -1; - int i; - - if (to < info->start[0]) { - return (0); - } - - for (i=0; isector_count; ++i) { - ulong end; /* last address in current sect */ - short s_end; - - s_end = info->sector_count - 1; - - end = (i == s_end) ? b_end : info->start[i + 1] - 1; - - if (from > end) { - continue; - } - if (to < info->start[i]) { - continue; - } - - if (from == info->start[i]) { - first = i; - if (last < 0) { - last = s_end; - } - } - if (to == end) { - last = i; - if (first < 0) { - first = 0; - } - } - } - - for (i=first; i<=last; ++i) { - if (flag & FLAG_PROTECT_CLEAR) { - info->protect[i] = 0; - } else if (flag & FLAG_PROTECT_SET) { - info->protect[i] = 1; - } - if (info->protect[i]) { - rc = 1; - } - } - return (rc); -} - - /*----------------------------------------------------------------------- * Fix this to support variable sector sizes */ @@ -144,21 +75,12 @@ static void flash_get_offsets (ulong base, flash_info_t *info) { int i; - /* set up sector start adress table */ - if (info->flash_id & FLASH_BTYPE) - { + /* set up sector start address table */ + if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) { /* set sector offsets for bottom boot block type */ for (i = 0; i < info->sector_count; i++) info->start[i] = base + (i * 0x00010000); } - else - { - /* set sector offsets for top boot block type */ - i = info->sector_count - 1; - for (; i >= 0; i--) - info->start[i] = base + i * 0x00010000; - } - } /*----------------------------------------------------------------------- @@ -177,14 +99,13 @@ void flash_print_info (flash_info_t *info) { case FLASH_MAN_AMD: printf ("AMD "); break; case FLASH_MAN_FUJ: printf ("FUJITSU "); break; + case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break; default: printf ("Unknown Vendor "); break; } switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_AM040B: printf ("AM29F040B (4 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM040T: printf ("AM29F040T (4 Mbit, top boot sect)\n"); + case FLASH_AM040: printf ("29F040 or 29LV040 (4 Mbit, uniform sectors)\n"); break; case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n"); break; @@ -280,7 +201,7 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) switch (value) { case AMD_ID_LV040B: - info->flash_id += FLASH_AM040B; + info->flash_id += FLASH_AM040; info->sector_count = 8; info->size = 0x00080000; break; /* => 512Kb */ @@ -412,81 +333,6 @@ DONE: printf (" done\n"); } -/*----------------------------------------------------------------------- - */ - -flash_info_t *addr2info (ulong addr) -{ - flash_info_t *info; - int i; - - for (i=0, info=&flash_info[0]; i= info->start[0]) && - (addr < (info->start[0] + info->size)) ) { - return (info); - } - } - - return (NULL); -} - -/*----------------------------------------------------------------------- - * Copy memory to flash. - * Make sure all target addresses are within Flash bounds, - * and no protected sectors are hit. - * Returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - target range includes protected sectors - * 8 - target address not in Flash memory - */ -int flash_write (uchar *src, ulong addr, ulong cnt) -{ - int i; - ulong end = addr + cnt - 1; - flash_info_t *info_first = addr2info (addr); - flash_info_t *info_last = addr2info (end ); - flash_info_t *info; - - if (cnt == 0) { - return (0); - } - - if (!info_first || !info_last) { - return (8); - } - - for (info = info_first; info <= info_last; ++info) { - ulong b_end = info->start[0] + info->size; /* bank end addr */ - short s_end = info->sector_count - 1; - for (i=0; isector_count; ++i) { - ulong e_addr = (i == s_end) ? b_end : info->start[i + 1]; - - if ((end >= info->start[i]) && (addr < e_addr) && - (info->protect[i] != 0) ) { - return (4); - } - } - } - - /* finally write data to flash */ - for (info = info_first; info <= info_last && cnt>0; ++info) { - ulong len; - - len = info->start[0] + info->size - addr; - if (len > cnt) - len = cnt; - if ((i = write_buff(info, src, addr, len)) != 0) { - return (i); - } - cnt -= len; - addr += len; - src += len; - } - return (0); -} - /*----------------------------------------------------------------------- * Copy memory to flash, returns: * 0 - OK @@ -494,7 +340,7 @@ int flash_write (uchar *src, ulong addr, ulong cnt) * 2 - Flash not erased */ -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) { ulong cp, wp, data; int i, l, rc; diff --git a/board/hermes/flash.c b/board/hermes/flash.c index 3791ab2..d21c558 100644 --- a/board/hermes/flash.c +++ b/board/hermes/flash.c @@ -28,24 +28,12 @@ typedef volatile unsigned char vu_char; flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ -/*----------------------------------------------------------------------- - * Protection Flags: - */ -#define FLAG_PROTECT_SET 0x01 -#define FLAG_PROTECT_CLEAR 0x02 - /*----------------------------------------------------------------------- * Functions */ static ulong flash_get_size (vu_long *addr, flash_info_t *info); - -int flash_write (uchar *, ulong, ulong); -flash_info_t *addr2info (ulong); - -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt); static int write_byte (flash_info_t *info, ulong dest, uchar data); static void flash_get_offsets (ulong base, flash_info_t *info); -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info); /*----------------------------------------------------------------------- */ @@ -82,83 +70,23 @@ unsigned long flash_init (void) flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]); /* monitor protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, - CFG_FLASH_BASE, - CFG_FLASH_BASE+CFG_MONITOR_LEN-1, - &flash_info[0]); + flash_protect(FLAG_PROTECT_SET, + CFG_FLASH_BASE, + CFG_FLASH_BASE+CFG_MONITOR_LEN-1, + &flash_info[0]); flash_info[0].size = size; return (size); } -/*----------------------------------------------------------------------- - * Check or set protection status for monitor sectors - * - * The monitor always occupies the _first_ part of the _first_ Flash bank. - */ -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info) -{ - ulong b_end = info->start[0] + info->size - 1; /* bank end address */ - int rc = 0; - int first = -1; - int last = -1; - int i; - - if (to < info->start[0]) { - return (0); - } - - for (i=0; isector_count; ++i) { - ulong end; /* last address in current sect */ - short s_end; - - s_end = info->sector_count - 1; - - end = (i == s_end) ? b_end : info->start[i + 1] - 1; - - if (from > end) { - continue; - } - if (to < info->start[i]) { - continue; - } - - if (from == info->start[i]) { - first = i; - if (last < 0) { - last = s_end; - } - } - if (to == end) { - last = i; - if (first < 0) { - first = 0; - } - } - } - - for (i=first; i<=last; ++i) { - if (flag & FLAG_PROTECT_CLEAR) { - info->protect[i] = 0; - } else if (flag & FLAG_PROTECT_SET) { - info->protect[i] = 1; - } - if (info->protect[i]) { - rc = 1; - } - } - return (rc); -} - - /*----------------------------------------------------------------------- */ static void flash_get_offsets (ulong base, flash_info_t *info) { int i; - /* set up sector start adress table */ + /* set up sector start address table */ if (info->flash_id & FLASH_BTYPE) { /* set sector offsets for bottom boot block type */ info->start[0] = base + 0x00000000; @@ -330,7 +258,7 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) } - /* set up sector start adress table */ + /* set up sector start address table */ if (info->flash_id & FLASH_BTYPE) { /* set sector offsets for bottom boot block type */ info->start[0] = base + 0x00000000; @@ -466,81 +394,6 @@ DONE: printf (" done\n"); } -/*----------------------------------------------------------------------- - */ - -flash_info_t *addr2info (ulong addr) -{ - flash_info_t *info; - int i; - - for (i=0, info=&flash_info[0]; i= info->start[0]) && - (addr < (info->start[0] + info->size)) ) { - return (info); - } - } - - return (NULL); -} - -/*----------------------------------------------------------------------- - * Copy memory to flash. - * Make sure all target addresses are within Flash bounds, - * and no protected sectors are hit. - * Returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - target range includes protected sectors - * 8 - target address not in Flash memory - */ -int flash_write (uchar *src, ulong addr, ulong cnt) -{ - int i; - ulong end = addr + cnt - 1; - flash_info_t *info_first = addr2info (addr); - flash_info_t *info_last = addr2info (end ); - flash_info_t *info; - - if (cnt == 0) { - return (0); - } - - if (!info_first || !info_last) { - return (8); - } - - for (info = info_first; info <= info_last; ++info) { - ulong b_end = info->start[0] + info->size; /* bank end addr */ - short s_end = info->sector_count - 1; - for (i=0; isector_count; ++i) { - ulong e_addr = (i == s_end) ? b_end : info->start[i + 1]; - - if ((end >= info->start[i]) && (addr < e_addr) && - (info->protect[i] != 0) ) { - return (4); - } - } - } - - /* finally write data to flash */ - for (info = info_first; info <= info_last && cnt>0; ++info) { - ulong len; - - len = info->start[0] + info->size - addr; - if (len > cnt) - len = cnt; - if ((i = write_buff(info, src, addr, len)) != 0) { - return (i); - } - cnt -= len; - addr += len; - src += len; - } - return (0); -} - /*----------------------------------------------------------------------- * Copy memory to flash, returns: * 0 - OK @@ -548,7 +401,7 @@ int flash_write (uchar *src, ulong addr, ulong cnt) * 2 - Flash not erased */ -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) { int rc; diff --git a/board/hymod/config.mk b/board/hymod/config.mk index f18b848..54506a2 100644 --- a/board/hymod/config.mk +++ b/board/hymod/config.mk @@ -27,4 +27,6 @@ TEXT_BASE = 0x40000000 -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) +PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board + +OBJCFLAGS = --set-section-flags=.ppcenv=contents,alloc,load,data diff --git a/board/hymod/flash.c b/board/hymod/flash.c index be8b479..9072880 100644 --- a/board/hymod/flash.c +++ b/board/hymod/flash.c @@ -25,6 +25,7 @@ #include #include +#include flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ @@ -40,165 +41,287 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ #if 0 static ulong flash_get_size (vu_long *addr, flash_info_t *info); static void flash_get_offsets (ulong base, flash_info_t *info); -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info); #endif -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt); static int write_word (flash_info_t *info, ulong dest, ulong data); /*----------------------------------------------------------------------- */ -unsigned long -flash_init(void) +/* + * probe for the existence of flash at bank word address "addr" + * 0 = yes, 1 = bad Manufacturer's Id, 2 = bad Device Id + */ +static int +bank_probe_word(bank_addr_t addr) { -#if 0 - volatile immap_t *immap = (immap_t *)CFG_IMMR; - volatile memctl8xx_t *memctl = &immap->im_memctl; - unsigned long size_b0, size_b1; -#endif - int i; + int retval = 0; - /* Init: no FLASHes known */ - for (i=0; i size_b0) { - printf ("## ERROR: " - "Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n", - size_b1, size_b1<<20, - size_b0, size_b0<<20 - ); - flash_info[0].flash_id = FLASH_UNKNOWN; - flash_info[1].flash_id = FLASH_UNKNOWN; - flash_info[0].sector_count = -1; - flash_info[1].sector_count = -1; - flash_info[0].size = 0; - flash_info[1].size = 0; - return (0); - } + fip->flash_id = FLASH_UNKNOWN; + fip->size = 0L; + fip->sector_count = 0; - /* Remap FLASH according to real size */ - memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000); - memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V; + addr = base; + eaddr = BANK_ADDR_BASE(addr, MAX_BANKS); + nbanks = 0; - /* Re-do sizing to get full correct info */ - size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]); + while (addr < eaddr) { + bank_addr_t addrw, eaddrw, addrb; + int i, osc, nsc; - flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]); + addrw = addr; + eaddrw = BANK_ADDR_NEXT_WORD(addrw); - /* monitor protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, - CFG_FLASH_BASE, - CFG_FLASH_BASE+CFG_MONITOR_LEN-1, - &flash_info[0]); - - if (size_b1) { - memctl->memc_or1 = CFG_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000); - memctl->memc_br1 = ((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) | - BR_MS_GPCM | BR_V; - - /* Re-do sizing to get full correct info */ - size_b1 = flash_get_size((vu_long *)(CFG_FLASH_BASE + size_b0), - &flash_info[1]); - - flash_get_offsets (CFG_FLASH_BASE + size_b0, &flash_info[1]); - - /* monitor protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, - CFG_FLASH_BASE, - CFG_FLASH_BASE+CFG_MONITOR_LEN-1, - &flash_info[1]); - } else { - memctl->memc_br1 = 0; /* invalidate bank */ + while (addrw < eaddrw) { +#ifdef FLASH_DEBUG + printf(" probing for flash at addr 0x%08lx\n", + (unsigned long)addrw); +#endif + if (bank_probe_word(addrw++) != 0) + goto out; + } + + /* bank exists - append info for this bank to *fip */ + fip->flash_id = FLASH_MAN_INTEL|FLASH_28F320J5; + fip->size += BANK_SIZE; + osc = fip->sector_count; + fip->sector_count += BANK_NBLOCKS; + if ((nsc = fip->sector_count) >= CFG_MAX_FLASH_SECT) + panic("Too many sectors in flash at address 0x%08lx\n", + (unsigned long)base); + + addrb = addr; + for (i = osc; i < nsc; i++) { + fip->start[i] = (ulong)addrb; + fip->protect[i] = 0; + addrb = BANK_ADDR_NEXT_BLK(addrb); + } - flash_info[1].flash_id = FLASH_UNKNOWN; - flash_info[1].sector_count = -1; + addr = BANK_ADDR_NEXT_BANK(addr); + nbanks++; } - flash_info[0].size = size_b0; - flash_info[1].size = size_b1; +out: + if (nbanks == 0) + panic("ERROR: no flash found at address 0x%08lx\n", + (unsigned long)base); +} - return (size_b0 + size_b1); -#else - return (0); +static void +bank_reset(flash_info_t *info, int sect) +{ + bank_addr_t addrw, eaddrw; + + addrw = (bank_addr_t)info->start[sect]; + eaddrw = BANK_ADDR_NEXT_WORD(addrw); + + while (addrw < eaddrw) { +#ifdef FLASH_DEBUG + printf(" writing reset cmd to addr 0x%08lx\n", + (unsigned long)addrw); #endif + *addrw = BANK_CMD_RST; + addrw++; + } } -/*----------------------------------------------------------------------- - * Check or set protection status for monitor sectors - * - * The monitor always occupies the _first_ part of the _first_ Flash bank. - */ -#if 0 -static int -flash_protect(int flag, ulong from, ulong to, flash_info_t *info) +static void +bank_erase_init(flash_info_t *info, int sect) { - ulong b_end = info->start[0] + info->size - 1; /* bank end address */ - int rc = 0; - int first = -1; - int last = -1; - int i; + bank_addr_t addrw, saddrw, eaddrw; + int flag; - if (to < info->start[0]) { - return (0); +#ifdef FLASH_DEBUG + printf("0x%08lx BANK_CMD_PROG\n", BANK_CMD_PROG); + printf("0x%08lx BANK_CMD_ERASE1\n", BANK_CMD_ERASE1); + printf("0x%08lx BANK_CMD_ERASE2\n", BANK_CMD_ERASE2); + printf("0x%08lx BANK_CMD_CLR_STAT\n", BANK_CMD_CLR_STAT); + printf("0x%08lx BANK_CMD_RST\n", BANK_CMD_RST); + printf("0x%08lx BANK_STAT_RDY\n", BANK_STAT_RDY); + printf("0x%08lx BANK_STAT_ERR\n", BANK_STAT_ERR); +#endif + + saddrw = (bank_addr_t)info->start[sect]; + eaddrw = BANK_ADDR_NEXT_WORD(saddrw); + +#ifdef FLASH_DEBUG + printf("erasing sector %d, start addr = 0x%08lx " + "(bank next word addr = 0x%08lx)\n", sect, + (unsigned long)saddrw, (unsigned long)eaddrw); +#endif + + /* Disable intrs which might cause a timeout here */ + flag = disable_interrupts(); + + for (addrw = saddrw; addrw < eaddrw; addrw++) { +#ifdef FLASH_DEBUG + printf(" writing erase cmd to addr 0x%08lx\n", + (unsigned long)addrw); +#endif + *addrw = BANK_CMD_ERASE1; + *addrw = BANK_CMD_ERASE2; } - for (i=0; isector_count; ++i) { - ulong end; /* last address in current sect */ - short s_end; + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); +} - s_end = info->sector_count - 1; +static int +bank_erase_poll(flash_info_t *info, int sect) +{ + bank_addr_t addrw, saddrw, eaddrw; + int sectdone, haderr; - end = (i == s_end) ? b_end : info->start[i + 1] - 1; + saddrw = (bank_addr_t)info->start[sect]; + eaddrw = BANK_ADDR_NEXT_WORD(saddrw); - if (from > end) { - continue; - } - if (to < info->start[i]) { - continue; - } + sectdone = 1; + haderr = 0; - if (from == info->start[i]) { - first = i; - if (last < 0) { - last = s_end; - } - } - if (to == end) { - last = i; - if (first < 0) { - first = 0; - } + for (addrw = saddrw; addrw < eaddrw; addrw++) { + bank_word_t stat = *addrw; + +#ifdef FLASH_DEBUG + printf(" checking status at addr " + "0x%08lx [0x%08lx]\n", + (unsigned long)addrw, stat); +#endif + if ((stat & BANK_STAT_RDY) != BANK_STAT_RDY) + sectdone = 0; + else if ((stat & BANK_STAT_ERR) != 0) { + printf(" failed on sector %d " + "(stat = 0x%08lx) at " + "address 0x%08lx\n", + sect, stat, + (unsigned long)addrw); + *addrw = BANK_CMD_CLR_STAT; + haderr = 1; } } - for (i=first; i<=last; ++i) { - if (flag & FLAG_PROTECT_CLEAR) { - info->protect[i] = 0; - } else if (flag & FLAG_PROTECT_SET) { - info->protect[i] = 1; - } - if (info->protect[i]) { - rc = 1; + if (haderr) + return (-1); + else + return (sectdone); +} + +static int +bank_write_word(bank_addr_t addr, bank_word_t value) +{ + bank_word_t stat; + ulong start; + int flag, retval; + + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts(); + + *addr = BANK_CMD_PROG; + + *addr = value; + + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); + + retval = 0; + + /* data polling for D7 */ + start = get_timer (0); + do { + if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + retval = 1; + goto done; } + stat = *addr; + } while ((stat & BANK_STAT_RDY) != BANK_STAT_RDY); + + if ((stat & BANK_STAT_ERR) != 0) { + printf("flash program failed (stat = 0x%08lx) " + "at address 0x%08lx\n", (ulong)stat, (ulong)addr); + *addr = BANK_CMD_CLR_STAT; + retval = 3; } - return (rc); + +done: + /* reset to read mode */ + *addr = BANK_CMD_RST; + + return (retval); } -#endif /* 0 */ +/*----------------------------------------------------------------------- + */ + +unsigned long +flash_init(void) +{ + int i; + + /* Init: no FLASHes known */ + for (i=0; iflash_id & FLASH_VENDMASK) { - case FLASH_MAN_AMD: printf ("AMD "); break; - case FLASH_MAN_FUJ: printf ("FUJITSU "); break; + case FLASH_MAN_INTEL: printf ("INTEL "); break; default: printf ("Unknown Vendor "); break; } switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n"); - break; - case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n"); - break; - case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n"); - break; - case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n"); + case FLASH_28F320J5: printf ("28F320J5 (32 Mbit, 2 x 16bit)\n"); break; default: printf ("Unknown Chip Type\n"); break; @@ -286,10 +394,6 @@ flash_print_info(flash_info_t *info) printf ("\n"); } -/*----------------------------------------------------------------------- - */ - - /*----------------------------------------------------------------------- */ @@ -432,10 +536,16 @@ flash_get_size(vu_long *addr, flash_info_t *info) void flash_erase(flash_info_t *info, int s_first, int s_last) { - vu_long *addr = (vu_long*)(info->start[0]); - int flag, prot, sect, l_sect; + int prot, sect, haderr; ulong start, now, last; +#ifdef FLASH_DEBUG + printf("\nflash_erase: erase %d sectors (%d to %d incl.) from\n" + " Bank # %d: ", s_last - s_first + 1, s_first, s_last, + (info - flash_info) + 1); + flash_print_info(info); +#endif + if ((s_first < 0) || (s_first > s_last)) { if (info->flash_id == FLASH_UNKNOWN) { printf ("- missing\n"); @@ -445,12 +555,6 @@ flash_erase(flash_info_t *info, int s_first, int s_last) return; } - if ((info->flash_id == FLASH_UNKNOWN) || - (info->flash_id > FLASH_AMD_COMP)) { - printf ("Can't erase unknown flash type - aborted\n"); - return; - } - prot = 0; for (sect=s_first; sect<=s_last; ++sect) { if (info->protect[sect]) { @@ -459,143 +563,68 @@ flash_erase(flash_info_t *info, int s_first, int s_last) } if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", - prot); - } else { - printf ("\n"); + printf("- Warning: %d protected sector%s will not be erased!\n", + prot, (prot > 1 ? "s" : "")); } - l_sect = -1; - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - addr[0x0555] = 0x00AA00AA; - addr[0x02AA] = 0x00550055; - addr[0x0555] = 0x00800080; - addr[0x0555] = 0x00AA00AA; - addr[0x02AA] = 0x00550055; - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect<=s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - addr = (vu_long*)(info->start[sect]); - addr[0] = 0x00300030; - l_sect = sect; - } - } - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - - /* wait at least 80us - let's wait 1 ms */ - udelay (1000); - - /* - * We wait for the last triggered sector - */ - if (l_sect < 0) - goto DONE; - start = get_timer (0); - last = start; - addr = (vu_long*)(info->start[l_sect]); - while ((addr[0] & 0x00800080) != 0x00800080) { - if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - return; - } - /* show that we're waiting */ - if ((now - last) > 1000) { /* every second */ - serial_putc ('.'); - last = now; - } - } + last = 0; + haderr = 0; -DONE: - /* reset to read mode */ - addr = (volatile unsigned long *)info->start[0]; - addr[0] = 0x00F000F0; /* reset bank */ + for (sect = s_first; sect <= s_last; sect++) { + if (info->protect[sect] == 0) { /* not protected */ + ulong estart; + int sectdone; - printf (" done\n"); -} + bank_erase_init(info, sect); -/*----------------------------------------------------------------------- - */ + /* wait at least 80us - let's wait 1 ms */ + udelay (1000); -flash_info_t * -addr2info(ulong addr) -{ - flash_info_t *info; - int i; + estart = get_timer(start); - for (i=0, info=&flash_info[0]; i= info->start[0]) && - (addr < (info->start[0] + info->size)) ) { - return (info); - } - } + do { + now = get_timer(start); - return (NULL); -} + if (now - estart > CFG_FLASH_ERASE_TOUT) { + printf ("Timeout (sect %d)\n", sect); + haderr = 1; + break; + } -/*----------------------------------------------------------------------- - * Copy memory to flash. - * Make sure all target addresses are within Flash bounds, - * and no protected sectors are hit. - * Returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - target range includes protected sectors - * 8 - target address not in Flash memory - */ -int -flash_write(uchar *src, ulong addr, ulong cnt) -{ - int i; - ulong end = addr + cnt - 1; - flash_info_t *info_first = addr2info (addr); - flash_info_t *info_last = addr2info (end ); - flash_info_t *info; +#ifndef FLASH_DEBUG + /* show that we're waiting */ + if ((now - last) > 1000) { /* every second */ + putc ('.'); + last = now; + } +#endif - if (cnt == 0) { - return (0); - } + sectdone = bank_erase_poll(info, sect); - if (!info_first || !info_last) { - return (8); - } + if (sectdone < 0) { + haderr = 1; + break; + } - for (info = info_first; info <= info_last; ++info) { - ulong b_end = info->start[0] + info->size; /* bank end addr */ - short s_end = info->sector_count - 1; - for (i=0; isector_count; ++i) { - ulong e_addr = (i == s_end) ? b_end : info->start[i + 1]; + } while (!sectdone); - if ((end >= info->start[i]) && (addr < e_addr) && - (info->protect[i] != 0) ) { - return (4); - } + if (haderr) + break; } } - /* finally write data to flash */ - for (info = info_first; info <= info_last && cnt>0; ++info) { - ulong len; - - len = info->start[0] + info->size - addr; - if (len > cnt) - len = cnt; - if ((i = write_buff(info, src, addr, len)) != 0) { - return (i); + if (haderr > 0) + printf (" failed\n"); + else + printf (" done\n"); + + /* reset to read mode */ + for (sect = s_first; sect <= s_last; sect++) { + if (info->protect[sect] == 0) { /* not protected */ + bank_reset(info, sect); } - cnt -= len; - addr += len; - src += len; } - return (0); } /*----------------------------------------------------------------------- @@ -605,7 +634,7 @@ flash_write(uchar *src, ulong addr, ulong cnt) * 2 - Flash not erased */ -static int +int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt) { ulong cp, wp, data; @@ -679,35 +708,16 @@ write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt) static int write_word(flash_info_t *info, ulong dest, ulong data) { - vu_long *addr = (vu_long*)(info->start[0]); - ulong start; - int flag; + int retval; /* Check if Flash is (sufficiently) erased */ - if ((*((vu_long *)dest) & data) != data) { + if ((*(ulong *)dest & data) != data) { return (2); } - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - addr[0x0555] = 0x00AA00AA; - addr[0x02AA] = 0x00550055; - addr[0x0555] = 0x00A000A0; - - *((vu_long *)dest) = data; - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); + retval = bank_write_word((bank_addr_t)dest, (bank_word_t)data); - /* data polling for D7 */ - start = get_timer (0); - while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) { - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { - return (1); - } - } - return (0); + return (retval); } /*----------------------------------------------------------------------- diff --git a/board/hymod/flash.h b/board/hymod/flash.h new file mode 100644 index 0000000..357255c --- /dev/null +++ b/board/hymod/flash.h @@ -0,0 +1,219 @@ +/********* DEFINES for Intel StrataFlash (28F320J5) FLASH chip ***************/ + +/* register addresses, valid only following an CHIP_CMD_RD_ID command */ +#define CHIP_ADDR_REG_MAN 0x000000 /* manufacturer's id */ +#define CHIP_ADDR_REG_DEV 0x000001 /* device id */ +#define CHIP_ADDR_REG_CFG0 0x000002 /* lock config for block 0 */ +#define CHIP_ADDR_REG_CFGM 0x000003 /* master lock config */ +#define CHIP_ADDR_REG_CFG1 0x010002 /* lock config for block 1 */ +#define CHIP_ADDR_REG_CFG2 0x020002 /* lock config for block 2 */ +#define CHIP_ADDR_REG_CFG3 0x030002 /* lock config for block 3 */ +#define CHIP_ADDR_REG_CFG4 0x040002 /* lock config for block 4 */ +#define CHIP_ADDR_REG_CFG5 0x050002 /* lock config for block 5 */ +#define CHIP_ADDR_REG_CFG6 0x060002 /* lock config for block 6 */ +#define CHIP_ADDR_REG_CFG7 0x070002 /* lock config for block 7 */ +#define CHIP_ADDR_REG_CFG8 0x080002 /* lock config for block 8 */ +#define CHIP_ADDR_REG_CFG9 0x090002 /* lock config for block 9 */ +#define CHIP_ADDR_REG_CFG10 0x0A0002 /* lock config for block 10 */ +#define CHIP_ADDR_REG_CFG11 0x0B0002 /* lock config for block 11 */ +#define CHIP_ADDR_REG_CFG12 0x0C0002 /* lock config for block 12 */ +#define CHIP_ADDR_REG_CFG13 0x0D0002 /* lock config for block 13 */ +#define CHIP_ADDR_REG_CFG14 0x0E0002 /* lock config for block 14 */ +#define CHIP_ADDR_REG_CFG15 0x0F0002 /* lock config for block 15 */ +#define CHIP_ADDR_REG_CFG16 0x100002 /* lock config for block 16 */ +#define CHIP_ADDR_REG_CFG17 0x110002 /* lock config for block 17 */ +#define CHIP_ADDR_REG_CFG18 0x120002 /* lock config for block 18 */ +#define CHIP_ADDR_REG_CFG19 0x130002 /* lock config for block 19 */ +#define CHIP_ADDR_REG_CFG20 0x140002 /* lock config for block 20 */ +#define CHIP_ADDR_REG_CFG21 0x150002 /* lock config for block 21 */ +#define CHIP_ADDR_REG_CFG22 0x160002 /* lock config for block 22 */ +#define CHIP_ADDR_REG_CFG23 0x170002 /* lock config for block 23 */ +#define CHIP_ADDR_REG_CFG24 0x180002 /* lock config for block 24 */ +#define CHIP_ADDR_REG_CFG25 0x190002 /* lock config for block 25 */ +#define CHIP_ADDR_REG_CFG26 0x1A0002 /* lock config for block 26 */ +#define CHIP_ADDR_REG_CFG27 0x1B0002 /* lock config for block 27 */ +#define CHIP_ADDR_REG_CFG28 0x1C0002 /* lock config for block 28 */ +#define CHIP_ADDR_REG_CFG29 0x1D0002 /* lock config for block 29 */ +#define CHIP_ADDR_REG_CFG30 0x1E0002 /* lock config for block 30 */ +#define CHIP_ADDR_REG_CFG31 0x1F0002 /* lock config for block 31 */ + +/* Commands */ +#define CHIP_CMD_RST 0xFF /* reset flash */ +#define CHIP_CMD_RD_ID 0x90 /* read the id and lock bits */ +#define CHIP_CMD_RD_QUERY 0x98 /* read device capabilities */ +#define CHIP_CMD_RD_STAT 0x70 /* read the status register */ +#define CHIP_CMD_CLR_STAT 0x50 /* clear the staus register */ +#define CHIP_CMD_WR_BUF 0xE8 /* clear the staus register */ +#define CHIP_CMD_PROG 0x40 /* program word command */ +#define CHIP_CMD_ERASE1 0x20 /* 1st word for block erase */ +#define CHIP_CMD_ERASE2 0xD0 /* 2nd word for block erase */ +#define CHIP_CMD_ERASE_SUSP 0xB0 /* suspend block erase */ +#define CHIP_CMD_LOCK 0x60 /* 1st word for all lock cmds */ +#define CHIP_CMD_SET_LOCK_BLK 0x01 /* 2nd wrd set block lock bit */ +#define CHIP_CMD_SET_LOCK_MSTR 0xF1 /* 2nd wrd set master lck bit */ +#define CHIP_CMD_CLR_LOCK_BLK 0xD0 /* 2nd wrd clear blk lck bit */ + +/* status register bits */ +#define CHIP_STAT_DPS 0x02 /* Device Protect Status */ +#define CHIP_STAT_VPPS 0x08 /* VPP Status */ +#define CHIP_STAT_PSLBS 0x10 /* Program+Set Lock Bit Stat */ +#define CHIP_STAT_ECLBS 0x20 /* Erase+Clr Lock Bit Stat */ +#define CHIP_STAT_ESS 0x40 /* Erase Suspend Status */ +#define CHIP_STAT_RDY 0x80 /* WSM Mach Status, 1=rdy */ + +#define CHIP_STAT_ERR (CHIP_STAT_VPPS | CHIP_STAT_DPS | \ + CHIP_STAT_ECLBS | CHIP_STAT_PSLBS) + +/* ID and Lock Configuration */ +#define CHIP_RD_ID_LOCK 0x01 /* Bit 0 of each byte */ +#define CHIP_RD_ID_MAN 0x89 /* Manufacturer code = 0x89 */ +#define CHIP_RD_ID_DEV 0x14 /* Dev code = 0x14, 28F320J5 */ + +/* dimensions */ +#define CHIP_WIDTH 2 /* chips are in 16 bit mode */ +#define CHIP_WSHIFT 1 /* (log2 of CHIP_WIDTH) */ +#define CHIP_NBLOCKS 32 /* and consist of 32 blocks */ +#define CHIP_BLKSZ (128 * 1024) /* of 128Kbytes each */ +#define CHIP_SIZE (CHIP_BLKSZ * CHIP_NBLOCKS) + +/********************** DEFINES for Hymod Flash ******************************/ + +/* + * The hymod board has 2 x 28F320J5 chips running in + * 16 bit mode, for a 32 bit wide bank. + */ + +typedef unsigned long bank_word_t; /* 8/16/32/64bit unsigned int */ +typedef volatile bank_word_t *bank_addr_t; +typedef unsigned long bank_size_t; /* want this big - >= 32 bit */ + +#define BANK_CHIP_WIDTH 2 /* each bank is 2 chips wide */ +#define BANK_CHIP_WSHIFT 1 /* (log2 of BANK_CHIP_WIDTH) */ + +#define BANK_WIDTH (CHIP_WIDTH * BANK_CHIP_WIDTH) +#define BANK_WSHIFT (CHIP_WSHIFT + BANK_CHIP_WSHIFT) +#define BANK_NBLOCKS CHIP_NBLOCKS +#define BANK_BLKSZ (CHIP_BLKSZ * BANK_CHIP_WIDTH) +#define BANK_SIZE (CHIP_SIZE * BANK_CHIP_WIDTH) + +#define MAX_BANKS 1 /* only one bank possible */ + +/* align bank addresses and sizes to bank word boundaries */ +#define BANK_ADDR_WORD_ALIGN(a) ((bank_addr_t)((bank_size_t)(a) \ + & ~(BANK_WIDTH - 1))) +#define BANK_SIZE_WORD_ALIGN(s) ((bank_size_t)BANK_ADDR_WORD_ALIGN( \ + (bank_size_t)(s) + (BANK_WIDTH - 1))) + +/* align bank addresses and sizes to bank block boundaries */ +#define BANK_ADDR_BLK_ALIGN(a) ((bank_addr_t)((bank_size_t)(a) \ + & ~(BANK_BLKSZ - 1))) +#define BANK_SIZE_BLK_ALIGN(s) ((bank_size_t)BANK_ADDR_BLK_ALIGN( \ + (bank_size_t)(s) + (BANK_BLKSZ - 1))) + +/* align bank addresses and sizes to bank boundaries */ +#define BANK_ADDR_BANK_ALIGN(a) ((bank_addr_t)((bank_size_t)(a) \ + & ~(BANK_SIZE - 1))) +#define BANK_SIZE_BANK_ALIGN(s) ((bank_size_t)BANK_ADDR_BANK_ALIGN( \ + (bank_size_t)(s) + (BANK_SIZE - 1))) + +/* add an offset to a bank address */ +#define BANK_ADDR_OFFSET(a, o) (bank_addr_t)((bank_size_t)(a) + \ + (bank_size_t)(o)) + +/* get base address of bank b, given flash base address a */ +#define BANK_ADDR_BASE(a, b) BANK_ADDR_OFFSET(BANK_ADDR_BANK_ALIGN(a), \ + (bank_size_t)(b) * BANK_SIZE) + +/* adjust a bank address to start of next word, block or bank */ +#define BANK_ADDR_NEXT_WORD(a) BANK_ADDR_OFFSET(BANK_ADDR_WORD_ALIGN(a), \ + BANK_WIDTH) +#define BANK_ADDR_NEXT_BLK(a) BANK_ADDR_OFFSET(BANK_ADDR_BLK_ALIGN(a), \ + BANK_BLKSZ) +#define BANK_ADDR_NEXT_BANK(a) BANK_ADDR_OFFSET(BANK_ADDR_BANK_ALIGN(a), \ + BANK_SIZE) + +/* get bank address of chip register r given a bank base address a */ +#define BANK_ADDR_REG(a, r) BANK_ADDR_OFFSET(BANK_ADDR_BANK_ALIGN(a), \ + ((bank_size_t)(r) << BANK_WSHIFT)) + +/* make a bank address for each chip register address */ + +#define BANK_ADDR_REG_MAN(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_MAN) +#define BANK_ADDR_REG_DEV(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_DEV) +#define BANK_ADDR_REG_CFGM(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFGM) +#define BANK_ADDR_REG_CFG0(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG0) +#define BANK_ADDR_REG_CFG1(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG1) +#define BANK_ADDR_REG_CFG2(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG2) +#define BANK_ADDR_REG_CFG3(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG3) +#define BANK_ADDR_REG_CFG4(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG4) +#define BANK_ADDR_REG_CFG5(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG5) +#define BANK_ADDR_REG_CFG6(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG6) +#define BANK_ADDR_REG_CFG7(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG7) +#define BANK_ADDR_REG_CFG8(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG8) +#define BANK_ADDR_REG_CFG9(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG9) +#define BANK_ADDR_REG_CFG10(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG10) +#define BANK_ADDR_REG_CFG11(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG11) +#define BANK_ADDR_REG_CFG12(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG12) +#define BANK_ADDR_REG_CFG13(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG13) +#define BANK_ADDR_REG_CFG14(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG14) +#define BANK_ADDR_REG_CFG15(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG15) +#define BANK_ADDR_REG_CFG16(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG16) +#define BANK_ADDR_REG_CFG17(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG17) +#define BANK_ADDR_REG_CFG18(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG18) +#define BANK_ADDR_REG_CFG19(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG19) +#define BANK_ADDR_REG_CFG20(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG20) +#define BANK_ADDR_REG_CFG21(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG21) +#define BANK_ADDR_REG_CFG22(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG22) +#define BANK_ADDR_REG_CFG23(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG23) +#define BANK_ADDR_REG_CFG24(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG24) +#define BANK_ADDR_REG_CFG25(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG25) +#define BANK_ADDR_REG_CFG26(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG26) +#define BANK_ADDR_REG_CFG27(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG27) +#define BANK_ADDR_REG_CFG28(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG28) +#define BANK_ADDR_REG_CFG29(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG29) +#define BANK_ADDR_REG_CFG30(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG30) +#define BANK_ADDR_REG_CFG31(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG31) + +/* + * replicate a chip cmd/stat/rd value into each byte position within a word + * so that multiple chips are accessed in a single word i/o operation + * + * this must be as wide as the bank_word_t type, and take into account the + * chip width and bank layout + */ + +#define BANK_FILL_WORD(o) ((bank_word_t)( \ + ((unsigned long)(o) << 16) | \ + ((unsigned long)(o) << 0) \ + )) + +/* make a bank word value for each chip cmd/stat/rd value */ + +/* Commands */ +#define BANK_CMD_RST BANK_FILL_WORD(CHIP_CMD_RST) +#define BANK_CMD_RD_ID BANK_FILL_WORD(CHIP_CMD_RD_ID) +#define BANK_CMD_RD_STAT BANK_FILL_WORD(CHIP_CMD_RD_STAT) +#define BANK_CMD_CLR_STAT BANK_FILL_WORD(CHIP_CMD_CLR_STAT) +#define BANK_CMD_ERASE1 BANK_FILL_WORD(CHIP_CMD_ERASE1) +#define BANK_CMD_ERASE2 BANK_FILL_WORD(CHIP_CMD_ERASE2) +#define BANK_CMD_PROG BANK_FILL_WORD(CHIP_CMD_PROG) +#define BANK_CMD_LOCK BANK_FILL_WORD(CHIP_CMD_LOCK) +#define BANK_CMD_SET_LOCK_BLK BANK_FILL_WORD(CHIP_CMD_SET_LOCK_BLK) +#define BANK_CMD_SET_LOCK_MSTR BANK_FILL_WORD(CHIP_CMD_SET_LOCK_MSTR) +#define BANK_CMD_CLR_LOCK_BLK BANK_FILL_WORD(CHIP_CMD_CLR_LOCK_BLK) + +/* status register bits */ +#define BANK_STAT_DPS BANK_FILL_WORD(CHIP_STAT_DPS) +#define BANK_STAT_PSS BANK_FILL_WORD(CHIP_STAT_PSS) +#define BANK_STAT_VPPS BANK_FILL_WORD(CHIP_STAT_VPPS) +#define BANK_STAT_PSLBS BANK_FILL_WORD(CHIP_STAT_PSLBS) +#define BANK_STAT_ECLBS BANK_FILL_WORD(CHIP_STAT_ECLBS) +#define BANK_STAT_ESS BANK_FILL_WORD(CHIP_STAT_ESS) +#define BANK_STAT_RDY BANK_FILL_WORD(CHIP_STAT_RDY) + +#define BANK_STAT_ERR BANK_FILL_WORD(CHIP_STAT_ERR) + +/* ID and Lock Configuration */ +#define BANK_RD_ID_LOCK BANK_FILL_WORD(CHIP_RD_ID_LOCK) +#define BANK_RD_ID_MAN BANK_FILL_WORD(CHIP_RD_ID_MAN) +#define BANK_RD_ID_DEV BANK_FILL_WORD(CHIP_RD_ID_DEV) diff --git a/board/hymod/hymod.c b/board/hymod/hymod.c index 6757075..4f9623c 100644 --- a/board/hymod/hymod.c +++ b/board/hymod/hymod.c @@ -128,10 +128,10 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII TX_CLK */ /* PC17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RX_CLK */ /* PC16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII TX_CLK */ - /* PC15 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 UART ~CTS */ - /* PC14 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 UART ~CD */ - /* PC13 */ { 1, 1, 0, 0, 0, 0 }, /* SCC2 UART ~CTS */ - /* PC12 */ { 1, 1, 0, 0, 0, 0 }, /* SCC2 UART ~CD */ + /* PC15 */ { 1, 0, 0, 0, 0, 0 }, /* SCC1 UART ~CTS */ + /* PC14 */ { 1, 0, 0, 0, 0, 0 }, /* SCC1 UART ~CD */ + /* PC13 */ { 1, 0, 0, 0, 0, 0 }, /* SCC2 UART ~CTS */ + /* PC12 */ { 1, 0, 0, 0, 0, 0 }, /* SCC2 UART ~CD */ /* PC11 */ { 1, 0, 0, 1, 0, 0 }, /* SCC1 UART ~DTR */ /* PC10 */ { 1, 0, 0, 1, 0, 0 }, /* SCC1 UART ~DSR */ /* PC9 */ { 1, 0, 0, 1, 0, 0 }, /* SCC2 UART ~DTR */ @@ -150,10 +150,10 @@ const iop_conf_t iop_conf_tab[4][32] = { { /* conf ppar psor pdir podr pdat */ /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 UART RxD */ /* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 UART TxD */ - /* PD29 */ { 1, 1, 0, 1, 0, 0 }, /* SCC1 UART ~RTS */ + /* PD29 */ { 1, 0, 0, 1, 0, 0 }, /* SCC1 UART ~RTS */ /* PD28 */ { 1, 1, 0, 0, 0, 0 }, /* SCC2 UART RxD */ /* PD27 */ { 1, 1, 0, 1, 0, 0 }, /* SCC2 UART TxD */ - /* PD26 */ { 1, 1, 0, 1, 0, 0 }, /* SCC2 UART ~RTS */ + /* PD26 */ { 1, 0, 0, 1, 0, 0 }, /* SCC2 UART ~RTS */ /* PD25 */ { 1, 0, 0, 0, 0, 0 }, /* SCC1 UART ~RI */ /* PD24 */ { 1, 0, 0, 0, 0, 0 }, /* SCC2 UART ~RI */ /* PD23 */ { 1, 0, 0, 1, 0, 0 }, /* CLKGEN PD */ @@ -172,10 +172,10 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PD10 */ { 1, 0, 0, 1, 0, 1 }, /* FCC1 ~RESET */ /* PD9 */ { 1, 0, 0, 0, 0, 0 }, /* PD9 */ /* PD8 */ { 1, 0, 0, 0, 0, 0 }, /* PD8 */ - /* PD7 */ { 1, 0, 0, 0, 0, 0 }, /* PD7 */ - /* PD6 */ { 1, 0, 0, 0, 0, 0 }, /* PD6 */ - /* PD5 */ { 1, 0, 0, 0, 0, 0 }, /* PD5 */ - /* PD4 */ { 1, 0, 0, 0, 0, 0 }, /* PD4 */ + /* PD7 */ { 1, 0, 0, 1, 0, 1 }, /* PD7 */ + /* PD6 */ { 1, 0, 0, 1, 0, 1 }, /* PD6 */ + /* PD5 */ { 1, 0, 0, 1, 0, 1 }, /* PD5 */ + /* PD4 */ { 1, 0, 0, 1, 0, 1 }, /* PD4 */ /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ @@ -204,7 +204,7 @@ initdram(int board_type) { volatile immap_t *immap = (immap_t *)CFG_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; - volatile uchar *ramaddr = (uchar *)(CFG_SDRAM_BASE + 0x8); + volatile uchar c = 0, *ramaddr = (uchar *)(CFG_SDRAM_BASE + 0x8); ulong psdmr = CFG_PSDMR; int i; @@ -231,15 +231,18 @@ initdram(int board_type) memctl->memc_psrt = CFG_PSRT; memctl->memc_mptpr = CFG_MPTPR; - memctl->memc_psdmr = psdmr | PSDMR_OP_PREA; *ramaddr = 0; + memctl->memc_psdmr = psdmr | PSDMR_OP_PREA; + *ramaddr = c; - for (i = 0; i < 8; i++) { - memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR; *ramaddr = 0; - } + memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR; + for (i = 0; i < 8; i++) + *ramaddr = c; - memctl->memc_psdmr = psdmr | PSDMR_OP_MRW; *ramaddr = 0; + memctl->memc_psdmr = psdmr | PSDMR_OP_MRW; + *ramaddr = c; - memctl->memc_psdmr = psdmr | PSDMR_OP_NORM; *ramaddr = 0; + memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN; + *ramaddr = c; return (CFG_SDRAM_SIZE << 20); } diff --git a/board/hymod/ppcboot.lds b/board/hymod/ppcboot.lds index ea557c2..637d902 100644 --- a/board/hymod/ppcboot.lds +++ b/board/hymod/ppcboot.lds @@ -129,7 +129,7 @@ SECTIONS *(.bss) *(COMMON) } - . = ALIGN(512 * 1024); + . = ALIGN(256 * 1024); .ppcenv : { common/environment.o (.ppcenv) diff --git a/board/ip860/flash.c b/board/ip860/flash.c index 2af7541..5e237de 100644 --- a/board/ip860/flash.c +++ b/board/ip860/flash.c @@ -40,24 +40,12 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ # endif #endif -/*----------------------------------------------------------------------- - * Protection Flags: - */ -#define FLAG_PROTECT_SET 0x01 -#define FLAG_PROTECT_CLEAR 0x02 - /*----------------------------------------------------------------------- * Functions */ static ulong flash_get_size (vu_long *addr, flash_info_t *info); - -int flash_write (uchar *, ulong, ulong); -flash_info_t *addr2info (ulong); - -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt); static int write_word (flash_info_t *info, ulong dest, ulong data); static void flash_get_offsets (ulong base, flash_info_t *info); -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info); /*----------------------------------------------------------------------- */ @@ -101,88 +89,28 @@ unsigned long flash_init (void) flash_info[0].size = size; /* monitor protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, - CFG_FLASH_BASE, - CFG_FLASH_BASE+CFG_MONITOR_LEN-1, - &flash_info[0]); + flash_protect(FLAG_PROTECT_SET, + CFG_FLASH_BASE, + CFG_FLASH_BASE+CFG_MONITOR_LEN-1, + &flash_info[0]); #ifdef CFG_ENV_IS_IN_FLASH /* ENV protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, - CFG_ENV_ADDR, - CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1, - &flash_info[0]); + flash_protect(FLAG_PROTECT_SET, + CFG_ENV_ADDR, + CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1, + &flash_info[0]); #endif return (size); } -/*----------------------------------------------------------------------- - * Check or set protection status for monitor sectors - * - * The monitor always occupies the _first_ part of the _first_ Flash bank. - */ -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info) -{ - ulong b_end = info->start[0] + info->size - 1; /* bank end address */ - int rc = 0; - int first = -1; - int last = -1; - int i; - - if (to < info->start[0]) { - return (0); - } - - for (i=0; isector_count; ++i) { - ulong end; /* last address in current sect */ - short s_end; - - s_end = info->sector_count - 1; - - end = (i == s_end) ? b_end : info->start[i + 1] - 1; - - if (from > end) { - continue; - } - if (to < info->start[i]) { - continue; - } - - if (from == info->start[i]) { - first = i; - if (last < 0) { - last = s_end; - } - } - if (to == end) { - last = i; - if (first < 0) { - first = 0; - } - } - } - - for (i=first; i<=last; ++i) { - if (flag & FLAG_PROTECT_CLEAR) { - info->protect[i] = 0; - } else if (flag & FLAG_PROTECT_SET) { - info->protect[i] = 1; - } - if (info->protect[i]) { - rc = 1; - } - } - return (rc); -} - - /*----------------------------------------------------------------------- */ static void flash_get_offsets (ulong base, flash_info_t *info) { int i; - /* set up sector start adress table */ + /* set up sector start address table */ for (i = 0; i < info->sector_count; i++) { info->start[i] = base + (i * 0x00020000); } @@ -273,7 +201,7 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) } - /* set up sector start adress table */ + /* set up sector start address table */ for (i = 0; i < info->sector_count; i++) { info->start[i] = base + (i * 0x00020000); /* don't know how to check sector protection */ @@ -376,81 +304,6 @@ void flash_erase (flash_info_t *info, int s_first, int s_last) printf (" done\n"); } -/*----------------------------------------------------------------------- - */ - -flash_info_t *addr2info (ulong addr) -{ - flash_info_t *info; - int i; - - for (i=0, info=&flash_info[0]; i= info->start[0]) && - (addr < (info->start[0] + info->size)) ) { - return (info); - } - } - - return (NULL); -} - -/*----------------------------------------------------------------------- - * Copy memory to flash. - * Make sure all target addresses are within Flash bounds, - * and no protected sectors are hit. - * Returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - target range includes protected sectors - * 8 - target address not in Flash memory - */ -int flash_write (uchar *src, ulong addr, ulong cnt) -{ - int i; - ulong end = addr + cnt - 1; - flash_info_t *info_first = addr2info (addr); - flash_info_t *info_last = addr2info (end ); - flash_info_t *info; - - if (cnt == 0) { - return (0); - } - - if (!info_first || !info_last) { - return (8); - } - - for (info = info_first; info <= info_last; ++info) { - ulong b_end = info->start[0] + info->size; /* bank end addr */ - short s_end = info->sector_count - 1; - for (i=0; isector_count; ++i) { - ulong e_addr = (i == s_end) ? b_end : info->start[i + 1]; - - if ((end >= info->start[i]) && (addr < e_addr) && - (info->protect[i] != 0) ) { - return (4); - } - } - } - - /* finally write data to flash */ - for (info = info_first; info <= info_last && cnt>0; ++info) { - ulong len; - - len = info->start[0] + info->size - addr; - if (len > cnt) - len = cnt; - if ((i = write_buff(info, src, addr, len)) != 0) { - return (i); - } - cnt -= len; - addr += len; - src += len; - } - return (0); -} - /*----------------------------------------------------------------------- * Copy memory to flash, returns: * 0 - OK @@ -458,7 +311,7 @@ int flash_write (uchar *src, ulong addr, ulong cnt) * 2 - Flash not erased */ -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) { ulong cp, wp, data; int i, l, rc; diff --git a/board/ivms8/flash.c b/board/ivms8/flash.c index 251b835..4c389f7 100644 --- a/board/ivms8/flash.c +++ b/board/ivms8/flash.c @@ -38,24 +38,12 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ # endif #endif -/*----------------------------------------------------------------------- - * Protection Flags: - */ -#define FLAG_PROTECT_SET 0x01 -#define FLAG_PROTECT_CLEAR 0x02 - /*----------------------------------------------------------------------- * Functions */ static ulong flash_get_size (vu_long *addr, flash_info_t *info); - -int flash_write (uchar *, ulong, ulong); -flash_info_t *addr2info (ulong); - -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt); static int write_data (flash_info_t *info, ulong dest, ulong data); static void flash_get_offsets (ulong base, flash_info_t *info); -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info); /*----------------------------------------------------------------------- */ @@ -96,85 +84,22 @@ unsigned long flash_init (void) flash_info[0].size = size_b0; /* monitor protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, - CFG_FLASH_BASE, - CFG_FLASH_BASE+CFG_MONITOR_LEN-1, - &flash_info[0]); + flash_protect(FLAG_PROTECT_SET, + CFG_FLASH_BASE, + CFG_FLASH_BASE+CFG_MONITOR_LEN-1, + &flash_info[0]); #ifdef CFG_ENV_IS_IN_FLASH /* ENV protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, - CFG_ENV_ADDR, - CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1, - &flash_info[0]); + flash_protect(FLAG_PROTECT_SET, + CFG_ENV_ADDR, + CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1, + &flash_info[0]); #endif return (size_b0); } -/*----------------------------------------------------------------------- - * Check or set protection status for monitor sectors - * - * The monitor always occupies the _first_ part of the _first_ Flash bank. - */ -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info) -{ - int rc = 0; - int first = -1; - int last = -1; - int i; - ulong b_end; - - if ((info->flash_id == FLASH_UNKNOWN) && - (to < info->start[0]) ) { - return (0); - } - - b_end = info->start[0] + info->size - 1; /* bank end address */ - - for (i=0; isector_count; ++i) { - ulong end; /* last address in current sect */ - short s_end; - - s_end = info->sector_count - 1; - - end = (i == s_end) ? b_end : info->start[i + 1] - 1; - - if (from > end) { - continue; - } - if (to < info->start[i]) { - continue; - } - - if (from == info->start[i]) { - first = i; - if (last < 0) { - last = s_end; - } - } - if (to == end) { - last = i; - if (first < 0) { - first = 0; - } - } - } - - for (i=first; i<=last; ++i) { - if (flag & FLAG_PROTECT_CLEAR) { - info->protect[i] = 0; - } else if (flag & FLAG_PROTECT_SET) { - info->protect[i] = 1; - } - if (info->protect[i]) { - rc = 1; - } - } - return (rc); -} - - /*----------------------------------------------------------------------- */ static void flash_get_offsets (ulong base, flash_info_t *info) @@ -217,7 +142,7 @@ static void flash_get_offsets (ulong base, flash_info_t *info) case FLASH_MAN_AMD: case FLASH_MAN_FUJ: - /* set up sector start adress table */ + /* set up sector start address table */ if (info->flash_id & FLASH_BTYPE) { /* set sector offsets for bottom boot block type */ info->start[0] = base + 0x00000000; @@ -545,81 +470,6 @@ void flash_erase (flash_info_t *info, int s_first, int s_last) printf (" done\n"); } -/*----------------------------------------------------------------------- - */ - -flash_info_t *addr2info (ulong addr) -{ - flash_info_t *info; - int i; - - for (i=0, info=&flash_info[0]; i= info->start[0]) && - (addr < (info->start[0] + info->size)) ) { - return ((info->flash_id == FLASH_UNKNOWN) ? NULL : info); - } - } - - return (NULL); -} - -/*----------------------------------------------------------------------- - * Copy memory to flash. - * Make sure all target addresses are within Flash bounds, - * and no protected sectors are hit. - * Returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - target range includes protected sectors - * 8 - target address not in Flash memory - */ -int flash_write (uchar *src, ulong addr, ulong cnt) -{ - int i; - ulong end = addr + cnt - 1; - flash_info_t *info_first = addr2info (addr); - flash_info_t *info_last = addr2info (end ); - flash_info_t *info; - - if (cnt == 0) { - return (0); - } - - if (!info_first || !info_last) { - return (8); - } - - for (info = info_first; info <= info_last; ++info) { - ulong b_end = info->start[0] + info->size; /* bank end addr */ - short s_end = info->sector_count - 1; - for (i=0; isector_count; ++i) { - ulong e_addr = (i == s_end) ? b_end : info->start[i + 1]; - - if ((end >= info->start[i]) && (addr < e_addr) && - (info->protect[i] != 0) ) { - return (4); - } - } - } - - /* finally write data to flash */ - for (info = info_first; info <= info_last && cnt>0; ++info) { - ulong len; - - len = info->start[0] + info->size - addr; - if (len > cnt) - len = cnt; - if ((i = write_buff(info, src, addr, len)) != 0) { - return (i); - } - cnt -= len; - addr += len; - src += len; - } - return (0); -} - /*----------------------------------------------------------------------- * Copy memory to flash, returns: * 0 - OK @@ -630,7 +480,7 @@ int flash_write (uchar *src, ulong addr, ulong cnt) #define FLASH_WIDTH 2 /* flash bus width in bytes */ -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) { ulong cp, wp, data; int i, l, rc; diff --git a/board/ivms8/ivms8.c b/board/ivms8/ivms8.c index c1a7c62..9e805e3 100644 --- a/board/ivms8/ivms8.c +++ b/board/ivms8/ivms8.c @@ -183,6 +183,14 @@ initdram (int board_type) */ upmconfig(UPMA, (uint *)sharc_table, sizeof(sharc_table)/sizeof(uint)); +#if defined(CONFIG_IVML24) + /* + * Map controller bank 4 for HDLC Address space + */ + memctl->memc_or4 = CFG_OR4; + memctl->memc_br4 = CFG_BR4; +#endif + /* * Map controller bank 5 for SHARC */ diff --git a/board/mbx8xx/flash.c b/board/mbx8xx/flash.c index 54a0e09..c1640cb 100644 --- a/board/mbx8xx/flash.c +++ b/board/mbx8xx/flash.c @@ -34,24 +34,12 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ -/*----------------------------------------------------------------------- - * Protection Flags: - */ - -#define FLAG_PROTECT_SET 0x01 -#define FLAG_PROTECT_CLEAR 0x02 - /*----------------------------------------------------------------------- * Functions */ static ulong flash_get_size (vu_long *addr, flash_info_t *info); -int flash_write (uchar *, ulong, ulong); -flash_info_t *addr2info (ulong); - -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt); static int write_word (flash_info_t *info, ulong dest, ulong data); -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info); /*----------------------------------------------------------------------- */ @@ -88,74 +76,14 @@ unsigned long flash_init (void) } /* monitor protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, - CFG_FLASH_BASE, - CFG_FLASH_BASE+CFG_MONITOR_LEN-1, - &flash_info[0]); + flash_protect(FLAG_PROTECT_SET, + CFG_FLASH_BASE, + CFG_FLASH_BASE+CFG_MONITOR_LEN-1, + &flash_info[0]); return (totsize); } -/*----------------------------------------------------------------------- - * Check or set protection status for monitor sectors - * - * The monitor always occupies the _first_ part of the _first_ Flash bank. - */ -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info) -{ - ulong b_end = info->start[0] + info->size - 1; /* bank end address */ - int rc = 0; - int first = -1; - int last = -1; - int i; - - if (to < info->start[0]) { - return (0); - } - - for (i=0; isector_count; ++i) { - ulong end; /* last address in current sect */ - short s_end; - - s_end = info->sector_count - 1; - - end = (i == s_end) ? b_end : info->start[i + 1] - 1; - - if (from > end) { - continue; - } - if (to < info->start[i]) { - continue; - } - - if (from == info->start[i]) { - first = i; - if (last < 0) { - last = s_end; - } - } - if (to == end) { - last = i; - if (first < 0) { - first = 0; - } - } - } - - for (i=first; i<=last; ++i) { - if (flag & FLAG_PROTECT_CLEAR) { - info->protect[i] = 0; - } else if (flag & FLAG_PROTECT_SET) { - info->protect[i] = 1; - } - if (info->protect[i]) { - rc = 1; - } - } - return (rc); -} - - /*----------------------------------------------------------------------- */ void flash_print_info (flash_info_t *info) @@ -354,81 +282,6 @@ void flash_erase (flash_info_t *info, int s_first, int s_last) printf (" done\n"); } -/*----------------------------------------------------------------------- - */ - -flash_info_t *addr2info (ulong addr) -{ - flash_info_t *info; - int i; - - for (i=0, info=&flash_info[0]; i= info->start[0]) && - (addr < (info->start[0] + info->size)) ) { - return (info); - } - } - - return (NULL); -} - -/*----------------------------------------------------------------------- - * Copy memory to flash. - * Make sure all target addresses are within Flash bounds, - * and no protected sectors are hit. - * Returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - target range includes protected sectors - * 8 - target address not in Flash memory - */ -int flash_write (uchar *src, ulong addr, ulong cnt) -{ - int i; - ulong end = addr + cnt - 1; - flash_info_t *info_first = addr2info (addr); - flash_info_t *info_last = addr2info (end ); - flash_info_t *info; - - if (cnt == 0) { - return (0); - } - - if (!info_first || !info_last) { - return (8); - } - - for (info = info_first; info <= info_last; ++info) { - ulong b_end = info->start[0] + info->size; /* bank end addr */ - short s_end = info->sector_count - 1; - for (i=0; isector_count; ++i) { - ulong e_addr = (i == s_end) ? b_end : info->start[i + 1]; - - if ((end >= info->start[i]) && (addr < e_addr) && - (info->protect[i] != 0) ) { - return (4); - } - } - } - - /* finally write data to flash */ - for (info = info_first; info <= info_last && cnt>0; ++info) { - ulong len; - - len = info->start[0] + info->size - addr; - if (len > cnt) - len = cnt; - if ((i = write_buff(info, src, addr, len)) != 0) { - return (i); - } - cnt -= len; - addr += len; - src += len; - } - return (0); -} - /*----------------------------------------------------------------------- * Copy memory to flash, returns: * 0 - OK @@ -436,7 +289,7 @@ int flash_write (uchar *src, ulong addr, ulong cnt) * 2 - Flash not erased */ -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) { ulong cp, wp, data; int i, l, rc; diff --git a/board/rsdproto/flash.c b/board/rsdproto/flash.c index 5b66186..2d45ae5 100644 --- a/board/rsdproto/flash.c +++ b/board/rsdproto/flash.c @@ -41,13 +41,6 @@ */ #undef WITH_AUTOSELECT -#define ERR_OK 0 -#define ERR_TIMOUT 1 -#define ERR_NOT_ERASED 2 -#define ERR_PROTECTED 4 -#define ERR_INVAL 8 -#define ERR_ALIGN 16 - flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ #if 1 @@ -56,24 +49,13 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ #define D(x) printf x #endif -/*----------------------------------------------------------------------- - * Protection Flags: - */ - -#define FLAG_PROTECT_SET 0x01 -#define FLAG_PROTECT_CLEAR 0x02 - /*----------------------------------------------------------------------- * Functions */ -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt); -int flash_write(uchar *, ulong, ulong); -flash_info_t *addr2info (ulong); -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info); static unsigned char write_ull(flash_info_t *info, - unsigned long address, - volatile unsigned long long data); + unsigned long address, + volatile unsigned long long data); /* from flash_asm.S */ extern void ull_write(unsigned long long volatile *address, @@ -139,11 +121,11 @@ unsigned long flash_init (void) */ #if CFG_MONITOR_BASE >= PHYS_FLASH - (void)flash_protect(FLAG_PROTECT_SET, + flash_protect(FLAG_PROTECT_SET, CFG_MONITOR_BASE, CFG_MONITOR_BASE+CFG_MONITOR_LEN-1, &flash_info[0]); - (void)flash_protect(FLAG_PROTECT_SET, + flash_protect(FLAG_PROTECT_SET, CFG_MONITOR_BASE, CFG_MONITOR_BASE+CFG_MONITOR_LEN-1, &flash_info[1]); @@ -153,79 +135,19 @@ unsigned long flash_init (void) # ifndef CFG_ENV_SIZE # define CFG_ENV_SIZE CFG_ENV_SECT_SIZE # endif - (void)flash_protect(FLAG_PROTECT_SET, - CFG_ENV_ADDR, - CFG_ENV_ADDR + CFG_ENV_SIZE - 1, - &flash_info[0]); - (void)flash_protect(FLAG_PROTECT_SET, - CFG_ENV_ADDR, - CFG_ENV_ADDR + CFG_ENV_SIZE - 1, - &flash_info[1]); + flash_protect(FLAG_PROTECT_SET, + CFG_ENV_ADDR, + CFG_ENV_ADDR + CFG_ENV_SIZE - 1, + &flash_info[0]); + flash_protect(FLAG_PROTECT_SET, + CFG_ENV_ADDR, + CFG_ENV_ADDR + CFG_ENV_SIZE - 1, + &flash_info[1]); #endif return flash_info[0].size + flash_info[1].size; } -/*----------------------------------------------------------------------- - * Check or set protection status for monitor sectors - * - * The monitor always occupies the _first_ part of the _first_ Flash bank. - */ -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info) -{ - ulong b_end = info->start[0] + info->size - 1; /* bank end address */ - int rc = 0; - int first = -1; - int last = -1; - int i; - - if (to < info->start[0]) { - return (0); - } - - for (i=0; isector_count; ++i) { - ulong end; /* last address in current sect */ - short s_end; - - s_end = info->sector_count - 1; - - end = (i == s_end) ? b_end : info->start[i + 1] - 1; - - if (from > end) { - continue; - } - if (to < info->start[i]) { - continue; - } - - if (from == info->start[i]) { - first = i; - if (last < 0) { - last = s_end; - } - } - if (to == end) { - last = i; - if (first < 0) { - first = 0; - } - } - } - - for (i=first; i<=last; ++i) { - if (flag & FLAG_PROTECT_CLEAR) { - info->protect[i] = 0; - } else if (flag & FLAG_PROTECT_SET) { - info->protect[i] = 1; - } - if (info->protect[i]) { - rc = 1; - } - } - return (rc); -} - - /*----------------------------------------------------------------------- */ void flash_print_info (flash_info_t *info) @@ -351,82 +273,6 @@ void flash_erase (flash_info_t *info, int s_first, int s_last) printf (" done\n"); } -/*----------------------------------------------------------------------- - */ - -flash_info_t *addr2info (ulong addr) -{ - flash_info_t *info; - int i; - - for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { - info=&flash_info[i]; - if ((addr >= info->start[0]) && - (addr <= (info->start[0] + info->size - 1)) ) { - return info; - } - } - - return NULL; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash. - * Make sure all target addresses are within Flash bounds, - * and no protected sectors are hit. - * Returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - target range includes protected sectors - * 8 - target address not in Flash memory - */ -int flash_write (uchar *src, ulong addr, ulong cnt) -{ - int i; - ulong end = addr + cnt - 1; - flash_info_t *info_first = addr2info (addr); - flash_info_t *info_last = addr2info (end ); - flash_info_t *info; - - if (cnt == 0) { - return ERR_OK; - } - - if (!info_first || !info_last) { - return ERR_INVAL; - } - - for (info = info_first; info <= info_last; ++info) { - ulong b_end = info->start[0] + info->size; /* bank end addr */ - short s_end = info->sector_count - 1; - for (i=0; isector_count; ++i) { - ulong e_addr = (i == s_end) ? b_end : info->start[i + 1]; - - if ((end >= info->start[i]) && (addr < e_addr) && - (info->protect[i] != 0) ) { - return ERR_PROTECTED; - } - } - } - - /* finally write data to flash */ - for (info = info_first; info <= info_last && cnt>0; ++info) { - ulong len; - - len = info->start[0] + info->size - addr; - if (len > cnt) - len = cnt; - if ((i = write_buff(info, src, addr, len)) != 0) { - return (i); - } - cnt -= len; - addr += len; - src += len; - } - return ERR_OK; -} - /*----------------------------------------------------------------------- * Copy memory to flash, returns: * 0 - OK @@ -434,7 +280,7 @@ int flash_write (uchar *src, ulong addr, ulong cnt) * 2 - Flash not erased */ -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) { unsigned long cp, wp; unsigned long long data; diff --git a/board/sandpoint/flash.c b/board/sandpoint/flash.c index f2de593..8dfa44b 100644 --- a/board/sandpoint/flash.c +++ b/board/sandpoint/flash.c @@ -33,20 +33,8 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ * Functions */ ulong flash_get_size (vu_long *addr, flash_info_t *info); - -int flash_write (uchar *, ulong, ulong); -flash_info_t *addr2info (ulong); - -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt); static int write_word (flash_info_t *info, ulong dest, ulong data); static void flash_get_offsets (ulong base, flash_info_t *info); -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info); - -/*----------------------------------------------------------------------- - * Protection Flags: - */ -#define FLAG_PROTECT_SET 0x01 -#define FLAG_PROTECT_CLEAR 0x02 /*flash command address offsets*/ @@ -90,10 +78,10 @@ unsigned long flash_init (void) flash_get_offsets (base, &flash_info[0]); /* monitor protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, - base + size-CFG_MONITOR_LEN, - base + size - 1, - &flash_info[0]); + flash_protect(FLAG_PROTECT_SET, + base + size-CFG_MONITOR_LEN, + base + size - 1, + &flash_info[0]); flash_info[1].flash_id = FLASH_UNKNOWN; @@ -104,73 +92,13 @@ unsigned long flash_init (void) return (size); } -/*----------------------------------------------------------------------- - * Check or set protection status for monitor sectors - * - * The monitor always occupies the _first_ part of the _first_ Flash bank. - */ -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info) -{ - ulong b_end = info->start[0] + info->size - 1; /* bank end address */ - int rc = 0; - int first = -1; - int last = -1; - int i; - - if (to < info->start[0]) { - return (0); - } - - for (i=0; isector_count; ++i) { - ulong end; /* last address in current sect */ - short s_end; - - s_end = info->sector_count - 1; - - end = (i == s_end) ? b_end : info->start[i + 1] - 1; - - if (from > end) { - continue; - } - if (to < info->start[i]) { - continue; - } - - if (from == info->start[i]) { - first = i; - if (last < 0) { - last = s_end; - } - } - if (to == end) { - last = i; - if (first < 0) { - first = 0; - } - } - } - - for (i=first; i<=last; ++i) { - if (flag & FLAG_PROTECT_CLEAR) { - info->protect[i] = 0; - } else if (flag & FLAG_PROTECT_SET) { - info->protect[i] = 1; - } - if (info->protect[i]) { - rc = 1; - } - } - return (rc); -} - - /*----------------------------------------------------------------------- */ static void flash_get_offsets (ulong base, flash_info_t *info) { int i; - /* set up sector start adress table */ + /* set up sector start address table */ if (info->flash_id & FLASH_MAN_SST) { for (i = 0; i < info->sector_count; i++) @@ -395,7 +323,7 @@ ulong flash_get_size (vu_long *addr, flash_info_t *info) break; /* => 2 MB */ case (FLASH_WORD_SIZE)AMD_ID_F040B: - info->flash_id += FLASH_AM040B; + info->flash_id += FLASH_AM040; info->sector_count = 8; info->size = 0x00080000; break; /* => 0.5 MB */ @@ -407,7 +335,7 @@ ulong flash_get_size (vu_long *addr, flash_info_t *info) } printf("flash id %lx; sector count %x, size %lx\n", info->flash_id,info->sector_count,info->size); - /* set up sector start adress table */ + /* set up sector start address table */ if (info->flash_id & FLASH_MAN_SST) { for (i = 0; i < info->sector_count; i++) @@ -562,81 +490,6 @@ DONE: printf (" done\n"); } -/*----------------------------------------------------------------------- - */ - -flash_info_t *addr2info (ulong addr) -{ - flash_info_t *info; - int i; - - for (i=0, info=&flash_info[0]; i= info->start[0]) && - (addr <= (info->start[0] + info->size - 1)) ) { - return (info); - } - } - - return (NULL); -} - -/*----------------------------------------------------------------------- - * Copy memory to flash. - * Make sure all target addresses are within Flash bounds, - * and no protected sectors are hit. - * Returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - target range includes protected sectors - * 8 - target address not in Flash memory - */ -int flash_write (uchar *src, ulong addr, ulong cnt) -{ - int i; - ulong end = addr + cnt - 1; - flash_info_t *info_first = addr2info (addr); - flash_info_t *info_last = addr2info (end ); - flash_info_t *info; - - if (cnt == 0) { - return (0); - } - - if (!info_first || !info_last) { - return (8); - } - - for (info = info_first; info <= info_last; ++info) { - ulong b_end = info->start[0] + info->size; /* bank end addr */ - short s_end = info->sector_count - 1; - for (i=0; isector_count; ++i) { - ulong e_addr = (i == s_end) ? b_end : info->start[i + 1]; - - if ((end >= info->start[i]) && (addr < e_addr) && - (info->protect[i] != 0) ) { - return (4); - } - } - } - - /* finally write data to flash */ - for (info = info_first; info <= info_last && cnt>0; ++info) { - ulong len; - - len = info->start[0] + info->size - addr; - if (len > cnt) - len = cnt; - if ((i = write_buff(info, src, addr, len)) != 0) { - return (i); - } - cnt -= len; - addr += len; - src += len; - } - return (0); -} - /*----------------------------------------------------------------------- * Copy memory to flash, returns: * 0 - OK @@ -644,7 +497,7 @@ int flash_write (uchar *src, ulong addr, ulong cnt) * 2 - Flash not erased */ -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) { ulong cp, wp, data; int i, l, rc; diff --git a/board/sixnet/flash.c b/board/sixnet/flash.c index 5177fa9..125cd0f 100644 --- a/board/sixnet/flash.c +++ b/board/sixnet/flash.c @@ -30,20 +30,8 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ * Functions */ static ulong flash_get_size (vu_long *addr, flash_info_t *info); - -int flash_write (uchar *, ulong, ulong); -flash_info_t *addr2info (ulong); - -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt); static int write_word (flash_info_t *info, ulong dest, ulong data); static void flash_get_offsets (ulong base, flash_info_t *info); -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info); - -/*----------------------------------------------------------------------- - * Protection Flags: - */ -#define FLAG_PROTECT_SET 0x01 -#define FLAG_PROTECT_CLEAR 0x02 /*----------------------------------------------------------------------- */ @@ -89,8 +77,8 @@ unsigned long flash_init (void) } /* Remap FLASH according to real size */ - memctl->memc_or0 = CFG_OR0_PRELIM; - memctl->memc_br0 = CFG_BR0_PRELIM; + memctl->memc_or0 = CFG_OR0_PRELIM; + memctl->memc_br0 = CFG_BR0_PRELIM; /* Re-do sizing to get full correct info */ size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]); @@ -98,7 +86,10 @@ unsigned long flash_init (void) flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]); /* monitor protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, CFG_FLASH_BASE,CFG_FLASH_BASE+CFG_MONITOR_LEN-1, &flash_info[0]); + flash_protect(FLAG_PROTECT_SET, + CFG_FLASH_BASE, + CFG_FLASH_BASE+CFG_MONITOR_LEN-1, + &flash_info[0]); if (size_b1) { @@ -111,7 +102,10 @@ unsigned long flash_init (void) flash_get_offsets (CFG_FLASH_BASE + size_b0, &flash_info[1]); /* monitor protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, CFG_FLASH_BASE, CFG_FLASH_BASE+CFG_MONITOR_LEN-1, &flash_info[1]); + flash_protect(FLAG_PROTECT_SET, + CFG_FLASH_BASE, + CFG_FLASH_BASE+CFG_MONITOR_LEN-1, + &flash_info[1]); } else { @@ -128,91 +122,19 @@ unsigned long flash_init (void) return (size_b0 + size_b1); } -/*----------------------------------------------------------------------- - * Check or set protection status for monitor sectors - * - * The monitor always occupies the _first_ part of the _first_ Flash bank. - */ -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info) -{ - ulong b_end = info->start[0] + info->size - 1; /* bank end address */ - int rc = 0; - int first = -1; - int last = -1; - int i; - - if (to < info->start[0]) { - return (0); - } - - for (i=0; isector_count; ++i) { - ulong end; /* last address in current sect */ - short s_end; - - s_end = info->sector_count - 1; - - end = (i == s_end) ? b_end : info->start[i + 1] - 1; - - if (from > end) { - continue; - } - if (to < info->start[i]) { - continue; - } - - if (from == info->start[i]) { - first = i; - if (last < 0) { - last = s_end; - } - } - if (to == end) { - last = i; - if (first < 0) { - first = 0; - } - } - } - - for (i=first; i<=last; ++i) { - if (flag & FLAG_PROTECT_CLEAR) { - info->protect[i] = 0; - } else if (flag & FLAG_PROTECT_SET) { - info->protect[i] = 1; - } - if (info->protect[i]) { - rc = 1; - } - } - return (rc); -} - - /*----------------------------------------------------------------------- */ static void flash_get_offsets (ulong base, flash_info_t *info) { int i; - /* set up sector start adress table */ - if (info->flash_id & FLASH_BTYPE) - { - /* set sector offsets for bottom boot block type */ - for (i = 0; i < info->sector_count; i++) - { + /* set up sector start address table */ + if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) { + /* set sector offsets for uniform sector type */ + for (i = 0; i < info->sector_count; i++) { info->start[i] = base + (i * 0x00040000); } } - else - { - /* set sector offsets for top boot block type */ - i = info->sector_count - 1; - for (; i >= 0; i--) - { - info->start[i] = base + i * 0x00040000; - } - } - } /*----------------------------------------------------------------------- @@ -231,31 +153,14 @@ void flash_print_info (flash_info_t *info) { case FLASH_MAN_AMD: printf ("AMD "); break; case FLASH_MAN_FUJ: printf ("FUJITSU "); break; + case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break; default: printf ("Unknown Vendor "); break; } switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_AM040B: printf ("AM29F040B (4 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM040T: printf ("AM29F040T (4 Mbit, top boot sect)\n"); + case FLASH_AM040: printf ("29F040 or 29LV040 (4 Mbit, uniform sectors)\n"); break; - case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n"); - break; - case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n"); - break; - case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n"); - break; - case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n"); - break; default: printf ("Unknown Chip Type\n"); break; } @@ -277,10 +182,6 @@ void flash_print_info (flash_info_t *info) printf ("\n"); } -/*----------------------------------------------------------------------- - */ - - /*----------------------------------------------------------------------- */ @@ -291,27 +192,18 @@ void flash_print_info (flash_info_t *info) static ulong flash_get_size (vu_long *addr, flash_info_t *info) { short i; -#if 0 - ulong base = (ulong)addr; -#endif uchar value; /* Write auto select command: read Manufacturer ID */ -#if 0 - addr[0x0555] = 0x00AA00AA; - addr[0x02AA] = 0x00550055; - addr[0x0555] = 0x00900090; -#else addr[0x0555] = 0xAAAAAAAA; addr[0x02AA] = 0x55555555; addr[0x0555] = 0x90909090; -#endif value = addr[0]; - switch (value) + switch (value + (value << 16)) { - case AMD_MANUFACT:case 0x01: + case AMD_MANUFACT: info->flash_id = FLASH_MAN_AMD; break; @@ -331,89 +223,18 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) switch (value) { case AMD_ID_F040B: - info->flash_id += FLASH_AM040B; + info->flash_id += FLASH_AM040; info->sector_count = 8; info->size = 0x00200000; break; /* => 2 MB */ - case AMD_ID_LV400T: - info->flash_id += FLASH_AM400T; - info->sector_count = 11; - info->size = 0x00100000; - break; /* => 1 MB */ - - case AMD_ID_LV400B: - info->flash_id += FLASH_AM400B; - info->sector_count = 11; - info->size = 0x00100000; - break; /* => 1 MB */ - - case AMD_ID_LV800T: - info->flash_id += FLASH_AM800T; - info->sector_count = 19; - info->size = 0x00200000; - break; /* => 2 MB */ - - case AMD_ID_LV800B: - info->flash_id += FLASH_AM800B; - info->sector_count = 19; - info->size = 0x00200000; - break; /* => 2 MB */ - - case AMD_ID_LV160T: - info->flash_id += FLASH_AM160T; - info->sector_count = 35; - info->size = 0x00400000; - break; /* => 4 MB */ - - case AMD_ID_LV160B: - info->flash_id += FLASH_AM160B; - info->sector_count = 35; - info->size = 0x00400000; - break; /* => 4 MB */ -#if 0 /* enable when device IDs are available */ - case AMD_ID_LV320T: - info->flash_id += FLASH_AM320T; - info->sector_count = 67; - info->size = 0x00800000; - break; /* => 8 MB */ - - case AMD_ID_LV320B: - info->flash_id += FLASH_AM320B; - info->sector_count = 67; - info->size = 0x00800000; - break; /* => 8 MB */ -#endif default: info->flash_id = FLASH_UNKNOWN; return (0); /* => no or unknown flash */ } -#if 0 - /* set up sector start adress table */ - if (info->flash_id & FLASH_BTYPE) { - /* set sector offsets for bottom boot block type */ - info->start[0] = base + 0x00000000; - info->start[1] = base + 0x00008000; - info->start[2] = base + 0x0000C000; - info->start[3] = base + 0x00010000; - for (i = 4; i < info->sector_count; i++) { - info->start[i] = base + (i * 0x00020000) - 0x00060000; - } - } else { - /* set sector offsets for top boot block type */ - i = info->sector_count - 1; - info->start[i--] = base + info->size - 0x00008000; - info->start[i--] = base + info->size - 0x0000C000; - info->start[i--] = base + info->size - 0x00010000; - for (; i >= 0; i--) { - info->start[i] = base + i * 0x00020000; - } - } -#else flash_get_offsets ((ulong)addr, &flash_info[0]); -#endif /* check for protected sectors */ for (i = 0; i < info->sector_count; i++) @@ -430,11 +251,7 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) if (info->flash_id != FLASH_UNKNOWN) { addr = (volatile unsigned long *)info->start[0]; -#if 0 - *addr = 0x00F000F0; /* reset bank */ -#else *addr = 0xF0F0F0F0; /* reset bank */ -#endif } return (info->size); @@ -484,29 +301,17 @@ void flash_erase (flash_info_t *info, int s_first, int s_last) /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); -#if 0 - addr[0x0555] = 0x00AA00AA; - addr[0x02AA] = 0x00550055; - addr[0x0555] = 0x00800080; - addr[0x0555] = 0x00AA00AA; - addr[0x02AA] = 0x00550055; -#else addr[0x0555] = 0xAAAAAAAA; addr[0x02AA] = 0x55555555; addr[0x0555] = 0x80808080; addr[0x0555] = 0xAAAAAAAA; addr[0x02AA] = 0x55555555; -#endif /* Start erase on unprotected sectors */ for (sect = s_first; sect<=s_last; sect++) { if (info->protect[sect] == 0) { /* not protected */ addr = (vu_long*)(info->start[sect]); -#if 0 - addr[0] = 0x00300030; -#else addr[0] = 0x30303030; -#endif l_sect = sect; } } @@ -527,11 +332,7 @@ void flash_erase (flash_info_t *info, int s_first, int s_last) start = get_timer (0); last = start; addr = (vu_long*)(info->start[l_sect]); -#if 0 - while ((addr[0] & 0x00800080) != 0x00800080) -#else while ((addr[0] & 0xFFFFFFFF) != 0xFFFFFFFF) -#endif { if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { printf ("Timeout\n"); @@ -547,90 +348,11 @@ void flash_erase (flash_info_t *info, int s_first, int s_last) DONE: /* reset to read mode */ addr = (volatile unsigned long *)info->start[0]; -#if 0 - addr[0] = 0x00F000F0; /* reset bank */ -#else addr[0] = 0xF0F0F0F0; /* reset bank */ -#endif printf (" done\n"); } -/*----------------------------------------------------------------------- - */ - -flash_info_t *addr2info (ulong addr) -{ - flash_info_t *info; - int i; - - for (i=0, info=&flash_info[0]; i= info->start[0]) && - (addr < (info->start[0] + info->size)) ) { - return (info); - } - } - - return (NULL); -} - -/*----------------------------------------------------------------------- - * Copy memory to flash. - * Make sure all target addresses are within Flash bounds, - * and no protected sectors are hit. - * Returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - target range includes protected sectors - * 8 - target address not in Flash memory - */ -int flash_write (uchar *src, ulong addr, ulong cnt) -{ - int i; - ulong end = addr + cnt - 1; - flash_info_t *info_first = addr2info (addr); - flash_info_t *info_last = addr2info (end ); - flash_info_t *info; - - if (cnt == 0) { - return (0); - } - - if (!info_first || !info_last) { - return (8); - } - - for (info = info_first; info <= info_last; ++info) { - ulong b_end = info->start[0] + info->size; /* bank end addr */ - short s_end = info->sector_count - 1; - for (i=0; isector_count; ++i) { - ulong e_addr = (i == s_end) ? b_end : info->start[i + 1]; - - if ((end >= info->start[i]) && (addr < e_addr) && - (info->protect[i] != 0) ) { - return (4); - } - } - } - - /* finally write data to flash */ - for (info = info_first; info <= info_last && cnt>0; ++info) { - ulong len; - - len = info->start[0] + info->size - addr; - if (len > cnt) - len = cnt; - if ((i = write_buff(info, src, addr, len)) != 0) { - return (i); - } - cnt -= len; - addr += len; - src += len; - } - return (0); -} - /*----------------------------------------------------------------------- * Copy memory to flash, returns: * 0 - OK @@ -638,7 +360,7 @@ int flash_write (uchar *src, ulong addr, ulong cnt) * 2 - Flash not erased */ -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) { ulong cp, wp, data; int i, l, rc; @@ -721,15 +443,9 @@ static int write_word (flash_info_t *info, ulong dest, ulong data) /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); -#if 0 - addr[0x0555] = 0x00AA00AA; - addr[0x02AA] = 0x00550055; - addr[0x0555] = 0x00A000A0; -#else addr[0x0555] = 0xAAAAAAAA; addr[0x02AA] = 0x55555555; addr[0x0555] = 0xA0A0A0A0; -#endif *((vu_long *)dest) = data; @@ -739,11 +455,7 @@ static int write_word (flash_info_t *info, ulong dest, ulong data) /* data polling for D7 */ start = get_timer (0); -#if 0 - while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) -#else while ((*((vu_long *)dest) & 0x80808080) != (data & 0x80808080)) -#endif { if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { return (1); diff --git a/board/spd8xx/flash.c b/board/spd8xx/flash.c index f6b42d3..dedb871 100644 --- a/board/spd8xx/flash.c +++ b/board/spd8xx/flash.c @@ -42,25 +42,6 @@ unsigned long flash_init (void) /*----------------------------------------------------------------------- */ -flash_info_t *addr2info (ulong addr) -{ - return (NULL); -} - -/*----------------------------------------------------------------------- - * Copy memory to flash. - * Returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - target range includes protected sectors - * 8 - target address not in Flash memory - */ -int flash_write (uchar *src, ulong addr, ulong cnt) -{ - return (1); /* any other error codes are possible as well */ -} - void flash_print_info (flash_info_t *info) { printf("no FLASH memory in MPC823TS board\n"); diff --git a/board/tqm8xx/flash.c b/board/tqm8xx/flash.c index d73e2c8..0f43274 100644 --- a/board/tqm8xx/flash.c +++ b/board/tqm8xx/flash.c @@ -26,24 +26,12 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ -/*----------------------------------------------------------------------- - * Protection Flags: - */ -#define FLAG_PROTECT_SET 0x01 -#define FLAG_PROTECT_CLEAR 0x02 - /*----------------------------------------------------------------------- * Functions */ static ulong flash_get_size (vu_long *addr, flash_info_t *info); - -int flash_write (uchar *, ulong, ulong); -flash_info_t *addr2info (ulong); - -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt); static int write_word (flash_info_t *info, ulong dest, ulong data); static void flash_get_offsets (ulong base, flash_info_t *info); -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info); /*----------------------------------------------------------------------- */ @@ -96,10 +84,10 @@ unsigned long flash_init (void) flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]); /* monitor protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, - CFG_FLASH_BASE, - CFG_FLASH_BASE+CFG_MONITOR_LEN-1, - &flash_info[0]); + flash_protect(FLAG_PROTECT_SET, + CFG_FLASH_BASE, + CFG_FLASH_BASE+CFG_MONITOR_LEN-1, + &flash_info[0]); if (size_b1) { memctl->memc_or1 = CFG_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000); @@ -113,10 +101,10 @@ unsigned long flash_init (void) flash_get_offsets (CFG_FLASH_BASE + size_b0, &flash_info[1]); /* monitor protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, - CFG_FLASH_BASE, - CFG_FLASH_BASE+CFG_MONITOR_LEN-1, - &flash_info[1]); + flash_protect(FLAG_PROTECT_SET, + CFG_FLASH_BASE, + CFG_FLASH_BASE+CFG_MONITOR_LEN-1, + &flash_info[1]); } else { memctl->memc_br1 = 0; /* invalidate bank */ @@ -130,73 +118,13 @@ unsigned long flash_init (void) return (size_b0 + size_b1); } -/*----------------------------------------------------------------------- - * Check or set protection status for monitor sectors - * - * The monitor always occupies the _first_ part of the _first_ Flash bank. - */ -static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info) -{ - ulong b_end = info->start[0] + info->size - 1; /* bank end address */ - int rc = 0; - int first = -1; - int last = -1; - int i; - - if (to < info->start[0]) { - return (0); - } - - for (i=0; isector_count; ++i) { - ulong end; /* last address in current sect */ - short s_end; - - s_end = info->sector_count - 1; - - end = (i == s_end) ? b_end : info->start[i + 1] - 1; - - if (from > end) { - continue; - } - if (to < info->start[i]) { - continue; - } - - if (from == info->start[i]) { - first = i; - if (last < 0) { - last = s_end; - } - } - if (to == end) { - last = i; - if (first < 0) { - first = 0; - } - } - } - - for (i=first; i<=last; ++i) { - if (flag & FLAG_PROTECT_CLEAR) { - info->protect[i] = 0; - } else if (flag & FLAG_PROTECT_SET) { - info->protect[i] = 1; - } - if (info->protect[i]) { - rc = 1; - } - } - return (rc); -} - - /*----------------------------------------------------------------------- */ static void flash_get_offsets (ulong base, flash_info_t *info) { int i; - /* set up sector start adress table */ + /* set up sector start address table */ if (info->flash_id & FLASH_BTYPE) { /* set sector offsets for bottom boot block type */ info->start[0] = base + 0x00000000; @@ -368,7 +296,7 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) } - /* set up sector start adress table */ + /* set up sector start address table */ if (info->flash_id & FLASH_BTYPE) { /* set sector offsets for bottom boot block type */ info->start[0] = base + 0x00000000; @@ -505,81 +433,6 @@ DONE: printf (" done\n"); } -/*----------------------------------------------------------------------- - */ - -flash_info_t *addr2info (ulong addr) -{ - flash_info_t *info; - int i; - - for (i=0, info=&flash_info[0]; i= info->start[0]) && - (addr < (info->start[0] + info->size)) ) { - return (info); - } - } - - return (NULL); -} - -/*----------------------------------------------------------------------- - * Copy memory to flash. - * Make sure all target addresses are within Flash bounds, - * and no protected sectors are hit. - * Returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - target range includes protected sectors - * 8 - target address not in Flash memory - */ -int flash_write (uchar *src, ulong addr, ulong cnt) -{ - int i; - ulong end = addr + cnt - 1; - flash_info_t *info_first = addr2info (addr); - flash_info_t *info_last = addr2info (end ); - flash_info_t *info; - - if (cnt == 0) { - return (0); - } - - if (!info_first || !info_last) { - return (8); - } - - for (info = info_first; info <= info_last; ++info) { - ulong b_end = info->start[0] + info->size; /* bank end addr */ - short s_end = info->sector_count - 1; - for (i=0; isector_count; ++i) { - ulong e_addr = (i == s_end) ? b_end : info->start[i + 1]; - - if ((end >= info->start[i]) && (addr < e_addr) && - (info->protect[i] != 0) ) { - return (4); - } - } - } - - /* finally write data to flash */ - for (info = info_first; info <= info_last && cnt>0; ++info) { - ulong len; - - len = info->start[0] + info->size - addr; - if (len > cnt) - len = cnt; - if ((i = write_buff(info, src, addr, len)) != 0) { - return (i); - } - cnt -= len; - addr += len; - src += len; - } - return (0); -} - /*----------------------------------------------------------------------- * Copy memory to flash, returns: * 0 - OK @@ -587,7 +440,7 @@ int flash_write (uchar *src, ulong addr, ulong cnt) * 2 - Flash not erased */ -static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) { ulong cp, wp, data; int i, l, rc; diff --git a/common/Makefile b/common/Makefile index 4565e69..630b19b 100644 --- a/common/Makefile +++ b/common/Makefile @@ -34,7 +34,7 @@ COBJS = board.o main.o command.o \ cmd_ide.o cmd_mem.o cmd_net.o \ cmd_nvedit.o cmd_pcmcia.o \ s_record.o dlmalloc.o \ - kgdb.o console.o lists.o devices.o + kgdb.o console.o lists.o devices.o flash.o OBJS = $(AOBJS) $(COBJS) diff --git a/common/board.c b/common/board.c index d25f95a..3c051ed 100644 --- a/common/board.c +++ b/common/board.c @@ -480,6 +480,7 @@ void board_init_r (bd_t *bd, ulong dest_addr) #if defined(CONFIG_SPD823TS) || \ defined(CONFIG_IVMS8) || \ + defined(CONFIG_IVML24) || \ defined(CONFIG_IP860) # ifdef DEBUG puts (" Reset Ethernet PHY\n"); diff --git a/common/cmd_boot.c b/common/cmd_boot.c index 6213c5a..040eaea 100644 --- a/common/cmd_boot.c +++ b/common/cmd_boot.c @@ -52,7 +52,7 @@ void do_bdinfo (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) printf (" flashoffset = 0x%08lx\n", bd->bi_flashoffset); printf (" sramstart = 0x%08lx\n", bd->bi_sramstart ); printf (" sramsize = 0x%08lx\n", bd->bi_sramsize ); -#ifdef CONFIG_8xx +#if defined(CONFIG_8xx) || defined(CONFIG_8260) printf (" immr_base = 0x%08lx\n", bd->bi_immr_base ); #endif printf (" bootflags = 0x%08lx\n", bd->bi_bootflags ); @@ -70,7 +70,7 @@ void do_bdinfo (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) #ifdef CONFIG_HERMES printf (" ethspeed = %6d MHz\n", bd->bi_ethspeed); #endif - printf ("\n IP addr ="); print_IPaddr (bd->bi_ip_addr); + printf ("\n IP addr = "); print_IPaddr (bd->bi_ip_addr); printf ("\n baudrate = %6ld bps\n", bd->bi_baudrate ); printf (" getc = 0x%08lx\n",(ulong)bd->bi_mon_fnc->getc); printf (" tstc = 0x%08lx\n",(ulong)bd->bi_mon_fnc->tstc); diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index c43a2c7..d6f7dea 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -67,7 +67,7 @@ void do_bootm (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) if ((s = getenv ("initrd_high")) != NULL) { /* a value of "no" or a similar string will act like 0, - * truning the "load high" feature off. This is intentional. + * turning the "load high" feature off. This is intentional. */ initrd_high = simple_strtoul(s, NULL, 16); } else { /* not set, no restrictions to load high */ diff --git a/common/cmd_ide.c b/common/cmd_ide.c index a13d90c..d8d2d67 100644 --- a/common/cmd_ide.c +++ b/common/cmd_ide.c @@ -971,6 +971,13 @@ static void ide_reset (void) #error IDE reset pin not configured #endif /* CFG_PC_IDE_RESET */ +#ifdef CFG_PB_12V_ENABLE + immr->im_cpm.cp_pbdat |= CFG_PB_12V_ENABLE; /* 12V Enable output ON */ + immr->im_cpm.cp_pbpar &= ~(CFG_PB_12V_ENABLE); + immr->im_cpm.cp_pbodr &= ~(CFG_PB_12V_ENABLE); + immr->im_cpm.cp_pbdir |= CFG_PB_12V_ENABLE; +#endif /* CFG_PB_12V_ENABLE */ + #ifdef CFG_PB_IDE_MOTOR immr->im_cpm.cp_pbpar &= ~(CFG_PB_IDE_MOTOR); /* IDE Motor in pin */ immr->im_cpm.cp_pbodr &= ~(CFG_PB_IDE_MOTOR); diff --git a/common/cmd_mem.c b/common/cmd_mem.c index 888738b..3ce424f 100644 --- a/common/cmd_mem.c +++ b/common/cmd_mem.c @@ -429,6 +429,14 @@ void do_mem_mtest (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) int memval; for (;;) { + if (tstc()) { + switch (getc()) { + case '\0': + case 0x03: /* ^C - Control C */ + return; + } + } + memaddr = (uint *)CFG_MEMTEST_START; printf("\nWriting: %08x, ", baseval); memval = baseval; diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c index b90fffb..1a7092f 100644 --- a/common/cmd_nvedit.c +++ b/common/cmd_nvedit.c @@ -395,8 +395,10 @@ void _do_setenv (bd_t *bd, int flag, int argc, char *argv[]) } if (console != -1) { - if (argc < 3) /* Cannot delete it! */ + if (argc < 3) { /* Cannot delete it! */ + printf("Can't delete \"%s\"\n", name); return; + } /* Try assigning specified device */ if (console_assign (console, argv[2]) < 0) @@ -435,7 +437,11 @@ void _do_setenv (bd_t *bd, int flag, int argc, char *argv[]) } if (*++nxt == '\0') { - *env = '\0'; + if (env > env_data) { + env--; + } else { + *env = '\0'; + } } else { for (;;) { *env = *nxt++; @@ -783,7 +789,7 @@ void env_init(init_data_t *idata) idata->env_addr = (ulong)&(env_ptr->data); idata->env_valid = 1; } else { - idata->env_addr = (ulong)&default_environment; + idata->env_addr = (ulong)&default_environment[0]; idata->env_valid = 0; } } diff --git a/common/environment.S b/common/environment.S index 43b44a8..40857d9 100644 --- a/common/environment.S +++ b/common/environment.S @@ -54,8 +54,8 @@ env_data: #endif #ifdef CONFIG_NFSBOOTCOMMAND .ascii "nfsboot=" - .ascii CONFIG_NFSBOOTCOMMAN - .ascii D "\0" + .ascii CONFIG_NFSBOOTCOMMAND + .ascii "\0" #endif #if (CONFIG_BOOTDELAY >= 0) .ascii "bootdelay=" @@ -67,9 +67,11 @@ env_data: .ascii MK_STR(CONFIG_BAUDRATE) .ascii "\0" #endif +#ifdef CONFIG_LOADS_ECHO .ascii "loads_echo=" .ascii MK_STR(CONFIG_LOADS_ECHO) .ascii "\0" +#endif #ifdef CONFIG_ETHADDR .ascii "ethaddr=" .ascii MK_STR(CONFIG_ETHADDR) @@ -90,12 +92,13 @@ env_data: .ascii CFG_AUTOLOAD .ascii "\0" #endif - /* terminate list of environment strings */ .ascii "\0" + /* make sure we have two '\0' bytes even when no vars are defined */ + .ascii "\0" . = environment + CFG_ENV_SIZE .L_end: -#if defined(CONFIG_FADS) +#if defined(CONFIG_FADS) || defined(CONFIG_HYMOD) .text #endif .globl env_size diff --git a/common/flash.c b/common/flash.c new file mode 100644 index 0000000..6a197fb --- /dev/null +++ b/common/flash.c @@ -0,0 +1,168 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include + +extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ + +/*----------------------------------------------------------------------- + * Functions + */ + +/*----------------------------------------------------------------------- + * Set protection status for monitor sectors + * + * The monitor always occupies the _first_ part of the _first_ Flash bank. + */ +void +flash_protect (int flag, ulong from, ulong to, flash_info_t *info) +{ + ulong b_end = info->start[0] + info->size - 1; /* bank end address */ + short s_end = info->sector_count - 1; /* index of last sector */ + int i; + + /* Do nothing if input data is bad. */ + if (info->sector_count == 0 || info->size == 0 || to < from) { + return; + } + + /* There is nothing to do if we have no data about the flash + * or the protect range and flash range don't overlap. + */ + if (info->flash_id == FLASH_UNKNOWN || + to < info->start[0] || from > b_end) { + return; + } + + for (i=0; isector_count; ++i) { + ulong end; /* last address in current sect */ + + end = (i == s_end) ? b_end : info->start[i + 1] - 1; + + /* Update protection if any part of the sector + * is in the specified range. + */ + if (from <= end && to >= info->start[i]) { + if (flag & FLAG_PROTECT_CLEAR) { + info->protect[i] = 0; + } + else if (flag & FLAG_PROTECT_SET) { + info->protect[i] = 1; + } + } + } +} + +/*----------------------------------------------------------------------- + */ + +flash_info_t * +addr2info (ulong addr) +{ +#ifndef CONFIG_SPD823TS + flash_info_t *info; + int i; + + for (i=0, info=&flash_info[0]; iflash_id != FLASH_UNKNOWN && + addr >= info->start[0] && + /* WARNING - The '- 1' is needed if the flash + * is at the end of the address space, since + * info->start[0] + info->size wraps back to 0. + * Please don't change this unless you understand this. + */ + addr <= info->start[0] + info->size - 1) { + return (info); + } + } +#endif /* CONFIG_SPD823TS */ + + return (NULL); +} + +/*----------------------------------------------------------------------- + * Copy memory to flash. + * Make sure all target addresses are within Flash bounds, + * and no protected sectors are hit. + * Returns: + * ERR_OK 0 - OK + * ERR_TIMOUT 1 - write timeout + * ERR_NOT_ERASED 2 - Flash not erased + * ERR_PROTECTED 4 - target range includes protected sectors + * ERR_INVAL 8 - target address not in Flash memory + * ERR_ALIGN 16 - target address not aligned on boundary + * (only some targets require alignment) + */ +int +flash_write (uchar *src, ulong addr, ulong cnt) +{ +#ifdef CONFIG_SPD823TS + return (ERR_TIMOUT); /* any other error codes are possible as well */ +#else + int i; + ulong end = addr + cnt - 1; + flash_info_t *info_first = addr2info (addr); + flash_info_t *info_last = addr2info (end ); + flash_info_t *info; + + if (cnt == 0) { + return (ERR_OK); + } + + if (!info_first || !info_last) { + return (ERR_INVAL); + } + + for (info = info_first; info <= info_last; ++info) { + ulong b_end = info->start[0] + info->size; /* bank end addr */ + short s_end = info->sector_count - 1; + for (i=0; isector_count; ++i) { + ulong e_addr = (i == s_end) ? b_end : info->start[i + 1]; + + if ((end >= info->start[i]) && (addr < e_addr) && + (info->protect[i] != 0) ) { + return (ERR_PROTECTED); + } + } + } + + /* finally write data to flash */ + for (info = info_first; info <= info_last && cnt>0; ++info) { + ulong len; + + len = info->start[0] + info->size - addr; + if (len > cnt) + len = cnt; + if ((i = write_buff(info, src, addr, len)) != 0) { + return (i); + } + cnt -= len; + addr += len; + src += len; + } + return (ERR_OK); +#endif /* CONFIG_SPD823TS */ +} + +/*----------------------------------------------------------------------- + */ diff --git a/common/kgdb.c b/common/kgdb.c index 3ae2fab..1f3e125 100644 --- a/common/kgdb.c +++ b/common/kgdb.c @@ -94,6 +94,8 @@ #if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#undef KGDB_DEBUG + /* * BUFMAX defines the maximum number of characters in inbound/outbound buffers */ @@ -103,7 +105,8 @@ static char remcomOutBuffer[BUFMAX]; static char remcomRegBuffer[BUFMAX]; static int initialized = 0; -static int kgdb_active = 0; +static int kgdb_active = 0, first_entry = 1; +static struct pt_regs entry_regs; static u_int error_jmp_buf[BUFMAX/2]; static int longjmp_on_fault = 0; #ifdef KGDB_DEBUG @@ -213,7 +216,8 @@ getpacket(char *buffer) * characters */ while ((ch = (getDebugChar() & 0x7f)) != '$') { #ifdef KGDB_DEBUG - serial_putc(ch); + if (kdebug) + putc(ch); #endif ; } @@ -303,6 +307,7 @@ handle_exception (struct pt_regs *regs) return (0); } + /* probably should check which exception occured as well */ if (longjmp_on_fault) { longjmp_on_fault = 0; kgdb_longjmp((long*)error_jmp_buf, KGDBERR_MEMFAULT); @@ -317,14 +322,24 @@ handle_exception (struct pt_regs *regs) kgdb_interruptible(0); - printf("kgdb: entering handle_exception; trap [0x%x]\n", - kgdb_trap(regs)); + printf("kgdb: handle_exception; trap [0x%x]\n", kgdb_trap(regs)); if (kgdb_setjmp((long*)error_jmp_buf) != 0) panic("kgdb: error or fault in entry init!\n"); kgdb_enter(regs, &kd); + if (first_entry) { + /* + * the first time we enter kgdb, we save the processor + * state so that we can return to the monitor if the + * remote end quits gdb (or at least, tells us to quit + * with the 'k' packet) + */ + entry_regs = *regs; + first_entry = 0; + } + ptr = remcomOutBuffer; *ptr++ = 'T'; @@ -357,6 +372,12 @@ handle_exception (struct pt_regs *regs) remcomOutBuffer[0] = 0; getpacket(remcomInBuffer); + ptr = &remcomInBuffer[1]; + +#ifdef KGDB_DEBUG + if (kdebug) + printf("kgdb: remcomInBuffer: %s\n", remcomInBuffer); +#endif errnum = kgdb_setjmp((long*)error_jmp_buf); @@ -382,26 +403,16 @@ handle_exception (struct pt_regs *regs) break; case 'G': /* set the value of the CPU registers */ - length = strlen(&remcomInBuffer[1]); + length = strlen(ptr); if ((length & 1) != 0) kgdb_error(KGDBERR_BADPARAMS); - hex2mem(&remcomInBuffer[1], remcomRegBuffer, length); - kgdb_putregs(regs, remcomRegBuffer, length); + hex2mem(ptr, remcomRegBuffer, length/2); + kgdb_putregs(regs, remcomRegBuffer, length/2); strcpy(remcomOutBuffer,"OK"); break; - case 'H': - /* don't do anything, yet, just acknowledge */ - if (hexToInt(&ptr, &addr)) - strcpy(remcomOutBuffer,"OK"); - else - kgdb_error(KGDBERR_BADPARAMS); - break; - case 'm': /* mAA..AA,LLLL Read LLLL bytes at address AA..AA */ /* Try to read %x,%x. */ - ptr = &remcomInBuffer[1]; - if (hexToInt(&ptr, &addr) && *ptr++ == ',' && hexToInt(&ptr, &length)) { @@ -414,8 +425,6 @@ handle_exception (struct pt_regs *regs) case 'M': /* MAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK */ /* Try to read '%x,%x:'. */ - ptr = &remcomInBuffer[1]; - if (hexToInt(&ptr, &addr) && *ptr++ == ',' && hexToInt(&ptr, &length) @@ -428,15 +437,20 @@ handle_exception (struct pt_regs *regs) break; - case 'k': /* kill the program, actually just continue */ + case 'k': /* kill the program, actually return to monitor */ kd.extype = KGDBEXIT_KILL; + *regs = entry_regs; + first_entry = 1; goto doexit; + case 'C': /* CSS continue with signal SS */ + *ptr = '\0'; /* ignore the signal number for now */ + /* fall through */ + case 'c': /* cAA..AA Continue; address AA..AA optional */ /* try to read optional parameter, pc unchanged if no parm */ kd.extype = KGDBEXIT_CONTINUE; - ptr = &remcomInBuffer[1]; if (hexToInt(&ptr, &addr)) { kd.exaddr = addr; kd.extype |= KGDBEXIT_WITHADDR; @@ -444,9 +458,18 @@ handle_exception (struct pt_regs *regs) goto doexit; + case 'S': /* SSS single step with signal SS */ + *ptr = '\0'; /* ignore the signal number for now */ + /* fall through */ + case 's': kd.extype = KGDBEXIT_SINGLE; + if (hexToInt(&ptr, &addr)) { + kd.exaddr = addr; + kd.extype |= KGDBEXIT_WITHADDR; + } + doexit: /* Need to flush the instruction cache here, as we may have deposited a * breakpoint, and the icache probably has no way of knowing that a data ref to @@ -461,16 +484,27 @@ handle_exception (struct pt_regs *regs) case 'r': /* Reset (if user process..exit ???)*/ panic("kgdb reset."); break; + + case 'P': /* Pr=v set reg r to value v (r and v are hex) */ + if (hexToInt(&ptr, &addr) + && *ptr++ == '=' + && ((length = strlen(ptr)) & 1) == 0) { + hex2mem(ptr, remcomRegBuffer, length/2); + kgdb_putreg(regs, addr, + remcomRegBuffer, length/2); + strcpy(remcomOutBuffer,"OK"); + } else { + kgdb_error(KGDBERR_BADPARAMS); + } + break; } /* switch */ if (errnum != 0) sprintf(remcomOutBuffer, "E%02d", errnum); #ifdef KGDB_DEBUG - if (remcomOutBuffer[0] && kdebug) { - printf("kgdb: remcomInBuffer: %s\n", remcomInBuffer); + if (kdebug) printf("kgdb: remcomOutBuffer: %s\n", remcomOutBuffer); - } #endif /* reply to the request */ @@ -486,14 +520,12 @@ handle_exception (struct pt_regs *regs) void kgdb_init(void) { - kgdb_serial_init(); debugger_exception_handler = handle_exception; initialized = 1; putDebugStr("kgdb ready\n"); - printf("[handler = 0x%08lx] ready\n", - (unsigned long)debugger_exception_handler); + puts("ready\n"); } void @@ -529,14 +561,14 @@ breakpoint(void) return; } - kgdb_breakpoint(); + kgdb_breakpoint(bd_ptr, 0, 0); } void do_kgdb(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) { printf("Entering KGDB mode via exception handler...\n\n"); - breakpoint(); + kgdb_breakpoint(bd, argc - 1, argv + 1); printf("\nReturned from KGDB mode\n"); } diff --git a/cpu/mpc8260/Makefile b/cpu/mpc8260/Makefile index da540e1..b013d57 100644 --- a/cpu/mpc8260/Makefile +++ b/cpu/mpc8260/Makefile @@ -27,7 +27,7 @@ LIB = lib$(CPU).a START = start.o kgdb.o OBJS = traps.o serial_smc.o serial_scc.o cpu.o cpu_init.o speed.o \ - interrupts.o ether_scc.o ether_fcc.o i2c.o + interrupts.o ether_scc.o ether_fcc.o i2c.o commproc.o all: .depend $(START) $(LIB) diff --git a/cpu/mpc8260/commproc.c b/cpu/mpc8260/commproc.c new file mode 100644 index 0000000..a83c523 --- /dev/null +++ b/cpu/mpc8260/commproc.c @@ -0,0 +1,167 @@ +/* + * This file is based on "arch/ppc/8260_io/commproc.c" - here is it's + * copyright notice: + * + * General Purpose functions for the global management of the + * 8260 Communication Processor Module. + * Copyright (c) 1999 Dan Malek (dmalek@jlc.net) + * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com) + * 2.3.99 Updates + * + * In addition to the individual control of the communication + * channels, there are a few functions that globally affect the + * communication processor. + * + * Buffer descriptors must be allocated from the dual ported memory + * space. The allocator for that is here. When the communication + * process is reset, we reclaim the memory available. There is + * currently no deallocator for this memory. + */ +#include +#include + +/* + * because we have stack and init data in dual port ram + * we must reduce the size + */ +#undef CPM_DATAONLY_SIZE +#define CPM_DATAONLY_SIZE ((uint)(8 * 1024) - CPM_DATAONLY_BASE) + +void +m8260_cpm_reset(void) +{ + volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile ulong count; + /* Pointer to initial global data area */ + init_data_t *idata = + (init_data_t *)(CFG_INIT_RAM_ADDR+CFG_INIT_DATA_OFFSET); + + /* Reclaim the DP memory for our use. + */ + idata->dp_alloc_base = CPM_DATAONLY_BASE; + idata->dp_alloc_top = idata->dp_alloc_base + CPM_DATAONLY_SIZE; + + /* + * Reset CPM + */ + immr->im_cpm.cp_cpcr = CPM_CR_RST; + count = 0; + do { /* Spin until command processed */ + __asm__ __volatile__ ("eieio"); + } while ((immr->im_cpm.cp_cpcr & CPM_CR_FLG) && ++count < 1000000); + +#ifdef CONFIG_I2C + *((unsigned short*)(&immr->im_dprambase[PROFF_I2C_BASE])) = 0; +#endif +} + +/* Allocate some memory from the dual ported ram. + * To help protocols with object alignment restrictions, we do that + * if they ask. + */ +uint +m8260_cpm_dpalloc(uint size, uint align) +{ + uint retloc; + uint align_mask, off; + uint savebase; + /* Pointer to initial global data area */ + init_data_t *idata = + (init_data_t *)(CFG_INIT_RAM_ADDR+CFG_INIT_DATA_OFFSET); + + align_mask = align - 1; + savebase = idata->dp_alloc_base; + + if ((off = (idata->dp_alloc_base & align_mask)) != 0) + idata->dp_alloc_base += (align - off); + + if ((off = size & align_mask) != 0) + size += align - off; + + if ((idata->dp_alloc_base + size) >= idata->dp_alloc_top) { + idata->dp_alloc_base = savebase; + panic("m8260_cpm_dpalloc: ran out of dual port ram!"); + } + + retloc = idata->dp_alloc_base; + idata->dp_alloc_base += size; + + memset((void *)retloc, 0, size); + + return(retloc); +} + +/* We also own one page of host buffer space for the allocation of + * UART "fifos" and the like. + */ +uint +m8260_cpm_hostalloc(uint size, uint align) +{ + /* the host might not even have RAM yet - just use dual port RAM */ + return (m8260_cpm_dpalloc(size, align)); +} + +/* Set a baud rate generator. This needs lots of work. There are + * eight BRGs, which can be connected to the CPM channels or output + * as clocks. The BRGs are in two different block of internal + * memory mapped space. + * The baud rate clock is the system clock divided by something. + * It was set up long ago during the initial boot phase and is + * is given to us. + * Baud rate clocks are zero-based in the driver code (as that maps + * to port numbers). Documentation uses 1-based numbering. + */ +#define BRG_INT_CLK idata->brg_clk +#define BRG_UART_CLK ((BRG_INT_CLK + 15) / 16) + +/* This function is used by UARTS, or anything else that uses a 16x + * oversampled clock. + */ +void +m8260_cpm_setbrg(uint brg, uint rate) +{ + volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile uint *bp; + /* Pointer to initial global data area */ + init_data_t *idata = + (init_data_t *)(CFG_INIT_RAM_ADDR+CFG_INIT_DATA_OFFSET); + + /* This is good enough to get SMCs running..... + */ + if (brg < 4) { + bp = (uint *)&immr->im_brgc1; + } + else { + bp = (uint *)&immr->im_brgc5; + brg -= 4; + } + bp += brg; + *bp = (((((BRG_UART_CLK+rate-1)/rate)-1)&0xfff)<<1)|CPM_BRG_EN; +} + +/* This function is used to set high speed synchronous baud rate + * clocks. + */ +void +m8260_cpm_fastbrg(uint brg, uint rate, int div16) +{ + volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile uint *bp; + /* Pointer to initial global data area */ + init_data_t *idata = + (init_data_t *)(CFG_INIT_RAM_ADDR+CFG_INIT_DATA_OFFSET); + + /* This is good enough to get SMCs running..... + */ + if (brg < 4) { + bp = (uint *)&immr->im_brgc1; + } + else { + bp = (uint *)&immr->im_brgc5; + brg -= 4; + } + bp += brg; + *bp = (((((BRG_INT_CLK+rate-1)/rate)-1)&0xfff)<<1)|CPM_BRG_EN; + if (div16) + *bp |= CPM_BRG_DIV16; +} diff --git a/cpu/mpc8260/cpu.c b/cpu/mpc8260/cpu.c index e5b4f14..03e7b71 100644 --- a/cpu/mpc8260/cpu.c +++ b/cpu/mpc8260/cpu.c @@ -89,6 +89,8 @@ checkcpu(long clock) /* ------------------------------------------------------------------------- */ /* configures a UPM by writing into the UPM RAM array */ /* uses bank 11 and physical address 0x80000000 */ +/* NOTE: the physical address chosen must not overlap into any other area */ +/* mapped by the memory controller because bank 11 has the lowest priority */ void upmconfig(uint upm, uint *table, uint size) diff --git a/cpu/mpc8260/cpu_init.c b/cpu/mpc8260/cpu_init.c index e1b8df4..513c3ca 100644 --- a/cpu/mpc8260/cpu_init.c +++ b/cpu/mpc8260/cpu_init.c @@ -85,18 +85,12 @@ void cpu_init_f (volatile immap_t *immr) { volatile memctl8260_t *memctl = &immr->im_memctl; - volatile ulong count; init_data_t *idata = \ (init_data_t *)(CFG_INIT_RAM_ADDR + CFG_INIT_DATA_OFFSET); + extern void m8260_cpm_reset(void); -#if !defined(CONFIG_COGENT) /* done in start.S for the cogent */ - /* SYPCR - contains watchdog control (11-9) */ - immr->im_siu_conf.sc_sypcr = CFG_SYPCR; -#endif /* !CONFIG_COGENT */ - -#if defined(CONFIG_WATCHDOG) - reset_8260_watchdog(immr); -#endif /* CONFIG_WATCHDOG */ + /* clear the initial data area */ + memset((void *)idata, 0, CFG_INIT_DATA_SIZE); /* RSR - Reset Status Register - clear all status (5-4) */ idata->reset_status = immr->im_clkrst.car_rsr; @@ -168,15 +162,8 @@ cpu_init_f (volatile immap_t *immr) memctl->memc_or5 = CFG_OR5_PRELIM; memctl->memc_br5 = CFG_BR5_PRELIM; #endif - - /* - * Reset CPM - */ - immr->im_cpm.cp_cpcr = CPM_CR_RST; - count = 0; - do { /* Spin until command processed */ - __asm__ __volatile__ ("eieio"); - } while ((immr->im_cpm.cp_cpcr & CPM_CR_FLG) && ++count < 1000000); + + m8260_cpm_reset(); } /* @@ -212,12 +199,16 @@ prt_8260_rsr(void) (init_data_t *)(CFG_INIT_RAM_ADDR + CFG_INIT_DATA_OFFSET); ulong rsr = idata->reset_status; int i; + char *sep; - printf("MPC8260 Reset Status\n"); + printf("MPC8260 Reset Status:"); + sep = " "; for (i = 0; i < n; i++) - if (rsr & bits[i].mask) - printf(" - %s Reset\n", bits[i].desc); + if (rsr & bits[i].mask) { + printf("%s%s", sep, bits[i].desc); + sep = ", "; + } - printf("\n"); + printf("\n\n"); } diff --git a/cpu/mpc8260/ether_fcc.c b/cpu/mpc8260/ether_fcc.c index 38613fa..b4a447f 100644 --- a/cpu/mpc8260/ether_fcc.c +++ b/cpu/mpc8260/ether_fcc.c @@ -54,6 +54,19 @@ #define CPM_CR_ENET_SBLOCK CPM_CR_FCC1_SBLOCK #define CPM_CR_ENET_SBLOCK CPM_CR_FCC1_SBLOCK #define CPM_CR_ENET_PAGE CPM_CR_FCC1_PAGE +#if defined(CONFIG_HYMOD) +/* + * Attention: this is board-specific + * - Rx-CLK is CLK10 + * - Tx-CLK is CLK11 + * - RAM for BD/Buffers is on the 60x Bus (see 28-13) + * - Enable Full Duplex in FSMR + */ +#define CMXFCR_MASK (CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK) +#define CMXFCR_VALUE (CMXFCR_RF1CS_CLK10|CMXFCR_TF1CS_CLK11) +#define CPMFCR_RAMTYPE 0 +#define FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB) +#endif #elif (CONFIG_ETHER_INDEX == 2) @@ -73,12 +86,38 @@ #define CPMFCR_RAMTYPE (0) #define FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB) #endif +#if defined(CONFIG_HYMOD) +/* + * Attention: this is board-specific + * - Rx-CLK is CLK13 + * - Tx-CLK is CLK14 + * - RAM for BD/Buffers is on the 60x Bus (see 28-13) + * - Enable Full Duplex in FSMR + */ +#define CMXFCR_MASK (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK) +#define CMXFCR_VALUE (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14) +#define CPMFCR_RAMTYPE 0 +#define FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB) +#endif #elif (CONFIG_ETHER_INDEX == 3) #define PROFF_ENET PROFF_FCC3 #define CPM_CR_ENET_SBLOCK CPM_CR_FCC3_SBLOCK #define CPM_CR_ENET_PAGE CPM_CR_FCC3_PAGE +#if defined(CONFIG_HYMOD) +/* + * Attention: this is board-specific + * - Rx-CLK is CLK15 + * - Tx-CLK is CLK16 + * - RAM for BD/Buffers is on the 60x Bus (see 28-13) + * - Enable Full Duplex in FSMR + */ +#define CMXFCR_MASK (CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK) +#define CMXFCR_VALUE (CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16) +#define CPMFCR_RAMTYPE 0 +#define FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB) +#endif #else #error "FCC Ethernet not correctly defined" @@ -218,8 +257,7 @@ int eth_init(bd_t *bis) /* 28.9 - (3): connect FCC's tx and rx clocks */ immr->im_cpmux.cmx_uar = 0; - immr->im_cpmux.cmx_fcr &= ~CMXFCR_MASK; - immr->im_cpmux.cmx_fcr |= CMXFCR_VALUE; + immr->im_cpmux.cmx_fcr = (immr->im_cpmux.cmx_fcr&~CMXFCR_MASK)|CMXFCR_VALUE; /* 28.9 - (4): GFMR: disable tx/rx, CCITT CRC, Mode Ethernet */ immr->im_fcc[CONFIG_ETHER_INDEX-1].fcc_gfmr = diff --git a/cpu/mpc8260/i2c.c b/cpu/mpc8260/i2c.c index f6bddc3..32a34b7 100644 --- a/cpu/mpc8260/i2c.c +++ b/cpu/mpc8260/i2c.c @@ -32,7 +32,7 @@ #include /* define to enable debug messages */ -#undef DEBUG_STEP +#define DEBUG_I2C /* us to wait before checking the i2c */ #define DELAY_US 100000 @@ -53,7 +53,7 @@ typedef struct I2C_BD } I2C_BD; #define BD_I2C_TX_START 0x0400 /* special status for i2c: Start condition */ -#ifdef DEBUG_STEP +#ifdef DEBUG_I2C #define PRINTD(x) printf x #else #define PRINTD(x) @@ -65,21 +65,32 @@ typedef struct I2C_BD * It returns computer speed value and the difference between it and desired * speed. */ -static inline int i2c_roundrate(int hz, int speed, int filter, int modval, - int *brgval, int *totspeed) +static inline int +i2c_roundrate(int hz, int speed, int filter, int modval, + int *brgval, int *totspeed) { int moddiv = 1 << (5-(modval & 3)), brgdiv, div; - - brgdiv = hz / (moddiv * speed); - *brgval = brgdiv / 2 - 3 - 2*filter; + PRINTD(("\t[I2C] trying hz=%d, speed=%d, filter=%d, modval=%d\n", + hz, speed, filter, modval)); + + div = moddiv * speed; + brgdiv = (hz + div - 1) / div; + + PRINTD(("\t\tmoddiv=%d, brgdiv=%d\n", moddiv, brgdiv)); + + *brgval = (brgdiv / 2) - 3 - (2*filter); - if ((*brgval < 0) || (*brgval > 255)) + if ((*brgval < 0) || (*brgval > 255)) { + PRINTD(("\t\trejected brgval=%d\n", *brgval)); return -1; + } - brgdiv = 2 * (*brgval + 3 + 2 * filter); + brgdiv = 2 * (*brgval + 3 + (2 * filter)); div = moddiv * brgdiv ; - *totspeed = hz / div; + *totspeed = (hz + div - 1) / div; + + PRINTD(("\t\taccepted brgval=%d, totspeed=%d\n", *brgval, *totspeed)); return 0; } @@ -139,23 +150,30 @@ void i2c_init(int speed, int slaveaddr) volatile iic_t *iip; ulong rbase, tbase; volatile I2C_BD *rxbd, *txbd; + uint dpaddr; + + dpaddr = *((unsigned short*)(&immap->im_dprambase[PROFF_I2C_BASE])); + if (dpaddr == 0) { + /* need to allocate dual port ram */ + dpaddr = m8260_cpm_dpalloc(64 + + (NUM_RX_BDS * sizeof(I2C_BD)) + (NUM_TX_BDS * sizeof(I2C_BD)) + + MAX_TX_SPACE, 8); + *((unsigned short*)(&immap->im_dprambase[PROFF_I2C_BASE])) = dpaddr; + } /* * initialise data in dual port ram: * - * BD_IIC_START -> parameter ram (64 bytes) + * dpaddr -> parameter ram (64 bytes) * rbase -> rx BD (NUM_RX_BDS * sizeof(I2C_BD) bytes) * tbase -> tx BD (NUM_TX_BDS * sizeof(I2C_BD) bytes) * tx buffer (MAX_TX_SPACE bytes) */ - - /* locate i2c parameter ram at BD_IIC_START */ - iip = (iic_t *)&immap->im_dprambase[BD_IIC_START]; - *((unsigned short*)(&immap->im_dprambase[PROFF_I2C_BASE])) = BD_IIC_START; + iip = (iic_t *)&immap->im_dprambase[dpaddr]; memset((void*)iip, 0, sizeof(iic_t)); - rbase = BD_IIC_START+64; + rbase = dpaddr + 64; tbase = rbase + NUM_RX_BDS * sizeof(I2C_BD); /* Disable interrupts */ @@ -210,10 +228,12 @@ void i2c_newio(i2c_state_t *state) { volatile immap_t *immap = (immap_t *)CFG_IMMR ; volatile iic_t *iip; + uint dpaddr; PRINTD(("[I2C] i2c_newio\n")); - iip = (iic_t *)&immap->im_dprambase[BD_IIC_START]; + dpaddr = *((unsigned short*)(&immap->im_dprambase[PROFF_I2C_BASE])); + iip = (iic_t *)&immap->im_dprambase[dpaddr]; state->rx_idx = 0; state->tx_idx = 0; state->rxbd = (void*)&immap->im_dprambase[iip->iic_rbase]; @@ -260,7 +280,6 @@ int i2c_send(i2c_state_t *state, { txbd->length = size + 2; /* Length of message plus dest addresses */ txbd->addr[0] = address << 1; - txbd->addr[0] &= ~(0x01); txbd->addr[1] = secondary_address; i = 2; } @@ -268,7 +287,6 @@ int i2c_send(i2c_state_t *state, { txbd->length = size + 1; /* Length of message plus dest address */ txbd->addr[0] = address << 1; /* Write destination address to BD */ - txbd->addr[0] &= ~(0x01); /* Set address to write */ i = 1; } @@ -383,16 +401,20 @@ int i2c_doio(i2c_state_t *state) { volatile immap_t *immap = (immap_t *)CFG_IMMR ; volatile iic_t *iip; - volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c; + volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c; volatile I2C_BD *txbd, *rxbd; volatile int j = 0; + uint dpaddr; PRINTD(("[I2C] i2c_doio\n")); - txbd = ((I2C_BD*)state->txbd) - 1; - rxbd = ((I2C_BD*)state->rxbd) - 1; + if (state->tx_idx <= 0 && state->rx_idx <= 0) { + PRINTD(("[I2C] No I/O is queued\n")); + return I2CERR_QUEUE_EMPTY; + } - iip = (iic_t *)&immap->im_dprambase[BD_IIC_START]; + dpaddr = *((unsigned short*)(&immap->im_dprambase[PROFF_I2C_BASE])); + iip = (iic_t *)&immap->im_dprambase[dpaddr]; iip->iic_rbptr = iip->iic_rbase; iip->iic_tbptr = iip->iic_tbase; @@ -408,15 +430,35 @@ int i2c_doio(i2c_state_t *state) ; /* Loop until transmit & receive completed */ - PRINTD(("[I2C] Transmitting...\n")); - while((txbd->status & BD_SC_READY) && (j < TOUT_LOOP)) - j++; - if (j < TOUT_LOOP) - { - PRINTD(("[I2C] Receiving...\n")); - while((rxbd->status & BD_SC_EMPTY) && (j < TOUT_LOOP)) - j++; + if (state->tx_idx > 0) { + txbd = ((I2C_BD*)state->txbd) - 1; + PRINTD(("[I2C] Transmitting...(txbd=0x%08lx)\n", (ulong)txbd)); + while((txbd->status & BD_SC_READY) && (j++ < TOUT_LOOP)) { + if (tstc()) { + switch (getc()) { + case '\0': + case 0x03: /* ^C - Control C */ + return (-1); + } + } + __asm__ __volatile__ ("eieio"); + } + } + + if ((state->rx_idx > 0) && (j < TOUT_LOOP)) { + rxbd = ((I2C_BD*)state->rxbd) - 1; + PRINTD(("[I2C] Receiving...(rxbd=0x%08lx)\n", (ulong)rxbd)); + while((rxbd->status & BD_SC_EMPTY) && (j++ < TOUT_LOOP)) { + if (tstc()) { + switch (getc()) { + case '\0': + case 0x03: /* ^C - Control C */ + return (-1); + } + } + __asm__ __volatile__ ("eieio"); + } } /* Turn off I2C */ diff --git a/cpu/mpc8260/interrupts.c b/cpu/mpc8260/interrupts.c index 5727c2f..af29580 100644 --- a/cpu/mpc8260/interrupts.c +++ b/cpu/mpc8260/interrupts.c @@ -199,7 +199,7 @@ interrupt_init(bd_t *bd) /* Pointer to initial global data area */ init_data_t *idata = (init_data_t *)(CFG_INIT_RAM_ADDR + CFG_INIT_DATA_OFFSET); - decrementer_count = (idata->cpu_clk / 4) / CFG_HZ; + decrementer_count = (idata->bus_clk / 4) / CFG_HZ; /* Initialize the default interrupt mapping priorities */ immr->im_intctl.ic_sicr = 0; @@ -298,7 +298,7 @@ volatile ulong timestamp = 0; void timer_interrupt(struct pt_regs *regs) { -#if defined(CONFIG_WATCHDOG) +#if defined(CONFIG_WATCHDOG) || defined(CFG_HYMOD_DBLEDS) volatile immap_t *immr = (immap_t *)CFG_IMMR; #endif /* CONFIG_WATCHDOG */ @@ -307,18 +307,33 @@ timer_interrupt(struct pt_regs *regs) timestamp++; -#if defined(CONFIG_WATCHDOG) || defined(CFG_CMA_LCD_HEARTBEAT) +#if defined(CONFIG_WATCHDOG) || \ + defined(CFG_CMA_LCD_HEARTBEAT) || \ + defined(CFG_HYMOD_DBLEDS) - if ((timestamp % 1000) == 0) { + if ((timestamp % CFG_HZ) == 0) { #if defined(CFG_CMA_LCD_HEARTBEAT) extern void lcd_heartbeat(void); +#endif /* CFG_CMA_LCD_HEARTBEAT */ +#if defined(CFG_HYMOD_DBLEDS) + volatile iop8260_t *iop = &immr->im_ioport; + static int shift = 0; +#endif /* CFG_HYMOD_DBLEDS */ +#if defined(CFG_CMA_LCD_HEARTBEAT) lcd_heartbeat(); #endif /* CFG_CMA_LCD_HEARTBEAT */ #if defined(CONFIG_WATCHDOG) reset_8260_watchdog(immr); #endif /* CONFIG_WATCHDOG */ + +#if defined(CFG_HYMOD_DBLEDS) + /* hymod daughter board LEDs */ + if (++shift > 3) + shift = 0; + iop->iop_pdatd = (iop->iop_pdatd & ~0x0f000000) | (1 << (24 + shift)); +#endif /* CFG_HYMOD_DBLEDS */ } #endif /* CONFIG_WATCHDOG || CFG_CMA_LCD_HEARTBEAT */ diff --git a/cpu/mpc8260/serial_scc.c b/cpu/mpc8260/serial_scc.c index 37095a2..a2416a6 100644 --- a/cpu/mpc8260/serial_scc.c +++ b/cpu/mpc8260/serial_scc.c @@ -50,7 +50,7 @@ #define PROFF_SCC PROFF_SCC2 #define CMXSCR_MASK (CMXSCR_GR2|CMXSCR_SC2|\ CMXSCR_RS2CS_MSK|CMXSCR_TS2CS_MSK) -#define CMXSCR_VALUE (CMXSCR_RS2CS_BRG1|CMXSCR_TS2CS_BRG1) +#define CMXSCR_VALUE (CMXSCR_RS2CS_BRG2|CMXSCR_TS2CS_BRG2) #define CPM_CR_SCC_PAGE CPM_CR_SCC2_PAGE #define CPM_CR_SCC_SBLOCK CPM_CR_SCC2_SBLOCK @@ -60,7 +60,7 @@ #define PROFF_SCC PROFF_SCC3 #define CMXSCR_MASK (CMXSCR_GR3|CMXSCR_SC3|\ CMXSCR_RS3CS_MSK|CMXSCR_TS3CS_MSK) -#define CMXSCR_VALUE (CMXSCR_RS3CS_BRG1|CMXSCR_TS3CS_BRG1) +#define CMXSCR_VALUE (CMXSCR_RS3CS_BRG3|CMXSCR_TS3CS_BRG3) #define CPM_CR_SCC_PAGE CPM_CR_SCC3_PAGE #define CPM_CR_SCC_SBLOCK CPM_CR_SCC3_SBLOCK @@ -70,7 +70,7 @@ #define PROFF_SCC PROFF_SCC4 #define CMXSCR_MASK (CMXSCR_GR4|CMXSCR_SC4|\ CMXSCR_RS4CS_MSK|CMXSCR_TS4CS_MSK) -#define CMXSCR_VALUE (CMXSCR_RS4CS_BRG1|CMXSCR_TS4CS_BRG1) +#define CMXSCR_VALUE (CMXSCR_RS4CS_BRG4|CMXSCR_TS4CS_BRG4) #define CPM_CR_SCC_PAGE CPM_CR_SCC4_PAGE #define CPM_CR_SCC_SBLOCK CPM_CR_SCC4_SBLOCK @@ -99,17 +99,20 @@ serial_init (ulong cpu_clock, int baudrate) */ sp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); + /* put the SCC channel into NMSI (non multiplexd serial interface) + * mode and wire the selected SCC Tx and Rx clocks to BRGx (15-15). + */ + im->im_cpmux.cmx_scr = (im->im_cpmux.cmx_scr&~CMXSCR_MASK)|CMXSCR_VALUE; + /* Set up the baud rate generator. */ serial_setbrg (cpu_clock, baudrate); /* Allocate space for two buffer descriptors in the DP ram. - * For now, this address seems OK, but it may have to - * change with newer versions of the firmware. * damm: allocating space after the two buffers for rx/tx data */ - dpaddr = 0x800; + dpaddr = m8260_cpm_dpalloc((2 * sizeof (cbd_t)) + 2, 16); /* Set the physical address of the host memory buffers in * the buffer descriptors. @@ -177,27 +180,7 @@ serial_init (ulong cpu_clock, int baudrate) void serial_setbrg (ulong cpu_clock, int baudrate) { - volatile immap_t *im = (immap_t *)CFG_IMMR; - init_data_t *idata = - (init_data_t *)(CFG_INIT_RAM_ADDR+CFG_INIT_DATA_OFFSET); - ulong i; - - /* put the SCC channel into NMSI (non multiplexd serial interface) - * mode and wire the selected SCC Tx and Rx clocks to BRG1 (15-15). - */ - im->im_cpmux.cmx_scr = (im->im_cpmux.cmx_scr&~CMXSCR_MASK)|CMXSCR_VALUE; - - /* configure baud rate generator 1 (16-2). - * the uart must be configured for 16x oversampling (hence the - * divide by 16 below). I also round all divisions, rather than - * truncate - hopefully that will provide a slightly more accurate - * clock divider. - */ - i = (idata->brg_clk + 15) / 16; - - i = (i + baudrate - 1) / baudrate; - - im->im_brgc1 = (((i - 1) & 0xfff) << 1) | CPM_BRG_EN; + m8260_cpm_setbrg(SCC_INDEX, baudrate); } void @@ -274,3 +257,229 @@ serial_tstc() } #endif /* CONFIG_CONS_ON_SCC */ + +#if defined(CONFIG_KGDB_ON_SCC) + +#if defined(CONFIG_CONS_ON_SCC) && CONFIG_KGDB_INDEX == CONFIG_CONS_INDEX +#error Whoops! serial console and kgdb are on the same scc serial port +#endif + +#if CONFIG_KGDB_INDEX == 1 /* KGDB Port on SCC1 */ + +#define KGDB_SCC_INDEX 0 +#define KGDB_PROFF_SCC PROFF_SCC1 +#define KGDB_CMXSCR_MASK (CMXSCR_GR1|CMXSCR_SC1|\ + CMXSCR_RS1CS_MSK|CMXSCR_TS1CS_MSK) +#define KGDB_CMXSCR_VALUE (CMXSCR_RS1CS_BRG1|CMXSCR_TS1CS_BRG1) +#define KGDB_CPM_CR_SCC_PAGE CPM_CR_SCC1_PAGE +#define KGDB_CPM_CR_SCC_SBLOCK CPM_CR_SCC1_SBLOCK + +#elif CONFIG_KGDB_INDEX == 2 /* KGDB Port on SCC2 */ + +#define KGDB_SCC_INDEX 1 +#define KGDB_PROFF_SCC PROFF_SCC2 +#define KGDB_CMXSCR_MASK (CMXSCR_GR2|CMXSCR_SC2|\ + CMXSCR_RS2CS_MSK|CMXSCR_TS2CS_MSK) +#define KGDB_CMXSCR_VALUE (CMXSCR_RS2CS_BRG2|CMXSCR_TS2CS_BRG2) +#define KGDB_CPM_CR_SCC_PAGE CPM_CR_SCC2_PAGE +#define KGDB_CPM_CR_SCC_SBLOCK CPM_CR_SCC2_SBLOCK + +#elif CONFIG_KGDB_INDEX == 3 /* KGDB Port on SCC3 */ + +#define KGDB_SCC_INDEX 2 +#define KGDB_PROFF_SCC PROFF_SCC3 +#define KGDB_CMXSCR_MASK (CMXSCR_GR3|CMXSCR_SC3|\ + CMXSCR_RS3CS_MSK|CMXSCR_TS3CS_MSK) +#define KGDB_CMXSCR_VALUE (CMXSCR_RS3CS_BRG3|CMXSCR_TS3CS_BRG3) +#define KGDB_CPM_CR_SCC_PAGE CPM_CR_SCC3_PAGE +#define KGDB_CPM_CR_SCC_SBLOCK CPM_CR_SCC3_SBLOCK + +#elif CONFIG_KGDB_INDEX == 4 /* KGDB Port on SCC4 */ + +#define KGDB_SCC_INDEX 3 +#define KGDB_PROFF_SCC PROFF_SCC4 +#define KGDB_CMXSCR_MASK (CMXSCR_GR4|CMXSCR_SC4|\ + CMXSCR_RS4CS_MSK|CMXSCR_TS4CS_MSK) +#define KGDB_CMXSCR_VALUE (CMXSCR_RS4CS_BRG4|CMXSCR_TS4CS_BRG4) +#define KGDB_CPM_CR_SCC_PAGE CPM_CR_SCC4_PAGE +#define KGDB_CPM_CR_SCC_SBLOCK CPM_CR_SCC4_SBLOCK + +#else + +#error "kgdb serial port not correctly defined" + +#endif + +void +kgdb_serial_init (void) +{ + volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile scc_t *sp; + volatile scc_uart_t *up; + volatile cbd_t *tbdf, *rbdf; + volatile cpm8260_t *cp = &(im->im_cpm); + uint dpaddr, speed = CONFIG_KGDB_BAUDRATE; + char *s, *e; + + if ((s = getenv("kgdbrate")) != NULL && *s != '\0') { + ulong rate = simple_strtoul(s, &e, 10); + if (e > s && *e == '\0') + speed = rate; + } + + /* initialize pointers to SCC */ + + sp = (scc_t *) &(im->im_scc[KGDB_SCC_INDEX]); + up = (scc_uart_t *)&im->im_dprambase[KGDB_PROFF_SCC]; + + /* Disable transmitter/receiver. + */ + sp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); + + /* put the SCC channel into NMSI (non multiplexd serial interface) + * mode and wire the selected SCC Tx and Rx clocks to BRGx (15-15). + */ + im->im_cpmux.cmx_scr = \ + (im->im_cpmux.cmx_scr & ~KGDB_CMXSCR_MASK) | KGDB_CMXSCR_VALUE; + + /* Set up the baud rate generator. + */ + m8260_cpm_setbrg(KGDB_SCC_INDEX, speed); + + /* Allocate space for two buffer descriptors in the DP ram. + * damm: allocating space after the two buffers for rx/tx data + */ + + dpaddr = m8260_cpm_dpalloc((2 * sizeof (cbd_t)) + 2, 16); + + /* Set the physical address of the host memory buffers in + * the buffer descriptors. + */ + rbdf = (cbd_t *)&im->im_dprambase[dpaddr]; + rbdf->cbd_bufaddr = (uint) (rbdf+2); + rbdf->cbd_sc = BD_SC_EMPTY | BD_SC_WRAP; + tbdf = rbdf + 1; + tbdf->cbd_bufaddr = ((uint) (rbdf+2)) + 1; + tbdf->cbd_sc = BD_SC_WRAP; + + /* Set up the uart parameters in the parameter ram. + */ + up->scc_genscc.scc_rbase = dpaddr; + up->scc_genscc.scc_tbase = dpaddr+sizeof(cbd_t); + up->scc_genscc.scc_rfcr = CPMFCR_EB; + up->scc_genscc.scc_tfcr = CPMFCR_EB; + up->scc_genscc.scc_mrblr = 1; + up->scc_maxidl = 0; + up->scc_brkcr = 1; + up->scc_parec = 0; + up->scc_frmec = 0; + up->scc_nosec = 0; + up->scc_brkec = 0; + up->scc_uaddr1 = 0; + up->scc_uaddr2 = 0; + up->scc_toseq = 0; + up->scc_char1 = up->scc_char2 = up->scc_char3 = up->scc_char4 = 0x8000; + up->scc_char5 = up->scc_char6 = up->scc_char7 = up->scc_char8 = 0x8000; + up->scc_rccm = 0xc0ff; + + /* Mask all interrupts and remove anything pending. + */ + sp->scc_sccm = 0; + sp->scc_scce = 0xffff; + + /* Set 8 bit FIFO, 16 bit oversampling and UART mode. + */ + sp->scc_gsmrh = SCC_GSMRH_RFW; /* 8 bit FIFO */ + sp->scc_gsmrl = \ + SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16 | SCC_GSMRL_MODE_UART; + + /* Set CTS flow control, 1 stop bit, 8 bit character length, + * normal async UART mode, no parity + */ + sp->scc_psmr = SCU_PSMR_FLC | SCU_PSMR_CL; + + /* execute the "Init Rx and Tx params" CP command. + */ + + while (cp->cp_cpcr & CPM_CR_FLG) /* wait if cp is busy */ + ; + + cp->cp_cpcr = mk_cr_cmd(KGDB_CPM_CR_SCC_PAGE, KGDB_CPM_CR_SCC_SBLOCK, + 0, CPM_CR_INIT_TRX) | CPM_CR_FLG; + + while (cp->cp_cpcr & CPM_CR_FLG) /* wait if cp is busy */ + ; + + /* Enable transmitter/receiver. + */ + sp->scc_gsmrl |= SCC_GSMRL_ENR | SCC_GSMRL_ENT; + + printf("SCC%d at %dbps ", CONFIG_KGDB_INDEX, speed); +} + +void +putDebugChar(const char c) +{ + volatile scc_uart_t *up; + volatile cbd_t *tbdf; + volatile immap_t *im; + + if (c == '\n') + putDebugChar ('\r'); + + im = (immap_t *)CFG_IMMR; + up = (scc_uart_t *)&im->im_dprambase[KGDB_PROFF_SCC]; + tbdf = (cbd_t *)&im->im_dprambase[up->scc_genscc.scc_tbase]; + + /* Wait for last character to go. + */ + while (tbdf->cbd_sc & BD_SC_READY) + ; + + /* Load the character into the transmit buffer. + */ + *(volatile char *)tbdf->cbd_bufaddr = c; + tbdf->cbd_datlen = 1; + tbdf->cbd_sc |= BD_SC_READY; +} + +void +putDebugStr (const char *s) +{ + while (*s) { + putDebugChar (*s++); + } +} + +int +getDebugChar(void) +{ + volatile cbd_t *rbdf; + volatile scc_uart_t *up; + volatile immap_t *im; + unsigned char c; + + im = (immap_t *)CFG_IMMR; + up = (scc_uart_t *)&im->im_dprambase[KGDB_PROFF_SCC]; + rbdf = (cbd_t *)&im->im_dprambase[up->scc_genscc.scc_rbase]; + + /* Wait for character to show up. + */ + while (rbdf->cbd_sc & BD_SC_EMPTY) + ; + + /* Grab the char and clear the buffer again. + */ + c = *(volatile unsigned char *)rbdf->cbd_bufaddr; + rbdf->cbd_sc |= BD_SC_EMPTY; + + return (c); +} + +void +kgdb_interruptible(int yes) +{ + return; +} + +#endif /* CONFIG_KGDB_ON_SCC */ diff --git a/cpu/mpc8260/serial_smc.c b/cpu/mpc8260/serial_smc.c index c0ca57b..a49d467 100644 --- a/cpu/mpc8260/serial_smc.c +++ b/cpu/mpc8260/serial_smc.c @@ -69,7 +69,6 @@ serial_init (ulong cpu_clock, int baudrate) volatile smc_t *sp; volatile smc_uart_t *up; volatile cbd_t *tbdf, *rbdf; - volatile iop8260_t *io = &im->im_ioport; volatile cpm8260_t *cp = &(im->im_cpm); uint dpaddr; @@ -83,29 +82,13 @@ serial_init (ulong cpu_clock, int baudrate) */ sp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); -#if CONFIG_CONS_INDEX == 1 - /* Use Port D (PD8 & PD9) for SMC1 instead of other functions. - */ - io->iop_ppard |= 0x00c00000; - io->iop_pdird |= 0x00400000; - io->iop_pdird &= ~0x00800000; - io->iop_psord &= ~0x00c00000; -#else - /* Use Port A (PA8 & PA9) for SMC2 instead of other functions. - */ - io->iop_ppard |= 0x00c00000; - io->iop_pdird |= 0x00400000; - io->iop_pdird &= ~0x00800000; - io->iop_psord &= ~0x00c00000; -#endif + /* NOTE: I/O port pins are set up via the iop_conf_tab[] table */ /* Allocate space for two buffer descriptors in the DP ram. - * For now, this address seems OK, but it may have to - * change with newer versions of the firmware. * damm: allocating space after the two buffers for rx/tx data */ - dpaddr = 0x800; + dpaddr = m8260_cpm_dpalloc((2 * sizeof (cbd_t)) + 2, 16); /* Set the physical address of the host memory buffers in * the buffer descriptors. @@ -137,6 +120,11 @@ serial_init (ulong cpu_clock, int baudrate) sp->smc_smcm = 0; sp->smc_smce = 0xff; + /* put the SMC channel into NMSI (non multiplexd serial interface) + * mode and wire either BRG1 to SMC1 or BRG2 to SMC2 (15-17). + */ + im->im_cpmux.cmx_smr = (im->im_cpmux.cmx_smr&~CMXSMR_MASK)|CMXSMR_VALUE; + /* Set up the baud rate generator. */ serial_setbrg (cpu_clock, baudrate); @@ -171,33 +159,7 @@ serial_init (ulong cpu_clock, int baudrate) void serial_setbrg (ulong cpu_clock, int baudrate) { - volatile immap_t *im = (immap_t *)CFG_IMMR; - init_data_t *idata = - (init_data_t *)(CFG_INIT_RAM_ADDR+CFG_INIT_DATA_OFFSET); - ulong i; - - /* put the SMC channel into NMSI (non multiplexd serial interface) - * mode and wire either BRG1 to SMC1 or BRG2 to SMC2 (15-17). - */ - im->im_cpmux.cmx_smr = (im->im_cpmux.cmx_smr&~CMXSMR_MASK)|CMXSMR_VALUE; - - /* configure the appropriate baud rate generator (16-2). - * the uart must be configured for 16x oversampling (hence the - * divide by 16 below). I also round all divisions, rather than - * truncate - hopefully that will provide a slightly more accurate - * clock divider. - */ - i = (idata->brg_clk + 15) / 16; - - i = (i + baudrate - 1) / baudrate; - - i = (((i - 1) & 0xfff) << 1) | CPM_BRG_EN; - -#if CONFIG_CONS_INDEX == 1 - im->im_brgc1 = i; /* Console on SMC1 */ -#else - im->im_brgc2 = i; /* Console on SMC2 */ -#endif + m8260_cpm_setbrg(SMC_INDEX, baudrate); } void @@ -273,3 +235,205 @@ serial_tstc() } #endif /* CONFIG_CONS_ON_SMC */ + +#if defined(CONFIG_KGDB_ON_SMC) + +#if defined(CONFIG_CONS_ON_SMC) && CONFIG_KGDB_INDEX == CONFIG_CONS_INDEX +#error Whoops! serial console and kgdb are on the same smc serial port +#endif + +#if CONFIG_KGDB_INDEX == 1 /* KGDB Port on SMC1 */ + +#define KGDB_SMC_INDEX 0 +#define KGDB_PROFF_SMC_BASE PROFF_SMC1_BASE +#define KGDB_PROFF_SMC PROFF_SMC1 +#define KGDB_CPM_CR_SMC_PAGE CPM_CR_SMC1_PAGE +#define KGDB_CPM_CR_SMC_SBLOCK CPM_CR_SMC1_SBLOCK +#define KGDB_CMXSMR_MASK (CMXSMR_SMC1|CMXSMR_SMC1CS_MSK) +#define KGDB_CMXSMR_VALUE CMXSMR_SMC1CS_BRG1 + +#elif CONFIG_KGDB_INDEX == 2 /* KGDB Port on SMC2 */ + +#define KGDB_SMC_INDEX 1 +#define KGDB_PROFF_SMC_BASE PROFF_SMC2_BASE +#define KGDB_PROFF_SMC PROFF_SMC2 +#define KGDB_CPM_CR_SMC_PAGE CPM_CR_SMC2_PAGE +#define KGDB_CPM_CR_SMC_SBLOCK CPM_CR_SMC2_SBLOCK +#define KGDB_CMXSMR_MASK (CMXSMR_SMC2|CMXSMR_SMC2CS_MSK) +#define KGDB_CMXSMR_VALUE CMXSMR_SMC2CS_BRG2 + +#else + +#error "console not correctly defined" + +#endif + +void +kgdb_serial_init (void) +{ + volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile smc_t *sp; + volatile smc_uart_t *up; + volatile cbd_t *tbdf, *rbdf; + volatile cpm8260_t *cp = &(im->im_cpm); + uint dpaddr, speed = CONFIG_KGDB_BAUDRATE; + char *s, *e; + + if ((s = getenv("kgdbrate")) != NULL && *s != '\0') { + ulong rate = simple_strtoul(s, &e, 10); + if (e > s && *e == '\0') + speed = rate; + } + + /* initialize pointers to SMC */ + + sp = (smc_t *) &(im->im_smc[KGDB_SMC_INDEX]); + *(ushort *)(&im->im_dprambase[KGDB_PROFF_SMC_BASE]) = KGDB_PROFF_SMC; + up = (smc_uart_t *)&im->im_dprambase[KGDB_PROFF_SMC]; + + /* Disable transmitter/receiver. + */ + sp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); + + /* NOTE: I/O port pins are set up via the iop_conf_tab[] table */ + + /* Allocate space for two buffer descriptors in the DP ram. + * damm: allocating space after the two buffers for rx/tx data + */ + + dpaddr = m8260_cpm_dpalloc((2 * sizeof (cbd_t)) + 2, 16); + + /* Set the physical address of the host memory buffers in + * the buffer descriptors. + */ + rbdf = (cbd_t *)&im->im_dprambase[dpaddr]; + rbdf->cbd_bufaddr = (uint) (rbdf+2); + rbdf->cbd_sc = 0; + tbdf = rbdf + 1; + tbdf->cbd_bufaddr = ((uint) (rbdf+2)) + 1; + tbdf->cbd_sc = 0; + + /* Set up the uart parameters in the parameter ram. + */ + up->smc_rbase = dpaddr; + up->smc_tbase = dpaddr+sizeof(cbd_t); + up->smc_rfcr = CPMFCR_EB; + up->smc_tfcr = CPMFCR_EB; + up->smc_brklen = 0; + up->smc_brkec = 0; + up->smc_brkcr = 0; + + /* Set UART mode, 8 bit, no parity, one stop. + * Enable receive and transmit. + */ + sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART; + + /* Mask all interrupts and remove anything pending. + */ + sp->smc_smcm = 0; + sp->smc_smce = 0xff; + + /* put the SMC channel into NMSI (non multiplexd serial interface) + * mode and wire either BRG1 to SMC1 or BRG2 to SMC2 (15-17). + */ + im->im_cpmux.cmx_smr = + (im->im_cpmux.cmx_smr & ~KGDB_CMXSMR_MASK) | KGDB_CMXSMR_VALUE; + + /* Set up the baud rate generator. + */ + m8260_cpm_setbrg(KGDB_SMC_INDEX, speed); + + /* Make the first buffer the only buffer. + */ + tbdf->cbd_sc |= BD_SC_WRAP; + rbdf->cbd_sc |= BD_SC_EMPTY | BD_SC_WRAP; + + /* Single character receive. + */ + up->smc_mrblr = 1; + up->smc_maxidl = 0; + + /* Initialize Tx/Rx parameters. + */ + + while (cp->cp_cpcr & CPM_CR_FLG) /* wait if cp is busy */ + ; + + cp->cp_cpcr = mk_cr_cmd(KGDB_CPM_CR_SMC_PAGE, KGDB_CPM_CR_SMC_SBLOCK, + 0, CPM_CR_INIT_TRX) | CPM_CR_FLG; + + while (cp->cp_cpcr & CPM_CR_FLG) /* wait if cp is busy */ + ; + + /* Enable transmitter/receiver. + */ + sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN; + + printf("SMC%d at %dbps ", CONFIG_KGDB_INDEX, speed); +} + +void +putDebugChar(const char c) +{ + volatile cbd_t *tbdf; + volatile char *buf; + volatile smc_uart_t *up; + volatile immap_t *im = (immap_t *)CFG_IMMR; + + if (c == '\n') + putDebugChar ('\r'); + + up = (smc_uart_t *)&(im->im_dprambase[KGDB_PROFF_SMC]); + + tbdf = (cbd_t *)&im->im_dprambase[up->smc_tbase]; + + /* Wait for last character to go. + */ + buf = (char *)tbdf->cbd_bufaddr; + while (tbdf->cbd_sc & BD_SC_READY) + ; + + *buf = c; + tbdf->cbd_datlen = 1; + tbdf->cbd_sc |= BD_SC_READY; +} + +void +putDebugStr (const char *s) +{ + while (*s) { + putDebugChar (*s++); + } +} + +int +getDebugChar(void) +{ + volatile cbd_t *rbdf; + volatile unsigned char *buf; + volatile smc_uart_t *up; + volatile immap_t *im = (immap_t *)CFG_IMMR; + unsigned char c; + + up = (smc_uart_t *)&(im->im_dprambase[KGDB_PROFF_SMC]); + + rbdf = (cbd_t *)&im->im_dprambase[up->smc_rbase]; + + /* Wait for character to show up. + */ + buf = (unsigned char *)rbdf->cbd_bufaddr; + while (rbdf->cbd_sc & BD_SC_EMPTY) + ; + c = *buf; + rbdf->cbd_sc |= BD_SC_EMPTY; + + return(c); +} + +void +kgdb_interruptible(int yes) +{ + return; +} + +#endif /* CONFIG_KGDB_ON_SMC */ diff --git a/cpu/mpc8260/start.S b/cpu/mpc8260/start.S index 03d4278..c35e938 100644 --- a/cpu/mpc8260/start.S +++ b/cpu/mpc8260/start.S @@ -42,7 +42,11 @@ */ #undef MSR_KERNEL /* Floating Point enable, Machine Check and Recoverable Interr. */ +#ifdef DEBUG +#define MSR_KERNEL (MSR_FP|MSR_RI) +#else #define MSR_KERNEL (MSR_FP|MSR_ME|MSR_RI) +#endif /* * Set up GOT: Global Offset Table @@ -60,6 +64,9 @@ GOT_ENTRY(_end) GOT_ENTRY(.bss) +#if defined(CONFIG_HYMOD) + GOT_ENTRY(environment) +#endif END_GOT /* @@ -198,6 +205,7 @@ in_flash: lis r3, CFG_IMMR@h /* set up stack in internal DPRAM */ ori r1, r3, CFG_INIT_SP_OFFSET + stwu r1, -8(r1) /* make room for stack frame header */ /* let the C-code set up the rest */ /* */ @@ -209,6 +217,10 @@ in_flash: /* r3: IMMR */ bl cpu_init_f /* run low-level CPU init code (in Flash)*/ +#ifdef DEBUG + bl init_debug /* set up debugging stuff */ +#endif + mr r3, r21 /* r3: BOOTFLAG */ bl board_init_f /* run 1st part of board init code (in Flash)*/ @@ -285,7 +297,29 @@ ProgramCheck: STD_EXCEPTION(0x1000, InstructionTLBMiss, UnknownException) STD_EXCEPTION(0x1100, DataLoadTLBMiss, UnknownException) STD_EXCEPTION(0x1200, DataStoreTLBMiss, UnknownException) +#ifdef DEBUG + . = 0x1300 + /* + * This exception occurs when the program counter matches the + * Instruction Address Breakpoint Register (IABR). + * + * I want the cpu to halt if this occurs so I can hunt around + * with the debugger and look at things. + * + * When DEBUG is defined, both machine check enable (in the MSR) + * and checkstop reset enable (in the reset mode register) are + * turned off and so a checkstop condition will result in the cpu + * halting. + * + * I force the cpu into a checkstop condition by putting an illegal + * instruction here (at least this is the theory). + * + * well - that didnt work, so just do an infinite loop! + */ +1: b 1b +#else STD_EXCEPTION(0x1300, InstructionBreakpoint, UnknownException) +#endif STD_EXCEPTION(0x1400, SMI, UnknownException) STD_EXCEPTION(0x1500, Trap_15, UnknownException) @@ -445,12 +479,30 @@ init_8260_core: li r3, MSR_KERNEL /* Set ME and RI flags */ rlwimi r3, r5, 0, 25, 25 /* preserve IP bit set by HRCW */ +#ifdef DEBUG rlwimi r3, r5, 0, 21, 22 /* debugger might set SE & BE bits */ +#endif SYNC /* Some chip revs need this... */ mtmsr r3 SYNC mtspr SRR1, r3 /* Make SRR1 match MSR */ + /* Initialise the SYPCR early, and reset the watchdog (if req) */ + /*--------------------------------------------------------------*/ + + lis r3, (CFG_IMMR+IM_REGBASE)@h +#if !defined(CONFIG_COGENT) + lis r4, CFG_SYPCR@h + ori r4, r4, CFG_SYPCR@l + stw r4, IM_SYPCR@l(r3) +#endif /* !CONFIG_COGENT */ +#if defined(CONFIG_WATCHDOG) + li r4, 21868 /* = 0x556c */ + sth r4, IM_SWSR@l(r3) + li r4, -21959 /* = 0xaa39 */ + sth r4, IM_SWSR@l(r3) +#endif /* CONFIG_WATCHDOG */ + /* Initialize the Hardware Implementation-dependent Registers */ /* HID0 also contains cache control */ /*--------------------------------------------------------------*/ @@ -519,18 +571,114 @@ init_8260_core: bdnz 1b SYNC - /* Clear the timebase registers */ + /* Done! */ /*--------------------------------------------------------------*/ - li r0, 0 - mtspr TBWL, r0 - mtspr TBWU, r0 - mtspr TBWL, r0 + blr + +#ifdef DEBUG + +/* + * initialise things related to debugging. + * + * must be called after the global offset table (GOT) is initialised + * (GET_GOT) and after cpu_init_f() has executed. + */ + + .globl init_debug +init_debug: + + lis r3, (CFG_IMMR+IM_REGBASE)@h + + /* Quick and dirty hack to enable the RAM and copy the */ + /* vectors so that we can take exceptions. */ + /*--------------------------------------------------------------*/ + /* write Memory Refresh Prescaler */ + li r4, CFG_MPTPR + sth r4, IM_MPTPR@l(r3) + /* write 60x Refresh Timer */ + li r4, CFG_PSRT + stb r4, IM_PSRT@l(r3) + /* init the 60x SDRAM Mode Register */ + lis r4, (CFG_PSDMR|PSDMR_OP_NORM)@h + ori r4, r4, (CFG_PSDMR|PSDMR_OP_NORM)@l + stw r4, IM_PSDMR@l(r3) + /* write Precharge All Banks command */ + lis r4, (CFG_PSDMR|PSDMR_OP_PREA)@h + ori r4, r4, (CFG_PSDMR|PSDMR_OP_PREA)@l + stw r4, IM_PSDMR@l(r3) + stb r0, 0(0) + /* write eight CBR Refresh commands */ + lis r4, (CFG_PSDMR|PSDMR_OP_CBRR)@h + ori r4, r4, (CFG_PSDMR|PSDMR_OP_CBRR)@l + stw r4, IM_PSDMR@l(r3) + stb r0, 0(0) + stb r0, 0(0) + stb r0, 0(0) + stb r0, 0(0) + stb r0, 0(0) + stb r0, 0(0) + stb r0, 0(0) + stb r0, 0(0) + /* write Mode Register Write command */ + lis r4, (CFG_PSDMR|PSDMR_OP_MRW)@h + ori r4, r4, (CFG_PSDMR|PSDMR_OP_MRW)@l + stw r4, IM_PSDMR@l(r3) + stb r0, 0(0) + /* write Normal Operation command and enable Refresh */ + lis r4, (CFG_PSDMR|PSDMR_OP_NORM|PSDMR_RFEN)@h + ori r4, r4, (CFG_PSDMR|PSDMR_OP_NORM|PSDMR_RFEN)@l + stw r4, IM_PSDMR@l(r3) + stb r0, 0(0) + /* RAM should now be operational */ + +#define VEC_WRD_CNT ((_end_of_vectors - _start + EXC_OFF_SYS_RESET) / 4) + + lwz r3, GOT(_end_of_vectors) + rlwinm r4, r3, 0, 18, 31 /* _end_of_vectors & 0x3FFF */ + lis r5, VEC_WRD_CNT@h + ori r5, r5, VEC_WRD_CNT@l + mtctr r5 +1: + lwzu r5, -4(r3) + stwu r5, -4(r4) + bdnz 1b + + /* Load the Instruction Address Breakpoint Register (IABR). */ + /* */ + /* The address to load is stored in the first word of dual port */ + /* ram and should be preserved while the power is on, so you */ + /* can plug addresses into that location then reset the cpu and */ + /* this code will load that address into the IABR after the */ + /* reset. */ + /* */ + /* When the program counter matches the contents of the IABR, */ + /* an exception is generated (before the instruction at that */ + /* location completes). The vector for this exception is 0x1300 */ + /*--------------------------------------------------------------*/ + lis r3, CFG_IMMR@h + lwz r3, 0(r3) + mtspr IABR, r3 + + /* Set the entire dual port RAM (where the initial stack */ + /* resides) to a known value - makes it easier to see where */ + /* the stack has been written */ + /*--------------------------------------------------------------*/ + lis r3, (CFG_IMMR + CFG_INIT_SP_OFFSET)@h + ori r3, r3, (CFG_IMMR + CFG_INIT_SP_OFFSET)@l + li r4, ((CFG_INIT_SP_OFFSET - 4) / 4) + mtctr r4 + lis r4, 0xdeadbeaf@h + ori r4, r4, 0xdeadbeaf@l +1: + stwu r4, -4(r3) + bdnz 1b /* Done! */ /*--------------------------------------------------------------*/ blr +#endif /* Cache functions. * @@ -776,7 +924,18 @@ clear_bss: * Now clear BSS segment */ lwz r3,GOT(.bss) +#if defined(CONFIG_HYMOD) + /* + * For HYMOD - the environment is the very last item in flash. + * The real .bss stops just before environment starts, so only + * clear up to that point. + * + * taken from mods for FADS board + */ + lwz r4,GOT(environment) +#else lwz r4,GOT(_end) +#endif cmplw 0, r3, r4 beq 6f diff --git a/cpu/mpc8xx/cpu_init.c b/cpu/mpc8xx/cpu_init.c index 1f9dd35..94d6aeb 100644 --- a/cpu/mpc8xx/cpu_init.c +++ b/cpu/mpc8xx/cpu_init.c @@ -109,6 +109,7 @@ cpu_init_f (volatile immap_t *immr) #if defined(CONFIG_SPD823TS) || \ defined(CONFIG_IVMS8) || \ + defined(CONFIG_IVML24) || \ defined(CONFIG_HERMES) || \ defined(CONFIG_IP860) || \ defined(CONFIG_SXNI855T) || \ diff --git a/doc/README.fads b/doc/README.fads index 88ba9b1..87b7907 100644 --- a/doc/README.fads +++ b/doc/README.fads @@ -54,7 +54,7 @@ To start PPCBoot from MPC8BUG: 3. Modify DER so MPC8BUG gets control only when it should: rms der 2002000f -4. Start as it: +4. Start as if from reset: go 100 This is NOT exactly the same as starting PPCBoot without diff --git a/examples/Makefile b/examples/Makefile index d22ffce..599425c 100644 --- a/examples/Makefile +++ b/examples/Makefile @@ -41,7 +41,7 @@ all: .depend $(SREC) ######################################################################### %.srec: %.o - $(LD) -s -Ttext $(LOAD_ADDR) -o $(<:.o=) -e $(<:.o=) $< + $(LD) -g -Ttext $(LOAD_ADDR) -o $(<:.o=) -e $(<:.o=) $< $(OBJCOPY) -O srec $(<:.o=) $@ ######################################################################### diff --git a/include/cmd_kgdb.h b/include/cmd_kgdb.h index c006c17..54618df 100644 --- a/include/cmd_kgdb.h +++ b/include/cmd_kgdb.h @@ -32,10 +32,16 @@ #define CMD_TBL_KGDB MK_CMD_TBL_ENTRY( \ "kgdb", 4, CFG_MAXARGS, 1, do_kgdb, \ "kgdb - enter gdb remote debug mode\n", \ - "\n - executes a breakpoint so that kgdb mode is\n" \ + "[arg0 arg1 .. argN]\n" \ + " - executes a breakpoint so that kgdb mode is\n" \ " entered via the exception handler. To return\n" \ " to the monitor, the remote gdb debugger must\n" \ - " execute a \"continue\" command.\n" \ + " execute a \"continue\" or \"quit\" command.\n" \ + "\n" \ + " if a program is loaded by the remote gdb, any args\n" \ + " passed to the kgdb command are given to the loaded\n" \ + " program if it is executed (see the \"hello_world\"\n" \ + " example program in the ppcboot examples directory)." \ ), void do_kgdb (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]); diff --git a/include/commproc.h b/include/commproc.h index 8ef20ce..7fa23cd 100644 --- a/include/commproc.h +++ b/include/commproc.h @@ -804,7 +804,7 @@ typedef struct scc_enet { /* The IVMS8 uses the FEC on a MPC860T for Ethernet */ -#ifdef CONFIG_IVMS8 +#if defined(CONFIG_IVMS8) || defined(CONFIG_IVML24) #define FEC_ENET /* use FEC for EThernet */ #undef SCC_ENET @@ -829,7 +829,7 @@ typedef struct scc_enet { #define PD_MII_MASK ((ushort)0x1FFF) /* PD 3...15 */ -#endif /* CONFIG_IVMS8 */ +#endif /* CONFIG_IVMS8, CONFIG_IVML24 */ /*** HERMES-PRO ******************************************************/ diff --git a/include/config_CANBT.h b/include/config_CANBT.h index 69e892d..c169952 100644 --- a/include/config_CANBT.h +++ b/include/config_CANBT.h @@ -39,8 +39,8 @@ #define CONFIG_SYS_CLK_FREQ 25000000 /* external frequency to pll */ -#define CONFIG_BAUDRATE 9600 -#define CONFIG_BOOTDELAY 1 /* autoboot after 3 seconds */ +#define CONFIG_BAUDRATE 115200 +#define CONFIG_BOOTDELAY 1 /* autoboot after 1 seconds */ #if 1 #define CONFIG_BOOTCOMMAND "bootm ffe00000" /* autoboot command */ diff --git a/include/config_ETX094.h b/include/config_ETX094.h index d8444c3..e774452 100644 --- a/include/config_ETX094.h +++ b/include/config_ETX094.h @@ -36,8 +36,8 @@ #define CONFIG_MPC850 1 /* This is a MPC850 CPU */ #define CONFIG_ETX094 1 /* ...on a ETX_094 board */ -#undef CONFIG_8xx_CONS_SMC1 -#define CONFIG_8xx_CONS_SMC2 1 /* Console is on SMC2 */ +#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ +#undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE #define CONFIG_BAUDRATE 57600 #if 0 @@ -253,8 +253,8 @@ #define CFG_PRELIM_OR_AM 0xE0000000 /* OR addr mask */ /* FLASH timing: ACS = 11, TRLX = 0, CSNT = 1, SCY = 5, EHTR = 1 */ -#define CFG_OR_TIMING_FLASH (OR_CSNT_SAM | OR_ACS_DIV2 | OR_BI | \ - OR_SCY_5_CLK | OR_EHTR) +#define CFG_OR_TIMING_FLASH (OR_ACS_DIV2 | OR_BI | \ + OR_SCY_2_CLK | OR_TRLX ) #define CFG_OR0_REMAP (CFG_REMAP_OR_AM | CFG_OR_TIMING_FLASH) #define CFG_OR0_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH) @@ -286,7 +286,7 @@ */ /* periodic timer for refresh */ -#define CFG_MAMR_PTA 97 /* start with divider for 100 MHz */ +#define CFG_MAMR_PTA 23 /* start with divider for 100 MHz */ /* refresh rate 15.6 us (= 64 ms / 4K = 62.4 / quad bursts) for <= 128 MBit */ #define CFG_MPTPR_2BK_4K MPTPR_PTP_DIV16 /* setting for 2 banks */ diff --git a/include/config_FADS860T.h b/include/config_FADS860T.h index 048b812..8ae6847 100644 --- a/include/config_FADS860T.h +++ b/include/config_FADS860T.h @@ -44,7 +44,7 @@ #if 0 #define MPC8XX_FACT 10 /* Multiply by 10 */ -#define MPC8XX_XIN 50000000 /* 50 MHz in */ +#define MPC8XX_XIN 5000000 /* 5 MHz in */ #else #define MPC8XX_FACT 12 /* Multiply by 12 */ #define MPC8XX_XIN 4000000 /* 4 MHz in */ @@ -130,11 +130,11 @@ */ #define CFG_SDRAM_BASE 0x00000000 -#define CFG_FLASH_BASE 0x2800000 +#define CFG_FLASH_BASE 0x02800000 #define CFG_FLASH_SIZE ((uint)(8 * 1024 * 1024)) /* max 8Mbyte */ -#define CFG_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */ +#define CFG_MONITOR_LEN (272 << 10) /* Reserve 272 kB for Monitor */ #define CFG_MONITOR_BASE CFG_FLASH_BASE #define CFG_HWINFO_LEN 0x0040 /* Length of HW Info Data */ #define CFG_MALLOC_LEN (384 << 10) /* Reserve 384 kB for malloc() */ @@ -248,7 +248,7 @@ #define BCSR_ADDR ((uint) 0xFF010000) #define BCSR_SIZE ((uint)(64 * 1024)) -#define FLASH_BASE0_PRELIM 0x2800000 /* FLASH bank #0 */ +#define FLASH_BASE0_PRELIM 0x02800000 /* FLASH bank #0 */ #define FLASH_BASE1_PRELIM 0x0 /* FLASH bank #1 */ #define CFG_REMAP_OR_AM 0x80000000 /* OR addr mask */ diff --git a/include/config_IVML24.h b/include/config_IVML24.h new file mode 100644 index 0000000..f5ef3eb --- /dev/null +++ b/include/config_IVML24.h @@ -0,0 +1,421 @@ +/* + * (C) Copyright 2001 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * board/config.h - configuration options, board specific + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + * (easy to change) + */ + +#define CONFIG_MPC860 1 /* This is a MPC860 CPU */ +#define CONFIG_IVML24 1 /* ...on a IVML24 board */ + +#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ +#undef CONFIG_8xx_CONS_SMC2 +#undef CONFIG_8xx_CONS_NONE +#define CONFIG_BAUDRATE 115200 +#if 0 +#define CONFIG_BOOTDELAY -1 /* autoboot disabled */ +#else +#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ +#endif +#define CONFIG_BOOTCOMMAND "bootp" /* autoboot command */ + +#define CONFIG_BOOTARGS "root=/dev/nfs rw " \ + "nfsroot=10.0.0.2:/LinuxPPC " \ + "nfsaddrs=10.0.0.99:10.0.0.2" + +#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ +#undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */ + +#undef CONFIG_WATCHDOG /* watchdog disabled */ + +#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_IDE) + +#define CONFIG_BOOTP_MASK \ + ((CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE) & ~CONFIG_BOOTP_GATEWAY) + +/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ +#include + +/*----------------------------------------------------------------------*/ + +/* + * Miscellaneous configurable options + */ +#define CFG_LONGHELP /* undef to save memory */ +#define CFG_PROMPT "=> " /* Monitor Command Prompt */ +#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#endif +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ + +#define CFG_MEMTEST_START 0x00100000 /* memtest works on */ +#define CFG_MEMTEST_END 0x00F00000 /* 1 ... 15MB in DRAM */ + +#define CFG_LOAD_ADDR 0x00100000 /* default load address */ + +#define CFG_PIO_MODE 0 /* IDE interface in PIO Mode 0 */ + +#define CFG_PB_12V_ENABLE 0x00002000 /* PB 18 */ +#define CFG_PB_SDRAM_CLKE 0x00008000 /* PB 16 */ +#define CFG_PB_ETH_POWERDOWN 0x00010000 /* PB 15 */ +#define CFG_PB_IDE_MOTOR 0x00020000 /* PB 14 */ + +#define CFG_PC_ETH_RESET ((ushort)0x0010) /* PC 11 */ +#define CFG_PC_IDE_RESET ((ushort)0x0020) /* PC 10 */ + +#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ + +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/* + * Low Level Configuration Settings + * (address mappings, register initial values, etc.) + * You should know what you are doing if you make changes here. + */ +/*----------------------------------------------------------------------- + * Internal Memory Mapped Register + */ +#define CFG_IMMR 0xFFF00000 /* was: 0xFF000000 */ + +/*----------------------------------------------------------------------- + * Definitions for initial stack pointer and data area (in DPRAM) + */ +#define CFG_INIT_RAM_ADDR CFG_IMMR +#define CFG_INIT_RAM_END 0x3000 /* End of used area in DPRAM */ +#define CFG_INIT_DATA_SIZE 64 /* size in bytes reserved for initial data */ +#define CFG_INIT_DATA_OFFSET (CFG_INIT_RAM_END - CFG_INIT_DATA_SIZE) +#define CFG_INIT_SP_OFFSET CFG_INIT_DATA_OFFSET + +/*----------------------------------------------------------------------- + * Start addresses for the final memory configuration + * (Set up by the startup code) + * Please note that CFG_SDRAM_BASE _must_ start at 0 + */ +#define CFG_SDRAM_BASE 0x00000000 +#define CFG_FLASH_BASE 0xFF000000 +#ifdef DEBUG +#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ +#else +#define CFG_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */ +#endif +#define CFG_MONITOR_BASE CFG_FLASH_BASE +#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ +/*----------------------------------------------------------------------- + * FLASH organization + */ +#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ + +#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ +#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ + +#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_ENV_OFFSET 0x7A000 /* Offset of Environment Sector */ +#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */ +/*----------------------------------------------------------------------- + * Cache Configuration + */ +#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */ +#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */ +#endif + +/*----------------------------------------------------------------------- + * SYPCR - System Protection Control 11-9 + * SYPCR can only be written once after reset! + *----------------------------------------------------------------------- + * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze + */ +#if defined(CONFIG_WATCHDOG) +#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \ + SYPCR_SWE | SYPCR_SWP) +#else +#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | SYPCR_SWP) +#endif + +/*----------------------------------------------------------------------- + * SIUMCR - SIU Module Configuration 11-6 + *----------------------------------------------------------------------- + * PCMCIA config., multi-function pin tri-state + */ +/* EARB, DBGC and DBPC are initialised by the HCW */ +/* => 0x000000C0 */ +#define CFG_SIUMCR (SIUMCR_BSC | SIUMCR_GB5E) + +/*----------------------------------------------------------------------- + * TBSCR - Time Base Status and Control 11-26 + *----------------------------------------------------------------------- + * Clear Reference Interrupt Status, Timebase freezing enabled + */ +#define CFG_TBSCR (TBSCR_REFA | TBSCR_REFB | TBSCR_TBF) + +/*----------------------------------------------------------------------- + * PISCR - Periodic Interrupt Status and Control 11-31 + *----------------------------------------------------------------------- + * Clear Periodic Interrupt Status, Interrupt Timer freezing enabled + */ +#define CFG_PISCR (PISCR_PS | PISCR_PITF) + +/*----------------------------------------------------------------------- + * PLPRCR - PLL, Low-Power, and Reset Control Register 15-30 + *----------------------------------------------------------------------- + * Reset PLL lock status sticky bit, timer expired status bit and timer + * interrupt status bit, set PLL multiplication factor ! + */ +/* 0x00B0C0C0 */ +#define CFG_PLPRCR \ + ( (11 << PLPRCR_MF_SHIFT) | \ + PLPRCR_SPLSS | PLPRCR_TEXPS | /*PLPRCR_TMIST|*/ \ + /*PLPRCR_CSRC|*/ PLPRCR_LPM_NORMAL | \ + PLPRCR_CSR | PLPRCR_LOLRE /*|PLPRCR_FIOPD*/ \ + ) + +/*----------------------------------------------------------------------- + * SCCR - System Clock and reset Control Register 15-27 + *----------------------------------------------------------------------- + * Set clock output, timebase and RTC source and divider, + * power management and some other internal clocks + */ +#define SCCR_MASK SCCR_EBDF11 +/* 0x01800014 */ +#define CFG_SCCR (SCCR_COM01 | /*SCCR_TBS|*/ \ + SCCR_RTDIV | SCCR_RTSEL | \ + /*SCCR_CRQEN|*/ /*SCCR_PRQEN|*/ \ + SCCR_EBDF00 | SCCR_DFSYNC00 | \ + SCCR_DFBRG00 | SCCR_DFNL000 | \ + SCCR_DFNH000 | SCCR_DFLCD101 | \ + SCCR_DFALCD00) + +/*----------------------------------------------------------------------- + * RTCSC - Real-Time Clock Status and Control Register 11-27 + *----------------------------------------------------------------------- + */ +/* 0x00C3 */ +#define CFG_RTCSC (RTCSC_SEC | RTCSC_ALR | RTCSC_RTF| RTCSC_RTE) + + +/*----------------------------------------------------------------------- + * RCCR - RISC Controller Configuration Register 19-4 + *----------------------------------------------------------------------- + */ +/* TIMEP=2 */ +#define CFG_RCCR 0x0200 + +/*----------------------------------------------------------------------- + * RMDS - RISC Microcode Development Support Control Register + *----------------------------------------------------------------------- + */ +#define CFG_RMDS 0 + +/*----------------------------------------------------------------------- + * + * Interrupt Levels + *----------------------------------------------------------------------- + */ +#define CFG_CPM_INTERRUPT 13 /* SIU_LEVEL6 */ + +/*----------------------------------------------------------------------- + * PCMCIA stuff + *----------------------------------------------------------------------- + * + */ +#define CFG_PCMCIA_MEM_ADDR (0xE0000000) +#define CFG_PCMCIA_MEM_SIZE ( 64 << 20 ) +#define CFG_PCMCIA_DMA_ADDR (0xE4000000) +#define CFG_PCMCIA_DMA_SIZE ( 64 << 20 ) +#define CFG_PCMCIA_ATTRB_ADDR (0xE8000000) +#define CFG_PCMCIA_ATTRB_SIZE ( 64 << 20 ) +#define CFG_PCMCIA_IO_ADDR (0xEC000000) +#define CFG_PCMCIA_IO_SIZE ( 64 << 20 ) + +/*----------------------------------------------------------------------- + * IDE/ATA stuff + *----------------------------------------------------------------------- + */ +#define CONFIG_IDE_PCMCIA 1 /* PCMCIA interface required */ +#if 0 +#define CONFIG_IDE_LED 1 /* LED for ide supported */ +#endif +#define CONFIG_IDE_RESET 1 /* reset for ide supported */ + +#define CFG_IDE_MAXBUS 1 /* The IVML24 has only 1 IDE bus*/ +#define CFG_IDE_MAXDEVICE 1 /* ... and only 1 IDE device */ + +#define CFG_ATA_BASE_ADDR 0xFE100000 +#define CFG_ATA_IDE0_OFFSET 0x0000 +#undef CFG_ATA_IDE1_OFFSET /* only one IDE bus available */ + +#define CFG_ATA_DATA_OFFSET 0x0000 /* Offset for data I/O */ +#define CFG_ATA_REG_OFFSET 0x0080 /* Offset for normal register accesses */ +#define CFG_ATA_ALT_OFFSET 0x0100 /* Offset for alternate registers */ + +/*----------------------------------------------------------------------- + * + *----------------------------------------------------------------------- + * + */ +/*#define CFG_DER 0x2002000F*/ +#define CFG_DER 0 + +/* + * Init Memory Controller: + * + * BR0 and OR0 (FLASH) + */ + +#define FLASH_BASE0_PRELIM 0xFF000000 /* FLASH bank #0 */ + +/* used to re-map FLASH both when starting from SRAM or FLASH: + * restrict access enough to keep SRAM working (if any) + * but not too much to meddle with FLASH accesses + */ +/* EPROMs are 512kb */ +#define CFG_REMAP_OR_AM 0xFFF80000 /* OR addr mask */ +#define CFG_PRELIM_OR_AM 0xFFF80000 /* OR addr mask */ + +/* FLASH timing: ACS = 11, TRLX = 0, CSNT = 1, SCY = 5, EHTR = 1 */ +#define CFG_OR_TIMING_FLASH (OR_SCY_5_CLK | OR_EHTR) + +#define CFG_OR0_REMAP ( CFG_REMAP_OR_AM | OR_ACS_DIV4 | OR_BI | \ + CFG_OR_TIMING_FLASH) +#define CFG_OR0_PRELIM (CFG_PRELIM_OR_AM | OR_ACS_DIV4 | OR_BI | \ + CFG_OR_TIMING_FLASH) +/* 16 bit, bank valid */ +#define CFG_BR0_PRELIM ((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_PS_16 | BR_V ) + +/* + * BR1/OR1 - ELIC SACCO bank @ 0xFE000000 + * + * AM=0xFFFF8 ATM=0 CSNT/SAM=1 ACS/G5LA/G5LS=3 BIH=1 SCY=2 SETA=0 TRLX=1 EHTR=1 + */ +#define ELIC_SACCO_BASE 0xFE000000 +#define ELIC_SACCO_OR_AM 0xFFFF8000 +#define ELIC_SACCO_TIMING (OR_SCY_2_CLK | OR_TRLX | OR_EHTR) + +#define CFG_OR1 (ELIC_SACCO_OR_AM | OR_CSNT_SAM | OR_ACS_DIV2 | OR_BI | \ + ELIC_SACCO_TIMING) +#define CFG_BR1 ((ELIC_SACCO_BASE & BR_BA_MSK) | BR_PS_8 | BR_V ) + +/* + * BR2/OR2 - ELIC EPIC bank @ 0xFE008000 + * + * AM=0xFFFF8 ATM=0 CSNT/SAM=1 ACS/G5LA/G5LS=3 BIH=1 SCY=2 SETA=0 TRLX=1 EHTR=1 + */ +#define ELIC_EPIC_BASE 0xFE008000 +#define ELIC_EPIC_OR_AM 0xFFFF8000 +#define ELIC_EPIC_TIMING (OR_SCY_2_CLK | OR_TRLX | OR_EHTR) + +#define CFG_OR2 (ELIC_EPIC_OR_AM | OR_CSNT_SAM | OR_ACS_DIV2 | OR_BI | \ + ELIC_EPIC_TIMING) +#define CFG_BR2 ((ELIC_EPIC_BASE & BR_BA_MSK) | BR_PS_8 | BR_V ) + +/* + * BR3/OR3: SDRAM + * + * Multiplexed addresses, GPL5 output to GPL5_A (don't care) + */ +#define SDRAM_BASE3_PRELIM 0x00000000 /* SDRAM bank */ +#define SDRAM_PRELIM_OR_AM 0xF8000000 /* map max. 128 MB */ +#define SDRAM_TIMING OR_SCY_0_CLK /* SDRAM-Timing */ + +#define SDRAM_MAX_SIZE 0x04000000 /* max 64 MB SDRAM */ + +#define CFG_OR3_PRELIM (SDRAM_PRELIM_OR_AM | OR_CSNT_SAM | OR_G5LS | SDRAM_TIMING ) +#define CFG_BR3_PRELIM ((SDRAM_BASE3_PRELIM & BR_BA_MSK) | BR_MS_UPMB | BR_V ) + +/* + * BR4/OR4 - HDLC Address + * + * AM=0xFFFF8 ATM=0 CSNT/SAM=0 ACS/G5LA/G5LS=0 BIH=1 SCY=1 SETA=0 TRLX=0 EHTR=0 + */ +#define HDLC_ADDR_BASE 0xFE108000 /* HDLC Address area */ +#define HDLC_ADDR_OR_AM 0xFFFF8000 +#define HDLC_ADDR_TIMING OR_SCY_1_CLK + +#define CFG_OR4 (HDLC_ADDR_OR_AM | OR_BI | HDLC_ADDR_TIMING) +#define CFG_BR4 ((HDLC_ADDR_BASE & BR_BA_MSK) | BR_PS_8 | BR_WP | BR_V ) + +/* + * BR5/OR5: SHARC ADSP-2165L + * + * AM=0xFFC00 ATM=0 CSNT/SAM=0 ACS/G5LA/G5LS=3 BIH=1 SCY=0 SETA=0 TRLX=0 EHTR=0 + */ +#define SHARC_BASE 0xFE400000 +#define SHARC_OR_AM 0xFFC00000 +#define SHARC_TIMING OR_SCY_0_CLK + +#define CFG_OR5 (SHARC_OR_AM | OR_ACS_DIV2 | OR_BI | SHARC_TIMING ) +#define CFG_BR5 ((SHARC_BASE & BR_BA_MSK) | BR_PS_32 | BR_MS_UPMA | BR_V ) + +/* + * Memory Periodic Timer Prescaler + */ + +/* periodic timer for refresh */ +#define CFG_MAMR_PTB 204 + +/* refresh rate 15.6 us (= 64 ms / 4K = 62.4 / quad bursts) for <= 128 MBit */ +#define CFG_MPTPR_2BK_4K MPTPR_PTP_DIV16 /* setting for 2 banks */ +#define CFG_MPTPR_1BK_4K MPTPR_PTP_DIV32 /* setting for 1 bank */ + +/* refresh rate 7.8 us (= 64 ms / 8K = 31.2 / quad bursts) for 256 MBit */ +#define CFG_MPTPR_2BK_8K MPTPR_PTP_DIV8 /* setting for 2 banks */ +#define CFG_MPTPR_1BK_8K MPTPR_PTP_DIV16 /* setting for 1 bank */ + +/* + * MBMR settings for SDRAM + */ + +/* 8 column SDRAM */ +#define CFG_MBMR_8COL ((CFG_MAMR_PTB << MAMR_PTB_SHIFT) | \ + MAMR_AMB_TYPE_0 | MAMR_DSB_1_CYCL | MAMR_G0CLB_A11 | \ + MAMR_RLFB_1X | MAMR_WLFB_1X | MAMR_TLFB_4X) + +/* + * Internal Definitions + * + * Boot Flags + */ +#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ +#define BOOTFLAG_WARM 0x02 /* Software reboot */ + +#endif /* __CONFIG_H */ diff --git a/include/config_cogent_common.h b/include/config_cogent_common.h index 1535c74..7eab9ea 100644 --- a/include/config_cogent_common.h +++ b/include/config_cogent_common.h @@ -28,19 +28,20 @@ * Cogent Motherboard Capabilities */ #define CMA_MB_CAP_SERPAR 0x0001 /* has dual serial+parallel (16C552) */ -#define CMA_MB_CAP_SER2 0x0002 /* has 2nd dual serial (16C2552) */ -#define CMA_MB_CAP_LCD 0x0004 /* has LCD display (HD44780) */ -#define CMA_MB_CAP_FLASH 0x0008 /* has flash (E28F800B or AM29F800BB) */ -#define CMA_MB_CAP_KBM 0x0010 /* has PS/2 keyboard+mouse (HT6542B) */ -#define CMA_MB_CAP_RTC 0x0020 /* has RTC+NVRAM (MK48T02) */ -#define CMA_MB_CAP_SLOT1 0x0040 /* has CMABus slot 1 */ -#define CMA_MB_CAP_SLOT2 0x0080 /* has CMABus slot 2 */ -#define CMA_MB_CAP_SLOT3 0x0100 /* has CMABus slot 3 */ -#define CMA_MB_CAP_PCI 0x0200 /* has pci bridge (V360EPC) */ -#define CMA_MB_CAP_PCIEXT 0x0400 /* can access extended pci space */ -#define CMA_MB_CAP_ETHER 0x0800 /* has ethernet (GD82559) */ -#define CMA_MB_CAP_VIDEO 0x1000 /* has video interface (B69000) */ -#define CMA_MB_CAP_CARDBUS 0x2000 /* has Cardbus Controller (PD6832) */ +#define CMA_MB_CAP_LCD 0x0002 /* has LCD display (HD44780) */ +#define CMA_MB_CAP_FLASH 0x0004 /* has flash (E28F800B or AM29F800BB) */ +#define CMA_MB_CAP_RTC 0x0008 /* has RTC+NVRAM (MK48T02) */ +#define CMA_MB_CAP_ETHER 0x0010 /* has Ethernet (MB86964) */ +#define CMA_MB_CAP_SLOT1 0x0020 /* has CMABus slot 1 */ +#define CMA_MB_CAP_SLOT2 0x0040 /* has CMABus slot 2 */ +#define CMA_MB_CAP_SLOT3 0x0080 /* has CMABus slot 3 */ +#define CMA_MB_CAP_KBM 0x0100 /* has PS/2 keyboard+mouse (HT6542B) */ +#define CMA_MB_CAP_SER2 0x0200 /* has 2nd dual serial (16C2552) */ +#define CMA_MB_CAP_PCI 0x0400 /* has pci bridge (V360EPC) */ +#define CMA_MB_CAP_PCI_EXT 0x0800 /* can access extended pci space */ +#define CMA_MB_CAP_PCI_ETHER 0x1000 /* has 10/100 ether on PCI (GD82559) */ +#define CMA_MB_CAP_PCI_VIDEO 0x2000 /* has video int'face on PCI (B69000) */ +#define CMA_MB_CAP_PCI_CARDBUS 0x4000 /* has Cardbus Ctlr on PCI (PD6832) */ /* * Cogent option sanity checking @@ -114,10 +115,10 @@ # define COGENT_MOTHERBOARD "CMA101" # define CMA_MB_CAPS (CMA_MB_CAP_SERPAR | CMA_MB_CAP_LCD | \ - CMA_MB_CAP_RTC | CMA_MB_CAP_SLOT1 | \ - CMA_MB_CAP_SLOT2 | CMA_MB_CAP_SLOT3 | \ - CMA_MB_CAP_ETHER) -# error Cogent CMA101 motherboard needs more work (on board ether) + CMA_MB_CAP_RTC | CMA_MB_CAP_ETHER | \ + CMA_MB_CAP_SLOT1 | CMA_MB_CAP_SLOT2 | \ + CMA_MB_CAP_SLOT3) +# define CMA_MB_NSLOTS 3 #elif defined(CONFIG_CMA102) @@ -125,39 +126,44 @@ # define CMA_MB_CAPS (CMA_MB_CAP_SERPAR | CMA_MB_CAP_LCD | \ CMA_MB_CAP_RTC | CMA_MB_CAP_SLOT1 | \ CMA_MB_CAP_SLOT2 | CMA_MB_CAP_SLOT3) +# define CMA_MB_NSLOTS 3 #elif defined(CONFIG_CMA110) # define COGENT_MOTHERBOARD "CMA110" # define CMA_MB_CAPS (CMA_MB_CAP_SERPAR | CMA_MB_CAP_LCD | \ - CMA_MB_CAP_FLASH | CMA_MB_CAP_KBM | \ - CMA_MB_CAP_RTC | CMA_MB_CAP_PCI) + CMA_MB_CAP_FLASH | CMA_MB_CAP_RTC | \ + CMA_MB_CAP_KBM | CMA_MB_CAP_PCI) +# define CMA_MB_NSLOTS 0 #elif defined(CONFIG_CMA111) # define COGENT_MOTHERBOARD "CMA111" # define CMA_MB_CAPS (CMA_MB_CAP_SERPAR | CMA_MB_CAP_LCD | \ - CMA_MB_CAP_FLASH | CMA_MB_CAP_KBM | \ - CMA_MB_CAP_RTC | CMA_MB_CAP_SLOT1 | \ - CMA_MB_CAP_PCI | CMA_MB_CAP_PCIEXT | \ - CMA_MB_CAP_ETHER) + CMA_MB_CAP_FLASH | CMA_MB_CAP_RTC | \ + CMA_MB_CAP_SLOT1 | CMA_MB_CAP_KBM | \ + CMA_MB_CAP_PCI | CMA_MB_CAP_PCI_EXT | \ + CMA_MB_CAP_PCI_ETHER) +# define CMA_MB_NSLOTS 1 #elif defined(CONFIG_CMA120) # define COGENT_MOTHERBOARD "CMA120" -# define CMA_MB_CAPS (CMA_MB_CAP_SERPAR | CMA_MB_CAP_SER2 | \ - CMA_MB_CAP_LCD | CMA_MB_CAP_FLASH | \ - CMA_MB_CAP_KBM | CMA_MB_CAP_RTC | \ - CMA_MB_CAP_SLOT1 | CMA_MB_CAP_PCI | \ - CMA_MB_CAP_PCIEXT | CMA_MB_CAP_ETHER | \ - CMA_MB_CAP_VIDEO | CMA_MB_CAP_CARDBUS) +# define CMA_MB_CAPS (CMA_MB_CAP_SERPAR | CMA_MB_CAP_LCD | \ + CMA_MB_CAP_FLASH | CMA_MB_CAP_RTC | \ + CMA_MB_CAP_SLOT1 | CMA_MB_CAP_KBM | \ + CMA_MB_CAP_SER2 | CMA_MB_CAP_PCI | \ + CMA_MB_CAP_PCI_EXT | CMA_MB_CAP_PCI_ETHER | \ + CMA_MB_CAP_PCI_VIDEO | CMA_MB_CAP_PCI_CARDBUS) +# define CMA_MB_NSLOTS 1 #elif defined(CONFIG_CMA150) # define COGENT_MOTHERBOARD "CMA150" # define CMA_MB_CAPS (CMA_MB_CAP_SERPAR | CMA_MB_CAP_LCD | \ - CMA_MB_CAP_FLASH | CMA_MB_CAP_KBM | \ - CMA_MB_CAP_RTC) + CMA_MB_CAP_FLASH | CMA_MB_CAP_RTC | \ + CMA_MB_CAP_KBM) +# define CMA_MB_NSLOTS 0 #else @@ -183,11 +189,15 @@ * some further sanity checks */ -#if (CMA_MB_CAPS & CMA_MB_CAP_PCIEXT) && !(CMA_MB_CAPS & CMA_MB_CAP_PCI) +#if (CMA_MB_CAPS & CMA_MB_CAP_PCI) && (CMA_MB_CAPS & CMA_MB_CAP_SLOT2) +#error Cogent Sanity Check: Both Slot2 and PCI are defined +#endif + +#if (CMA_MB_CAPS & CMA_MB_CAP_PCI_EXT) && !(CMA_MB_CAPS & CMA_MB_CAP_PCI) #error Extended PCI capability defined without PCI capability #endif -#if (CMA_MB_CAPS & CMA_MB_CAP_ETHER) && !(CMA_MB_CAPS & CMA_MB_CAP_PCI) +#if (CMA_MB_CAPS & CMA_MB_CAP_PCI_ETHER) && !(CMA_MB_CAPS & CMA_MB_CAP_PCI) #error Motherboard ethernet capability defined without PCI capability #endif diff --git a/include/config_cogent_mpc8260.h b/include/config_cogent_mpc8260.h index daab66b..5e52f01 100644 --- a/include/config_cogent_mpc8260.h +++ b/include/config_cogent_mpc8260.h @@ -54,7 +54,7 @@ */ #define CONFIG_CONS_ON_SMC /* define if console on SMC */ #undef CONFIG_CONS_ON_SCC /* define if console on SCC */ -#undef CONFIG_CONS_NONE /* define if console on neither */ +#undef CONFIG_CONS_NONE /* define if console on neither */ #define CONFIG_CONS_INDEX 1 /* which SMC/SCC channel for console */ /* @@ -76,18 +76,18 @@ /* system clock rate (CLKIN) - equal to the 60x and local bus speed */ #define CONFIG_8260_CLKIN 66666666 /* in Hz */ -#if 0 +#ifdef CONFIG_CONS_NONE #define CONFIG_BAUDRATE 230400 #else #define CONFIG_BAUDRATE 9600 #endif -#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_KGDB) & ~CFG_CMD_NET) +#define CONFIG_COMMANDS ((CONFIG_CMD_DFL|CFG_CMD_KGDB)&~CFG_CMD_NET) /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include -#if 0 +#ifdef DEBUG #define CONFIG_BOOTDELAY -1 /* autoboot disabled */ #else #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ @@ -97,11 +97,18 @@ #define CONFIG_BOOTARGS "root=/dev/ram rw" #if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#define CONFIG_KGDB_ON_SMC /* define if kgdb on SMC */ +#undef CONFIG_KGDB_ON_SCC /* define if kgdb on SCC */ +#undef CONFIG_KGDB_NONE /* define if kgdb on neither */ +#define CONFIG_KGDB_INDEX 2 /* which SMC/SCC channel for kgdb */ +#ifdef CONFIG_KGDB_NONE #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ +#else +#define CONFIG_KGDB_BAUDRATE 9600 /* speed to run kgdb serial port */ +#endif #endif -#undef CONFIG_WATCHDOG /* turn on platform specific watchdog */ +#undef CONFIG_WATCHDOG /* turn on platform specific watchdog */ /* * Miscellaneous configurable options @@ -142,9 +149,14 @@ * (second 2 for CMA120 only) */ #define CFG_CMA_MB_BASE 0x00000000 /* base of m/b address space */ + #include -#undef CFG_CMA_CONS_SERIAL /* use Cogent motherboard serial for console */ + +#ifdef CONFIG_CONS_NONE +#define CFG_CMA_CONS_SERIAL /* use Cogent motherboard serial for console */ +#endif #define CFG_CMA_LCD_HEARTBEAT /* define for sec rotator in lcd corner */ + #if (CMA_MB_CAPS & CMA_MB_CAP_FLASH) /* * flash exists on the motherboard @@ -162,6 +174,10 @@ /*----------------------------------------------------------------------- * Hard Reset Configuration Words + * + * if you change bits in the HRCW, you must also change the CFG_* + * defines for the various registers affected by the HRCW e.g. changing + * HRCW_DPPCxx requires you to also change CFG_SIUMCR. */ #define CFG_HRCW_MASTER (HRCW_EBM|HRCW_BPS10|HRCW_L2CPC10|HRCW_DPPC11|\ HRCW_ISB100|HRCW_MMR11|HRCW_MODCK_H0101) @@ -183,7 +199,7 @@ * Definitions for initial stack pointer and data area (in DPRAM) */ #define CFG_INIT_RAM_ADDR CFG_IMMR -#define CFG_INIT_RAM_END 0x3000 /* End of used area in DPRAM */ +#define CFG_INIT_RAM_END 0x4000 /* End of used area in DPRAM */ #define CFG_INIT_DATA_SIZE 128 /* size in bytes reserved for initial data */ #define CFG_INIT_DATA_OFFSET (CFG_INIT_RAM_END - CFG_INIT_DATA_SIZE) #define CFG_INIT_SP_OFFSET CFG_INIT_DATA_OFFSET @@ -201,37 +217,39 @@ #endif #define CFG_MONITOR_BASE TEXT_BASE #define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ +#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/ /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ +#define CFG_BOOTMAPSZ (8 << 20) /* Initial Mem map for Linux*/ + /*----------------------------------------------------------------------- * FLASH organization */ -#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ -#define CFG_MAX_FLASH_SECT 67 /* max number of sectors on one chip */ +#define CFG_MAX_FLASH_BANKS 2 /* max num of memory banks */ +#define CFG_MAX_FLASH_SECT 67 /* max num of sects on one chip */ -#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ -#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ +#define CFG_FLASH_ERASE_TOUT 120000 /* Flash Erase Timeout (in ms) */ +#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ #define CFG_ENV_IS_IN_FLASH 1 #define CFG_ENV_ADDR CFG_FLASH_BASE /* Addr of Environment Sector */ #ifdef CONFIG_CMA302 -#define CFG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */ +#define CFG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */ #define CFG_ENV_SECT_SIZE (512*1024) /* see README - env sect real size */ #else -#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ +#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ #endif + /*----------------------------------------------------------------------- * Cache Configuration */ -#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */ +#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */ #if (CONFIG_COMMANDS & CFG_CMD_KGDB) -#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ +#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value*/ #endif /*----------------------------------------------------------------------- @@ -252,14 +270,7 @@ /*----------------------------------------------------------------------- * RMR - Reset Mode Register 5-5 *----------------------------------------------------------------------- - * turn off Checkstop Reset Enable - */ -#define CFG_RMR RMR_CSRE - -/*----------------------------------------------------------------------- - * RMR - Reset Mode Register 5-5 - *----------------------------------------------------------------------- - * turn off Checkstop Reset Enable + * turn on Checkstop Reset Enable */ #define CFG_RMR RMR_CSRE @@ -276,28 +287,18 @@ #define CFG_SIUMCR (SIUMCR_DPPC11|SIUMCR_L2CPC10|SIUMCR_MMR11) /*----------------------------------------------------------------------- - * SYPCR - System Protection Control 11-9 + * SYPCR - System Protection Control 4-35 * SYPCR can only be written once after reset! *----------------------------------------------------------------------- * Watchdog & Bus Monitor Timer max, 60x Bus Monitor enable - * - * For some reason Cogent won't boot if bus monitor is enabled. - * Don't know why. */ -#if defined(CONFIG_COGENT) -# if defined(CONFIG_WATCHDOG) -# define CFG_SYPCR (SYPCR_SWTC|SYPCR_SWRI|SYPCR_SWP|SYPCR_SWE) -# else -# define CFG_SYPCR 0 -# endif /* CONFIG_WATCHDOG */ -#else -# if defined(CONFIG_WATCHDOG) -# define CFG_SYPCR (SYPCR_SWTC|SYPCR_BMT|SYPCR_PBME|SYPCR_LBME|\ +#if defined(CONFIG_WATCHDOG) +#define CFG_SYPCR (SYPCR_SWTC|SYPCR_BMT|SYPCR_PBME|SYPCR_LBME|\ SYPCR_SWRI|SYPCR_SWP|SYPCR_SWE) -# else -# define CFG_SYPCR (SYPCR_BMT|SYPCR_PBME|SYPCR_LBME) -# endif /* CONFIG_WATCHDOG */ -#endif /* CONFIG_COGENT */ +#else +#define CFG_SYPCR (SYPCR_SWTC|SYPCR_BMT|SYPCR_PBME|SYPCR_LBME|\ + SYPCR_SWRI|SYPCR_SWP) +#endif /* CONFIG_WATCHDOG */ /*----------------------------------------------------------------------- * TMCNTSC - Time Counter Status and Control 4-40 @@ -336,15 +337,6 @@ * According to the Cogent manual, only CS0 and CS2 are used - CS0 for EPROM * and CS2 for (optional) local bus RAM on the CPU module. * - * We will also use CS1 to map the motherboard flash so that we can access - * it with arbitrary port size. The reason for this is that there are two - * address spaces for the Cogent motherboard flash: Execute and Read/Write. - * Both access the same flash in different ways, but both have fixed - * port size (Execute is 32 bits and Read/Write is 16 bits). We will only - * access the Read/Write space with 16 bit accesses (via the flash driver), - * but ppcboot uses various sized read accesses to "flash" (which is the - * Execute space). - * * Note the motherboard address space (256 Mbyte in size) is connected * to the 60x Bus and is located starting at address 0. The Hard Reset * Configuration Word should put the 60x Bus into External Bus Mode, since @@ -355,10 +347,6 @@ #define CFG_CMA_CS0_BASE TEXT_BASE /* EPROM */ #define CFG_CMA_CS0_SIZE (1 << 20) -#if (CMA_MB_CAPS & CMA_MB_CAP_FLASH) /* motherboard FLASH */ -#define CFG_CMA_CS1_BASE CMA_MB_FLASH_BASE -#define CFG_CMA_CS1_SIZE CMA_MB_FLASH_SIZE -#endif #if 0 #define CFG_CMA_CS2_BASE 0x10000000 /* Local Bus SDRAM */ #define CFG_CMA_CS2_SIZE (16 << 20) @@ -379,21 +367,6 @@ #define CFG_OR0_PRELIM (P2SZ_TO_AM(CFG_CMA_CS0_SIZE)|\ ORxG_CSNT|ORxG_ACS_DIV2|ORxG_SCY_10_CLK) -/* - * We use CS1 to enable arbitrary port size access to the motherboard FLASH - * (ppcboot needs this). Set it for 15 wait states, GPCM (60x BUS) mode. - * The external bus master should terminate the transaction early (if I - * understand this stuff correctly). - */ - -#if (CMA_MB_CAPS & CMA_MB_CAP_FLASH) -/* base address = CFG_CMA_CS1_BASE, 32-bit, no parity, r/o, gpcm (60x bus) */ -#define CFG_BR1_PRELIM ((CFG_CMA_CS1_BASE&BRx_BA_MSK)|BRx_PS_32|BRx_WP|BRx_V) -/* mask size CFG_CMA_CS1_SIZE, csneg 1/4 early, adr-to-cs 1/2, 15-wait states */ -#define CFG_OR1_PRELIM (P2SZ_TO_AM(CFG_CMA_CS1_SIZE)|\ - ORxG_CSNT|ORxG_ACS_DIV2|ORxG_SCY_15_CLK) -#endif - /* * CS2 enables the Local Bus SDRAM on the CPU Module * @@ -417,7 +390,7 @@ * * Boot Flags */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/ +#define BOOTFLAG_WARM 0x02 /* Software reboot */ #endif /* __CONFIG_H */ diff --git a/include/config_hymod.h b/include/config_hymod.h index 73fb1ea..25b730e 100644 --- a/include/config_hymod.h +++ b/include/config_hymod.h @@ -65,22 +65,23 @@ * from CONFIG_COMMANDS to remove support for networking. */ #undef CONFIG_ETHER_ON_SCC /* define if ethernet on SCC */ -#undef CONFIG_ETHER_ON_FCC /* define if ethernet on FCC */ -#define CONFIG_ETHER_NONE /* define if ethernet on neither */ +#define CONFIG_ETHER_ON_FCC /* define if ethernet on FCC */ +#undef CONFIG_ETHER_NONE /* define if ethernet on neither */ #define CONFIG_ETHER_INDEX 1 /* which SCC/FCC channel for ethernet */ +/* other options */ +#define CONFIG_I2C 1 /* To enable I2C support */ + /* system clock rate (CLKIN) - equal to the 60x and local bus speed */ +#ifdef DEBUG +#define CONFIG_8260_CLKIN 33333333 /* in Hz */ +#else #define CONFIG_8260_CLKIN 66666666 /* in Hz */ +#endif -#if 0 -#define CONFIG_BAUDRATE 115200 -#else #define CONFIG_BAUDRATE 9600 -#endif #define CONFIG_COMMANDS (CFG_CMD_ALL & ~( \ - CFG_CMD_NET | \ - CFG_CMD_KGDB | \ CFG_CMD_IDE | \ CFG_CMD_PCMCIA | \ CFG_CMD_PCI | \ @@ -89,7 +90,7 @@ /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include -#if 0 +#ifdef DEBUG #define CONFIG_BOOTDELAY -1 /* autoboot disabled */ #else #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ @@ -98,13 +99,15 @@ #define CONFIG_BOOTARGS "root=/dev/ram rw" -#if 0 -#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ -#else +#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#undef CONFIG_KGDB_ON_SMC /* define if kgdb on SMC */ +#define CONFIG_KGDB_ON_SCC /* define if kgdb on SCC */ +#undef CONFIG_KGDB_NONE /* define if kgdb on neither */ +#define CONFIG_KGDB_INDEX 2 /* which SMC/SCC channel for kgdb */ #define CONFIG_KGDB_BAUDRATE 9600 /* speed to run kgdb serial port */ #endif -#undef CONFIG_WATCHDOG /* turn on platform specific watchdog */ +#undef CONFIG_WATCHDOG /* turn off platform specific watchdog */ /* * Miscellaneous configurable options @@ -131,6 +134,8 @@ #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#define CFG_HYMOD_DBLEDS /* enable pretty pattern on the daughter board LEDs */ + /* * Low Level Configuration Settings * (address mappings, register initial values, etc.) @@ -139,10 +144,20 @@ /*----------------------------------------------------------------------- * Hard Reset Configuration Words + * + * if you change bits in the HRCW, you must also change the CFG_* + * defines for the various registers affected by the HRCW e.g. changing + * HRCW_DPPCxx requires you to also change CFG_SIUMCR. */ +#ifdef DEBUG +#define CFG_HRCW_MASTER (HRCW_BPS11|HRCW_CIP|HRCW_L2CPC01|HRCW_DPPC10|\ + HRCW_ISB100|HRCW_BMS|HRCW_MMR11|HRCW_APPC10|\ + HRCW_MODCK_H0010) +#else #define CFG_HRCW_MASTER (HRCW_BPS11|HRCW_CIP|HRCW_L2CPC01|HRCW_DPPC10|\ HRCW_ISB100|HRCW_BMS|HRCW_MMR11|HRCW_APPC10|\ HRCW_MODCK_H0101) +#endif /* no slaves so just duplicate the master hrcw */ #define CFG_HRCW_SLAVE1 CFG_HRCW_MASTER #define CFG_HRCW_SLAVE2 CFG_HRCW_MASTER @@ -174,7 +189,11 @@ #define CFG_SDRAM_BASE 0x00000000 #define CFG_FLASH_BASE TEXT_BASE #define CFG_MONITOR_BASE TEXT_BASE -#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor*/ +/* + * unfortunately, CFG_MONITOR_LEN must include the + * (very large i.e. 256kB) environment flash sector + */ +#define CFG_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor*/ #define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/ /* @@ -196,9 +215,6 @@ #define CFG_ENV_IS_IN_FLASH 1 #define CFG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */ #define CFG_ENV_SECT_SIZE 0x40000 /* see README - env sect real size */ -/* XXX The following #define is probably wrong, but you MUST either - * XXX #define CFG_ENV_ADDR or CFG_ENV_OFFSET - */ #define CFG_ENV_ADDR (CFG_FLASH_BASE+CFG_MONITOR_LEN-CFG_ENV_SECT_SIZE) /*----------------------------------------------------------------------- @@ -206,7 +222,7 @@ */ #define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */ #if (CONFIG_COMMANDS & CFG_CMD_KGDB) -#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ +#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value*/ #endif /*----------------------------------------------------------------------- @@ -221,15 +237,23 @@ */ #define CFG_HID0_INIT (HID0_ICE|HID0_DCE|HID0_ICFI|HID0_DCI|\ HID0_IFEM|HID0_ABE) +#ifdef DEBUG +#define CFG_HID0_FINAL 0 +#else #define CFG_HID0_FINAL (HID0_ICE|HID0_IFEM|HID0_ABE) +#endif #define CFG_HID2 0 /*----------------------------------------------------------------------- * RMR - Reset Mode Register 5-5 *----------------------------------------------------------------------- - * turn off Checkstop Reset Enable + * turn on Checkstop Reset Enable */ +#ifdef DEBUG +#define CFG_RMR 0 +#else #define CFG_RMR RMR_CSRE +#endif /*----------------------------------------------------------------------- * BCR - Bus Configuration 4-25 @@ -241,19 +265,21 @@ * SIUMCR - SIU Module Configuration 4-31 *----------------------------------------------------------------------- */ -#define CFG_SIUMCR (SIUMCR_DPPC10|SIUMCR_L2CPC01|SIUMCR_APPC10) +#define CFG_SIUMCR (SIUMCR_DPPC10|SIUMCR_L2CPC01|\ + SIUMCR_APPC10|SIUMCR_MMR11) /*----------------------------------------------------------------------- * SYPCR - System Protection Control 4-35 * SYPCR can only be written once after reset! *----------------------------------------------------------------------- - * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze + * Watchdog & Bus Monitor Timer max, 60x & Local Bus Monitor enable */ #if defined(CONFIG_WATCHDOG) #define CFG_SYPCR (SYPCR_SWTC|SYPCR_BMT|SYPCR_PBME|SYPCR_LBME|\ SYPCR_SWRI|SYPCR_SWP|SYPCR_SWE) #else -#define CFG_SYPCR (SYPCR_BMT|SYPCR_PBME|SYPCR_LBME) +#define CFG_SYPCR (SYPCR_SWTC|SYPCR_BMT|SYPCR_PBME|SYPCR_LBME|\ + SYPCR_SWRI|SYPCR_SWP) #endif /* CONFIG_WATCHDOG */ /*----------------------------------------------------------------------- @@ -362,7 +388,7 @@ * was written is 1 clock, CAS Latency is 2. */ -#define CFG_PSDMR (PSDMR_PBI|PSDMR_RFEN|PSDMR_SDAM_A16_IS_A5|\ +#define CFG_PSDMR (PSDMR_PBI|PSDMR_SDAM_A16_IS_A5|\ PSDMR_BSMA_A14_A16|PSDMR_SDA10_PBI1_A7|\ PSDMR_RFRC_6_CLK|PSDMR_PRETOACT_2W|\ PSDMR_ACTTORW_2W|PSDMR_LDOTOPRE_1C|\ @@ -393,8 +419,13 @@ * appear to be reasonable. */ +#ifdef DEBUG +#define CFG_PSRT 39 +#define CFG_MPTPR ((12<nip += 4; } + regs->msr &= ~MSR_SE; /* reply to host that an exception has occurred */ kdp->sigval = computeSignal(regs->trap); @@ -156,6 +157,20 @@ kgdb_trap(struct pt_regs *regs) #define SPACE_REQUIRED ((32*4)+(32*8)+(6*4)) +#ifdef CONFIG_8260 +/* store floating double indexed */ +#define STFDI(n,p) __asm__ __volatile__ ("stfd " #n ",%0" : "=o"(p[2*n])) +/* store floating double multiple */ +#define STFDM(p) { STFDI( 0,p); STFDI( 1,p); STFDI( 2,p); STFDI( 3,p); \ + STFDI( 4,p); STFDI( 5,p); STFDI( 6,p); STFDI( 7,p); \ + STFDI( 8,p); STFDI( 9,p); STFDI(10,p); STFDI(11,p); \ + STFDI(12,p); STFDI(13,p); STFDI(14,p); STFDI(15,p); \ + STFDI(16,p); STFDI(17,p); STFDI(18,p); STFDI(19,p); \ + STFDI(20,p); STFDI(21,p); STFDI(22,p); STFDI(23,p); \ + STFDI(24,p); STFDI(25,p); STFDI(26,p); STFDI(27,p); \ + STFDI(28,p); STFDI(29,p); STFDI(30,p); STFDI(31,p); } +#endif + int kgdb_getregs(struct pt_regs *regs, char *buf, int max) { @@ -165,16 +180,23 @@ kgdb_getregs(struct pt_regs *regs, char *buf, int max) if (max < SPACE_REQUIRED) kgdb_error(KGDBERR_NOSPACE); + if ((unsigned long)ptr & 3) + kgdb_error(KGDBERR_ALIGNFAULT); + /* General Purpose Regs */ for (i = 0; i < 32; i++) *ptr++ = regs->gpr[i]; - /* Floating Point Regs - FIXME */ - /*ptr = mem2hex((char *)??, ptr, 32 * 8);*/ + /* Floating Point Regs */ +#ifdef CONFIG_8260 + STFDM(ptr); + ptr += 32*2; +#else for (i = 0; i < 32; i++) { *ptr++ = 0; *ptr++ = 0; } +#endif /* pc, msr, cr, lr, ctr, xer, (mq is unused) */ *ptr++ = regs->nip; @@ -189,6 +211,67 @@ kgdb_getregs(struct pt_regs *regs, char *buf, int max) /* set the value of the CPU registers */ +#ifdef CONFIG_8260 +/* load floating double */ +#define LFD(n,v) __asm__ __volatile__ ("lfd " #n ",%0" :: "o"(v)) +/* load floating double indexed */ +#define LFDI(n,p) __asm__ __volatile__ ("lfd " #n ",%0" :: "o"((p)[2*n])) +/* load floating double multiple */ +#define LFDM(p) { LFDI( 0,p); LFDI( 1,p); LFDI( 2,p); LFDI( 3,p); \ + LFDI( 4,p); LFDI( 5,p); LFDI( 6,p); LFDI( 7,p); \ + LFDI( 8,p); LFDI( 9,p); LFDI(10,p); LFDI(11,p); \ + LFDI(12,p); LFDI(13,p); LFDI(14,p); LFDI(15,p); \ + LFDI(16,p); LFDI(17,p); LFDI(18,p); LFDI(19,p); \ + LFDI(20,p); LFDI(21,p); LFDI(22,p); LFDI(23,p); \ + LFDI(24,p); LFDI(25,p); LFDI(26,p); LFDI(27,p); \ + LFDI(28,p); LFDI(29,p); LFDI(30,p); LFDI(31,p); } +#endif + +void +kgdb_putreg(struct pt_regs *regs, int regno, char *buf, int length) +{ + unsigned long *ptr = (unsigned long *)buf; + + if (regno < 0 || regno >= 70) + kgdb_error(KGDBERR_BADPARAMS); + else if (regno >= 32 && regno < 64) { + if (length < 8) + kgdb_error(KGDBERR_NOSPACE); + } + else { + if (length < 4) + kgdb_error(KGDBERR_NOSPACE); + } + + if ((unsigned long)ptr & 3) + kgdb_error(KGDBERR_ALIGNFAULT); + + if (regno >= 0 && regno < 32) + regs->gpr[regno] = *ptr; + else switch (regno) { + +#define caseF(n) \ + case (n) + 32: LFD(n, *ptr); break; + +caseF( 0) caseF( 1) caseF( 2) caseF( 3) caseF( 4) caseF( 5) caseF( 6) caseF( 7) +caseF( 8) caseF( 9) caseF(10) caseF(11) caseF(12) caseF(13) caseF(14) caseF(15) +caseF(16) caseF(17) caseF(18) caseF(19) caseF(20) caseF(21) caseF(22) caseF(23) +caseF(24) caseF(25) caseF(26) caseF(27) caseF(28) caseF(29) caseF(30) caseF(31) + +#undef caseF + + case 64: regs->nip = *ptr; break; + case 65: regs->msr = *ptr; break; + case 66: regs->ccr = *ptr; break; + case 67: regs->link = *ptr; break; + case 68: regs->ctr = *ptr; break; + case 69: regs->ctr = *ptr; break; + + default: + kgdb_error(KGDBERR_BADPARAMS); + } +} + void kgdb_putregs(struct pt_regs *regs, char *buf, int length) { @@ -198,6 +281,9 @@ kgdb_putregs(struct pt_regs *regs, char *buf, int length) if (length < SPACE_REQUIRED) kgdb_error(KGDBERR_NOSPACE); + if ((unsigned long)ptr & 3) + kgdb_error(KGDBERR_ALIGNFAULT); + /* * If the stack pointer has moved, you should pray. * (cause only god can help you). @@ -207,8 +293,10 @@ kgdb_putregs(struct pt_regs *regs, char *buf, int length) for (i = 0; i < 32; i++) regs->gpr[i] = *ptr++; - /* Floating Point Regs - FIXME?? */ - /*ptr = hex2mem(ptr, ??, 32 * 8);*/ + /* Floating Point Regs */ +#ifdef CONFIG_8260 + LFDM(ptr); +#endif ptr += 32*2; /* pc, msr, cr, lr, ctr, xer, (mq is unused) */ @@ -226,7 +314,7 @@ kgdb_putregs(struct pt_regs *regs, char *buf, int length) the debugger. */ void -kgdb_breakpoint(void) +kgdb_breakpoint(bd_t *bd, int argc, char *argv[]) { asm(" .globl breakinst breakinst: .long 0x7d821008 diff --git a/tools/Makefile b/tools/Makefile index f3cf462..1300b60 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -23,9 +23,9 @@ include $(TOPDIR)/config.mk -BINS = img2srec mkimage envcrc +BINS = img2srec mkimage envcrc gen_eth_addr -OBJS = img2srec.o mkimage.o crc32.o envcrc.o +OBJS = img2srec.o mkimage.o crc32.o envcrc.o gen_eth_addr.o TOOLSUBDIRS = gdb @@ -51,6 +51,9 @@ img2srec: img2srec.o mkimage: mkimage.o crc32.o $(CC) -g $(CFLAGS) -o $@ $^ +gen_eth_addr: gen_eth_addr.o + $(CC) -g $(CFLAGS) -o $@ $^ + envcrc.o: envcrc.c $(CC) -g $(CFLAGS) -c $< @@ -60,6 +63,9 @@ crc32.o: crc32.c mkimage.o: mkimage.c $(CC) -g $(CFLAGS) -c $< +gen_eth_addr.o: gen_eth_addr.c + $(CC) -g $(CFLAGS) -c $< + subdirs: @for dir in $(TOOLSUBDIRS) ; do $(MAKE) -C $$dir || exit 1 ; done diff --git a/tools/gdb/remote.c b/tools/gdb/remote.c index 5e33c0a..057a4c5 100644 --- a/tools/gdb/remote.c +++ b/tools/gdb/remote.c @@ -35,9 +35,13 @@ #endif /* not MSDOS, or __TURBOC__ */ #endif /* not sparc. */ #endif /* not GNU C. */ +#ifdef __CPLUSPLUS__ /* dont know what this should be */ extern "C" { +#endif void* alloca(size_t); +#ifdef __CPLUSPLUS__ /* dont know what this should be */ } +#endif #endif /* alloca not defined. */ diff --git a/tools/gen_eth_addr.c b/tools/gen_eth_addr.c new file mode 100644 index 0000000..202106a --- /dev/null +++ b/tools/gen_eth_addr.c @@ -0,0 +1,50 @@ +/* + * (C) Copyright 2001 + * Murray Jensen + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include + +int +main(int argc, char *argv[]) +{ + unsigned long ethaddr_low, ethaddr_high; + + srandom(time(0) | getpid()); + + /* + * setting the 2nd LSB in the most significant byte of + * the address makes it a locally administered ethernet + * address + */ + ethaddr_high = (random() & 0xffff) | 0x0200; + ethaddr_low = random(); + + printf("%02lx:%02lx:%02lx:%02lx:%02lx:%02lx\n", + ethaddr_high >> 8, ethaddr_high & 0xff, + ethaddr_low >> 24, (ethaddr_low >> 16) & 0xff, + (ethaddr_low >> 8) & 0xff, ethaddr_low & 0xff); + + return (0); +}