From: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Date: Mon, 29 Aug 2011 21:07:36 +0000 (+0200)
Subject: mips: Correct VInt vector generation
X-Git-Tag: v1.0-rc0~348
X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=e428097341041ea7a12069a848ef3c92dff13b39;p=users%2Fdwmw2%2Fqemu.git

mips: Correct VInt vector generation

1. The pending need to pass the Status IM gating.
2. The priority is from seven (highest prio) down to zero.
   QEMU was doing the opposite.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
---

diff --git a/target-mips/helper.c b/target-mips/helper.c
index 024caa23c1..1c58e0cc21 100644
--- a/target-mips/helper.c
+++ b/target-mips/helper.c
@@ -482,18 +482,18 @@ void do_interrupt (CPUState *env)
             unsigned int vector;
             unsigned int pending = (env->CP0_Cause & CP0Ca_IP_mask) >> 8;
 
+            pending &= env->CP0_Status >> 8;
             /* Compute the Vector Spacing.  */
             spacing = (env->CP0_IntCtl >> CP0IntCtl_VS) & ((1 << 6) - 1);
             spacing <<= 5;
 
             if (env->CP0_Config3 & (1 << CP0C3_VInt)) {
                 /* For VInt mode, the MIPS computes the vector internally.  */
-                for (vector = 0; vector < 8; vector++) {
-                    if (pending & 1) {
+                for (vector = 7; vector > 0; vector--) {
+                    if (pending & (1 << vector)) {
                         /* Found it.  */
                         break;
                     }
-                    pending >>= 1;
                 }
             } else {
                 /* For VEIC mode, the external interrupt controller feeds the