From: Carlos Santa Date: Wed, 17 Aug 2016 19:30:52 +0000 (-0700) Subject: drm/i915: Move HAS_HW_CONTEXTS definition to platform X-Git-Tag: v4.9-rc1~41^2~25^2~57 X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=e1a52536c20a75c56dcb8ceedf2d6b1c2b285e32;p=linux.git drm/i915: Move HAS_HW_CONTEXTS definition to platform Moving all GPU features to the platform definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa Reviewed-by: Rodrigo Vivi Signed-off-by: Rodrigo Vivi --- diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 66548d6b9ea0..e39d2150df0b 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -662,6 +662,7 @@ struct intel_csr { func(has_rc6p) sep \ func(has_dp_mst) sep \ func(has_gmbus_irq) sep \ + func(has_hw_contexts) sep \ func(has_pipe_cxsr) sep \ func(has_hotplug) sep \ func(cursor_needs_physical) sep \ @@ -2746,7 +2747,7 @@ struct drm_i915_cmd_table { HAS_EDRAM(dev)) #define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws) -#define HAS_HW_CONTEXTS(dev) (INTEL_INFO(dev)->gen >= 6) +#define HAS_HW_CONTEXTS(dev) (INTEL_INFO(dev)->has_hw_contexts) #define HAS_LOGICAL_RING_CONTEXTS(dev) (INTEL_INFO(dev)->gen >= 8) #define USES_PPGTT(dev) (i915.enable_ppgtt) #define USES_FULL_PPGTT(dev) (i915.enable_ppgtt >= 2) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index ca83e6790877..0b3b28d8af25 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -193,6 +193,7 @@ static const struct intel_device_info intel_ironlake_m_info = { .has_rc6 = 1, \ .has_rc6p = 1, \ .has_gmbus_irq = 1, \ + .has_hw_contexts = 1, \ GEN_DEFAULT_PIPEOFFSETS, \ CURSOR_OFFSETS @@ -214,6 +215,7 @@ static const struct intel_device_info intel_sandybridge_m_info = { .has_rc6 = 1, \ .has_rc6p = 1, \ .has_gmbus_irq = 1, \ + .has_hw_contexts = 1, \ GEN_DEFAULT_PIPEOFFSETS, \ IVB_CURSOR_OFFSETS @@ -240,6 +242,7 @@ static const struct intel_device_info intel_ivybridge_q_info = { .has_runtime_pm = 1, \ .has_rc6 = 1, \ .has_gmbus_irq = 1, \ + .has_hw_contexts = 1, \ .need_gfx_hws = 1, .has_hotplug = 1, \ .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \ .display_mmio_offset = VLV_DISPLAY_BASE, \ @@ -294,6 +297,7 @@ static const struct intel_device_info intel_cherryview_info = { .has_resource_streamer = 1, .has_rc6 = 1, .has_gmbus_irq = 1, + .has_hw_contexts = 1, .display_mmio_offset = VLV_DISPLAY_BASE, GEN_CHV_PIPEOFFSETS, CURSOR_OFFSETS, @@ -331,6 +335,7 @@ static const struct intel_device_info intel_broxton_info = { .has_rc6 = 1, .has_dp_mst = 1, .has_gmbus_irq = 1, + .has_hw_contexts = 1, GEN_DEFAULT_PIPEOFFSETS, IVB_CURSOR_OFFSETS, BDW_COLORS,