From: Lorenzo Bianconi Date: Thu, 18 Sep 2025 06:59:41 +0000 (+0200) Subject: net: airoha: Fix PPE_IP_PROTO_CHK register definitions X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=e156dd6b856fa462430d875b0d4cd281ecd66c23;p=users%2Fhch%2Fmisc.git net: airoha: Fix PPE_IP_PROTO_CHK register definitions Fix typo in PPE_IP_PROTO_CHK_IPV4_MASK and PPE_IP_PROTO_CHK_IPV6_MASK register mask definitions. This is not a real problem since this register is not actually used in the current codebase. Signed-off-by: Lorenzo Bianconi Reviewed-by: Simon Horman Signed-off-by: Jakub Kicinski --- diff --git a/drivers/net/ethernet/airoha/airoha_regs.h b/drivers/net/ethernet/airoha/airoha_regs.h index 150c85995cc1..e1c15c20be8e 100644 --- a/drivers/net/ethernet/airoha/airoha_regs.h +++ b/drivers/net/ethernet/airoha/airoha_regs.h @@ -237,8 +237,8 @@ #define PPE_FLOW_CFG_IP4_TCP_FRAG_MASK BIT(6) #define REG_PPE_IP_PROTO_CHK(_n) (((_n) ? PPE2_BASE : PPE1_BASE) + 0x208) -#define PPE_IP_PROTO_CHK_IPV4_MASK GENMASK(15, 0) -#define PPE_IP_PROTO_CHK_IPV6_MASK GENMASK(31, 16) +#define PPE_IP_PROTO_CHK_IPV4_MASK GENMASK(31, 16) +#define PPE_IP_PROTO_CHK_IPV6_MASK GENMASK(15, 0) #define REG_PPE_TB_CFG(_n) (((_n) ? PPE2_BASE : PPE1_BASE) + 0x21c) #define PPE_SRAM_TB_NUM_ENTRY_MASK GENMASK(26, 24)