From: Radim Krčmář Date: Fri, 25 Jul 2025 16:54:09 +0000 (+0200) Subject: riscv: use lw when reading int cpu in new_vmalloc_check X-Git-Tag: v6.17-rc5~6^2~7 X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=e108c8a94f3f958c877f6ec7a6052a893ae4aa98;p=users%2Fgriffoul%2Flinux.git riscv: use lw when reading int cpu in new_vmalloc_check REG_L is wrong, because thread_info.cpu is 32-bit, not xlen-bit wide. The struct currently has a hole after cpu, so little endian accesses seemed fine. Fixes: 503638e0babf ("riscv: Stop emitting preventive sfence.vma for new vmalloc mappings") Cc: stable@vger.kernel.org Reviewed-by: Alexandre Ghiti Signed-off-by: Radim Krčmář Link: https://lore.kernel.org/r/20250725165410.2896641-4-rkrcmar@ventanamicro.com Signed-off-by: Paul Walmsley --- diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index 3a0ec6fd5956..d0ded2438533 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -46,7 +46,7 @@ * a0 = &new_vmalloc[BIT_WORD(cpu)] * a1 = BIT_MASK(cpu) */ - REG_L a2, TASK_TI_CPU(tp) + lw a2, TASK_TI_CPU(tp) /* * Compute the new_vmalloc element position: * (cpu / 64) * 8 = (cpu >> 6) << 3