From: Konrad Rzeszutek Wilk Date: Mon, 5 Feb 2018 20:37:42 +0000 (-0500) Subject: Fix typo IBRS_ATT, which should be IBRS_ALL (redux) X-Git-Tag: v4.1.12-124.31.3~1143 X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=db7cd0d572f523cfc9dd0c535cf0aee6c89a2034;p=users%2Fjedix%2Flinux-maple.git Fix typo IBRS_ATT, which should be IBRS_ALL (redux) In our code-base from Intel we still use IBRS_ATT, so lets fix it to what is upstream. Orabug: 27477743 CVE: CVE-2017-5715 Signed-off-by: Konrad Rzeszutek Wilk Reviewed-by: Daniel Jordan --- diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h index e61e725ec000..bc367e1b21c5 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h @@ -201,7 +201,7 @@ #define X86_FEATURE_IBRS ( 7*32+20) /* Control Speculation Control */ #define X86_FEATURE_STIBP ( 7*32+21) /* Single Thread Indirect Branch Predictors */ #define X86_FEATURE_IA32_ARCH_CAPS ( 7*32+22) /* Control Speculation Control */ -#define X86_FEATURE_IBRS_ATT ( 7*32+23) /* IBRS all the time */ +#define X86_FEATURE_IBRS_ALL ( 7*32+23) /* IBRS all the time */ /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13. * But thanks to kABI we have to jam it somewhere else. */ diff --git a/arch/x86/kernel/cpu/bugs_64.c b/arch/x86/kernel/cpu/bugs_64.c index 198bc1a552af..4ff548da4cd1 100644 --- a/arch/x86/kernel/cpu/bugs_64.c +++ b/arch/x86/kernel/cpu/bugs_64.c @@ -431,7 +431,7 @@ out: mode == SPECTRE_V2_RETPOLINE_AMD) { disable_ibrs_and_friends(false /* Do use IPBP if possible */); } - /* Future CPUs with IBRS_ATT might be able to avoid this. */ + /* Future CPUs with IBRS_ALL might be able to avoid this. */ setup_force_cpu_cap(X86_FEATURE_VMEXIT_RSB_FULL); /* Initialize Indirect Branch Prediction Barrier if supported */ diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c index 764ff481bbb1..963e8c387b43 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -84,7 +84,7 @@ void init_scattered_cpuid_features(struct cpuinfo_x86 *c) u64 cap; rdmsrl(MSR_IA32_ARCH_CAPABILITIES, cap); if (cap & 2) /* IBRS all the time */ - set_cpu_cap(c, X86_FEATURE_IBRS_ATT); + set_cpu_cap(c, X86_FEATURE_IBRS_ALL); } if (cpu_has(c, X86_FEATURE_IBRS))