From: Paul Barker Date: Tue, 25 Jun 2024 20:03:16 +0000 (+0100) Subject: arm64: dts: renesas: rzg2ul: Set Ethernet PVDD to 1.8V X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=d98121492b0393924d96824f788d482e545e3605;p=linux.git arm64: dts: renesas: rzg2ul: Set Ethernet PVDD to 1.8V On the RZ/G2UL & RZ/Five SMARC SOMs, the RGMII interface between the SoC and the Ethernet PHY operates at 1.8V. The power supply for this interface may be correctly configured in u-boot, but the kernel should not be relying on this. Now that the RZ/G2L pinctrl driver supports configuring the Ethernet power supply voltage, we can simply specify the desired voltage in the device tree. Signed-off-by: Paul Barker Reviewed-by: Geert Uytterhoeven Acked-by: Linus Walleij Link: https://lore.kernel.org/20240625200316.4282-10-paul.barker.ct@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi index 417f49090b15..79443fb3f581 100644 --- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi @@ -144,6 +144,7 @@ eth0_pins: eth0 { txc { pinmux = ; /* ET0_TXC */ + power-source = <1800>; output-enable; }; @@ -161,14 +162,19 @@ , /* ET0_RXD0 */ , /* ET0_RXD1 */ , /* ET0_RXD2 */ - , /* ET0_RXD3 */ - ; /* IRQ2 */ + ; /* ET0_RXD3 */ + power-source = <1800>; + }; + + irq { + pinmux = ; /* IRQ2 */ }; }; eth1_pins: eth1 { txc { pinmux = ; /* ET1_TXC */ + power-source = <1800>; output-enable; }; @@ -186,8 +192,12 @@ , /* ET1_RXD0 */ , /* ET1_RXD1 */ , /* ET1_RXD2 */ - , /* ET1_RXD3 */ - ; /* IRQ7 */ + ; /* ET1_RXD3 */ + power-source = <1800>; + }; + + irq { + pinmux = ; /* IRQ7 */ }; };