From: Alexandre Mergnat Date: Mon, 25 Sep 2023 18:17:40 +0000 (+0200) Subject: arm64: dts: mediatek: add larb support for mt8365 SoC X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=d6b2df359be64a5ca6affa8dbd79acc6a4b79390;p=linux.git arm64: dts: mediatek: add larb support for mt8365 SoC Local arbiter (LARB) is a component of Smart Multimedia Interface (SMI), used to help the memory management (IOMMU). This patch add 4 LARBs and 2 clocks for the larb1 and larb3 support. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat Signed-off-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230207-iommu-support-v6-6-24453c8625b3@baylibre.com Signed-off-by: Matthias Brugger --- diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index a03b8c0da68b..afcfa1dd242e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -735,12 +735,71 @@ power-domains = <&spm MT8365_POWER_DOMAIN_MM>; }; + larb0: larb@14003000 { + compatible = "mediatek,mt8365-smi-larb", + "mediatek,mt8186-smi-larb"; + reg = <0 0x14003000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&mmsys CLK_MM_MM_SMI_LARB0>, + <&mmsys CLK_MM_MM_SMI_LARB0>; + clock-names = "apb", "smi"; + power-domains = <&spm MT8365_POWER_DOMAIN_MM>; + mediatek,larb-id = <0>; + }; + camsys: syscon@15000000 { compatible = "mediatek,mt8365-imgsys", "syscon"; reg = <0 0x15000000 0 0x1000>; #clock-cells = <1>; }; + larb2: larb@15001000 { + compatible = "mediatek,mt8365-smi-larb", + "mediatek,mt8186-smi-larb"; + reg = <0 0x15001000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&mmsys CLK_MM_MM_SMI_IMG>, + <&camsys CLK_CAM_LARB2>; + clock-names = "apb", "smi"; + power-domains = <&spm MT8365_POWER_DOMAIN_CAM>; + mediatek,larb-id = <2>; + }; + + vdecsys: syscon@16000000 { + compatible = "mediatek,mt8365-vdecsys", "syscon"; + reg = <0 0x16000000 0 0x1000>; + #clock-cells = <1>; + }; + + larb3: larb@16010000 { + compatible = "mediatek,mt8365-smi-larb", + "mediatek,mt8186-smi-larb"; + reg = <0 0x16010000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&vdecsys CLK_VDEC_LARB1>, + <&vdecsys CLK_VDEC_LARB1>; + clock-names = "apb", "smi"; + power-domains = <&spm MT8365_POWER_DOMAIN_VDEC>; + mediatek,larb-id = <3>; + }; + + vencsys: syscon@17000000 { + compatible = "mediatek,mt8365-vencsys", "syscon"; + reg = <0 0x17000000 0 0x1000>; + #clock-cells = <1>; + }; + + larb1: larb@17010000 { + compatible = "mediatek,mt8365-smi-larb", + "mediatek,mt8186-smi-larb"; + reg = <0 0x17010000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&vencsys CLK_VENC>, <&vencsys CLK_VENC>; + clock-names = "apb", "smi"; + power-domains = <&spm MT8365_POWER_DOMAIN_VENC>; + mediatek,larb-id = <1>; + }; + apu: syscon@19020000 { compatible = "mediatek,mt8365-apu", "syscon"; reg = <0 0x19020000 0 0x1000>;