From: Nam Cao Date: Thu, 12 Oct 2023 09:17:29 +0000 (+0200) Subject: riscv: dts: starfive: visionfive 2: correct spi's ss pin X-Git-Tag: v6.6~17^2~5^2 X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=cf98fe6b579e55aa71b6197e34c112b51f0c2a66;p=users%2Fdwmw2%2Flinux.git riscv: dts: starfive: visionfive 2: correct spi's ss pin The ss pin of spi0 is the same as sck pin. According to the visionfive 2 documentation, it should be pin 49 instead of 48. Fixes: 74fb20c8f05d ("riscv: dts: starfive: Add spi node and pins configuration") Reviewed-by: Emil Renner Berthing Signed-off-by: Nam Cao Signed-off-by: Conor Dooley --- diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index 12ebe97923563..2c02358abd711 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -431,7 +431,7 @@ }; ss-pins { - pinmux = ; bias-disable;