From: Tom Lendacky <thomas.lendacky@amd.com>
Date: Mon, 2 Jul 2018 21:36:02 +0000 (-0500)
Subject: x86/bugs: Fix the AMD SSBD usage of the SPEC_CTRL MSR
X-Git-Tag: v4.1.12-124.31.3~283
X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=ceea9d71d84a402818f9b070d1e932a05fa46c8d;p=users%2Fjedix%2Flinux-maple.git

x86/bugs: Fix the AMD SSBD usage of the SPEC_CTRL MSR

On AMD, the presence of the MSR_SPEC_CTRL feature does not imply that the
SSBD mitigation support should use the SPEC_CTRL MSR. Other features could
have caused the MSR_SPEC_CTRL feature to be set, while a different SSBD
mitigation option is in place.

Update the SSBD support to check for the actual SSBD features that will
use the SPEC_CTRL MSR.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Borislav Petkov <bpetkov@suse.de>
Cc: David Woodhouse <dwmw@amazon.co.uk>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Fixes: 6ac2f49edb1e ("x86/bugs: Add AMD's SPEC_CTRL MSR usage")
Link: http://lkml.kernel.org/r/20180702213602.29202.33151.stgit@tlendack-t1.amdoffice.net
Signed-off-by: Ingo Molnar <mingo@kernel.org>

(cherry picked from commit 612bc3b3d4be749f73a513a17d9b3ee1330d3487)

Orabug: 28870524
CVE: CVE-2018-3639

Signed-off-by: Mihai Carabas <mihai.carabas@oracle.com>
Reviewed-by: Darren Kenny <darren.kenny@oracle.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Signed-off-by: Brian Maly <brian.maly@oracle.com>

Conflicts:
	arch/x86/kernel/cpu/bugs.c
Different filename (bugs_64.c) and different context

Signed-off-by: Brian Maly <brian.maly@oracle.com>
---

diff --git a/arch/x86/kernel/cpu/bugs_64.c b/arch/x86/kernel/cpu/bugs_64.c
index 4518c670e8e2..c56b49c7a5c0 100644
--- a/arch/x86/kernel/cpu/bugs_64.c
+++ b/arch/x86/kernel/cpu/bugs_64.c
@@ -350,7 +350,8 @@ x86_virt_spec_ctrl(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl, bool setguest)
 		}
 
 		/* SSBD controlled in MSR_SPEC_CTRL */
-		if (static_cpu_has(X86_FEATURE_SSBD))
+		if (static_cpu_has(X86_FEATURE_SSBD) ||
+		    static_cpu_has(X86_FEATURE_AMD_SSBD))
 			hostval |= ssbd_tif_to_spec_ctrl(ti->flags);
 
 		if (hostval != guestval) {
@@ -1037,7 +1038,8 @@ static void __init ssb_init(void)
 		case X86_VENDOR_INTEL:
 		case X86_VENDOR_AMD:
 			if (ssb_mode == SPEC_STORE_BYPASS_DISABLE &&
-			    !static_cpu_has(X86_FEATURE_IBRS)) {
+			    !static_cpu_has(X86_FEATURE_SSBD) &&
+			    !static_cpu_has(X86_FEATURE_AMD_SSBD)) {
 				x86_amd_ssbd_enable();
 				break;
 			}