From: wdenk Date: Tue, 29 May 2001 23:28:11 +0000 (+0000) Subject: Added ERIC Configuration X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=c904e5d757474a17a2c1572c03a819375f07f136;p=users%2Frw%2Fppcboot.git Added ERIC Configuration (Patch by Swen Anderson: 10 May 2001) Update for new LANTEC board (Patch by Dr. Bruno Achauer, 29 May 2001) Update for new ETX094 board (Patch by Hannes Fertala, 7 May 2001) --- diff --git a/CHANGELOG b/CHANGELOG index 4153343..749cf62 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -56,23 +56,32 @@ To do: Modifications for 0.9.3: ====================================================================== +* Added ERIC Configuration + (Patch by Swen Anderson: 10 May 2001) + * Patch by Stefan Roese: Fri, 11 May 2001 - PPC405GP ethernet driver: MAL error handling added - CPCI405: new fpga image (problem with some CompactFlash cards solved) - PPC405GP Rev E and PPC405CR Rev C PVR added * Update for new LANTEC board + (+Patch by Dr. Bruno Achauer, 29 May 2001) + +* Update for new ETX094 board + (Patch by Hannes Fertala, 7 May 2001) * Added CAN Bus Driver support for TQM8xxL systems * Completed support for CU824 board -* Add FPGA download for PCU E configuration +* Add FPGA download and memory mapping for PCU E configuration * Fixed PCU E configuration for other / bigger flash types * Cleanup of C++ style // comments which cause C compiler warnings +* Added definition for MPC850 C mask + ====================================================================== Modifications for 0.9.2: ====================================================================== diff --git a/CREDITS b/CREDITS index dd3c8e0..9a207a8 100644 --- a/CREDITS +++ b/CREDITS @@ -18,6 +18,10 @@ N: Dr. Bruno Achauer E: bruno@exet-ag.de D: Support for NetBSD (both as host and target system) +N: Swen Anderson +E: sand@peppercon.de +D: ERIC Support + N: Andre Beaudin E: D: PCMCIA, Ethernet, TFTP diff --git a/MAKEALL b/MAKEALL index 201a4c3..b0bc899 100755 --- a/MAKEALL +++ b/MAKEALL @@ -36,6 +36,7 @@ LIST="$LIST \ CPCI405 CPCIISER4 \ WALNUT405 \ AR405 CANBT ADCIOP \ + ERIC \ " ######################################################################### diff --git a/Makefile b/Makefile index 146c6bc..44d6edf 100644 --- a/Makefile +++ b/Makefile @@ -334,6 +334,14 @@ ADCIOP_config: unconfig echo "CPU = ppc4xx" >>config.mk ; \ echo "#include " >config.h +ERIC_config:unconfig + @echo "Configuring for $(@:_config=) Board..." ; \ + cd include ; \ + echo "ARCH = ppc" > config.mk ; \ + echo "BOARD = eric" >>config.mk ; \ + echo "CPU = ppc4xx" >>config.mk ; \ + echo "#include " >config.h + ######################################################################### ## MPC8240 Systems ######################################################################### diff --git a/board/etx094/etx094.c b/board/etx094/etx094.c index e8477fa..147d8ce 100644 --- a/board/etx094/etx094.c +++ b/board/etx094/etx094.c @@ -97,7 +97,11 @@ int checkboard (void) if (!s || strncmp(s, "ETX_", 4)) { printf ("### No HW ID - assuming ETX_094\n"); read_hw_vers (); +#ifdef SB_ETX094 + return (0); /* return (board_type) (1)=1SDRAM-Device (0)=2SDRAM-Devices */ +#else return (1); +#endif } for (e=s; *e; ++e) { @@ -112,7 +116,11 @@ int checkboard (void) read_hw_vers (); - return (1); +#ifdef SB_ETX094 + return (0); /* return (board_type) (1)=1SDRAM-Device (0)=2SDRAM-Devices */ +#else + return(1); +#endif } /* ------------------------------------------------------------------------- */ @@ -218,7 +226,7 @@ long int initdram (int board_type) */ if ((size_b0 < 0x02000000) && (size_b1 < 0x02000000)) { /* reduce to 15.6 us (62.4 us / quad) */ - memctl->memc_mptpr = CFG_MPTPR_2BK_4K; + memctl->memc_mptpr = CFG_MPTPR_2BK_4K; /*DIV16*/ udelay(1000); } diff --git a/board/etx094/flash.c b/board/etx094/flash.c index efcac69..0728b4f 100644 --- a/board/etx094/flash.c +++ b/board/etx094/flash.c @@ -76,7 +76,11 @@ unsigned long flash_init (void) /* Remap FLASH according to real size */ memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000); +#ifdef CONFIG_FLASH_16BIT + memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V | BR_PS_16; /* 16 Bit data port */ +#else memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V; +#endif /* Re-do sizing to get full correct info */ size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]); @@ -93,8 +97,13 @@ unsigned long flash_init (void) if (size_b1) { memctl->memc_or1 = CFG_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000); +#ifdef CONFIG_FLASH_16BIT + memctl->memc_br1 = ((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) | + BR_MS_GPCM | BR_V | BR_PS_16; +#else memctl->memc_br1 = ((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) | BR_MS_GPCM | BR_V; +#endif /* Re-do sizing to get full correct info */ size_b1 = flash_get_size((vu_long *)(CFG_FLASH_BASE + size_b0), @@ -142,12 +151,21 @@ static void flash_get_offsets (ulong base, flash_info_t *info) /* set up sector start address table */ if (info->flash_id & FLASH_BTYPE) { /* set sector offsets for bottom boot block type */ +#ifdef CONFIG_FLASH_16BIT + info->start[0] = base + 0x00000000; + info->start[1] = base + 0x00004000; + info->start[2] = base + 0x00006000; + info->start[3] = base + 0x00008000; + for (i = 4; i < info->sector_count; i++) { + info->start[i] = base + (i * 0x00010000) - 0x00030000; +#else info->start[0] = base + 0x00000000; info->start[1] = base + 0x00008000; info->start[2] = base + 0x0000C000; info->start[3] = base + 0x00010000; for (i = 4; i < info->sector_count; i++) { info->start[i] = base + (i * 0x00020000) - 0x00060000; +#endif } } else { /* set sector offsets for top boot block type */ @@ -243,11 +261,19 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) ulong base = (ulong)addr; /* Write auto select command: read Manufacturer ID */ +#ifdef CONFIG_FLASH_16BIT + vu_short *s_addr = (vu_short*)addr; + s_addr[0x5555] = 0x00AA; + s_addr[0x2AAA] = 0x0055; + s_addr[0x5555] = 0x0090; + value = s_addr[0]; + value = value|(value<<16); +#else addr[0x5555] = 0x00AA00AA; addr[0x2AAA] = 0x00550055; addr[0x5555] = 0x00900090; - value = addr[0]; +#endif switch (value) { case AMD_MANUFACT: @@ -268,8 +294,12 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) info->size = 0; return (0); /* no or unknown flash */ } - +#ifdef CONFIG_FLASH_16BIT + value = s_addr[1]; + value = value|(value<<16); +#else value = addr[1]; /* device ID */ +#endif switch (value) { case AMD_ID_LV400T: @@ -292,9 +322,14 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) case AMD_ID_LV800B: info->flash_id += FLASH_AM800B; +#ifdef CONFIG_FLASH_16BIT info->sector_count = 19; - info->size = 0x00200000; - break; /* => 2 MB */ + info->size = 0x00100000; /* => 1 MB */ +#else + info->sector_count = 19; + info->size = 0x00200000; /* => 2 MB */ +#endif + break; case AMD_ID_LV160T: info->flash_id += FLASH_AM160T; @@ -304,9 +339,15 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) case AMD_ID_LV160B: info->flash_id += FLASH_AM160B; +#ifdef CONFIG_FLASH_16BIT info->sector_count = 35; - info->size = 0x00400000; - break; /* => 4 MB */ + info->size = 0x00200000; /* => 2 MB */ +#else + info->sector_count = 35; + info->size = 0x00400000; /* => 4 MB */ +#endif + + break; #if 0 /* enable when device IDs are available */ case AMD_ID_LV320T: info->flash_id += FLASH_AM320T; @@ -360,12 +401,22 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) /* set up sector start address table */ if (info->flash_id & FLASH_BTYPE) { /* set sector offsets for bottom boot block type */ +#ifdef CONFIG_FLASH_16BIT + + info->start[0] = base + 0x00000000; + info->start[1] = base + 0x00004000; + info->start[2] = base + 0x00006000; + info->start[3] = base + 0x00008000; + for (i = 4; i < info->sector_count; i++) { + info->start[i] = base + (i * 0x00010000) - 0x00030000; +#else info->start[0] = base + 0x00000000; info->start[1] = base + 0x00008000; info->start[2] = base + 0x0000C000; info->start[3] = base + 0x00010000; for (i = 4; i < info->sector_count; i++) { info->start[i] = base + (i * 0x00020000) - 0x00060000; +#endif } } else { /* set sector offsets for top boot block type */ @@ -384,8 +435,13 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) * (A7 .. A0) = 0x02 * D0 = 1 if protected */ +#ifdef CONFIG_FLASH_16BIT + s_addr = (volatile unsigned short *)(info->start[i]); + info->protect[i] = s_addr[2] & 1; +#else addr = (volatile unsigned long *)(info->start[i]); info->protect[i] = addr[2] & 1; +#endif } } @@ -395,9 +451,13 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) if (info->flash_id != FLASH_UNKNOWN) { addr = (volatile unsigned long *)info->start[0]; +#ifdef CONFIG_FLASH_16BIT + *s_addr = 0x00F0; /* reset bank */ +#else *addr = 0x00F000F0; /* reset bank */ - } +#endif + } return (info->size); } @@ -409,7 +469,10 @@ void flash_erase (flash_info_t *info, int s_first, int s_last) { vu_long *addr = (vu_long*)(info->start[0]); int flag, prot, sect; - ulong type, start, now, last; + ulong start, now, last; +#ifdef CONFIG_FLASH_16BIT + vu_short *s_addr = (vu_short*)addr; +#endif if ((s_first < 0) || (s_first > s_last)) { if (info->flash_id == FLASH_UNKNOWN) { @@ -419,14 +482,15 @@ void flash_erase (flash_info_t *info, int s_first, int s_last) } return; } - +/*#ifndef CONFIG_FLASH_16BIT + ulong type; type = (info->flash_id & FLASH_VENDMASK); if ((type != FLASH_MAN_SST) && (type != FLASH_MAN_STM)) { printf ("Can't erase unknown flash type %08lx - aborted\n", info->flash_id); return; } - +#endif*/ prot = 0; for (sect=s_first; sect<=s_last; ++sect) { if (info->protect[sect]) { @@ -446,18 +510,31 @@ void flash_erase (flash_info_t *info, int s_first, int s_last) /* Start erase on unprotected sectors */ for (sect = s_first; sect<=s_last; sect++) { if (info->protect[sect] == 0) { /* not protected */ +#ifdef CONFIG_FLASH_16BIT + vu_short *s_sect_addr = (vu_short*)(info->start[sect]); +#else vu_long *sect_addr = (vu_long*)(info->start[sect]); - +#endif /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); +#ifdef CONFIG_FLASH_16BIT + + /*printf("\ns_sect_addr=%x",s_sect_addr);*/ + s_addr[0x5555] = 0x00AA; + s_addr[0x2AAA] = 0x0055; + s_addr[0x5555] = 0x0080; + s_addr[0x5555] = 0x00AA; + s_addr[0x2AAA] = 0x0055; + s_sect_addr[0] = 0x0030; +#else addr[0x5555] = 0x00AA00AA; addr[0x2AAA] = 0x00550055; addr[0x5555] = 0x00800080; addr[0x5555] = 0x00AA00AA; addr[0x2AAA] = 0x00550055; sect_addr[0] = 0x00300030; - +#endif /* re-enable interrupts if necessary */ if (flag) enable_interrupts(); @@ -465,7 +542,11 @@ void flash_erase (flash_info_t *info, int s_first, int s_last) /* wait at least 80us - let's wait 1 ms */ udelay (1000); +#ifdef CONFIG_FLASH_16BIT + while ((s_sect_addr[0] & 0x0080) != 0x0080) { +#else while ((sect_addr[0] & 0x00800080) != 0x00800080) { +#endif if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { printf ("Timeout\n"); return; @@ -481,7 +562,11 @@ void flash_erase (flash_info_t *info, int s_first, int s_last) /* reset to read mode */ addr = (volatile unsigned long *)info->start[0]; +#ifdef CONFIG_FLASH_16BIT + s_addr[0] = 0x00F0; /* reset bank */ +#else addr[0] = 0x00F000F0; /* reset bank */ +#endif printf (" done\n"); } @@ -571,6 +656,12 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) static int write_word (flash_info_t *info, ulong dest, ulong data) { vu_long *addr = (vu_long*)(info->start[0]); + +#ifdef CONFIG_FLASH_16BIT + vu_short high_data; + vu_short low_data; + vu_short *s_addr = (vu_short*)addr; +#endif ulong start; int flag; @@ -578,14 +669,54 @@ static int write_word (flash_info_t *info, ulong dest, ulong data) if ((*((vu_long *)dest) & data) != data) { return (2); } + +#ifdef CONFIG_FLASH_16BIT + /* Write the 16 higher-bits */ + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts(); + + high_data = ((data>>16) & 0x0000ffff); + + s_addr[0x5555] = 0x00AA; + s_addr[0x2AAA] = 0x0055; + s_addr[0x5555] = 0x00A0; + + *((vu_short *)dest) = high_data; + + + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); + + /* data polling for D7 */ + start = get_timer (0); + while ((*((vu_short *)dest) & 0x0080) != (high_data & 0x0080)) { + if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + return (1); + } + } + + + /* Write the 16 lower-bits */ +#endif + /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); +#ifdef CONFIG_FLASH_16BIT + dest += 0x2; + low_data = (data & 0x0000ffff); + s_addr[0x5555] = 0x00AA; + s_addr[0x2AAA] = 0x0055; + s_addr[0x5555] = 0x00A0; + *((vu_short *)dest) = low_data; + +#else addr[0x5555] = 0x00AA00AA; addr[0x2AAA] = 0x00550055; addr[0x5555] = 0x00A000A0; - *((vu_long *)dest) = data; +#endif /* re-enable interrupts if necessary */ if (flag) @@ -593,7 +724,13 @@ static int write_word (flash_info_t *info, ulong dest, ulong data) /* data polling for D7 */ start = get_timer (0); + +#ifdef CONFIG_FLASH_16BIT + while ((*((vu_short *)dest) & 0x0080) != (low_data & 0x0080)) { +#else while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) { +#endif + if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { return (1); } diff --git a/board/lantec/lantec.c b/board/lantec/lantec.c index f4c38ad..bfef05f 100644 --- a/board/lantec/lantec.c +++ b/board/lantec/lantec.c @@ -104,7 +104,7 @@ const uint sdram_table[] = int checkboard (void) { - puts("Lantec special edition\n"); + printf("Lantec special edition rev.%d\n", CONFIG_LANTEC); return 1; } diff --git a/cpu/mpc8xx/cpu.c b/cpu/mpc8xx/cpu.c index 9486115..b6f1790 100644 --- a/cpu/mpc8xx/cpu.c +++ b/cpu/mpc8xx/cpu.c @@ -189,6 +189,7 @@ static int check_CPU(long clock, uint pvr, uint immr) case 0x20020001 : printf("XPC850xxZT"); break; case 0x21000065 : printf("XPC850xxZTA"); break; case 0x21010067 : printf("XPC850xxZTB"); m=1; break; + case 0x21020068 : printf("XPC850xxZTC"); m=1; break; default: printf("unknown MPC850 (0x%08x)", k); } printf(" at %s MHz:", strmhz(buf, clock)); diff --git a/cpu/ppc4xx/serial.c b/cpu/ppc4xx/serial.c index 7b8aaaa..33c8c6b 100644 --- a/cpu/ppc4xx/serial.c +++ b/cpu/ppc4xx/serial.c @@ -315,7 +315,7 @@ serial_init(ulong cpu_clock, int baudrate) cntrl0Reg = mfdcr(cntrl0) & 0xffffe000; cntrl0Reg |= 0x000010c0; mtdcr(cntrl0, cntrl0Reg); - br_reg = ((CFG_EXT_SERIAL_CLOCK/16) / baudrate); + br_reg = (((CFG_EXT_SERIAL_CLOCK*10)/16) / baudrate + 5) / 10; #else /* * Use internal cpu clock to generate serial clock @@ -348,7 +348,7 @@ serial_setbrg (ulong cpu_clock, int baudrate) unsigned short br_reg; #ifdef CFG_EXT_SERIAL_CLOCK - br_reg = ((CFG_EXT_SERIAL_CLOCK/16) / baudrate); + br_reg = (((CFG_EXT_SERIAL_CLOCK*10)/16) / baudrate + 5) / 10; #else br_reg = (((((cpu_clock/16)/18) * 10) / baudrate) + 5) / 10 ; #endif diff --git a/include/commproc.h b/include/commproc.h index a344a50..275264f 100644 --- a/include/commproc.h +++ b/include/commproc.h @@ -703,7 +703,8 @@ typedef struct scc_enet { #if defined(CONFIG_TQM823L) || \ defined(CONFIG_TQM850L) || \ - defined(CONFIG_ETX094) + defined(CONFIG_ETX094) || \ + (defined(CONFIG_LANTEC) && CONFIG_LANTEC < 2) /* Bits in parallel I/O port registers that have to be set/cleared * to configure the pins for SCC2 use. */ @@ -725,7 +726,7 @@ typedef struct scc_enet { */ #define SICR_ENET_MASK ((uint)0x0000ff00) #define SICR_ENET_CLKRT ((uint)0x00002600) -#endif /* CONFIG_TQM823L, CONFIG_TQM850L, CONFIG_ETX094 */ +#endif /* CONFIG_TQM823L, CONFIG_TQM850L, CONFIG_ETX094, CONFIG_LANTEC v1 */ /*** FPS850L *********************************************************/ @@ -974,7 +975,7 @@ typedef struct scc_enet { /*** LANTEC *********************************************************/ -#if defined(CONFIG_LANTEC) +#if defined(CONFIG_LANTEC) && CONFIG_LANTEC >= 2 /* Bits in parallel I/O port registers that have to be set/cleared * to configure the pins for SCC2 use. */ @@ -997,7 +998,7 @@ typedef struct scc_enet { */ #define SICR_ENET_MASK ((uint)0x0000FF00) #define SICR_ENET_CLKRT ((uint)0x00002E00) -#endif /* CONFIG_LANTEC */ +#endif /* CONFIG_LANTEC v2 */ /*** SXNI855T ******************************************************/ diff --git a/include/config_ETX094.h b/include/config_ETX094.h index a81f136..bb37889 100644 --- a/include/config_ETX094.h +++ b/include/config_ETX094.h @@ -46,8 +46,15 @@ #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ #endif -#undef CONFIG_FLASH_16BIT +#undef CONFIG_FLASH_16BIT /* for board with 16bit wide flash */ #undef CONFIG_BOOTP_RANDOM_DELAY +#undef SB_ETX094 /* only for SB-Board with 16MB SDRAM */ +#define BOOTPRNDDELAY 1 + +#define CONFIG_ETHADDR 08:00:06:00:00:00 +#ifdef CONFIG_ETHADDR +#define CONFIG_ENV_OVERWRITE /* default MAC can be overwritten */ +#endif #undef CONFIG_BOOTARGS #define CONFIG_RAMBOOTCOMMAND \ @@ -141,14 +148,19 @@ * FLASH organization */ #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CFG_MAX_FLASH_SECT 32 /* max number of sectors on one chip */ +#define CFG_MAX_FLASH_SECT 35 /* max number of sectors on one chip */ #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ -#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ +#define CFG_FLASH_WRITE_TOUT 1000 /* Timeout for Flash Write (in ms) */ #define CFG_ENV_IS_IN_FLASH 1 -#define CFG_ENV_OFFSET 0x8000 /* Offset of Environment Sector */ +#ifdef CONFIG_FLASH_16BIT +#define CFG_ENV_OFFSET 0x8000 /* Offset of Environment Sector */ +#define CFG_ENV_SIZE 0x8000 /* Total Size of Environment Sector */ +#else +#define CFG_ENV_OFFSET 0x8000 /* Offset of Environment Sector */ #define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ +#endif /*----------------------------------------------------------------------- * Cache Configuration */ diff --git a/include/config_LANTEC.h b/include/config_LANTEC.h index 7b80861..6867962 100644 --- a/include/config_LANTEC.h +++ b/include/config_LANTEC.h @@ -38,7 +38,18 @@ */ #define CONFIG_MPC850 1 /* This is a MPC850 CPU */ -#define CONFIG_LANTEC 1 /* ...on a Lantec board */ +#define CONFIG_LANTEC 2 /* ...on a Lantec rev.2 board */ + +/* + * Port assignments (CONFIG_LANTEC == 1): + * - SMC1: J11 (MDB) ? + * - SMC2: J6 (Feature connector) + * - SCC2: J9 (RJ45) + * - SCC3: J8 (Sub-D9) + * + * Port assignments (CONFIG_LANTEC == 2): TBD + */ + #undef CONFIG_8xx_CONS_SMC2 /* Console is on SMC2 */ #define CONFIG_8xx_CONS_SCC3 @@ -78,9 +89,15 @@ & ~CFG_CMD_I2C \ & ~CFG_CMD_IRQ) +#if CONFIG_LANTEC >= 2 #define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */ +#endif -#define CONFIG_COMMANDS CONFIG_CMD_FULL +#if CONFIG_LANTEC >= 2 +# define CONFIG_COMMANDS CONFIG_CMD_FULL +#else +# define CONFIG_COMMANDS (CONFIG_CMD_FULL & ~CFG_CMD_DATE & ~CFG_CMD_NET) +#endif /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include diff --git a/include/config_pcu_e.h b/include/config_pcu_e.h index c18c727..443c967 100644 --- a/include/config_pcu_e.h +++ b/include/config_pcu_e.h @@ -432,35 +432,35 @@ #endif /* XXX */ /* - * BR6/OR6: PUMA: SMA Bus 8 Bit - * BR6: 0x10200401 OR6: 0xffe00182 + * BR5/OR5: PUMA: SMA Bus 8 Bit + * BR5: 0x10200401 OR5: 0xffe00182 */ #define PUMA_SMA8_BASE 0x10200000 /* PUMA SMA Bus 8 Bit */ #define PUMA_SMA8_OR_AM 0xFFE00000 /* 2 MB */ #define PUMA_SMA8_TIMING (OR_BI | OR_SCY_8_CLK | OR_EHTR) #if PCU_E_WITH_SWAPPED_CS /* XXX */ -#define CFG_BR1_PRELIM ((PUMA_SMA8_BASE & BR_BA_MSK) | BR_PS_8 | BR_V) -#define CFG_OR1_PRELIM (PUMA_SMA8_OR_AM | PUMA_SMA8_TIMING) +#define CFG_BR2_PRELIM ((PUMA_SMA8_BASE & BR_BA_MSK) | BR_PS_8 | BR_V) +#define CFG_OR2_PRELIM (PUMA_SMA8_OR_AM | PUMA_SMA8_TIMING) #else /* XXX */ -#define CFG_BR6_PRELIM ((PUMA_SMA8_BASE & BR_BA_MSK) | BR_PS_8 | BR_V) -#define CFG_OR6_PRELIM (PUMA_SMA8_OR_AM | PUMA_SMA8_TIMING) +#define CFG_BR5_PRELIM ((PUMA_SMA8_BASE & BR_BA_MSK) | BR_PS_8 | BR_V) +#define CFG_OR5_PRELIM (PUMA_SMA8_OR_AM | PUMA_SMA8_TIMING) #endif /* XXX */ /* - * BR5/OR5: PUMA: SMA Bus 16 Bit - * BR5: 0x10600801 OR5: 0xffe00182 + * BR6/OR6: PUMA: SMA Bus 16 Bit + * BR6: 0x10600801 OR6: 0xffe00182 */ #define PUMA_SMA16_BASE 0x10600000 /* PUMA SMA Bus 16 Bit */ #define PUMA_SMA16_OR_AM 0xFFE00000 /* 2 MB */ #define PUMA_SMA16_TIMING (OR_BI | OR_SCY_8_CLK | OR_EHTR) #if PCU_E_WITH_SWAPPED_CS /* XXX */ -#define CFG_BR2_PRELIM ((PUMA_SMA16_BASE & BR_BA_MSK) | BR_PS_16 | BR_V) -#define CFG_OR2_PRELIM (PUMA_SMA16_OR_AM | PUMA_SMA16_TIMING) +#define CFG_BR1_PRELIM ((PUMA_SMA16_BASE & BR_BA_MSK) | BR_PS_16 | BR_V) +#define CFG_OR1_PRELIM (PUMA_SMA16_OR_AM | PUMA_SMA16_TIMING) #else /* XXX */ -#define CFG_BR5_PRELIM ((PUMA_SMA16_BASE & BR_BA_MSK) | BR_PS_16 | BR_V) -#define CFG_OR5_PRELIM (PUMA_SMA16_OR_AM | PUMA_SMA16_TIMING) +#define CFG_BR6_PRELIM ((PUMA_SMA16_BASE & BR_BA_MSK) | BR_PS_16 | BR_V) +#define CFG_OR6_PRELIM (PUMA_SMA16_OR_AM | PUMA_SMA16_TIMING) #endif /* XXX */ /* diff --git a/include/status_led.h b/include/status_led.h index 8eaea7b..fbd9feb 100644 --- a/include/status_led.h +++ b/include/status_led.h @@ -146,7 +146,11 @@ void status_led_set (int led, int state); # undef STATUS_LED_ODR # define STATUS_LED_DAT im_ioport.iop_pddat -# define STATUS_LED_BIT 0x0800 +# if CONFIG_LATEC < 2 +# define STATUS_LED_BIT 0x1000 +# else +# define STATUS_LED_BIT 0x0800 +# endif # define STATUS_LED_PERIOD (CFG_HZ / 2) # define STATUS_LED_STATE STATUS_LED_BLINKING diff --git a/net/bootp.c b/net/bootp.c index 32ed8d6..f80006d 100644 --- a/net/bootp.c +++ b/net/bootp.c @@ -387,7 +387,7 @@ BootpRequest (void) sum = sum >> 19; } - printf ("Random delay: %d ms...\n", sum); + printf ("Random delay: %ld ms...\n", sum); for (reg=0; reg