From: Borislav Petkov Date: Thu, 5 Jan 2017 09:26:38 +0000 (+0100) Subject: x86/CPU/AMD: Fix Bulldozer topology X-Git-Tag: v4.1.12-124.31.3~425 X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=bfa008cf266b66721d8074c0c124c8130d894282;p=users%2Fjedix%2Flinux-maple.git x86/CPU/AMD: Fix Bulldozer topology The following commit: 8196dab4fc15 ("x86/cpu: Get rid of compute_unit_id") ... broke the initial strategy for Bulldozer-based cores' topology, where we consider each thread of a compute unit a standalone core and not a HT or SMT thread. Revert to the firmware-supplied core_id numbering and do not make them thread siblings as we don't consider them for such even if they technically are, more or less. Reported-and-tested-by: Brice Goglin Tested-by: Yazen Ghannam Signed-off-by: Borislav Petkov Cc: # v4.6+ Cc: Andy Lutomirski Cc: Borislav Petkov Cc: Brian Gerst Cc: Denys Vlasenko Cc: H. Peter Anvin Cc: Josh Poimboeuf Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Fixes: 8196dab4fc15 ("x86/cpu: Get rid of compute_unit_id") Link: http://lkml.kernel.org/r/20170105092638.5247-1-bp@alien8.de Signed-off-by: Ingo Molnar (cherry picked from commit a33d331761bc5dd330499ca5ceceb67f0640a8e6) Orabug: 28783929 Signed-off-by: Mihai Carabas Reviewed-by: Darren Kenny Signed-off-by: Brian Maly Conflicts: arch/x86/kernel/cpu/amd.c amd.c: contextual Signed-off-by: Brian Maly --- diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 86b0ffd63451..45a49eecd7d8 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -310,15 +310,7 @@ static void amd_get_topology(struct cpuinfo_x86 *c) /* get information required for multi-node processors */ if (cpu_has_topoext) { - u32 eax, ebx, ecx, edx; - - cpuid(0x8000001e, &eax, &ebx, &ecx, &edx); - node_id = ecx & 7; - - /* get compute unit information */ - c->x86_max_cores /= smp_num_siblings; - c->cpu_core_id = ebx & 0xff; - + node_id = cpuid_ecx(0x8000001e) & 7; /* * We may have multiple LLCs if L3 caches exist, so check if we * have an L3 cache by looking at the L3 cache CPUID leaf.