From: Tokunori Ikegami Date: Wed, 15 Mar 2023 17:01:51 +0000 (+0900) Subject: plugins/ocp: Add support for clear PCIe correctable error counters feature X-Git-Tag: v2.4~30 X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=baf2c60d5f3bbb4084de7a431a1915bcaac89b5e;p=users%2Fsagi%2Fnvme-cli.git plugins/ocp: Add support for clear PCIe correctable error counters feature Allow argconfig to set NULL default value to check seen flag parameter only. Signed-off-by: Tokunori Ikegami --- diff --git a/plugins/ocp/ocp-nvme.c b/plugins/ocp/ocp-nvme.c index 71c9b2b9..a8c841ba 100644 --- a/plugins/ocp/ocp-nvme.c +++ b/plugins/ocp/ocp-nvme.c @@ -26,6 +26,7 @@ #define CREATE_CMD #include "ocp-nvme.h" +#include "ocp-utils.h" /* C0 SCAO Log Page */ #define C0_SMART_CLOUD_ATTR_LEN 0x200 @@ -134,6 +135,8 @@ struct __attribute__((__packed__)) ssd_latency_monitor_log { __u8 log_page_guid[0x10]; /* 0x1F0 */ }; +static const __u8 OCP_FID_CLEAR_PCIE_CORRECTABLE_ERROR_COUNTERS = 0xC3; + static int convert_ts(time_t time, char *ts_buf) { struct tm gmTimeInfo; @@ -947,3 +950,69 @@ static int eol_plp_failure_mode(int argc, char **argv, struct command *cmd, return err; } + +static int clear_pcie_corectable_error_counters(int argc, char **argv, + struct command *cmd, + struct plugin *plugin) +{ + const char *desc = "OCP Clear PCIe Correctable Error Counters"; + __u32 result = 0; + __u32 clear_pcie_error_counters = 1 << 31; + struct nvme_dev *dev; + int uuid_index = 0; + bool uuid = true; + int err; + + OPT_ARGS(opts) = { + OPT_FLAG("no-uuid", 'n', NULL, + "Skip UUID index search (UUID index not required for OCP 1.0)"), + OPT_END() + }; + + err = parse_and_open(&dev, argc, argv, desc, opts); + if (err) + return err; + + if (opts[0].seen) + uuid = false; + + if (uuid) { + /* OCP 2.0 requires UUID index support */ + err = ocp_get_uuid_index(dev, &uuid_index); + if (err || !uuid_index) { + fprintf(stderr, "ERROR: No OCP UUID index found\n"); + goto close_dev; + } + } + + struct nvme_set_features_args args = { + .result = &result, + .data = NULL, + .args_size = sizeof(args), + .fd = dev_fd(dev), + .timeout = NVME_DEFAULT_IOCTL_TIMEOUT, + .nsid = 0, + .cdw11 = clear_pcie_error_counters, + .cdw12 = 0, + .cdw13 = 0, + .cdw15 = 0, + .data_len = 0, + .save = 0, + .uuidx = uuid_index, + .fid = OCP_FID_CLEAR_PCIE_CORRECTABLE_ERROR_COUNTERS, + }; + + err = nvme_set_features(&args); + + if (err == 0) + printf("Success : %s\n", desc); + else if (err > 0) + nvme_show_status(err); + else + printf("Fail : %s\n", desc); +close_dev: + /* Redundant close() to make static code analysis happy */ + close(dev->direct.fd); + dev_close(dev); + return err; +} diff --git a/plugins/ocp/ocp-nvme.h b/plugins/ocp/ocp-nvme.h index fcc54299..a27171f0 100644 --- a/plugins/ocp/ocp-nvme.h +++ b/plugins/ocp/ocp-nvme.h @@ -19,6 +19,7 @@ PLUGIN(NAME("ocp", "OCP cloud SSD extensions", NVME_VERSION), ENTRY("latency-monitor-log", "Get Latency Monitor Log Page", ocp_latency_monitor_log) ENTRY("clear-fw-activate-history", "Clear firmware update history log", clear_fw_update_history) ENTRY("eol-plp-failure-mode", "Define EOL or PLP circuitry failure mode.", eol_plp_failure_mode) + ENTRY("clear-pcie-correctable-error-counters", "Clear PCIe correctable error counters", clear_pcie_corectable_error_counters) ) ); diff --git a/util/argconfig.c b/util/argconfig.c index 2d6b40c0..a3554b06 100644 --- a/util/argconfig.c +++ b/util/argconfig.c @@ -234,6 +234,10 @@ int argconfig_parse(int argc, char *argv[], const char *program_desc, s = &options[option_index]; s->seen = true; + + if (!s->default_value) + continue; + value_addr = (void *)(char *)s->default_value; if (s->config_type == CFG_STRING) { *((char **)value_addr) = optarg;