From: Emil Renner Berthing <kernel@esmil.dk>
Date: Thu, 30 Nov 2023 15:19:27 +0000 (+0100)
Subject: riscv: dts: starfive: Mark the JH7100 as having non-coherent DMAs
X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=ba0074972ee9b3231b3de44650583654422e9758;p=users%2Fjedix%2Flinux-maple.git

riscv: dts: starfive: Mark the JH7100 as having non-coherent DMAs

The StarFive JH7100 SoC has non-coherent device DMAs, so mark the
soc bus as such.

Link: https://github.com/starfive-tech/JH7100_Docs/blob/main/JH7100%20Cache%20Coherence%20V1.0.pdf
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---

diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi
index a40a8544b8603..7c1009428c1fe 100644
--- a/arch/riscv/boot/dts/starfive/jh7100.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi
@@ -144,6 +144,7 @@
 		interrupt-parent = <&plic>;
 		#address-cells = <2>;
 		#size-cells = <2>;
+		dma-noncoherent;
 		ranges;
 
 		clint: clint@2000000 {