From: Samson Tam Date: Mon, 21 Mar 2022 14:22:19 +0000 (-0400) Subject: drm/amd/display: Match dprefclk with clk registers X-Git-Tag: howlett/maple/20220816~207^2~16^2~242 X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=b6a93844145395068574cbbfaf3aea91d1f24f1a;p=users%2Fjedix%2Flinux-maple.git drm/amd/display: Match dprefclk with clk registers Update base.dprefclk_khz to match result from dcn32_dump_clk_registers() Signed-off-by: Samson Tam Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c index 3d2807fc769f1..6a1d7c86e6b71 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c @@ -622,7 +622,11 @@ void dcn32_clk_mgr_construct( clk_mgr->ss_on_dprefclk = false; clk_mgr->dfs_ref_freq_khz = 100000; - clk_mgr->base.dprefclk_khz = 717000; /* Changed as per DCN3.2_clock_frequency doc */ + /* Changed from DCN3.2_clock_frequency doc to match + * dcn32_dump_clk_registers from 4 * dentist_vco_freq_khz / + * dprefclk DID divider + */ + clk_mgr->base.dprefclk_khz = 716666; clk_mgr->dccg->ref_dtbclk_khz = 268750; /* integer part is now VCO frequency in kHz */ @@ -636,8 +640,7 @@ void dcn32_clk_mgr_construct( } if (clk_mgr->base.boot_snapshot.dprefclk != 0) { - //ASSERT(clk_mgr->base.dprefclk_khz == clk_mgr->base.boot_snapshot.dprefclk); - //clk_mgr->base.dprefclk_khz = clk_mgr->base.boot_snapshot.dprefclk; + clk_mgr->base.dprefclk_khz = clk_mgr->base.boot_snapshot.dprefclk; } dcn32_clock_read_ss_info(clk_mgr);