From: Hawking Zhang Date: Wed, 20 Jan 2021 11:49:05 +0000 (+0800) Subject: drm/amdgpu: apply new pmfw loading sequence to arcturus and onwards X-Git-Tag: xarray-5.18~2024^2~12^2~174 X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=b335f289fe0cdf509eb38014c838cec4c6d3d04b;p=users%2Fwilly%2Fxarray.git drm/amdgpu: apply new pmfw loading sequence to arcturus and onwards Arcturus and onwards products should follow the same sequence that have pmfw loading ahead of tmr setup Signed-off-by: Hawking Zhang Reviewed-by: Kevin Wang Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c index 38d400289013..cf8cfe620d8c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c @@ -57,7 +57,7 @@ static int psp_load_smu_fw(struct psp_context *psp); * - Load XGMI/RAS/HDCP/DTM TA if any * * This new sequence is required for - * - Arcturus + * - Arcturus and onwards * - Navi12 and onwards */ static void psp_check_pmfw_centralized_cstate_management(struct psp_context *psp) @@ -72,8 +72,7 @@ static void psp_check_pmfw_centralized_cstate_management(struct psp_context *psp if (adev->flags & AMD_IS_APU) return; - if ((adev->asic_type == CHIP_ARCTURUS) || - (adev->asic_type == CHIP_ALDEBARAN) || + if ((adev->asic_type >= CHIP_ARCTURUS) || (adev->asic_type >= CHIP_NAVI12)) psp->pmfw_centralized_cstate_management = true; }