From: wdenk Date: Mon, 28 May 2001 00:31:45 +0000 (+0000) Subject: Update for new LANTEC board X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=b0c5431318b3e7ec51bd1f7cc22be97d76a03211;p=users%2Frw%2Fppcboot.git Update for new LANTEC board --- diff --git a/CHANGELOG b/CHANGELOG index 4e4d002..d15559d 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -56,6 +56,8 @@ To do: Modifications for 0.9.3: ====================================================================== +* Update for new LANTEC board + * Added CAN Bus Driver support for TQM8xxL systems * Completed support for CU824 board diff --git a/MAKEALL b/MAKEALL index 512b228..201a4c3 100755 --- a/MAKEALL +++ b/MAKEALL @@ -17,7 +17,7 @@ LIST="" LIST="$LIST \ TQM823L TQM850L FPS850L TQM855L TQM860L SM850 \ ETX094 SPD823TS IVMS8 IVML24 \ - hermes IP860 lwmon pcu_e \ + hermes IP860 lwmon pcu_e LANTEC \ ESTEEM192E \ SXNI855T \ FADS823 FADS850SAR FADS860T ADS860 \ diff --git a/include/commproc.h b/include/commproc.h index 945a81e..a344a50 100644 --- a/include/commproc.h +++ b/include/commproc.h @@ -703,8 +703,7 @@ typedef struct scc_enet { #if defined(CONFIG_TQM823L) || \ defined(CONFIG_TQM850L) || \ - defined(CONFIG_ETX094) || \ - defined(CONFIG_LANTEC) + defined(CONFIG_ETX094) /* Bits in parallel I/O port registers that have to be set/cleared * to configure the pins for SCC2 use. */ @@ -726,7 +725,7 @@ typedef struct scc_enet { */ #define SICR_ENET_MASK ((uint)0x0000ff00) #define SICR_ENET_CLKRT ((uint)0x00002600) -#endif /* CONFIG_TQM823L, CONFIG_TQM850L, CONFIG_ETX094, CONFIG_LANTEC */ +#endif /* CONFIG_TQM823L, CONFIG_TQM850L, CONFIG_ETX094 */ /*** FPS850L *********************************************************/ @@ -973,6 +972,33 @@ typedef struct scc_enet { #endif /* CONFIG_PCU_E */ +/*** LANTEC *********************************************************/ + +#if defined(CONFIG_LANTEC) +/* Bits in parallel I/O port registers that have to be set/cleared + * to configure the pins for SCC2 use. + */ +#define PROFF_ENET PROFF_SCC2 +#define CPM_CR_ENET CPM_CR_CH_SCC2 +#define SCC_ENET 1 +#define PA_ENET_RXD ((ushort)0x0004) /* PA 13 */ +#define PA_ENET_TXD ((ushort)0x0008) /* PA 12 */ +#define PA_ENET_RCLK ((ushort)0x0200) /* PA 6 */ +#define PA_ENET_TCLK ((ushort)0x0400) /* PA 5 */ + +#define PB_ENET_TENA ((uint)0x00002000) /* PB 18 */ + +#define PC_ENET_LBK ((ushort)0x0010) /* PC 11 */ +#define PC_ENET_CLSN ((ushort)0x0040) /* PC 9 */ +#define PC_ENET_RENA ((ushort)0x0080) /* PC 8 */ + +/* Control bits in the SICR to route TCLK (CLK3) and RCLK (CLK2) to + * SCC2. Also, make sure GR2 (bit 16) and SC2 (bit 17) are zero. + */ +#define SICR_ENET_MASK ((uint)0x0000FF00) +#define SICR_ENET_CLKRT ((uint)0x00002E00) +#endif /* CONFIG_LANTEC */ + /*** SXNI855T ******************************************************/ #if defined(CONFIG_SXNI855T) diff --git a/include/config_LANTEC.h b/include/config_LANTEC.h index 13cb5b4..7b80861 100644 --- a/include/config_LANTEC.h +++ b/include/config_LANTEC.h @@ -70,7 +70,7 @@ CFG_CMD_LOADB) #define CONFIG_CMD_NORMAL (CONFIG_CMD_DFL & ~CFG_CMD_BOOTD) #define CONFIG_CMD_GDB (CONFIG_CMD_NORMAL | CFG_CMD_KGDB) -#define CONFIG_CMD_FULL (CFG_CMD_ALL & ~CFG_CMD_NET \ +#define CONFIG_CMD_FULL (CFG_CMD_ALL & ~CFG_CMD_KGDB \ & ~CFG_CMD_PCMCIA \ & ~CFG_CMD_IDE \ & ~CFG_CMD_PCI \ @@ -78,6 +78,8 @@ & ~CFG_CMD_I2C \ & ~CFG_CMD_IRQ) +#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */ + #define CONFIG_COMMANDS CONFIG_CMD_FULL /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ diff --git a/include/status_led.h b/include/status_led.h index 28bafbc..8eaea7b 100644 --- a/include/status_led.h +++ b/include/status_led.h @@ -146,7 +146,7 @@ void status_led_set (int led, int state); # undef STATUS_LED_ODR # define STATUS_LED_DAT im_ioport.iop_pddat -# define STATUS_LED_BIT 0x1000 +# define STATUS_LED_BIT 0x0800 # define STATUS_LED_PERIOD (CFG_HZ / 2) # define STATUS_LED_STATE STATUS_LED_BLINKING