From: wdenk <wdenk>
Date: Fri, 7 Jun 2002 13:41:19 +0000 (+0000)
Subject: * Fix initialization of funtion pointers for relocation; so far, the
X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=b009a527e31260a6a8ad257e1d3ee6ca7cf43438;p=users%2Frw%2Fppcboot.git

* Fix initialization of funtion pointers for relocation; so far, the
  ethernet functions were still called from flash, causing PPCBoot to
  crash when you erased the flash and then tried to TFTP...

* Again: Fix flash problems on CU824
---

diff --git a/CHANGELOG b/CHANGELOG
index 9b75731..7625903 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -14,13 +14,18 @@
 Modifications for 1.1.6:
 ======================================================================
 
+* Fix initialization of funtion pointers for relocation; so far, the
+  ethernet functions were still called from flash, causing PPCBoot to
+  crash when you erased the flash and then tried to TFTP...
+
 * Patch by Pierre AUBERT, 27 May 2002:
   - add mii_init function for MPC8xx (needed to initialize the FEC
     and its MII interface before using the mii read and write
     commands).
   - fix compile problem with compiler optimization switched off
 
-* Add new RAM configurations to LWMON board
+* Add new RAM configurations to LWMON board;
+  fix I2C configuration for this board, too.
 
 * Fix "loadaddr" setting in TFTP code  (initialize  from  environment
   var if available).
diff --git a/board/cu824/flash.c b/board/cu824/flash.c
index 31a6cbc..3d75e61 100644
--- a/board/cu824/flash.c
+++ b/board/cu824/flash.c
@@ -68,10 +68,12 @@ unsigned long flash_init(void)
 {
     int i, j;
     ulong size = 0;
-    uchar wp;
+    volatile unsigned char *bcr = (volatile unsigned char *)(BOARD_CTRL_REG);
 
-    wp = *(volatile char *)(BOARD_CTRL_REG);
-    *(volatile char *)(BOARD_CTRL_REG) = wp | 0x7;
+    DEBUGF("Write protect was: 0x%02X\n", *bcr);
+    *bcr &= 0x1;	/* FWPT must be 0  */
+    *bcr |= 0x6;	/* FWP0 = FWP1 = 1 */
+    DEBUGF("Write protect is:  0x%02X\n", *bcr);
 
     for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
     	vu_long *addr = (vu_long *)(CFG_FLASH_BASE + i * FLASH_BANK_SIZE);
@@ -252,6 +254,10 @@ int	flash_erase (flash_info_t *info, int s_first, int s_last)
 			addr[0] = 0x00200020;	/* erase setup */
 			addr[0] = 0x00D000D0;	/* erase confirm */
 
+			addr[1] = 0x00500050;	/* clear status register */
+			addr[1] = 0x00200020;	/* erase setup */
+			addr[1] = 0x00D000D0;	/* erase confirm */
+
 			/* re-enable interrupts if necessary */
 			if (flag)
 				enable_interrupts();
diff --git a/board/esd/common/pci.c b/board/esd/common/pci.c
index 770804e..d14c8fb 100644
--- a/board/esd/common/pci.c
+++ b/board/esd/common/pci.c
@@ -105,15 +105,6 @@ int pci9054_write_config_dword(struct pci_controller *hose,
   return (0);
 }
 
-static struct pci_ops pci9054_ops = {
-  pci_hose_read_config_byte_via_dword,
-  pci_hose_read_config_word_via_dword,
-  pci9054_read_config_dword,
-  pci_hose_write_config_byte_via_dword,
-  pci_hose_write_config_word_via_dword,
-  pci9054_write_config_dword
-};
-
 /*-----------------------------------------------------------------------
  */
 
@@ -172,7 +163,6 @@ static struct pci_config_table pci9054_config_table[] = {
 };
 
 static struct pci_controller pci9054_hose = {
-  ops: &pci9054_ops,
   config_table: pci9054_config_table,
 };
 
@@ -196,6 +186,14 @@ void pci_init(bd_t *dummy)
 		 0x00000000, 0xc0000000, 0x10000000, 
 		 PCI_REGION_MEM);
 
+  pci_set_ops(hose,
+	      pci_hose_read_config_byte_via_dword,
+	      pci_hose_read_config_word_via_dword,
+	      pci9054_read_config_dword,
+	      pci_hose_write_config_byte_via_dword,
+	      pci_hose_write_config_word_via_dword,
+	      pci9054_write_config_dword);
+
   hose->region_count = 2;
 
   pci_register_hose(hose);
diff --git a/board/evb64260/pci.c b/board/evb64260/pci.c
index fb14949..29a576b 100644
--- a/board/evb64260/pci.c
+++ b/board/evb64260/pci.c
@@ -543,15 +543,6 @@ static int gt_write_config_dword(struct pci_controller *hose,
     return 0;
 }
 
-static struct pci_ops gt_pci_ops = {
-    pci_hose_read_config_byte_via_dword,
-    pci_hose_read_config_word_via_dword,
-    gt_read_config_dword,
-    pci_hose_write_config_byte_via_dword,
-    pci_hose_write_config_word_via_dword,
-    gt_write_config_dword
-};
-
 /*
  *
  */
@@ -627,9 +618,16 @@ pci_init(bd_t *bd)
 		   CFG_PCI0_IO_SIZE,
 		   PCI_REGION_IO);
 
+    pci_set_ops(&pci0_hose,
+		pci_hose_read_config_byte_via_dword,
+		pci_hose_read_config_word_via_dword,
+		gt_read_config_dword,
+		pci_hose_write_config_byte_via_dword,
+		pci_hose_write_config_word_via_dword,
+		gt_write_config_dword);
+
     pci0_hose.region_count = 2;
 
-    pci0_hose.ops      = &gt_pci_ops;
     pci0_hose.cfg_addr = (unsigned int*) PCI_HOST0;
 
     pci_register_hose(&pci0_hose);
@@ -664,9 +662,16 @@ pci_init(bd_t *bd)
 		   CFG_PCI1_IO_SIZE,
 		   PCI_REGION_IO);
 
+    pci_set_ops(&pci0_hose,
+		pci_hose_read_config_byte_via_dword,
+		pci_hose_read_config_word_via_dword,
+		gt_read_config_dword,
+		pci_hose_write_config_byte_via_dword,
+		pci_hose_write_config_word_via_dword,
+		gt_write_config_dword);
+
     pci1_hose.region_count = 2;
 
-    pci1_hose.ops      = &gt_pci_ops;
     pci1_hose.cfg_addr = (unsigned int*) PCI_HOST1;
 
     pci_register_hose(&pci1_hose);
diff --git a/board/lwmon/lwmon.c b/board/lwmon/lwmon.c
index 5348983..fd613a5 100644
--- a/board/lwmon/lwmon.c
+++ b/board/lwmon/lwmon.c
@@ -161,94 +161,94 @@ int checkboard (void)
 
 /* ------------------------------------------------------------------------- */
 
-long int
-initdram (int board_type)
+long int initdram (int board_type)
 {
-    volatile immap_t     *immr  = (immap_t *)CFG_IMMR;
-    volatile memctl8xx_t *memctl = &immr->im_memctl;
-    long int size_b0;
-    long int size8, size9;
-    int i;
-
-    /*
-     * Configure UPMA for SDRAM
-     */
-    upmconfig(UPMA, (uint *)sdram_table, sizeof(sdram_table)/sizeof(uint));
-
-    memctl->memc_mptpr = CFG_MPTPR;
-
-    /* burst length=4, burst type=sequential, CAS latency=2 */
-    memctl->memc_mar = CFG_MAR;
-
-    /*
-     * Map controller bank 3 to the SDRAM bank at preliminary address.
-     */
-    memctl->memc_or3 = CFG_OR3_PRELIM;
-    memctl->memc_br3 = CFG_BR3_PRELIM;
-
-    /* initialize memory address register */
-    memctl->memc_mamr = CFG_MAMR_8COL;	/* refresh not enabled yet */
-
-    /* mode initialization (offset 5) */
-    udelay(200);	/* 0x80006105 */
-    memctl->memc_mcr = MCR_OP_RUN | MCR_MB_CS3 | MCR_MLCF(1) | MCR_MAD(0x05);
-
-    /* run 2 refresh sequence with 4-beat refresh burst (offset 0x30) */
-    udelay(1);		/* 0x80006130 */
-    memctl->memc_mcr = MCR_OP_RUN | MCR_MB_CS3 | MCR_MLCF(1) | MCR_MAD(0x30);
-    udelay(1);		/* 0x80006130 */
-    memctl->memc_mcr = MCR_OP_RUN | MCR_MB_CS3 | MCR_MLCF(1) | MCR_MAD(0x30);
-
-    udelay(1);		/* 0x80006106 */
-    memctl->memc_mcr = MCR_OP_RUN | MCR_MB_CS3 | MCR_MLCF(1) | MCR_MAD(0x06);
-
-    memctl->memc_mamr |= MAMR_PTBE;	/* refresh enabled */
-
-    udelay(200);
-
-    /* Need at least 10 DRAM accesses to stabilize */
-    for (i=0; i<10; ++i) {
-	volatile unsigned long *addr = (volatile unsigned long *)SDRAM_BASE3_PRELIM;
-	unsigned long val;
-
-	val = *(addr + i);
-	*(addr + i) = val;
-    }
-
-    /*
-     * Check Bank 0 Memory Size for re-configuration
-     *
-     * try 8 column mode
-     */
-    size8 = dram_size (CFG_MAMR_8COL, (ulong *)SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE);
-
-    udelay (1000);
-
-    /*
-     * try 9 column mode
-     */
-    size9 = dram_size (CFG_MAMR_9COL, (ulong *)SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE);
-
-    if (size8 < size9) {		/* leave configuration at 9 columns	*/
-	size_b0 = size9;
-	memctl->memc_mamr = CFG_MAMR_9COL | MAMR_PTBE;
-	udelay(500);
-    } else {				/* back to 8 columns			*/
-	size_b0 = size8;
-	memctl->memc_mamr = CFG_MAMR_8COL | MAMR_PTBE;
-	udelay(500);
-    }
-
-    /*
-     * Final mapping:
-     */
-
-    memctl->memc_or3 = ((-size_b0) & 0xFFFF0000) | \
-    				OR_CSNT_SAM | OR_G5LS | SDRAM_TIMING;
-    memctl->memc_br3 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
-    udelay(1000);
-
-    return (size_b0);
+	volatile immap_t *immr = (immap_t *) CFG_IMMR;
+	volatile memctl8xx_t *memctl = &immr->im_memctl;
+	long int size_b0;
+	long int size8, size9;
+	int i;
+
+	/*
+	 * Configure UPMA for SDRAM
+	 */
+	upmconfig (UPMA, (uint *)sdram_table, sizeof(sdram_table)/sizeof(uint));
+
+	memctl->memc_mptpr = CFG_MPTPR;
+
+	/* burst length=4, burst type=sequential, CAS latency=2 */
+	memctl->memc_mar = CFG_MAR;
+
+	/*
+	 * Map controller bank 3 to the SDRAM bank at preliminary address.
+	 */
+	memctl->memc_or3 = CFG_OR3_PRELIM;
+	memctl->memc_br3 = CFG_BR3_PRELIM;
+
+	/* initialize memory address register */
+	memctl->memc_mamr = CFG_MAMR_8COL;	/* refresh not enabled yet */
+
+	/* mode initialization (offset 5) */
+	udelay (200);				/* 0x80006105 */
+	memctl->memc_mcr = MCR_OP_RUN | MCR_MB_CS3 | MCR_MLCF (1) | MCR_MAD (0x05);
+
+	/* run 2 refresh sequence with 4-beat refresh burst (offset 0x30) */
+	udelay (1);				/* 0x80006130 */
+	memctl->memc_mcr = MCR_OP_RUN | MCR_MB_CS3 | MCR_MLCF (1) | MCR_MAD (0x30);
+	udelay (1);				/* 0x80006130 */
+	memctl->memc_mcr = MCR_OP_RUN | MCR_MB_CS3 | MCR_MLCF (1) | MCR_MAD (0x30);
+
+	udelay (1);				/* 0x80006106 */
+	memctl->memc_mcr = MCR_OP_RUN | MCR_MB_CS3 | MCR_MLCF (1) | MCR_MAD (0x06);
+
+	memctl->memc_mamr |= MAMR_PTBE;	/* refresh enabled */
+
+	udelay (200);
+
+	/* Need at least 10 DRAM accesses to stabilize */
+	for (i = 0; i < 10; ++i) {
+		volatile unsigned long *addr =
+			(volatile unsigned long *) SDRAM_BASE3_PRELIM;
+		unsigned long val;
+
+		val = *(addr + i);
+		*(addr + i) = val;
+	}
+
+	/*
+	 * Check Bank 0 Memory Size for re-configuration
+	 *
+	 * try 8 column mode
+	 */
+	size8 = dram_size (CFG_MAMR_8COL, (ulong *)SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE);
+
+	udelay (1000);
+
+	/*
+	 * try 9 column mode
+	 */
+	size9 = dram_size (CFG_MAMR_9COL, (ulong *)SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE);
+
+	if (size8 < size9) {		/* leave configuration at 9 columns */
+		size_b0 = size9;
+		memctl->memc_mamr = CFG_MAMR_9COL | MAMR_PTBE;
+		udelay (500);
+	} else {			/* back to 8 columns            */
+		size_b0 = size8;
+		memctl->memc_mamr = CFG_MAMR_8COL | MAMR_PTBE;
+		udelay (500);
+	}
+
+	/*
+	 * Final mapping:
+	 */
+
+	memctl->memc_or3 = ((-size_b0) & 0xFFFF0000) |
+			OR_CSNT_SAM | OR_G5LS | SDRAM_TIMING;
+	memctl->memc_br3 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
+	udelay (1000);
+
+	return (size_b0);
 }
 
 /* ------------------------------------------------------------------------- */
@@ -263,44 +263,44 @@ initdram (int board_type)
 
 static long int dram_size (long int mamr_value, long int *base, long int maxsize)
 {
-    volatile immap_t     *immr  = (immap_t *)CFG_IMMR;
-    volatile memctl8xx_t *memctl = &immr->im_memctl;
-    volatile long int	 *addr;
-    ulong		  cnt, val;
-    ulong		  save[32];	/* to make test non-destructive */
-    unsigned char	  i = 0;
-
-    memctl->memc_mamr = mamr_value;
-
-    for (cnt = maxsize/sizeof(long); cnt > 0; cnt >>= 1) {
-	addr = base + cnt;	/* pointer arith! */
-
-	save[i++] = *addr;
-	*addr = ~cnt;
-    }
-
-    /* write 0 to base address */
-    addr = base;
-    save[i] = *addr;
-    *addr = 0;
-
-    /* check at base address */
-    if ((val = *addr) != 0) {
-	*addr = save[i];
-	return (0);
-    }
+	volatile immap_t *immr = (immap_t *) CFG_IMMR;
+	volatile memctl8xx_t *memctl = &immr->im_memctl;
+	volatile long int *addr;
+	ulong cnt, val;
+	ulong save[32];				/* to make test non-destructive */
+	unsigned char i = 0;
+
+	memctl->memc_mamr = mamr_value;
+
+	for (cnt = maxsize / sizeof (long); cnt > 0; cnt >>= 1) {
+		addr = base + cnt;		/* pointer arith! */
+
+		save[i++] = *addr;
+		*addr = ~cnt;
+	}
 
-    for (cnt = 1; cnt <= maxsize/sizeof(long); cnt <<= 1) {
-	addr = base + cnt;	/* pointer arith! */
+	/* write 0 to base address */
+	addr = base;
+	save[i] = *addr;
+	*addr = 0;
 
-	val = *addr;
-	*addr = save[--i];
+	/* check at base address */
+	if ((val = *addr) != 0) {
+		*addr = save[i];
+		return (0);
+	}
+
+	for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) {
+		addr = base + cnt;		/* pointer arith! */
+
+		val = *addr;
+		*addr = save[--i];
 
-	if (val != (~cnt)) {
-	    return (cnt * sizeof(long));
+		if (val != (~cnt)) {
+			return (cnt * sizeof (long));
+		}
 	}
-    }
-    return (maxsize);
+	return (maxsize);
 }
 
 /* ------------------------------------------------------------------------- */
@@ -311,44 +311,44 @@ static long int dram_size (long int mamr_value, long int *base, long int maxsize
 
 int board_pre_init (void)
 {
-	volatile immap_t     *immr  = (immap_t *)CFG_IMMR;
+	volatile immap_t *immr = (immap_t *) CFG_IMMR;
 
 	/* Disable Ethernet TENA on Port B
 	 * Necessary because of pull up in COM3 port.
 	 *
-         * This is just a preliminary fix, intended to turn off TENA
-         * as soon as possible to avoid noise on the network. Once
-         * I²C is running we will make sure the interface is
-         * correctly initialized.
+	 * This is just a preliminary fix, intended to turn off TENA
+	 * as soon as possible to avoid noise on the network. Once
+	 * I²C is running we will make sure the interface is
+	 * correctly initialized.
 	 */
 	immr->im_cpm.cp_pbpar &= ~PB_ENET_TENA;
 	immr->im_cpm.cp_pbodr &= ~PB_ENET_TENA;
-	immr->im_cpm.cp_pbdat &= ~PB_ENET_TENA;		/* set to 0 = disabled */
-	immr->im_cpm.cp_pbdir |=  PB_ENET_TENA;
+	immr->im_cpm.cp_pbdat &= ~PB_ENET_TENA;	/* set to 0 = disabled */
+	immr->im_cpm.cp_pbdir |= PB_ENET_TENA;
 	return (0);
 }
 
 /* ------------------------------------------------------------------------- */
 
-void	reset_phy(void)
+void reset_phy (void)
 {
 	uchar c;
 
 #ifdef DEBUG
 	printf ("### Switch on Ethernet for SCC2 ###\n");
 #endif
-	c = pic_read  (0x61);
+	c = pic_read (0x61);
 #ifdef DEBUG
 	printf ("Old PIC read: reg_61 = 0x%02x\n", c);
 #endif
-	c |=  0x40;	/* disable COM3 */
-	c &= ~0x80;	/* enable Ethernet */
+	c |= 0x40;					/* disable COM3 */
+	c &= ~0x80;					/* enable Ethernet */
 	pic_write (0x61, c);
 #ifdef DEBUG
-	c = pic_read  (0x61);
+	c = pic_read (0x61);
 	printf ("New PIC read: reg_61 = 0x%02x\n", c);
 #endif
-	udelay(1000);
+	udelay (1000);
 }
 
 /*-----------------------------------------------------------------------
@@ -362,7 +362,7 @@ void	reset_phy(void)
 
 /* Number of bytes returned from Keyboard Controller */
 #define KEYBD_VERSIONLEN	2	/* version information */
-#define	KEYBD_DATALEN		9	/* normal key scan data	*/
+#define	KEYBD_DATALEN		9	/* normal key scan data */
 
 /* maximum number of "magic" key codes that can be assigned */
 
@@ -372,10 +372,10 @@ static uchar *key_match (uchar *);
 
 #define	KEYBD_SET_DEBUGMODE	'#'	/* Magic key to enable debug output */
 
-void misc_init_r (bd_t *bd)
+void misc_init_r (bd_t * bd)
 {
-	uchar kbd_data [KEYBD_DATALEN];
-	uchar keybd_env[2*KEYBD_DATALEN+1];
+	uchar kbd_data[KEYBD_DATALEN];
+	uchar keybd_env[2 * KEYBD_DATALEN + 1];
 	uchar val, errcd;
 	uchar *str;
 	int i;
@@ -385,7 +385,7 @@ void misc_init_r (bd_t *bd)
 	/* Read initial keyboard error code */
 	val = KEYBD_CMD_READ_STATUS;
 	i2c_write (kbd_addr, 0, 0, &val, 1);
-	i2c_read  (kbd_addr, 0, 0, &errcd, 1);
+	i2c_read (kbd_addr, 0, 0, &errcd, 1);
 	if (errcd) {
 		printf ("KEYBD: Error %02X\n", errcd);
 	}
@@ -395,53 +395,53 @@ void misc_init_r (bd_t *bd)
 	i2c_write (kbd_addr, 0, 0, &val, 1);
 	val = KEYBD_CMD_READ_STATUS;
 	i2c_write (kbd_addr, 0, 0, &val, 1);
-	i2c_read  (kbd_addr, 0, 0, &val, 1);
+	i2c_read (kbd_addr, 0, 0, &val, 1);
 
-	if (val) {	/* permanent error, report it */
+	if (val) {					/* permanent error, report it */
 		printf ("*** Keyboard error code %02X ***\n", val);
 		sprintf (keybd_env, "%02X", val);
 		setenv ("keybd", keybd_env);
 		return;
 	}
 
-        /*
-         * Now we know that we have a working  keyboard,  so  disable
-         * all output to the LCD except when a key press is detected.
+	/*
+	 * Now we know that we have a working  keyboard,  so  disable
+	 * all output to the LCD except when a key press is detected.
 	 */
 
 	if ((console_assign (stdout, "serial") < 0) ||
-	    (console_assign (stderr, "serial") < 0) ) {
+		(console_assign (stderr, "serial") < 0)) {
 		printf ("Can't assign serial port as output device\n");
 	}
 
 	/* Read Version */
 	val = KEYBD_CMD_READ_VERSION;
 	i2c_write (kbd_addr, 0, 0, &val, 1);
-	i2c_read  (kbd_addr, 0, 0, kbd_data, KEYBD_VERSIONLEN);
+	i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_VERSIONLEN);
 	printf ("KEYBD: Version %d.%d\n", kbd_data[0], kbd_data[1]);
 
 	/* Read keys */
 	val = KEYBD_CMD_READ_KEYS;
 	i2c_write (kbd_addr, 0, 0, &val, 1);
-	i2c_read  (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
+	i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
 
-	for (i=0; i<KEYBD_DATALEN; ++i) {
-		sprintf(keybd_env+i+i, "%02X", kbd_data[i]);
+	for (i = 0; i < KEYBD_DATALEN; ++i) {
+		sprintf (keybd_env + i + i, "%02X", kbd_data[i]);
 	}
 	setenv ("keybd", keybd_env);
 
-	str = strdup (key_match(kbd_data));		/* decode keys */
+	str = strdup (key_match (kbd_data));	/* decode keys */
 #ifdef KEYBD_SET_DEBUGMODE
-	if (kbd_data[0] == KEYBD_SET_DEBUGMODE) { 	/* set debug mode */
+	if (kbd_data[0] == KEYBD_SET_DEBUGMODE) {	/* set debug mode */
 		if ((console_assign (stdout, "lcd") < 0) ||
-		    (console_assign (stderr, "lcd") < 0) ) {
+			(console_assign (stderr, "lcd") < 0)) {
 			printf ("Can't assign LCD display as output device\n");
 		}
 	}
-#endif	/* KEYBD_SET_DEBUGMODE */
-#ifdef CONFIG_PREBOOT	/* automatically configure "preboot" command on key match */
-	setenv ("preboot", str); /* set or delete definition */
-#endif	/* CONFIG_PREBOOT */
+#endif							/* KEYBD_SET_DEBUGMODE */
+#ifdef CONFIG_PREBOOT			/* automatically configure "preboot" command on key match */
+	setenv ("preboot", str);	/* set or delete definition */
+#endif							/* CONFIG_PREBOOT */
 	if (str != NULL) {
 		free (str);
 	}
@@ -462,13 +462,13 @@ void misc_init_r (bd_t *bd)
  */
 #ifdef CONFIG_PREBOOT
 
-static uchar kbd_magic_prefix[]   = "key_magic";
+static uchar kbd_magic_prefix[] = "key_magic";
 static uchar kbd_command_prefix[] = "key_cmd";
 
-static uchar *key_match (uchar *kbd_data)
+static uchar *key_match (uchar * kbd_data)
 {
 	uchar compare[KEYBD_DATALEN];
-	uchar magic[sizeof(kbd_magic_prefix) + 1];
+	uchar magic[sizeof (kbd_magic_prefix) + 1];
 	uchar extra;
 	uchar *str, *nxt, *suffix;
 	uchar *kbd_magic_keys;
@@ -482,7 +482,7 @@ static uchar *key_match (uchar *kbd_data)
 	 * "key_magic" is checked (old behaviour); the string "125" causes
 	 * checks for "key_magic1", "key_magic2" and "key_magic5", etc.
 	 */
-	if ((kbd_magic_keys = getenv("magic_keys")) == NULL)
+	if ((kbd_magic_keys = getenv ("magic_keys")) == NULL)
 		kbd_magic_keys = "";
 
 	/* loop over all magic keys;
@@ -497,11 +497,11 @@ static uchar *key_match (uchar *kbd_data)
 
 		extra = 0;
 
-		for (str=getenv (magic); str != NULL; str = (*nxt) ? nxt+1 : nxt) {
+		for (str= getenv(magic); str != NULL; str = (*nxt) ? nxt+1 : nxt) {
 			uchar c;
 			int k;
 
-			c = (uchar)simple_strtoul(str, (char **)(&nxt), 16);
+			c = (uchar) simple_strtoul (str, (char **) (&nxt), 16);
 
 			if (str == nxt) {	/* invalid character */
 				break;
@@ -512,7 +512,7 @@ static uchar *key_match (uchar *kbd_data)
 			 * Set matches to zero, so they match only once
 			 * and we can find duplicates or extra keys
 			 */
-			for (k=0; k<KEYBD_DATALEN; ++k) {
+			for (k = 0; k < KEYBD_DATALEN; ++k) {
 				if (compare[k] == '\0')	/* only non-zero entries */
 					continue;
 				if (c == compare[k]) {	/* found matching key */
@@ -530,13 +530,13 @@ static uchar *key_match (uchar *kbd_data)
 		 * and has no extra keys
 		 */
 
-		for (i=0; i<KEYBD_DATALEN; ++i) {
+		for (i = 0; i < KEYBD_DATALEN; ++i) {
 			if (compare[i])
 				break;
 		}
 
 		if ((i == KEYBD_DATALEN) && (extra == 0)) {
-			uchar cmd_name[sizeof(kbd_command_prefix) + 1];
+			uchar cmd_name[sizeof (kbd_command_prefix) + 1];
 			char *cmd;
 
 			sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);
@@ -544,7 +544,7 @@ static uchar *key_match (uchar *kbd_data)
 			cmd = getenv (cmd_name);
 #if 0
 			printf ("### Set PREBOOT to $(%s): \"%s\"\n",
-				cmd_name, cmd ? cmd : "<<NULL>>");
+					cmd_name, cmd ? cmd : "<<NULL>>");
 #endif
 			*kbd_data = *suffix;
 			return (cmd);
@@ -556,35 +556,35 @@ static uchar *key_match (uchar *kbd_data)
 	*kbd_data = '\0';
 	return (NULL);
 }
-#endif	/* CONFIG_PREBOOT */
+#endif							/* CONFIG_PREBOOT */
 
 /*-----------------------------------------------------------------------
  * Board Special Commands: PIC read/write
  */
 #if (CONFIG_COMMANDS & CFG_CMD_BSP)
-int do_pic (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
+int do_pic (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
 {
 	uchar reg, val;
 
 	switch (argc) {
-	case 3:			/* PIC read reg */
-		if (strcmp(argv[1],"read") != 0)
+	case 3:					/* PIC read reg */
+		if (strcmp (argv[1], "read") != 0)
 			break;
 
-		reg = simple_strtoul(argv[2], NULL, 16);
+		reg = simple_strtoul (argv[2], NULL, 16);
 
 		printf ("PIC read: reg %02x: %02x\n\n", reg, pic_read (reg));
 
 		return 0;
-	case 4:			/* PIC write reg val */
-		if (strcmp(argv[1],"write") != 0)
+	case 4:					/* PIC write reg val */
+		if (strcmp (argv[1], "write") != 0)
 			break;
 
-		reg = simple_strtoul(argv[2], NULL, 16);
-		val = simple_strtoul(argv[3], NULL, 16);
+		reg = simple_strtoul (argv[2], NULL, 16);
+		val = simple_strtoul (argv[3], NULL, 16);
 
 		printf ("PIC write: reg %02x val 0x%02x: %02x => ",
-			reg, val, pic_read (reg));
+				reg, val, pic_read (reg));
 		pic_write (reg, val);
 		printf ("%02x\n\n", pic_read (reg));
 		return 0;
@@ -596,10 +596,10 @@ int do_pic (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 }
 
 /* Read Keyboard status */
-int do_kbd (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
+int do_kbd (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
 {
-	uchar kbd_data [KEYBD_DATALEN];
-	uchar keybd_env[2*KEYBD_DATALEN+1];
+	uchar kbd_data[KEYBD_DATALEN];
+	uchar keybd_env[2 * KEYBD_DATALEN + 1];
 	uchar val;
 	int i;
 
@@ -608,11 +608,11 @@ int do_kbd (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 	/* Read keys */
 	val = KEYBD_CMD_READ_KEYS;
 	i2c_write (kbd_addr, 0, 0, &val, 1);
-	i2c_read  (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
+	i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
 
 	puts ("Keys:");
-	for (i=0; i<KEYBD_DATALEN; ++i) {
-		sprintf(keybd_env+i+i, "%02X", kbd_data[i]);
+	for (i = 0; i < KEYBD_DATALEN; ++i) {
+		sprintf (keybd_env + i + i, "%02X", kbd_data[i]);
 		printf (" %02x", kbd_data[i]);
 	}
 	putc ('\n');
@@ -623,29 +623,29 @@ int do_kbd (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 /* Read and set LSB switch */
 #define CFG_PC_TXD1_ENA		0x0008
 
-int do_lsb (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
+int do_lsb (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
 {
 	uchar val;
-	immap_t *immr = (immap_t *)CFG_IMMR;
+	immap_t *immr = (immap_t *) CFG_IMMR;
 
 	switch (argc) {
-	case 1:			/* lsb - print setting */
+	case 1:					/* lsb - print setting */
 		val = pic_read (0x60);
 		printf ("LSB is o%s\n", (val & 0x20) ? "n" : "ff");
 		return 0;
-	case 2:			/* lsb on or lsb off - set switch */
+	case 2:					/* lsb on or lsb off - set switch */
 		val = pic_read (0x60);
 
-		if (strcmp(argv[1],"on") == 0) {
-			val |=  0x20;
+		if (strcmp (argv[1], "on") == 0) {
+			val |= 0x20;
 			immr->im_ioport.iop_pcpar &= ~(CFG_PC_TXD1_ENA);
-			immr->im_ioport.iop_pcdat |=   CFG_PC_TXD1_ENA;
-			immr->im_ioport.iop_pcdir |=   CFG_PC_TXD1_ENA;
-		} else if (strcmp(argv[1],"off") == 0) {
+			immr->im_ioport.iop_pcdat |= CFG_PC_TXD1_ENA;
+			immr->im_ioport.iop_pcdir |= CFG_PC_TXD1_ENA;
+		} else if (strcmp (argv[1], "off") == 0) {
 			val &= ~0x20;
 			immr->im_ioport.iop_pcpar &= ~(CFG_PC_TXD1_ENA);
 			immr->im_ioport.iop_pcdat &= ~(CFG_PC_TXD1_ENA);
-			immr->im_ioport.iop_pcdir |=   CFG_PC_TXD1_ENA;
+			immr->im_ioport.iop_pcdir |= CFG_PC_TXD1_ENA;
 		} else {
 			break;
 		}
@@ -658,7 +658,7 @@ int do_lsb (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 	return 1;
 }
 
-#endif	/* CFG_CMD_BSP */
+#endif							/* CFG_CMD_BSP */
 
 /*-----------------------------------------------------------------------
  * Utilities
@@ -666,10 +666,10 @@ int do_lsb (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 
 uchar pic_read (uchar reg)
 {
-	return (i2c_reg_read(CFG_I2C_PICIO_ADDR, reg));
+	return (i2c_reg_read (CFG_I2C_PICIO_ADDR, reg));
 }
 
 void pic_write (uchar reg, uchar val)
 {
-	i2c_reg_write(CFG_I2C_PICIO_ADDR, reg, val);
+	i2c_reg_write (CFG_I2C_PICIO_ADDR, reg, val);
 }
diff --git a/common/cmd_eeprom.c b/common/cmd_eeprom.c
index fc73c83..da068a9 100644
--- a/common/cmd_eeprom.c
+++ b/common/cmd_eeprom.c
@@ -345,7 +345,8 @@ void eeprom_init  (void)
 #if defined(CONFIG_SPI)
 	spi_init_f ();
 #endif
-#if defined(CONFIG_HARD_I2C)
+#if defined(CONFIG_HARD_I2C) || \
+    defined(CONFIG_SOFT_I2C)
 	i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
 #endif
 }
diff --git a/drivers/pci.c b/drivers/pci.c
index 176f494..1a3babf 100644
--- a/drivers/pci.c
+++ b/drivers/pci.c
@@ -53,7 +53,7 @@ int pci_hose_##rw##_config_##size(struct pci_controller *hose, 			\
 				  pci_dev_t dev, 				\
 				  int offset, type value)			\
 {										\
-	return hose->ops->rw##_##size(hose, dev, offset, value);		\
+	return hose->rw##_##size(hose, dev, offset, value);			\
 }
 
 PCI_HOSE_OP(read, byte, u8 *)
diff --git a/drivers/pci_indirect.c b/drivers/pci_indirect.c
index 5283209..2806047 100644
--- a/drivers/pci_indirect.c
+++ b/drivers/pci_indirect.c
@@ -57,19 +57,16 @@ INDIRECT_PCI_OP(write, word, u16, out_le16, 2)
 INDIRECT_PCI_OP(write, dword, u32, out_le32, 0)
 #endif
 
-static struct pci_ops pci_indirect_ops =
-{
-	indirect_read_config_byte,
-	indirect_read_config_word,
-	indirect_read_config_dword,
-	indirect_write_config_byte,
-	indirect_write_config_word,
-	indirect_write_config_dword
-};
-
 void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
 {
-	hose->ops = &pci_indirect_ops;
+	pci_set_ops(hose,
+		    indirect_read_config_byte,
+		    indirect_read_config_word,
+		    indirect_read_config_dword,
+		    indirect_write_config_byte,
+		    indirect_write_config_word,
+		    indirect_write_config_dword);
+
 	hose->cfg_addr = (unsigned int *) cfg_addr;
 	hose->cfg_data = (unsigned char *) cfg_data;
 }
diff --git a/include/cmd_nvedit.h b/include/cmd_nvedit.h
index d6f3c6b..d3517fd 100644
--- a/include/cmd_nvedit.h
+++ b/include/cmd_nvedit.h
@@ -28,7 +28,7 @@
 #define	_CMD_NVEDIT_H
 
 #define	CMD_TBL_PRINTENV	MK_CMD_TBL_ENTRY(				\
-	"printenv",	8,	CFG_MAXARGS,	1,	do_printenv,		\
+	"printenv",	4,	CFG_MAXARGS,	1,	do_printenv,		\
 	"printenv- print environment variables\n",				\
 	"\n    - print values of all environment variables\n"			\
 	"printenv name ...\n"							\
diff --git a/include/config_lwmon.h b/include/config_lwmon.h
index 9dc6a71..7a2cef3 100644
--- a/include/config_lwmon.h
+++ b/include/config_lwmon.h
@@ -257,7 +257,9 @@
 #define CFG_I2C_KEYBD_ADDR	0x56	/* PIC LWE keyboard			*/
 #define CFG_I2C_PICIO_ADDR	0x57	/* PIC IO Expander			*/
 #define CFG_I2C_EEPROM_ADDR	0x58	/* EEPROM AT24C164			*/
-#define CFG_I2C_EEPROM_ADDR_LEN	2
+#define CFG_I2C_EEPROM_ADDR_LEN	1
+#define CFG_EEPROM_PAGE_WRITE_BITS	4
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS	10	/* and takes up to 10 msec */
 
 /*-----------------------------------------------------------------------
  * Cache Configuration
@@ -470,9 +472,9 @@
 			 TOUCHPNL_TIMING )
 #define CFG_BR5_PRELIM	((TOUCHPNL_BASE & BR_BA_MSK) | BR_PS_32 | BR_V )
 
-#define CFG_MEMORY_75		1
-#undef CFG_MEMORY_7E
-#undef CFG_MEMORY_8E
+#define	CFG_MEMORY_75
+#undef	CFG_MEMORY_7E
+#undef	CFG_MEMORY_8E
 
 /*
  * Memory Periodic Timer Prescaler
@@ -486,7 +488,7 @@
  */
 
 #define CFG_MAMR_8COL	0x80802114
-#define CFG_MAMR_9COL	0x80902114
+#define CFG_MAMR_9COL	0x80904114
 
 /*
  * MAR setting for SDRAM
diff --git a/include/pci.h b/include/pci.h
index 5377a17..84741f0 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -341,17 +341,6 @@ extern void pci_cfgfunc_nothing(struct pci_controller* hose, pci_dev_t dev,
 extern void pci_cfgfunc_config_device(struct pci_controller* hose, pci_dev_t dev,
 				      struct pci_config_table *);
 
-/* Low-level architecture-dependent routines */
-
-struct pci_ops {
-	int (*read_byte)(struct pci_controller*, pci_dev_t, int where, u8 *val);
-	int (*read_word)(struct pci_controller*, pci_dev_t, int where, u16 *val);
-	int (*read_dword)(struct pci_controller*, pci_dev_t, int where, u32 *val);
-	int (*write_byte)(struct pci_controller*, pci_dev_t, int where, u8 val);
-	int (*write_word)(struct pci_controller*, pci_dev_t, int where, u16 val);
-	int (*write_dword)(struct pci_controller*, pci_dev_t, int where, u32 val);
-};
-
 #define MAX_PCI_REGIONS		7
 
 /*
@@ -363,7 +352,6 @@ struct pci_controller {
 	int first_busno;
 	int last_busno;
 
-	struct pci_ops *ops;
 	volatile unsigned int *cfg_addr;
 	volatile unsigned char *cfg_data;
 
@@ -374,6 +362,14 @@ struct pci_controller {
 
 	void (*fixup_irq)(struct pci_controller *, pci_dev_t);
 
+	/* Low-level architecture-dependent routines */
+	int (*read_byte)(struct pci_controller*, pci_dev_t, int where, u8 *);
+	int (*read_word)(struct pci_controller*, pci_dev_t, int where, u16 *);
+	int (*read_dword)(struct pci_controller*, pci_dev_t, int where, u32 *);
+	int (*write_byte)(struct pci_controller*, pci_dev_t, int where, u8);
+	int (*write_word)(struct pci_controller*, pci_dev_t, int where, u16);
+	int (*write_dword)(struct pci_controller*, pci_dev_t, int where, u32);
+
 	/* Used by auto config */
 	struct pci_region *pci_mem, *pci_io;
 
@@ -381,6 +377,27 @@ struct pci_controller {
 	struct pci_region *pci_fb;
 };
 
+extern __inline__ void pci_set_ops(struct pci_controller *hose, 
+				   int (*read_byte)(struct pci_controller*, 
+						    pci_dev_t, int where, u8 *),
+				   int (*read_word)(struct pci_controller*, 
+						    pci_dev_t, int where, u16 *),
+				   int (*read_dword)(struct pci_controller*, 
+						     pci_dev_t, int where, u32 *),
+				   int (*write_byte)(struct pci_controller*, 
+						     pci_dev_t, int where, u8),
+				   int (*write_word)(struct pci_controller*, 
+						     pci_dev_t, int where, u16),
+				   int (*write_dword)(struct pci_controller*, 
+						      pci_dev_t, int where, u32)) {
+	hose->read_byte   = read_byte;
+	hose->read_word   = read_word;
+	hose->read_dword  = read_dword;
+	hose->write_byte  = write_byte;
+	hose->write_word  = write_word;
+	hose->write_dword = write_dword;
+}
+				   
 extern void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data);
 
 extern unsigned long pci_hose_bus_to_phys(struct pci_controller* hose,