From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Date: Mon, 30 May 2022 08:08:40 +0000 (+0530)
Subject: ARM: dts: qcom: sdx55: Fix the IRQ trigger type for UART
X-Git-Tag: howlett/maple/20220816~263^2~15^2~18
X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=ae500b351ab0006d933d804a2b7507fe1e98cecc;p=users%2Fjedix%2Flinux-maple.git

ARM: dts: qcom: sdx55: Fix the IRQ trigger type for UART

The trigger type should be LEVEL_HIGH. So fix it!

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220530080842.37024-2-manivannan.sadhasivam@linaro.org
---

diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi
index 1c2b208a5670..ef1da28f567c 100644
--- a/arch/arm/boot/dts/qcom-sdx55.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx55.dtsi
@@ -206,7 +206,7 @@
 		blsp1_uart3: serial@831000 {
 			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
 			reg = <0x00831000 0x200>;
-			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_LOW>;
+			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&gcc 30>,
 				 <&gcc 9>;
 			clock-names = "core", "iface";