From: Aapo Vienamo Date: Fri, 10 Aug 2018 18:08:41 +0000 (+0300) Subject: arm64: dts: tegra186: Assign clocks for sdmmc1 and sdmmc4 X-Git-Tag: v4.20-rc1~66^2~30^2~5 X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=98a2494f847c2d219db3b6460a3446199f0bd300;p=users%2Fjedix%2Flinux-maple.git arm64: dts: tegra186: Assign clocks for sdmmc1 and sdmmc4 Configure sdmmc4 parent clock to pllc4 and sdmmc1 to pllp_out0 by setting the assigned-clocks device tree properties. pllc4 offer better jitter performance and should be used with higher speed modes like HS200 and HS400. Signed-off-by: Aapo Vienamo Signed-off-by: Thierry Reding --- diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index 3b2fe0d99aaf2..6e9ef26a4253b 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -248,6 +248,9 @@ nvidia,pad-autocal-pull-down-offset-sdr104 = <0x05>; nvidia,default-tap = <0x5>; nvidia,default-trim = <0xb>; + assigned-clocks = <&bpmp TEGRA186_CLK_SDMMC1>, + <&bpmp TEGRA186_CLK_PLLP_OUT0>; + assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLP_OUT0>; status = "disabled"; }; @@ -299,6 +302,9 @@ interrupts = ; clocks = <&bpmp TEGRA186_CLK_SDMMC4>; clock-names = "sdhci"; + assigned-clocks = <&bpmp TEGRA186_CLK_SDMMC4>, + <&bpmp TEGRA186_CLK_PLLC4_VCO>; + assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLC4_VCO>; resets = <&bpmp TEGRA186_RESET_SDMMC4>; reset-names = "sdhci"; nvidia,pad-autocal-pull-up-offset-hs400 = <0x05>;