From: Hans de Goede Date: Wed, 6 Dec 2017 15:41:09 +0000 (+0100) Subject: ahci: Add PCI ids for Intel Bay Trail, Cherry Trail and Apollo Lake AHCI X-Git-Tag: v4.1.50~208 X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=973bdff02712de2117ff131c0cebcd4cfa709a61;p=users%2Fdwmw2%2Flinux.git ahci: Add PCI ids for Intel Bay Trail, Cherry Trail and Apollo Lake AHCI [ Upstream commit 998008b779e424bd7513c434d0ab9c1268459009 ] Add PCI ids for Intel Bay Trail, Cherry Trail and Apollo Lake AHCI SATA controllers. This commit is a preparation patch for allowing a different default sata link powermanagement policy for mobile chipsets. Signed-off-by: Hans de Goede Signed-off-by: Tejun Heo Signed-off-by: Sasha Levin --- diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index 34825d63d4835..bf63b8bf1e02d 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c @@ -388,6 +388,10 @@ static const struct pci_device_id ahci_pci_tbl[] = { { PCI_VDEVICE(INTEL, 0xa20e), board_ahci }, /* Lewisburg RAID*/ { PCI_VDEVICE(INTEL, 0xa252), board_ahci }, /* Lewisburg RAID*/ { PCI_VDEVICE(INTEL, 0xa256), board_ahci }, /* Lewisburg RAID*/ + { PCI_VDEVICE(INTEL, 0x0f22), board_ahci }, /* Bay Trail AHCI */ + { PCI_VDEVICE(INTEL, 0x0f23), board_ahci }, /* Bay Trail AHCI */ + { PCI_VDEVICE(INTEL, 0x22a3), board_ahci }, /* Cherry Trail AHCI */ + { PCI_VDEVICE(INTEL, 0x5ae3), board_ahci }, /* Apollo Lake AHCI */ /* JMicron 360/1/3/5/6, match class to avoid IDE function */ { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,