From: Robert Marko <robimarko@gmail.com>
Date: Mon, 4 Jul 2022 14:35:53 +0000 (+0200)
Subject: dt-bindings: mmc: sdhci-msm: document resets
X-Git-Tag: timers-urgent-2022-08-13~20^2~19
X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=95a4cf7172bc356f072df4eea4d8d307bdb38d86;p=users%2Fdwmw2%2Flinux.git

dt-bindings: mmc: sdhci-msm: document resets

Commit "mmc: sdhci-msm: Reset GCC_SDCC_BCR register for SDHC" added
support for utilizing a hardware reset and parsing it from DT, however
the bindings were not updated along with it.

So, document the usage of "resets" property with the limit of only one
item.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220704143554.1180927-1-robimarko@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
---

diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
index 31a3ce208e1a1..ca8814a804434 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
@@ -116,6 +116,9 @@ properties:
     description:
       Should specify pin control groups used for this controller.
 
+  resets:
+    maxItems: 1
+
   qcom,ddr-config:
     $ref: /schemas/types.yaml#/definitions/uint32
     description: platform specific settings for DDR_CONFIG reg.