From: wdenk <wdenk>
Date: Mon, 11 Feb 2002 23:52:38 +0000 (+0000)
Subject: * Implement system call mechanism thus removing function pointers
X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=92ad79ed3165a2f483280fb0a11705c281c82ef4;p=users%2Frw%2Fppcboot.git

* Implement system call mechanism thus removing function pointers
  from the bdinfo and initial_data structures.

* Add support for dual ethernet, interrupts, and I2C for the
  Sandpoint 8240 board.

* Patch by Greg Allen, 30 Jan 2002:
  fix get_tbclk() in cpu/mpc824x/cpu.c

* Patch by Stefan Roese, 7 Feb 2002:
  fixed bug in 4xx ethernet driver, waiting for auto negotiation to
  complete
---

diff --git a/CHANGELOG b/CHANGELOG
index 5bdaa79..46781c6 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,19 @@
 Modifications for 1.1.5:
 ======================================================================
 
+* Implement system call mechanism thus removing function pointers
+  from the bdinfo and initial_data structures.
+
+* Add support for dual ethernet, interrupts, and I2C for the
+  Sandpoint 8240 board.
+
+* Patch by Greg Allen, 30 Jan 2002:
+  fix get_tbclk() in cpu/mpc824x/cpu.c
+
+* Patch by Stefan Roese, 7 Feb 2002:
+  fixed bug in 4xx ethernet driver, waiting for auto negotiation to
+  complete
+
 * Patch by Steven Scholz, 05 Feb 2002:
   Rename CONFIG_IDE_* #defines to match used in current Linux kernels
 
diff --git a/board/sandpoint/eepro100.c b/board/sandpoint/eepro100.c
index 5db82e9..255d741 100644
--- a/board/sandpoint/eepro100.c
+++ b/board/sandpoint/eepro100.c
@@ -181,13 +181,17 @@ struct descriptor {			/* A generic descriptor. */
 
 #define ETH_ALEN		6
 
+#define MAX_CARD		2	/* Maximum number of the cards */
+
 static struct RxFD rx_ring[NUM_RX_DESC];	/* RX descriptor ring         */
 static struct TxFD tx_ring[NUM_TX_DESC];	/* TX descriptor ring         */
 static int rx_next;				/* RX descriptor ring pointer */
 static int tx_next;				/* TX descriptor ring pointer */
 static int tx_threshold;
 
-static u_long iobase = 0;
+static u_long iobase;
+static u_long card[MAX_CARD];
+static int    card_current, card_number = 0;
 
 static void init_rx_ring (void);
 static void purge_tx_ring (void);
@@ -239,81 +243,112 @@ static int wait_for_eepro100 (void)
 	return 1;
 }
 
-int eth_init (bd_t * bis)
+static int card_find (bd_t * bis)
 {
 	int i, status = 0;
 	int bus, devno, func;
-	int tx_cur;
-	struct descriptor *ias_cmd;
 
-	/* Find PCI device
-	 */
-	if ((pci_dev_find (PCI_VENDOR_ID_INTEL,
-			   PCI_DEVICE_ID_INTEL_82557,
-			   0, &bus, &devno, &func) != TRUE) &&
-	    (pci_dev_find (PCI_VENDOR_ID_INTEL,
-			   PCI_DEVICE_ID_INTEL_82559,
-			   0, &bus, &devno, &func) != TRUE)) {
-		puts ("Error: Can not find an ethernet card on the PCI bus\n");
-		return (status);
-	}
+	for (i=0; i<MAX_CARD; i++)
+	{
+		/* Find PCI device
+		 */
+		if ((pci_dev_find (PCI_VENDOR_ID_INTEL,
+				   PCI_DEVICE_ID_INTEL_82557,
+				   i, &bus, &devno, &func) != TRUE) &&
+		    (pci_dev_find (PCI_VENDOR_ID_INTEL,
+				   PCI_DEVICE_ID_INTEL_82559,
+				   i, &bus, &devno, &func) != TRUE)) {
+			break;
+		}
 
-	pci_config_inl (bus, devno, func,
-			PCI_CFG_BASE_ADDRESS_0, (uint32 *) & iobase);
-	iobase &= PCI_MEMBASE_MASK;
+		pci_config_inl (bus, devno, func,
+				PCI_CFG_BASE_ADDRESS_0, (uint32 *) & iobase);
+		iobase &= PCI_MEMBASE_MASK;
 
-	printf ("eth: Intel i82559 PCI EtherExpressPro @0x%lX"
-		"(bus=%d, device=%d, func=%d)\n",
-		iobase, bus, devno, func);
+		card[card_number] = iobase;
+		card_current      = card_number;
 
-	pci_config_outl (bus, devno, func,
-			 PCI_CFG_COMMAND,
-			 PCI_CMD_MEM_ENABLE | PCI_CMD_MASTER_ENABLE);
+		printf ("eth%d: Intel i82559 PCI EtherExpressPro @0x%lX"
+			"(bus=%d, device=%d, func=%d)\n",
+			card_current, iobase, bus, devno, func);
 
-	/* Check if I/O accesses and Bus Mastering are enabled.
-	 */
-	pci_config_inl (bus, devno, func, PCI_CFG_COMMAND, &status);
+		pci_config_outl (bus, devno, func,
+				 PCI_CFG_COMMAND,
+				 PCI_CMD_MEM_ENABLE | PCI_CMD_MASTER_ENABLE);
 
-	if (!(status & PCI_CMD_MEM_ENABLE)) {
-		puts ("Error: Can not enable MEM access\n");
-		return (status);
-	}
+		/* Check if I/O accesses and Bus Mastering are enabled.
+		 */
+		pci_config_inl (bus, devno, func, PCI_CFG_COMMAND, &status);
 
-	if (!(status & PCI_CMD_MASTER_ENABLE)) {
-		puts ("Error: Can not enable Bus Mastering\n");
-		return (status);
-	}
+		if (!(status & PCI_CMD_MEM_ENABLE)) {
+			puts ("Error: Can not enable MEM access\n");
+			continue;
+		}
 
-	/* Set the latency timer for value.
-	 */
-	pci_config_outb (bus, devno, func,
-			 PCI_CFG_LATENCY_TIMER, PCI_LATENCY_TIMER);
+		if (!(status & PCI_CMD_MASTER_ENABLE)) {
+			puts ("Error: Can not enable Bus Mastering\n");
+			continue;
+		}
 
-	udelay (10 * 1000);
+		/* Set the latency timer for value.
+		 */
+		pci_config_outb (bus, devno, func,
+				 PCI_CFG_LATENCY_TIMER, PCI_LATENCY_TIMER);
 
-	check_hw_addr (bis);
+		udelay (10 * 1000);
 
-	/* Reset the ethernet controller
-	 */
-	OUTL (I82559_SELECTIVE_RESET, SCBPort);
-	udelay (20);
+		check_hw_addr (bis);
 
-	OUTL (I82559_RESET, SCBPort);
-	udelay (20);
+		/* Reset the ethernet controller
+		 */
+		OUTL (I82559_SELECTIVE_RESET, SCBPort);
+		udelay (20);
 
-	if (!wait_for_eepro100 ()) {
-		puts ("Error: Can not reset ethernet controller\n");
-		return (status);
+		OUTL (I82559_RESET, SCBPort);
+		udelay (20);
+
+		if (!wait_for_eepro100 ()) {
+			puts ("Error: Can not reset ethernet controller\n");
+			continue;
+		}
+		OUTL (0, SCBPointer);
+		OUTW (SCB_M | RUC_ADDR_LOAD, SCBCmd);
+
+		if (!wait_for_eepro100 ()) {
+			puts ("Error: Can not reset ethernet controller\n");
+			continue;
+		}
+		OUTL (0, SCBPointer);
+		OUTW (SCB_M | CU_ADDR_LOAD, SCBCmd);
+
+		card_number++;
 	}
-	OUTL (0, SCBPointer);
-	OUTW (SCB_M | RUC_ADDR_LOAD, SCBCmd);
 
-	if (!wait_for_eepro100 ()) {
-		puts ("Error: Can not reset ethernet controller\n");
-		return (status);
+	return card_number;
+}
+
+static void card_set_current (int num) {
+	card_current = num;
+
+	iobase = card[card_current];
+
+	printf ("eth%d: using Intel i82559 PCI EtherExpressPro @0x%lX\n", card_current, iobase);
+}
+
+int eth_init (bd_t * bis)
+{
+	int i, status = 0;
+	int tx_cur;
+	struct descriptor *ias_cmd;
+
+	if (card_number == 0) {
+		if (!card_find (bis)) {
+			puts ("Error: Can not find any ethernet card on the PCI bus\n");
+			return (status);
+		}
+
+		card_set_current (0);
 	}
-	OUTL (0, SCBPointer);
-	OUTW (SCB_M | CU_ADDR_LOAD, SCBCmd);
 
 	/* Initialize Rx and Tx rings.
 	 */
@@ -356,7 +391,7 @@ int eth_init (bd_t * bis)
 	     !(le16_to_cpu (tx_ring[tx_cur].status) & CFG_STATUS_C);
 	     i++) {
 		if (i >= TOUT_LOOP) {
-			puts ("eth: Tx error buffer not ready\n");
+			printf ("eth%d: Tx error buffer not ready\n", card_current);
 			return (status);
 		}
 	}
@@ -370,13 +405,21 @@ int eth_init (bd_t * bis)
 	return (status);
 }
 
+void eth_try_another (void)
+{
+	card_set_current ((card_current + 1) % card_number);
+}
+
 int eth_send (volatile void *packet, int length)
 {
 	int i, status = 0;
 	int tx_cur;
 
+	if (card_number == 0)
+		return (status);
+
 	if (length <= 0) {
-		printf ("eth: bad packet size: %d\n", length);
+		printf ("eth%d: bad packet size: %d\n", card_current, length);
 		return (status);
 	}
 
@@ -395,7 +438,7 @@ int eth_send (volatile void *packet, int length)
 	tx_ring[tx_cur].tx_buf_size0 = cpu_to_le32 (length);
 
 	if (!wait_for_eepro100 ()) {
-		puts ("eth: Tx error ethernet controller not ready\n");
+		printf ("eth%d: Tx error ethernet controller not ready\n", card_current);
 		return (status);
 	}
 
@@ -408,7 +451,7 @@ int eth_send (volatile void *packet, int length)
 	     !(le16_to_cpu (tx_ring[tx_cur].status) & CFG_STATUS_C);
 	     i++) {
 		if (i >= TOUT_LOOP) {
-			puts ("eth: Tx error buffer not ready\n");
+			printf ("eth%d: Tx error buffer not ready\n", card_current);
 			return (status);
 		}
 	}
@@ -427,6 +470,9 @@ int eth_rx (void)
 	u16 status, stat;
 	int rx_prev, length = 0;
 
+	if (card_number == 0)
+		return (length);
+
 	stat = INW (SCBStatus);
 	OUTW (stat & SCB_STATUS_RNR, SCBStatus);
 
@@ -468,7 +514,7 @@ int eth_rx (void)
 
 	if (stat & SCB_STATUS_RNR) {
 
-		puts ("eth: Receiver is not ready, restart it\n");
+		printf ("eth%d: Receiver is not ready, restart it\n", card_current);
 
 		/* Reinitialize Rx ring.
 		 */
@@ -488,7 +534,7 @@ int eth_rx (void)
 
 void eth_halt (void)
 {
-	if (!iobase) {
+	if (card_number == 0) {
 		return;
 	}
 
@@ -610,9 +656,9 @@ static void check_hw_addr (bd_t * bis)
 	}
 
 	if (sum != 0xBABA) {
-		printf ("eth: Invalid EEPROM checksum %#4.4x, "
+		printf ("eth%d: Invalid EEPROM checksum %#4.4x, "
 			"check settings before activating this device!\n",
-			sum);
+			card_current, sum);
 	}
 
 	for (i = 0; i < ETH_ALEN; i++) {
diff --git a/board/sandpoint/pci.c b/board/sandpoint/pci.c
index 78d4972..7a0a4eb 100644
--- a/board/sandpoint/pci.c
+++ b/board/sandpoint/pci.c
@@ -577,11 +577,19 @@ int pci_dev_init(int busNo)
     if( deviceNo == 0x0f){
       /* Onboard */
       pci_dev_config(busNo, deviceNo, 0,
-		     PCI_ENET_IOADDR,
-		     PCI_ENET_MEMADDR,
+		     PCI_ENET0_IOADDR,
+		     PCI_ENET0_MEMADDR,
 		     PCI_CMD_MEM_ENABLE |			  
 		     PCI_CMD_MASTER_ENABLE);
     }  /* PCI Slot */
+    else if (deviceNo == 0x10) {
+      /* Onboard */
+      pci_dev_config(busNo, deviceNo, 0,
+		     PCI_ENET1_IOADDR,
+		     PCI_ENET1_MEMADDR,
+		     PCI_CMD_MEM_ENABLE |			  
+		     PCI_CMD_MASTER_ENABLE);
+    }
 
     pci_config_inb (busNo, deviceNo, 0, PCI_CFG_PROGRAMMING_IF, 
 		    &u.array[3]);
diff --git a/common/board.c b/common/board.c
index c8bc8eb..a27a887 100644
--- a/common/board.c
+++ b/common/board.c
@@ -26,6 +26,7 @@
 #include <command.h>
 #include <malloc.h>
 #include <devices.h>
+#include <syscall.h>
 #ifdef CONFIG_8xx
 #include <mpc8xx.h>
 #endif
@@ -138,6 +139,25 @@ strmhz(char *buf, long hz)
     return (buf);
 }
 
+static void syscalls_init(int reloc_off)
+{
+    ulong *addr;
+	
+    addr = (ulong *)syscall_tbl;
+    syscall_tbl[SYSCALL_MALLOC] = (void *)malloc;
+    syscall_tbl[SYSCALL_FREE]   = (void *)free;
+
+    syscall_tbl[SYSCALL_INSTALL_HDLR] = (void *)irq_install_handler;
+    syscall_tbl[SYSCALL_FREE_HDLR]    = (void *)irq_free_handler;
+
+    addr = (ulong*)0xc00;    /* syscall ISR addr */
+
+    /* patch ISR code */
+    *addr++ |= (ulong)syscall_tbl >> 16;
+    *addr++ |= (ulong)syscall_tbl & 0xFFFF;
+    *addr++ |= NR_SYSCALLS >> 16;
+    *addr++ |= NR_SYSCALLS & 0xFFFF;
+}
 
 /************************************************************************
  *
@@ -479,19 +499,6 @@ board_init_f (ulong bootflag)
 #endif
 #endif
 
-    /* Function pointers must be added after code relocation */
-#if 0
-    bd->bi_mon_fnc.getc   = NULL;	/* Addr of getc() from Console	*/
-    bd->bi_mon_fnc.tstc   = NULL;	/* Addr of tstc() from Console	*/
-    bd->bi_mon_fnc.putc   = NULL;	/* Addr of putc()   to Console	*/
-    bd->bi_mon_fnc.putstr = NULL;	/* Addr of putstr() to Console	*/
-    bd->bi_mon_fnc.printf = NULL;	/* Addr of printf() to Console	*/
-    bd->bi_mon_fnc.install_hdlr = NULL;
-    bd->bi_mon_fnc.free_hdlr    = NULL;
-    bd->bi_mon_fnc.malloc	= NULL;
-    bd->bi_mon_fnc.free		= NULL;
-#endif
-
 #ifdef DEBUG
     printf ("New Stack Pointer is: %08lx\n", addr_sp);
 #endif
@@ -520,8 +527,6 @@ void    board_init_r  (bd_t *bd, ulong dest_addr)
     cmd_tbl_t	*cmdtp;
     ulong	flash_size;
     ulong	reloc_off = dest_addr - CFG_MONITOR_BASE;
-    /* Pointer to initial global data area */
-    init_data_t *idata = (init_data_t *)(CFG_INIT_RAM_ADDR + CFG_INIT_DATA_OFFSET);
 
     extern void malloc_bin_reloc (ulong);
 
@@ -535,28 +540,6 @@ void    board_init_r  (bd_t *bd, ulong dest_addr)
      * Save a global pointer to the board info struct
      */
     bd_ptr = bd ;
-    /*
-     * Set the monitor function pointer to DPRAM init data
-     * and relocate at least the I/O function pointers
-     */
-    bd->bi_mon_fnc = &idata->bi_mon_fnc;
-    {	ulong addr;
-
-	addr = (ulong)(idata->bi_mon_fnc.getc  ) + reloc_off;
-	idata->bi_mon_fnc.getc   = (int  (*)(void))addr;
-
-	addr = (ulong)(idata->bi_mon_fnc.tstc  ) + reloc_off;
-	idata->bi_mon_fnc.tstc   = (int  (*)(void))addr;
-
-	addr = (ulong)(idata->bi_mon_fnc.putc  ) + reloc_off;
-	idata->bi_mon_fnc.putc   = (void (*)(const char c))addr;
-
-	addr = (ulong)(idata->bi_mon_fnc.puts  ) + reloc_off;
-	idata->bi_mon_fnc.puts   = (void (*)(const char *s))addr;
-
-	addr = (ulong)(idata->bi_mon_fnc.printf) + reloc_off;
-	idata->bi_mon_fnc.printf = (void (*)(const char *fmt, ...))addr;
-    }
 
     /*
      * We have to relocate the command table manually
@@ -660,9 +643,6 @@ void    board_init_r  (bd_t *bd, ulong dest_addr)
     /* initialize higher level parts of CPU like time base and timers */
     cpu_init_r (bd);
 
-    bd->bi_mon_fnc->malloc = malloc;
-    bd->bi_mon_fnc->free   = free;
-
     WATCHDOG_RESET();
 
     /* initialize malloc() area */
@@ -695,9 +675,13 @@ void    board_init_r  (bd_t *bd, ulong dest_addr)
     /* Initialize devices */
     devices_init (bd, reloc_off);
 
+    /* allocate syscalls table (console_init_r will fill it in */
+    syscall_tbl = (void**)malloc(NR_SYSCALLS*sizeof(void*));
+
     /* Initialize the console (after the relocation and devices init) */
     console_init_r (reloc_off);
 /** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** **/
+    syscalls_init(reloc_off);
 
 #if defined(CONFIG_CCM)		|| \
     defined(CONFIG_COGENT)	|| \
@@ -766,9 +750,6 @@ void    board_init_r  (bd_t *bd, ulong dest_addr)
 
     /* Insert function pointers now that we have relocated the code */
 
-    bd->bi_mon_fnc->install_hdlr = irq_install_handler;
-    bd->bi_mon_fnc->free_hdlr    = irq_free_handler;
-
     /* Initialize from environment */
     if ((s = getenv("loadaddr")) != NULL) {
     	load_addr = simple_strtoul(s, NULL, 16);
diff --git a/common/cmd_boot.c b/common/cmd_boot.c
index f781b06..bfde7fb 100644
--- a/common/cmd_boot.c
+++ b/common/cmd_boot.c
@@ -30,6 +30,7 @@
 #include <cmd_autoscript.h>
 #include <s_record.h>
 #include <net.h>
+#include <syscall.h>
 
 
 #if (CONFIG_COMMANDS & CFG_CMD_LOADS)
@@ -89,15 +90,6 @@ int do_bdinfo (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 #endif
 	printf ("\nIP addr     = ");	print_IPaddr (bd->bi_ip_addr);
 	printf ("\nbaudrate    = %6ld bps\n", bd->bi_baudrate   );
-	print_num ("getc",	    (ulong)bd->bi_mon_fnc->getc);
-	print_num ("tstc",	    (ulong)bd->bi_mon_fnc->tstc);
-	print_num ("putc",	    (ulong)bd->bi_mon_fnc->putc);
-	print_num ("puts",	    (ulong)bd->bi_mon_fnc->puts);
-	print_num ("printf",	    (ulong)bd->bi_mon_fnc->printf);
-	print_num ("install_hdlr",  (ulong)bd->bi_mon_fnc->install_hdlr);
-	print_num ("free_hdlr",	    (ulong)bd->bi_mon_fnc->free_hdlr);
-	print_num ("malloc",	    (ulong)bd->bi_mon_fnc->malloc);
-	print_num ("free",	    (ulong)bd->bi_mon_fnc->free);
 	return 0;
 }
 
@@ -330,7 +322,7 @@ read_record (char *buf, ulong len)
 
 	    /* Check for the console hangup (if any different from serial) */
 
-	    if (bd_ptr->bi_mon_fnc->getc != serial_getc)
+	    if (syscall_tbl[SYSCALL_GETC] != serial_getc)
 	    {
 		if (ctrlc())
 		{
diff --git a/common/cmd_eeprom.c b/common/cmd_eeprom.c
index 0d5f352..c5e0445 100644
--- a/common/cmd_eeprom.c
+++ b/common/cmd_eeprom.c
@@ -347,6 +347,10 @@ void eeprom_init  (void)
 	i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
 # endif
 #endif
+#if defined(CONFIG_MPC824X) && defined(CONFIG_I2C)
+	i2c_init ();
+#endif
+
 }
 /*-----------------------------------------------------------------------
  */
diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c
index 0b88e9d..b5b9452 100644
--- a/common/cmd_i2c.c
+++ b/common/cmd_i2c.c
@@ -54,7 +54,7 @@ do_i2c (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 
 #if !defined(CONFIG_CPCI405) && !defined(CONFIG_AR405) && \
 		!defined(CONFIG_I2C405) && !defined(CONFIG_W7O) && \
-    !defined (CONFIG_WALNUT405) && !defined (CONFIG_ERIC)
+    !defined (CONFIG_WALNUT405) && !defined (CONFIG_ERIC) && !defined (CONFIG_MPC824X) 
 
     i2c_state_t state;
 #endif
@@ -72,7 +72,7 @@ do_i2c (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 	    printf ("I2C reset 50kHz ... ");
 #if defined(CONFIG_CPCI405) || defined(CONFIG_AR405) || \
 		defined(CONFIG_I2C405) || defined(CONFIG_W7O) || \
-    defined (CONFIG_WALNUT405) || defined (CONFIG_ERIC)
+    defined (CONFIG_WALNUT405) || defined (CONFIG_ERIC) || defined (CONFIG_MPC824X)
 	    i2c_init ();
 #else
 	    i2c_init (50000, 0xfe);	/* use all one's as slave address */
@@ -91,7 +91,7 @@ do_i2c (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 		printf ("I2C reset %dkHz ... ", speed/1000);
 #if defined(CONFIG_CPCI405) || defined(CONFIG_AR405) || \
 		defined(CONFIG_I2C405) || defined(CONFIG_W7O) || \
-    defined (CONFIG_WALNUT405) || defined (CONFIG_ERIC)
+    defined (CONFIG_WALNUT405) || defined (CONFIG_ERIC) || defined (CONFIG_MPC824X)
 	    i2c_init ();
 #else
 	    i2c_init (speed, 0xfe);	/* use all one's as slave address */
@@ -119,7 +119,7 @@ do_i2c (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 
 #if defined(CONFIG_CPCI405) || defined(CONFIG_AR405) || \
 		defined(CONFIG_I2C405) || defined(CONFIG_W7O) || \
-    defined (CONFIG_WALNUT405) || defined (CONFIG_ERIC)
+    defined (CONFIG_WALNUT405) || defined (CONFIG_ERIC) || (CONFIG_MPC824X)
 
 #else
 		i2c_newio (&state);
@@ -132,10 +132,15 @@ do_i2c (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 
 		rc = i2c_receive (i2c_addr, size, data_addr);
 #else
+#if !defined(CONFIG_MPC824X)
 
 		rc = i2c_receive (&state, i2c_addr, 0,
 				  I2CF_START_COND|I2CF_STOP_COND,
 				  size, data_addr);
+#else
+
+		rc = i2c_receive (i2c_addr, 0, size, data_addr);
+#endif
 #endif
 
 
@@ -146,7 +151,7 @@ do_i2c (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 
 #if defined(CONFIG_CPCI405) || defined(CONFIG_AR405) || \
 		defined(CONFIG_I2C405) || defined(CONFIG_W7O) || \
-    defined (CONFIG_WALNUT405) || defined (CONFIG_ERIC)
+    defined (CONFIG_WALNUT405) || defined (CONFIG_ERIC) || defined (CONFIG_MPC824X)
 
 #else
 
@@ -171,7 +176,7 @@ do_i2c (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 
 #if defined(CONFIG_CPCI405) || defined(CONFIG_AR405) || \
 		defined(CONFIG_I2C405) || defined(CONFIG_W7O) || \
-    defined (CONFIG_WALNUT405) || defined (CONFIG_ERIC)
+    defined (CONFIG_WALNUT405) || defined (CONFIG_ERIC) || defined (CONFIG_MPC824X)
 
 #else
 		i2c_newio (&state);
@@ -184,8 +189,12 @@ do_i2c (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 		rc = i2c_send (i2c_addr, size, data_addr);
 #else
 
+#if !defined(CONFIG_MPC824X)
 		rc = i2c_send (&state, i2c_addr, 0,
 		    I2CF_START_COND|I2CF_STOP_COND, size, data_addr);
+#else
+		rc = i2c_send (i2c_addr, 0, size, data_addr);
+#endif
 #endif
 		if (rc) {
 		    printf ("i2c_receive FAILED rc=%d\n", rc);
@@ -194,7 +203,7 @@ do_i2c (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 
 #if defined(CONFIG_CPCI405) || defined(CONFIG_AR405) || \
 		defined(CONFIG_I2C405) || defined(CONFIG_W7O) || \
-    defined (CONFIG_WALNUT405) || defined (CONFIG_ERIC)
+    defined (CONFIG_WALNUT405) || defined (CONFIG_ERIC) || defined (CONFIG_MPC824X)
 
 #else
 
@@ -224,7 +233,7 @@ do_i2c (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 
 #if defined(CONFIG_CPCI405) || defined(CONFIG_AR405) || \
 		defined(CONFIG_I2C405) || defined(CONFIG_W7O) || \
-    defined (CONFIG_WALNUT405) || defined (CONFIG_ERIC)
+    defined (CONFIG_WALNUT405) || defined (CONFIG_ERIC) || defined (CONFIG_MPC824X)
 
 #else
 		i2c_newio (&state);
@@ -236,10 +245,14 @@ do_i2c (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 
 		rc = i2c_receive (i2c_addr, size, data_addr);
 #else
+#if !defined(CONFIG_MPC824X)
 
 		rc = i2c_receive (&state, i2c_addr, sec_addr,
 		    I2CF_ENABLE_SECONDARY|I2CF_START_COND|I2CF_STOP_COND,
 		    size, data_addr);
+#else
+		rc = i2c_receive (i2c_addr, sec_addr, size, data_addr);
+#endif
 #endif
 
 		if (rc) {
@@ -249,7 +262,7 @@ do_i2c (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 
 #if defined(CONFIG_CPCI405) || defined(CONFIG_AR405) || \
 		defined(CONFIG_I2C405) || defined(CONFIG_W7O) || \
-    defined (CONFIG_WALNUT405) || defined (CONFIG_ERIC)
+    defined (CONFIG_WALNUT405) || defined (CONFIG_ERIC) || defined (CONFIG_MPC824X)
 
 #else
 
@@ -276,7 +289,7 @@ do_i2c (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 
 #if defined(CONFIG_CPCI405) || defined(CONFIG_AR405) || \
 		defined(CONFIG_I2C405) || defined(CONFIG_W7O) || \
-    defined (CONFIG_WALNUT405) || defined (CONFIG_ERIC)
+    defined (CONFIG_WALNUT405) || defined (CONFIG_ERIC) || defined (CONFIG_MPC824X)
 
 #else
 		i2c_newio (&state);
@@ -288,9 +301,13 @@ do_i2c (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 
 		rc = i2c_send (i2c_addr, size, data_addr);
 #else
+#if !defined(CONFIG_MPC824X)
 		rc = i2c_send (&state, i2c_addr, sec_addr,
 		    I2CF_ENABLE_SECONDARY|I2CF_START_COND|I2CF_STOP_COND,
 		    size, data_addr);
+#else
+		rc = i2c_send (i2c_addr, sec_addr, size, data_addr);
+#endif
 #endif
 
 		if (rc) {
@@ -300,7 +317,7 @@ do_i2c (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 
 #if defined(CONFIG_CPCI405) || defined(CONFIG_AR405) || \
 		defined(CONFIG_I2C405) || defined(CONFIG_W7O) || \
-    defined (CONFIG_WALNUT405) || defined (CONFIG_ERIC)
+    defined (CONFIG_WALNUT405) || defined (CONFIG_ERIC) || defined (CONFIG_MPC824X)
 
 #else
 
diff --git a/common/console.c b/common/console.c
index 1d47418..b110053 100644
--- a/common/console.c
+++ b/common/console.c
@@ -25,6 +25,7 @@
 #include <stdarg.h>
 #include <malloc.h>
 #include <console.h>
+#include <syscall.h>
 
 #ifdef CFG_CONSOLE_IS_IN_ENV
 /* 
@@ -71,13 +72,13 @@ static int console_setfile (int file, device_t * dev)
 		 */
 		switch (file) {
 		case stdin:
-			bd_ptr->bi_mon_fnc->getc = dev->getc;
-			bd_ptr->bi_mon_fnc->tstc = dev->tstc;
+			syscall_tbl[SYSCALL_GETC] = dev->getc;
+			syscall_tbl[SYSCALL_TSTC] = dev->tstc;
 			break;
 		case stdout:
-			bd_ptr->bi_mon_fnc->putc = dev->putc;
-			bd_ptr->bi_mon_fnc->puts = dev->puts;
-			bd_ptr->bi_mon_fnc->printf = printf;
+			syscall_tbl[SYSCALL_PUTC] = dev->putc;
+			syscall_tbl[SYSCALL_PUTS] = dev->puts;
+			syscall_tbl[SYSCALL_PRINTF] = printf;
 			break;
 		}
 		break;
@@ -314,11 +315,6 @@ void console_init_f (void)
 		(init_data_t *) (CFG_INIT_RAM_ADDR + CFG_INIT_DATA_OFFSET);
 
 	idata->relocated = 0;		/* Use these pointers before relocation */
-	idata->bi_mon_fnc.getc = serial_getc;
-	idata->bi_mon_fnc.tstc = serial_tstc;
-	idata->bi_mon_fnc.putc = serial_putc;
-	idata->bi_mon_fnc.puts = serial_puts;
-	idata->bi_mon_fnc.printf = serial_printf;
 }
 
 #ifdef CFG_CONSOLE_IS_IN_ENV
@@ -346,18 +342,23 @@ device_t *search_device (int flags, char *name)
 /* Called after the relocation - use desired console functions */
 void console_init_r (ulong reloc_offset)
 {
+	char *stdinname, *stdoutname, *stderrname;
 	init_data_t *idata =
 		(init_data_t *) (CFG_INIT_RAM_ADDR + CFG_INIT_DATA_OFFSET);
 	device_t *inputdev = NULL, *outputdev = NULL, *errdev = NULL;
 
-	/* sdtin stdout and stderr are in environment */
-	/* scan for it */
-	char *stdinname  = getenv ("stdin");
-	char *stdoutname = getenv ("stdout");
-	char *stderrname = getenv ("stderr");
+	/* set default handlers at first */
+	syscall_tbl[SYSCALL_GETC] = serial_getc;
+	syscall_tbl[SYSCALL_TSTC] = serial_tstc;
+	syscall_tbl[SYSCALL_PUTC] = serial_putc;
+	syscall_tbl[SYSCALL_PUTS] = serial_puts;
+	syscall_tbl[SYSCALL_PRINTF] = serial_printf;
 
-	/* Global pointer to monitor structure (updated by the console stuff) */
-	bd_ptr->bi_mon_fnc = &idata->bi_mon_fnc;
+	/* stdin stdout and stderr are in environment */
+	/* scan for it */
+	stdinname  = getenv ("stdin");
+	stdoutname = getenv ("stdout");
+	stderrname = getenv ("stderr");
 
 	if (overwrite_console () == 0) { /* if not overwritten by config switch */
 		inputdev  = search_device (DEV_FLAGS_INPUT,  stdinname);
@@ -434,10 +435,6 @@ void console_init_r (ulong reloc_offset)
 	device_t *inputdev = NULL, *outputdev = NULL;
 	int i, items = ListNumItems (devlist);
 
-	/* Global pointer to monitor structure (updated by the console stuff) */
-	bd_ptr->bi_mon_fnc = &idata->bi_mon_fnc;
-
-
 	/* Scan devices looking for input and output devices */
 	for (i = 1;
 	     (i <= items) && ((inputdev == NULL) || (outputdev == NULL));
diff --git a/cpu/74xx_7xx/start.S b/cpu/74xx_7xx/start.S
index ba08573..855dd7f 100644
--- a/cpu/74xx_7xx/start.S
+++ b/cpu/74xx_7xx/start.S
@@ -1,7 +1,7 @@
 /*
  *  Copyright (C) 1998	Dan Malek <dmalek@jlc.net>
  *  Copyright (C) 1999	Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
- *  Copyright (C) 2000	Wolfgang Denk <wd@denx.de>
+ *  Copyright (C) 2000,2001,2002 Wolfgang Denk <wd@denx.de>
  *  Copyright (C) 2001  Josh Huber <huber@mclx.com>
  *
  * See file CREDITS for list of people who contributed to this
@@ -157,7 +157,60 @@ ProgramCheck:
 	STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
 	STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
 
-	STD_EXCEPTION(0xc00, SystemCall, UnknownException)
+	. = 0xc00
+/*
+ * r0 - SYSCALL number
+ * r3-... arguments
+ */
+SystemCall:
+	addis	r11,r0,0		/* get functions table addr */
+	ori	r11,r11,0		/* Note: this code is patched in trap_init */
+	addis	r12,r0,0		/* get number of functions */
+	ori	r12,r12,0
+
+	cmplw	0, r0, r12
+	bge	1f
+	
+	rlwinm	r0,r0,2,0,31		/* fn_addr = fn_tbl[r0] */
+	add	r11,r11,r0
+	lwz	r11,0(r11)
+
+	li	r12,0xd00-4*3		/* save LR & SRRx */
+	mflr	r0
+	stw	r0,0(r12)
+	mfspr	r0,SRR0
+	stw	r0,4(r12)
+	mfspr	r0,SRR1
+	stw	r0,8(r12)
+
+	li	r12,0xc00+_back-SystemCall
+	mtlr	r12
+	mtspr	SRR0,r11
+
+1:	SYNC
+	rfi
+
+_back:
+
+	mfmsr	r11			/* Disable interrupts */
+	li	r12,0
+	ori	r12,r12,MSR_EE
+	andc	r11,r11,r12
+	SYNC				/* Some chip revs need this... */
+	mtmsr	r11
+	SYNC
+
+	li	r12,0xd00-4*3		/* restore regs */
+	lwz	r11,0(r12)
+	mtlr	r11
+	lwz	r11,4(r12)
+	mtspr	SRR0,r11
+	lwz	r11,8(r12)
+	mtspr	SRR1,r11
+
+	SYNC
+	rfi
+
 	STD_EXCEPTION(0xd00, SingleStep, UnknownException)
 
 	STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
@@ -580,7 +633,6 @@ get_pvr:
 	blr
 
 /*-----------------------------------------------------------------------*/
-
 /*
  * void relocate_code (addr_sp, bd, addr_moni)
  *
@@ -787,12 +839,21 @@ trap_init:
 	bl	trap_reloc
 
 	li	r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
-	li	r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
+	li	r8, SystemCall - _start + EXC_OFF_SYS_RESET
 3:
 	bl	trap_reloc
 	addi	r7, r7, 0x100		/* next exception vector	*/
 	cmplw	0, r7, r8
 	blt	3b
+	
+	li	r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
+	li	r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
+4:
+	bl	trap_reloc
+	addi	r7, r7, 0x100		/* next exception vector	*/
+	cmplw	0, r7, r8
+	blt	4b
+
 
 	mtlr	r4			/* restore link register	*/
 	blr
diff --git a/cpu/mpc75x/start.S b/cpu/mpc75x/start.S
index e8ef5cc..45c7f96 100644
--- a/cpu/mpc75x/start.S
+++ b/cpu/mpc75x/start.S
@@ -1,7 +1,7 @@
 /*
  *  Copyright (C) 1998	Dan Malek <dmalek@jlc.net>
  *  Copyright (C) 1999	Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
- *  Copyright (C) 2000	Wolfgang Denk <wd@denx.de>
+ *  Copyright (C) 2000,2001,2002 Wolfgang Denk <wd@denx.de>
  *  Copyright (C) 2001	Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  *			Andreas Heppel <aheppel@sysgo.de>
  *
@@ -167,7 +167,60 @@ ProgramCheck:
 	STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
 	STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
 
-	STD_EXCEPTION(0xc00, SystemCall, UnknownException)
+	. = 0xc00
+/*
+ * r0 - SYSCALL number
+ * r3-... arguments
+ */
+SystemCall:
+	addis	r11,r0,0		/* get functions table addr */
+	ori	r11,r11,0		/* Note: this code is patched in trap_init */
+	addis	r12,r0,0		/* get number of functions */
+	ori	r12,r12,0
+
+	cmplw	0, r0, r12
+	bge	1f
+	
+	rlwinm	r0,r0,2,0,31		/* fn_addr = fn_tbl[r0] */
+	add	r11,r11,r0
+	lwz	r11,0(r11)
+
+	li	r12,0xd00-4*3		/* save LR & SRRx */
+	mflr	r0
+	stw	r0,0(r12)
+	mfspr	r0,SRR0
+	stw	r0,4(r12)
+	mfspr	r0,SRR1
+	stw	r0,8(r12)
+
+	li	r12,0xc00+_back-SystemCall
+	mtlr	r12
+	mtspr	SRR0,r11
+
+1:	SYNC
+	rfi
+
+_back:
+
+	mfmsr	r11			/* Disable interrupts */
+	li	r12,0
+	ori	r12,r12,MSR_EE
+	andc	r11,r11,r12
+	SYNC				/* Some chip revs need this... */
+	mtmsr	r11
+	SYNC
+
+	li	r12,0xd00-4*3		/* restore regs */
+	lwz	r11,0(r12)
+	mtlr	r11
+	lwz	r11,4(r12)
+	mtspr	SRR0,r11
+	lwz	r11,8(r12)
+	mtspr	SRR1,r11
+
+	SYNC
+	rfi
+
 	STD_EXCEPTION(0xd00, SingleStep, UnknownException)
 
 	STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
@@ -800,12 +853,20 @@ trap_init:
 	bl	trap_reloc
 
 	li	r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
-	li	r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
+	li	r8, SystemCall - _start + EXC_OFF_SYS_RESET
 3:
 	bl	trap_reloc
 	addi	r7, r7, 0x100		/* next exception vector	*/
 	cmplw	0, r7, r8
 	blt	3b
+	
+	li	r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
+	li	r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
+4:
+	bl	trap_reloc
+	addi	r7, r7, 0x100		/* next exception vector	*/
+	cmplw	0, r7, r8
+	blt	4b
 
 	mtlr	r4			/* restore link register	*/
 	blr
diff --git a/cpu/mpc824x/Makefile b/cpu/mpc824x/Makefile
index f08a084..33768d0 100644
--- a/cpu/mpc824x/Makefile
+++ b/cpu/mpc824x/Makefile
@@ -25,14 +25,14 @@ include $(TOPDIR)/config.mk
 
 LIB	= lib$(CPU).a
 
-START	= start.S
+START	= start.S drivers/i2c/i2c2.o
 OBJS	= traps.o cpu.o cpu_init.o interrupts.o speed.o \
-          drivers/epic/epic1.o
+          drivers/epic/epic1.o drivers/i2c/i2c1.o
 
 all:	.depend $(START) $(LIB)
 
 $(LIB):	$(OBJS)
-	$(AR) crv $@ $(OBJS)
+	$(AR) crv $@ $(OBJS) drivers/i2c/i2c2.o
 
 #########################################################################
 
diff --git a/cpu/mpc824x/cpu.c b/cpu/mpc824x/cpu.c
index 6dabb59..86050cd 100644
--- a/cpu/mpc824x/cpu.c
+++ b/cpu/mpc824x/cpu.c
@@ -119,24 +119,11 @@ int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 
 /*
  * Get timebase clock frequency (like cpu_clk in Hz)
- *
+ * This is the sys_logic_clk (memory bus) divided by 4
  */
 unsigned long get_tbclk (void)
 {
-	ulong tbclk;
-
-#if defined(CONFIG_MPC8245)
-	tbclk = (CONFIG_SYS_CLK_FREQ + 3L) / 4L;
-#elif defined(CONFIG_CU824)
-	tbclk = CONFIG_SYS_CLK_FREQ;
-#else
-	/* Pointer to initial global data area */
-	init_data_t *idata =
-		(init_data_t *)(CFG_INIT_RAM_ADDR+CFG_INIT_DATA_OFFSET);
-
-	tbclk = (idata->cpu_clk + 3L) / 4L;
-#endif
-	return (tbclk);
+	return ((get_bus_freq(0) + 2L) / 4L);
 }
 
 /* ------------------------------------------------------------------------- */
diff --git a/cpu/mpc824x/drivers/epic/epic1.c b/cpu/mpc824x/drivers/epic/epic1.c
index 2050bb8..2efd20c 100644
--- a/cpu/mpc824x/drivers/epic/epic1.c
+++ b/cpu/mpc824x/drivers/epic/epic1.c
@@ -326,7 +326,7 @@ void sysEUMBBARWrite
     )
     {
 
-    *(ULONG *) (EUMBBAR + regNum) = LONGSWAP(regVal);
+    *(ULONG *) (CFG_EUMB_ADDR + regNum) = LONGSWAP(regVal);
     return ;
     }
 
diff --git a/cpu/mpc824x/drivers/i2c/i2c.h b/cpu/mpc824x/drivers/i2c/i2c.h
index 0bc22c4..3209bfe 100644
--- a/cpu/mpc824x/drivers/i2c/i2c.h
+++ b/cpu/mpc824x/drivers/i2c/i2c.h
@@ -6,6 +6,7 @@
  * Copyright Motrola 1999
  *
  ****************************************************/
+#define get_eumbbar() CFG_EUMB_ADDR
 
 #define I2CADR    0x00003000
 #define I2CFDR    0x00003004
diff --git a/cpu/mpc824x/drivers/i2c/i2c1.c b/cpu/mpc824x/drivers/i2c/i2c1.c
index 93345e7..986b0aa 100644
--- a/cpu/mpc824x/drivers/i2c/i2c1.c
+++ b/cpu/mpc824x/drivers/i2c/i2c1.c
@@ -3,15 +3,21 @@
  * Copyright @ Motorola, 1999
  *
  ************************************************************/
+#include <ppcboot.h>
+
+#ifdef CONFIG_I2C
+#include <i2c.h>
 #include "i2c_export.h"
 #include "i2c.h"
 
+#undef I2CDBG0
 
 /* Define a macro to use an optional application-layer print function, if
  * one was passed to the I2C library during initialization.  If there was
  * no function pointer passed, this protects against calling it.  Also define
  * the global variable that holds the passed pointer.
  */
+#define DELAY_US 100000
 #define PRINT if ( app_print ) app_print
 static int (*app_print)(char *,...);
 
@@ -40,13 +46,10 @@ static unsigned int MasterRcvAddress = 0;
  * defined in dink32/drivers/i2c/i2c2.s.
  */
 static unsigned int Global_eumbbar = 0;
-extern unsigned int get_eumbbar();
 
 extern unsigned int load_runtime_reg( unsigned int eumbbar, unsigned int reg );
-#pragma Alias( load_runtime_reg, "load_runtime_reg" )
 
 extern unsigned int store_runtime_reg( unsigned int eumbbar, unsigned int reg, unsigned int val );
-#pragma Alias( store_runtime_reg, "store_runtime_reg" )
 
 /************************** API *****************/
 
@@ -156,6 +159,7 @@ unsigned char dummy_buffer[257];
 if (act == I2C_MASTER_XMIT)
 {
 int i;
+if (len > 256 ) return I2C_ERROR;
 for (i=1;i<=len;i++)dummy_buffer[i]=buffer[i-1];
 dummy_buffer[0]=data_addr;
   status = I2C_do_buffer(en_int, act, i2c_addr, 1 + len,
@@ -243,6 +247,7 @@ static I2C_Status I2C_do_buffer( I2C_INTERRUPT_MODE en_int,
 {
   I2CStatus rval;
   unsigned int dev_stat;
+  int time_is_up = 0;
   if (act == I2C_MASTER_RCV)
   {
     /* set up for master-receive transaction */
@@ -278,8 +283,19 @@ static I2C_Status I2C_do_buffer( I2C_INTERRUPT_MODE en_int,
     do
     {
       rval = I2C_Timer_Event( Global_eumbbar, 0 );
+      if ((rval == I2CNOEVENT && !time_is_up)) 
+      {
+        udelay(DELAY_US);
+        time_is_up++;
+      } else {
+        if ((time_is_up && rval == I2CNOEVENT)) 
+        {
+          rval = I2CERROR;
+        }
+      }
     }
     while ( rval == I2CNOEVENT );
+    time_is_up = 0;
 
     /* check for error condition */
     if ( rval == I2CSUCCESS || rval == I2CBUFFFULL ||
@@ -498,11 +514,13 @@ static I2CStatus I2C_read(unsigned int eumbbar,
  ********************************************************/
 static I2CStatus I2C_Timer_Event( unsigned int eumbbar, I2CStatus (*handler)( unsigned int ) )
 {
+    I2C_STAT stat;
+
 #ifdef I2CDBG0
 	PRINT( "%s(%d): I2C_Timer_Event\n", __FILE__, __LINE__ );
 #endif
 
-    I2C_STAT stat = I2C_Get_Stat( eumbbar );
+    stat = I2C_Get_Stat( eumbbar );
 
     if ( stat.mif == 1 )
     {
@@ -541,13 +559,16 @@ static I2CStatus I2C_Start( unsigned int  eumbbar,
 					                           * 0 - this is a new start
 					                           */
 {
+    unsigned int tmp = 0;
+    I2C_STAT stat;
+    I2C_CTRL ctrl;
+
 #ifdef I2CDBG0
 	PRINT( "%s(%d): I2C_Start addr 0x%x mode %d cnt %d\n", __FILE__, __LINE__ ,
       slave_addr,mode,is_cnt);
 #endif
-	unsigned int tmp = 0;
-    I2C_STAT stat;
-    I2C_CTRL ctrl = I2C_Get_Ctrl( eumbbar );
+
+    ctrl = I2C_Get_Ctrl( eumbbar );
 
     /* first make sure I2C has been initialized */
     if ( ctrl.men == 0 )
@@ -611,11 +632,13 @@ static I2CStatus I2C_Start( unsigned int  eumbbar,
  **********************************************************/
 static I2CStatus I2C_Stop( unsigned int eumbbar )
 {
+    I2C_CTRL ctrl;
+
 #ifdef I2CDBG0
 	PRINT( "%s(%d): I2C_Stop enter\n", __FILE__, __LINE__ );
 #endif
 
-    I2C_CTRL ctrl = I2C_Get_Ctrl(eumbbar );
+    ctrl = I2C_Get_Ctrl(eumbbar );
     ctrl.msta = 0;
     I2C_Set_Ctrl( eumbbar, ctrl );
 
@@ -859,12 +882,14 @@ static I2CStatus I2C_Init( unsigned int eumbbar,
 			                      * 0 - disable I2C interrup
 				              */
 {
+    I2C_CTRL ctrl;
+    unsigned int tmp;
+
 #ifdef I2CDBG0
 	PRINT( "%s(%d): I2C_Init enter\n", __FILE__, __LINE__ );
 #endif
 
-    I2C_CTRL ctrl = I2C_Get_Ctrl( eumbbar );
-    unsigned int tmp;
+    ctrl = I2C_Get_Ctrl( eumbbar );
     /* disable the I2C module before we change everything */
     ctrl.men = 0;
     I2C_Set_Ctrl( eumbbar, ctrl );
@@ -899,12 +924,14 @@ static I2CStatus I2C_Init( unsigned int eumbbar,
  ****************************************/
 static I2C_STAT I2C_Get_Stat( unsigned int eumbbar )
 {
-    unsigned int temp = load_runtime_reg( eumbbar, I2CSR );
+    unsigned int temp;
+    I2C_STAT stat;
+
 #ifdef I2CDBG0
 	PRINT( "%s(%d): get stat = 0x%08x\n", __FILE__, __LINE__, temp );
 #endif
 
-    I2C_STAT stat;
+    temp = load_runtime_reg( eumbbar, I2CSR );
     stat.rsrv0 = ( temp & 0xffffff00 ) >> 8;
     stat.mcf   = ( temp & 0x00000080 ) >> 7;
     stat.maas  = ( temp & 0x00000040 ) >> 6;
@@ -1003,12 +1030,15 @@ static I2CStatus I2C_Slave_Addr( unsigned int eumbbar )
  **********************************************/
 static I2CStatus I2C_ISR( unsigned int eumbbar )
 {
+    I2C_STAT stat;
+    I2C_CTRL ctrl;
+
 #ifdef I2CDBG0
 	PRINT( "%s(%d): I2C_ISR\n", __FILE__, __LINE__ );
 #endif
 
-    I2C_STAT stat = I2C_Get_Stat( eumbbar );
-    I2C_CTRL ctrl = I2C_Get_Ctrl( eumbbar );
+    stat = I2C_Get_Stat( eumbbar );
+    ctrl = I2C_Get_Ctrl( eumbbar );
 
     /* clear MIF */
     stat.mif = 0;
@@ -1137,3 +1167,104 @@ static void I2C_Set_Stat( unsigned int eumbbar, I2C_STAT stat )
     store_runtime_reg( eumbbar, I2CSR, s.val );
 
 }
+
+void i2c_init(void)
+{
+	I2C_Initialize(0x7f, 0, (void *) printf);
+}
+
+int i2c_receive(unsigned char address,
+		unsigned char secondary_address,
+		unsigned short size_to_expect,
+		unsigned char *datain)
+{
+	return I2C_do_transaction(0, I2C_MASTER_RCV, address,
+				  secondary_address, size_to_expect,
+			    datain, I2C_STOP, 1, I2C_NO_RESTART);
+}
+
+int i2c_send(unsigned char address,
+		unsigned char secondary_address,
+		unsigned short size_to_send,
+		unsigned char *dataout)
+{
+	return I2C_do_transaction(0, I2C_MASTER_XMIT, address,
+				  secondary_address, size_to_send,
+			    dataout, I2C_STOP, 1, I2C_NO_RESTART);
+}
+
+int i2c_read(uchar *addr, int alen, uchar *buffer, int len)
+{
+	I2CStatus status;
+	
+	status = I2C_do_buffer(0, I2C_MASTER_XMIT, addr[0], alen - 1,
+			    addr + 1, I2C_NO_STOP, 1, I2C_NO_RESTART);
+	if (status != I2C_SUCCESS)
+	{
+		PRINT( "I2C_do_transaction: can't send data address for read\n");
+		return 1;
+	}
+
+	/* The data transfer will be a continuation. */
+	status = I2C_do_buffer(0, I2C_MASTER_RCV, addr[0], len,
+			    buffer, I2C_STOP, 1, I2C_RESTART);
+	if (status != I2C_SUCCESS)
+	{
+		PRINT( "I2C_do_transaction: can't perform data transfer\n");
+		return 1;
+	}
+
+	return 0;
+}
+
+int i2c_write(uchar *addr, int alen, uchar *buffer, int len)
+{
+	I2CStatus status;
+	unsigned char dummy_buffer[I2C_RXTX_LEN + 2];
+	int i,n;
+	
+	n = alen -1;
+	dummy_buffer[0] = addr[1];
+	if (n == 2) dummy_buffer[1] = addr[2];
+	for (i=0;i<len;i++)dummy_buffer[i+n]=buffer[i];
+        status = I2C_do_buffer(0, I2C_MASTER_XMIT, addr[0], n + len,
+				dummy_buffer, I2C_STOP, 1, I2C_NO_RESTART);
+        if (status != I2C_SUCCESS)
+	{
+		PRINT( "I2C_do_transaction: can't perform data transfer\n");
+		return 1;
+	}
+
+	return 0;
+}
+
+uchar
+i2c_reg_read(uchar i2c_addr, uchar reg)
+{
+	char addr[2];
+	char buf[1];
+
+	i2c_init();
+
+	addr[0] = i2c_addr;
+	addr[1] = reg;
+
+	i2c_read(addr, 2, buf, 1);
+
+	return (buf[0]);
+}
+
+void
+i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
+{
+	char addr[2];
+
+	i2c_init();
+
+	addr[0] = i2c_addr;
+	addr[1] = reg;
+
+	i2c_write(addr, 2, &val, 1);
+}
+
+#endif	/* CONFIG_I2C */
diff --git a/cpu/mpc824x/drivers/i2c/i2c2.S b/cpu/mpc824x/drivers/i2c/i2c2.S
index fd34e1c..1def42e 100644
--- a/cpu/mpc824x/drivers/i2c/i2c2.S
+++ b/cpu/mpc824x/drivers/i2c/i2c2.S
@@ -4,6 +4,10 @@
  *
  **************************************/
 
+#include <config.h>
+#ifdef CONFIG_I2C
+#include <ppc_asm.tmpl>
+#include <asm/mmu.h>
 /**********************************************************
  * function: load_runtime_reg
  *
@@ -47,3 +51,4 @@ store_runtime_reg:
 
 
 
+#endif /* CONFIG_I2C */
diff --git a/cpu/mpc824x/interrupts.c b/cpu/mpc824x/interrupts.c
index b78c0c3..f729121 100644
--- a/cpu/mpc824x/interrupts.c
+++ b/cpu/mpc824x/interrupts.c
@@ -31,6 +31,8 @@
 
 /****************************************************************************/
 
+unsigned decrementer_count;		/* count val for 1e6/HZ microseconds */
+
 static __inline__ unsigned long get_msr(void)
 {
     unsigned long msr;
@@ -77,13 +79,18 @@ int disable_interrupts (void)
 void
 interrupt_init (bd_t *bd)
 {
+    decrementer_count = (get_bus_freq(0) / 4) / CFG_HZ;
+
   /* it's all broken at the moment and I currently don't need interrupts
      if you want to fix it, have a look at the epic drivers in dink32 v12
      they do everthing and motorola said I could use the dink source in this project
-     as long as copyright notices remain intact.
+     as long as copyright notices remain intact. */
     epicInit(EPIC_DIRECT_IRQ,0);
+
+    set_dec (decrementer_count);
+
     set_msr (get_msr() | MSR_EE);
-    */
+    
 }
 
 /****************************************************************************/
@@ -128,6 +135,10 @@ volatile ulong timestamp = 0;
 
  void timer_interrupt(struct pt_regs *regs)
  {
+    /* Restore Decrementer Count */
+    set_dec (decrementer_count);
+
+    timestamp++;
  }
 
  void reset_timer (void)
diff --git a/cpu/mpc824x/start.S b/cpu/mpc824x/start.S
index 60b3cc4..8f10f6a 100644
--- a/cpu/mpc824x/start.S
+++ b/cpu/mpc824x/start.S
@@ -1,7 +1,7 @@
 /*
  *  Copyright (C) 1998	Dan Malek <dmalek@jlc.net>
  *  Copyright (C) 1999	Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
- *  Copyright (C) 2000,2001  Wolfgang Denk <wd@denx.de>
+ *  Copyright (C) 2000,2001,2002 Wolfgang Denk <wd@denx.de>
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -258,7 +258,60 @@ ProgramCheck:
 	STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
 	STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
 
-	STD_EXCEPTION(EXC_OFF_SYS_CALL, SystemCall, UnknownException)
+	. = 0xc00
+/*
+ * r0 - SYSCALL number
+ * r3-... arguments
+ */
+SystemCall:
+	addis	r11,r0,0		/* get functions table addr */
+	ori	r11,r11,0		/* Note: this code is patched in trap_init */
+	addis	r12,r0,0		/* get number of functions */
+	ori	r12,r12,0
+
+	cmplw	0, r0, r12
+	bge	1f
+	
+	rlwinm	r0,r0,2,0,31		/* fn_addr = fn_tbl[r0] */
+	add	r11,r11,r0
+	lwz	r11,0(r11)
+
+	li	r12,0xd00-4*3		/* save LR & SRRx */
+	mflr	r0
+	stw	r0,0(r12)
+	mfspr	r0,SRR0
+	stw	r0,4(r12)
+	mfspr	r0,SRR1
+	stw	r0,8(r12)
+
+	li	r12,0xc00+_back-SystemCall
+	mtlr	r12
+	mtspr	SRR0,r11
+
+1:	SYNC
+	rfi
+
+_back:
+
+	mfmsr	r11			/* Disable interrupts */
+	li	r12,0
+	ori	r12,r12,MSR_EE
+	andc	r11,r11,r12
+	SYNC				/* Some chip revs need this... */
+	mtmsr	r11
+	SYNC
+
+	li	r12,0xd00-4*3		/* restore regs */
+	lwz	r11,0(r12)
+	mtlr	r11
+	lwz	r11,4(r12)
+	mtspr	SRR0,r11
+	lwz	r11,8(r12)
+	mtspr	SRR1,r11
+
+	SYNC
+	rfi
+
 	STD_EXCEPTION(EXC_OFF_TRACE, SingleStep, UnknownException)
 
 	STD_EXCEPTION(EXC_OFF_FPUNASSIST, Trap_0e, UnknownException)
@@ -662,12 +715,20 @@ trap_init:
 	bl	trap_reloc
 
 	li	r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
-	li	r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
+	li	r8, SystemCall - _start + EXC_OFF_SYS_RESET
 3:
 	bl	trap_reloc
 	addi	r7, r7, 0x100		/* next exception vector	*/
 	cmplw	0, r7, r8
 	blt	3b
+	
+	li	r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
+	li	r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
+4:
+	bl	trap_reloc
+	addi	r7, r7, 0x100		/* next exception vector	*/
+	cmplw	0, r7, r8
+	blt	4b
 
 	mtlr	r4			/* restore link register	*/
 	blr
diff --git a/cpu/mpc8260/start.S b/cpu/mpc8260/start.S
index 96f1ea4..91f57c5 100644
--- a/cpu/mpc8260/start.S
+++ b/cpu/mpc8260/start.S
@@ -1,7 +1,7 @@
 /*
  *  Copyright (C) 1998	Dan Malek <dmalek@jlc.net>
  *  Copyright (C) 1999	Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
- *  Copyright (C) 2000, 2001	Wolfgang Denk <wd@denx.de>
+ *  Copyright (C) 2000, 2001,2002 Wolfgang Denk <wd@denx.de>
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -306,7 +306,60 @@ ProgramCheck:
 	STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
 	STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
 
-	STD_EXCEPTION(0xc00, SystemCall, UnknownException)
+	. = 0xc00
+/*
+ * r0 - SYSCALL number
+ * r3-... arguments
+ */
+SystemCall:
+	addis	r11,r0,0		/* get functions table addr */
+	ori	r11,r11,0		/* Note: this code is patched in trap_init */
+	addis	r12,r0,0		/* get number of functions */
+	ori	r12,r12,0
+
+	cmplw	0, r0, r12
+	bge	1f
+	
+	rlwinm	r0,r0,2,0,31		/* fn_addr = fn_tbl[r0] */
+	add	r11,r11,r0
+	lwz	r11,0(r11)
+
+	li	r12,0xd00-4*3		/* save LR & SRRx */
+	mflr	r0
+	stw	r0,0(r12)
+	mfspr	r0,SRR0
+	stw	r0,4(r12)
+	mfspr	r0,SRR1
+	stw	r0,8(r12)
+
+	li	r12,0xc00+_back-SystemCall
+	mtlr	r12
+	mtspr	SRR0,r11
+
+1:	SYNC
+	rfi
+
+_back:
+
+	mfmsr	r11			/* Disable interrupts */
+	li	r12,0
+	ori	r12,r12,MSR_EE
+	andc	r11,r11,r12
+	SYNC				/* Some chip revs need this... */
+	mtmsr	r11
+	SYNC
+
+	li	r12,0xd00-4*3		/* restore regs */
+	lwz	r11,0(r12)
+	mtlr	r11
+	lwz	r11,4(r12)
+	mtspr	SRR0,r11
+	lwz	r11,8(r12)
+	mtspr	SRR1,r11
+
+	SYNC
+	rfi
+
 	STD_EXCEPTION(0xd00, SingleStep, UnknownException)
 
 	STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
@@ -998,12 +1051,20 @@ trap_init:
 	bl	trap_reloc
 
 	li	r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
-	li	r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
+	li	r8, SystemCall - _start + EXC_OFF_SYS_RESET
 3:
 	bl	trap_reloc
 	addi	r7, r7, 0x100		/* next exception vector	*/
 	cmplw	0, r7, r8
 	blt	3b
+	
+	li	r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
+	li	r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
+4:
+	bl	trap_reloc
+	addi	r7, r7, 0x100		/* next exception vector	*/
+	cmplw	0, r7, r8
+	blt	4b
 
 	mfmsr	r3			/* now that the vectors have	*/
 	lis	r7, MSR_IP@h		/* relocated into low memory	*/
@@ -1013,7 +1074,7 @@ trap_init:
 	mtmsr	r3
 	SYNC
 
-	mtlr	r4			/* restore link register	*/
+	mtlr	r4			/* restore link register    */
 	blr
 
 	/*
diff --git a/cpu/mpc8xx/start.S b/cpu/mpc8xx/start.S
index 66a35e9..2b2e67c 100644
--- a/cpu/mpc8xx/start.S
+++ b/cpu/mpc8xx/start.S
@@ -1,7 +1,7 @@
 /*
  *  Copyright (C) 1998	Dan Malek <dmalek@jlc.net>
  *  Copyright (C) 1999	Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
- *  Copyright (C) 2000	Wolfgang Denk <wd@denx.de>
+ *  Copyright (C) 2000,2001,2002 Wolfgang Denk <wd@denx.de>
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -267,7 +267,60 @@ ProgramCheck:
 	STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
 	STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
 
-	STD_EXCEPTION(0xc00, SystemCall, UnknownException)
+	. = 0xc00
+/*
+ * r0 - SYSCALL number
+ * r3-... arguments
+ */
+SystemCall:
+	addis	r11,r0,0		/* get functions table addr */
+	ori	r11,r11,0		/* Note: this code is patched in trap_init */
+	addis	r12,r0,0		/* get number of functions */
+	ori	r12,r12,0
+
+	cmplw	0, r0, r12
+	bge	1f
+	
+	rlwinm	r0,r0,2,0,31		/* fn_addr = fn_tbl[r0] */
+	add	r11,r11,r0
+	lwz	r11,0(r11)
+
+	li	r12,0xd00-4*3		/* save LR & SRRx */
+	mflr	r0
+	stw	r0,0(r12)
+	mfspr	r0,SRR0
+	stw	r0,4(r12)
+	mfspr	r0,SRR1
+	stw	r0,8(r12)
+
+	li	r12,0xc00+_back-SystemCall
+	mtlr	r12
+	mtspr	SRR0,r11
+
+1:	SYNC
+	rfi
+
+_back:
+
+	mfmsr	r11			/* Disable interrupts */
+	li	r12,0
+	ori	r12,r12,MSR_EE
+	andc	r11,r11,r12
+	SYNC				/* Some chip revs need this... */
+	mtmsr	r11
+	SYNC
+
+	li	r12,0xd00-4*3		/* restore regs */
+	lwz	r11,0(r12)
+	mtlr	r11
+	lwz	r11,4(r12)
+	mtspr	SRR0,r11
+	lwz	r11,8(r12)
+	mtspr	SRR1,r11
+
+	SYNC
+	rfi
+
 	STD_EXCEPTION(0xd00, SingleStep, UnknownException)
 
 	STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
@@ -693,12 +746,20 @@ trap_init:
 	bl	trap_reloc
 
 	li	r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
-	li	r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
+	li	r8, SystemCall - _start + EXC_OFF_SYS_RESET
 3:
 	bl	trap_reloc
 	addi	r7, r7, 0x100		/* next exception vector	*/
 	cmplw	0, r7, r8
 	blt	3b
+	
+	li	r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
+	li	r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
+4:
+	bl	trap_reloc
+	addi	r7, r7, 0x100		/* next exception vector	*/
+	cmplw	0, r7, r8
+	blt	4b
 
 	mtlr	r4			/* restore link register	*/
 	blr
diff --git a/cpu/ppc4xx/405gp_enet.c b/cpu/ppc4xx/405gp_enet.c
index 21bea24..92cf72b 100644
--- a/cpu/ppc4xx/405gp_enet.c
+++ b/cpu/ppc4xx/405gp_enet.c
@@ -59,6 +59,8 @@
   |              - Set IST bit in EMAC_M1 reg upon 100MBit or full duplex
   |  04-Jan-02   stefan.roese@esd-electronics.com
   |              - Wait for PHY auto negotiation to complete added
+  |  06-Feb-02   stefan.roese@esd-electronics.com
+  |              - Bug fixed in waiting for auto negotiation to complete
   +-----------------------------------------------------------------------------*/
 
 #include <ppcboot.h>
@@ -78,6 +80,7 @@
 #define ENET_MINPACKET  64
 
 #define EMAC_RESET_TIMEOUT 1000                        /* 1000 ms reset timeout */
+#define PHY_AUTONEGOTIATE_TIMEOUT 2000                 /* 2000 ms autonegotiate timeout */
 
 static __inline__ unsigned long get_msr(void)
 {
@@ -285,19 +288,32 @@ int eth_init (bd_t *bis)
   /* wait for PHY to complete auto negotiation */
   reg_short = 0;
 #ifndef CONFIG_CS8952_PHY
-  miiphy_read (CONFIG_PHY_ADDR, PHY_ANLPAR, &reg_short);
-  if (!(reg_short & PHY_ANLPAR_ACK))
+  miiphy_read (CONFIG_PHY_ADDR, PHY_BMSR, &reg_short);
+
+  /*
+   * Wait if PHY is able of autonegotiation and autonegotiation is not complete
+   */
+  if ((reg_short & PHY_BMSR_AUTN_ABLE) && !(reg_short & PHY_BMSR_AUTN_COMP))
     {
       puts("Waiting for PHY auto negotiation to complete");
       i = 0;
-      while (!(reg_short & PHY_ANLPAR_ACK))
+      while (!(reg_short & PHY_BMSR_AUTN_COMP))
 	{
 	  if ((i++ % 100) == 0)
 	    putc('.');
-	  miiphy_read (CONFIG_PHY_ADDR, PHY_ANLPAR, &reg_short);
 	  udelay(10000); /* 10 ms */
+	  miiphy_read (CONFIG_PHY_ADDR, PHY_BMSR, &reg_short);
+
+	  /*
+	   * Timeout reached ?
+	   */
+	  if (i*10 > PHY_AUTONEGOTIATE_TIMEOUT)
+	    {
+	      puts(" TIMEOUT !\n");
+	      break;
+	    }
 	}
-      putc('\n');
+      puts(" done\n");
       udelay(500000); /* another 500 ms (results in faster booting) */
     }
 #endif
diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S
index d532e1e..af09d18 100644
--- a/cpu/ppc4xx/start.S
+++ b/cpu/ppc4xx/start.S
@@ -1,7 +1,7 @@
 /*
  *  Copyright (C) 1998	Dan Malek <dmalek@jlc.net>
  *  Copyright (C) 1999	Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
- *  Copyright (C) 2000	Wolfgang Denk <wd@denx.de>
+ *  Copyright (C) 2000,2001,2002 Wolfgang Denk <wd@denx.de>
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -21,26 +21,26 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  * MA 02111-1307 USA
  */
-//------------------------------------------------------------------------------+
-//
-//	 This source code has been made available to you by IBM on an AS-IS
-//	 basis.	 Anyone receiving this source is licensed under IBM
-//	 copyrights to use it in any way he or she deems fit, including
-//	 copying it, modifying it, compiling it, and redistributing it either
-//	 with or without modifications.	 No license under IBM patents or
-//	 patent applications is to be implied by the copyright license.
-//
-//	 Any user of this software should understand that IBM cannot provide
-//	 technical support for this software and will not be responsible for
-//	 any consequences resulting from the use of this software.
-//
-//	 Any person who transfers this source code or any derivative work
-//	 must include the IBM copyright notice, this paragraph, and the
-//	 preceding two paragraphs in the transferred software.
-//
-//	 COPYRIGHT   I B M   CORPORATION 1995
-//	 LICENSED MATERIAL  -  PROGRAM PROPERTY OF I B M
-//-------------------------------------------------------------------------------
+/*------------------------------------------------------------------------------+ */
+/* */
+/*	 This source code has been made available to you by IBM on an AS-IS */
+/*	 basis.	 Anyone receiving this source is licensed under IBM */
+/*	 copyrights to use it in any way he or she deems fit, including */
+/*	 copying it, modifying it, compiling it, and redistributing it either */
+/*	 with or without modifications.	 No license under IBM patents or */
+/*	 patent applications is to be implied by the copyright license. */
+/* */
+/*	 Any user of this software should understand that IBM cannot provide */
+/*	 technical support for this software and will not be responsible for */
+/*	 any consequences resulting from the use of this software. */
+/* */
+/*	 Any person who transfers this source code or any derivative work */
+/*	 must include the IBM copyright notice, this paragraph, and the */
+/*	 preceding two paragraphs in the transferred software. */
+/* */
+/*	 COPYRIGHT   I B M   CORPORATION 1995 */
+/*	 LICENSED MATERIAL  -  PROGRAM PROPERTY OF I B M */
+/*------------------------------------------------------------------------------- */
 
 /*  ppcboot - Startup Code for IBM 4xx PowerPC based Embedded Boards
  *
@@ -154,101 +154,101 @@ _start:
 	
 /*****************************************************************************/
 #ifdef CONFIG_IOP480
-	//-----------------------------------------------------------------------
-	// Set up some machine state registers.
-	//-----------------------------------------------------------------------
-	addi	r0,r0,0x0000		// initialize r0 to zero
-	mtspr	esr,r0			// clear Exception Syndrome Reg
-	mttcr	r0			// timer control register
-	mtexier r0			// disable all interrupts
-	addi	r4,r0,0x1000		// set ME bit (Machine Exceptions)
-	oris	r4,r4,0x2		// set CE bit (Critical Exceptions)
-	mtmsr	r4			// change MSR
-	addis	r4,r0,0xFFFF		// set r4 to 0xFFFFFFFF (status in the
-	ori	r4,r4,0xFFFF		// dbsr is cleared by setting bits to 1)
-	mtdbsr	r4			// clear/reset the dbsr
-	mtexisr r4			// clear all pending interrupts
+	/*----------------------------------------------------------------------- */
+	/* Set up some machine state registers. */
+	/*----------------------------------------------------------------------- */
+	addi	r0,r0,0x0000		/* initialize r0 to zero */
+	mtspr	esr,r0			/* clear Exception Syndrome Reg */
+	mttcr	r0			/* timer control register */
+	mtexier r0			/* disable all interrupts */
+	addi	r4,r0,0x1000		/* set ME bit (Machine Exceptions) */
+	oris	r4,r4,0x2		/* set CE bit (Critical Exceptions) */
+	mtmsr	r4			/* change MSR */
+	addis	r4,r0,0xFFFF		/* set r4 to 0xFFFFFFFF (status in the */
+	ori	r4,r4,0xFFFF		/* dbsr is cleared by setting bits to 1) */
+	mtdbsr	r4			/* clear/reset the dbsr */
+	mtexisr r4			/* clear all pending interrupts */
 	addis	r4,r0,0x8000
-	mtexier r4			// enable critical exceptions
-	addis	r4,r0,0x0000		// assume 403GCX - enable core clk
-	ori	r4,r4,0x4020		// dbling (no harm done on GA and GC
-	mtiocr	r4			// since bit not used) & DRC to latch
-					// data bus on rising edge of CAS
-	//-----------------------------------------------------------------------
-	// Clear XER.
-	//-----------------------------------------------------------------------
+	mtexier r4			/* enable critical exceptions */
+	addis	r4,r0,0x0000		/* assume 403GCX - enable core clk */
+	ori	r4,r4,0x4020		/* dbling (no harm done on GA and GC */
+	mtiocr	r4			/* since bit not used) & DRC to latch */
+					/* data bus on rising edge of CAS */
+	/*----------------------------------------------------------------------- */
+	/* Clear XER. */
+	/*----------------------------------------------------------------------- */
 	mtxer	r0
-	//-----------------------------------------------------------------------
-	// Invalidate i-cache and d-cache TAG arrays.
-	//-----------------------------------------------------------------------
-	addi	r3,0,1024		// 1/4 of I-cache size, half of D-cache
-	addi	r4,0,1024		// 1/4 of I-cache
+	/*----------------------------------------------------------------------- */
+	/* Invalidate i-cache and d-cache TAG arrays. */
+	/*----------------------------------------------------------------------- */
+	addi	r3,0,1024		/* 1/4 of I-cache size, half of D-cache */
+	addi	r4,0,1024		/* 1/4 of I-cache */
 ..cloop:
 	iccci	0,r3
 	iccci	r4,r3
 	dccci	0,r3
-	addic.	r3,r3,-16		// move back one cache line
-	bne	..cloop			// loop back to do rest until r3 = 0
+	addic.	r3,r3,-16		/* move back one cache line */
+	bne	..cloop			/* loop back to do rest until r3 = 0 */
 
-	//
-	// initialize IOP480 so it can read 1 MB code area for SRAM spaces
-	// this requires enabling MA[17..0], by default only MA[12..0] are enabled.
-	//
+	/* */
+	/* initialize IOP480 so it can read 1 MB code area for SRAM spaces */
+	/* this requires enabling MA[17..0], by default only MA[12..0] are enabled. */
+	/* */
 
-	// first copy IOP480 register base address into r3
-	addis	r3,0,0x5000		// IOP480 register base address hi
-//	ori	r3,r3,0x0000		// IOP480 register base address lo
+	/* first copy IOP480 register base address into r3 */
+	addis	r3,0,0x5000		/* IOP480 register base address hi */
+/*	ori	r3,r3,0x0000		// IOP480 register base address lo */
 
 #ifdef CONFIG_ADCIOP
-	// use r4 as the working variable
-	// turn on CS3 (LOCCTL.7)
-	lwz	r4,0x84(r3)		// LOCTL is at offset 0x84
-	andi.	r4,r4,0xff7f		// make bit 7 = 0 -- CS3 mode
-	stw	r4,0x84(r3)		// LOCTL is at offset 0x84
+	/* use r4 as the working variable */
+	/* turn on CS3 (LOCCTL.7) */
+	lwz	r4,0x84(r3)		/* LOCTL is at offset 0x84 */
+	andi.	r4,r4,0xff7f		/* make bit 7 = 0 -- CS3 mode */
+	stw	r4,0x84(r3)		/* LOCTL is at offset 0x84 */
 #endif
 
 #ifdef CONFIG_DASA_SIM
-	// use r4 as the working variable
-	// turn on MA17 (LOCCTL.7)
-	lwz	r4,0x84(r3)		// LOCTL is at offset 0x84
-	ori	r4,r4,0x80		// make bit 7 = 1 -- MA17 mode
-	stw	r4,0x84(r3)		// LOCTL is at offset 0x84
+	/* use r4 as the working variable */
+	/* turn on MA17 (LOCCTL.7) */
+	lwz	r4,0x84(r3)		/* LOCTL is at offset 0x84 */
+	ori	r4,r4,0x80		/* make bit 7 = 1 -- MA17 mode */
+	stw	r4,0x84(r3)		/* LOCTL is at offset 0x84 */
 #endif
 
-	// turn on MA16..13 (LCS0BRD.12 = 0)
-	lwz	r4,0x100(r3)		// LCS0BRD is at offset 0x100
-	andi.	r4,r4,0xefff		// make bit 12 = 0
-	stw	r4,0x100(r3)		// LCS0BRD is at offset 0x100
+	/* turn on MA16..13 (LCS0BRD.12 = 0) */
+	lwz	r4,0x100(r3)		/* LCS0BRD is at offset 0x100 */
+	andi.	r4,r4,0xefff		/* make bit 12 = 0 */
+	stw	r4,0x100(r3)		/* LCS0BRD is at offset 0x100 */
 
-	// make sure above stores all comlete before going on
+	/* make sure above stores all comlete before going on */
 	sync
 
-	// last thing, set local init status done bit (DEVINIT.31)
-	lwz	r4,0x80(r3)		// DEVINIT is at offset 0x80
-	oris	r4,r4,0x8000		// make bit 31 = 1
-	stw	r4,0x80(r3)		// DEVINIT is at offset 0x80
+	/* last thing, set local init status done bit (DEVINIT.31) */
+	lwz	r4,0x80(r3)		/* DEVINIT is at offset 0x80 */
+	oris	r4,r4,0x8000		/* make bit 31 = 1 */
+	stw	r4,0x80(r3)		/* DEVINIT is at offset 0x80 */
 
-	// clear all pending interrupts and disable all interrupts
-	li	r4,-1			// set p1 to 0xffffffff
-	stw	r4,0x1b0(r3)		// clear all pending interrupts
-	stw	r4,0x1b8(r3)		// clear all pending interrupts
-	li	r4,0			// set r4 to 0
-	stw	r4,0x1b4(r3)		// disable all interrupts
-	stw	r4,0x1bc(r3)		// disable all interrupts
+	/* clear all pending interrupts and disable all interrupts */
+	li	r4,-1			/* set p1 to 0xffffffff */
+	stw	r4,0x1b0(r3)		/* clear all pending interrupts */
+	stw	r4,0x1b8(r3)		/* clear all pending interrupts */
+	li	r4,0			/* set r4 to 0 */
+	stw	r4,0x1b4(r3)		/* disable all interrupts */
+	stw	r4,0x1bc(r3)		/* disable all interrupts */
 
-	// make sure above stores all comlete before going on
+	/* make sure above stores all comlete before going on */
 	sync
 
-	//-----------------------------------------------------------------------
-	// Enable two 128MB cachable regions.
-	//-----------------------------------------------------------------------
+	/*----------------------------------------------------------------------- */
+	/* Enable two 128MB cachable regions. */
+	/*----------------------------------------------------------------------- */
 	addis	r1,r0,0x8000
 	addi	r1,r1,0x0001
-	mticcr	r1			// instruction cache
+	mticcr	r1			/* instruction cache */
 
 	addis	r1,r0,0x0000
 	addi	r1,r1,0x0000
-	mtdccr	r1			// data cache
+	mtdccr	r1			/* data cache */
 
 	addis	r1,r0,CFG_INIT_RAM_ADDR@h
 	ori	r1,r1,CFG_INIT_SP_OFFSET	  /* set up the stack to SDRAM */
@@ -264,62 +264,62 @@ _start:
 
 /*****************************************************************************/
 #if defined(CONFIG_405GP) || defined(CONFIG_405CR)
-	//-----------------------------------------------------------------------
-	// Clear and set up some registers.
-	//-----------------------------------------------------------------------
+	/*----------------------------------------------------------------------- */
+	/* Clear and set up some registers. */
+	/*----------------------------------------------------------------------- */
 	addi	r4,r0,0x0000
 	mtspr	sgr,r4
 	mtspr	dcwr,r4
-        mtesr	r4			// clear Exception Syndrome Reg
-	mttcr	r4			// clear Timer Control Reg
-	mtxer	r4			// clear Fixed-Point Exception Reg
-	mtevpr	r4			// clear Exception Vector Prefix Reg
-	addi	r4,r0,0x1000		// set ME bit (Machine Exceptions)
-	oris	r4,r4,0x0002		// set CE bit (Critical Exceptions)
-	mtmsr	r4			// change MSR
-	addi	r4,r0,(0xFFFF-0x10000)		// set r4 to 0xFFFFFFFF (status in the
-					// dbsr is cleared by setting bits to 1)
-	mtdbsr	r4			// clear/reset the dbsr
-
-	//-----------------------------------------------------------------------
-	// Invalidate I and D caches. Enable I cache for defined memory regions
-	// to speed things up. Leave the D cache disabled for now. It will be
-	// enabled/left disabled later based on user selected menu options.
-	// Be aware that the I cache may be disabled later based on the menu
-	// options as well. See miscLib/main.c.
-	//-----------------------------------------------------------------------
+        mtesr	r4			/* clear Exception Syndrome Reg */
+	mttcr	r4			/* clear Timer Control Reg */
+	mtxer	r4			/* clear Fixed-Point Exception Reg */
+	mtevpr	r4			/* clear Exception Vector Prefix Reg */
+	addi	r4,r0,0x1000		/* set ME bit (Machine Exceptions) */
+	oris	r4,r4,0x0002		/* set CE bit (Critical Exceptions) */
+	mtmsr	r4			/* change MSR */
+	addi	r4,r0,(0xFFFF-0x10000)		/* set r4 to 0xFFFFFFFF (status in the */
+					/* dbsr is cleared by setting bits to 1) */
+	mtdbsr	r4			/* clear/reset the dbsr */
+
+	/*----------------------------------------------------------------------- */
+	/* Invalidate I and D caches. Enable I cache for defined memory regions */
+	/* to speed things up. Leave the D cache disabled for now. It will be */
+	/* enabled/left disabled later based on user selected menu options. */
+	/* Be aware that the I cache may be disabled later based on the menu */
+	/* options as well. See miscLib/main.c. */
+	/*----------------------------------------------------------------------- */
 	bl	invalidate_icache
 	bl	invalidate_dcache
 
-	//-----------------------------------------------------------------------
-	// Enable two 128MB cachable regions.
-	//-----------------------------------------------------------------------
+	/*----------------------------------------------------------------------- */
+	/* Enable two 128MB cachable regions. */
+	/*----------------------------------------------------------------------- */
 	addis	r4,r0,0x8000
 	addi	r4,r4,0x0001
-	mticcr	r4			// instruction cache
+	mticcr	r4			/* instruction cache */
 	isync
 
 	addis	r4,r0,0x0000
 	addi	r4,r4,0x0000
-	mtdccr	r4			// data cache
+	mtdccr	r4			/* data cache */
 
 #if !(defined(CFG_EBC_PB0AP) && defined(CFG_EBC_PB0CR))
-	//-----------------------------------------------------------------------
-	// Tune the speed and size for flash CS0 
-	//-----------------------------------------------------------------------
+	/*----------------------------------------------------------------------- */
+	/* Tune the speed and size for flash CS0  */
+	/*----------------------------------------------------------------------- */
 	bl	ext_bus_cntlr_init
 #endif
 
-	//-----------------------------------------------------------------------
-	// Initialize SDRAM Controller
-	//-----------------------------------------------------------------------
+	/*----------------------------------------------------------------------- */
+	/* Initialize SDRAM Controller */
+	/*----------------------------------------------------------------------- */
 	bl	sdram_init
 
 #ifdef CFG_INIT_DCACHE_CS
-	//-----------------------------------------------------------------------
-	// Memory Bank x (nothingness) initialization 1GB+64MEG
-	// used as temporary stack pointer for stage0 
-	//-----------------------------------------------------------------------
+	/*----------------------------------------------------------------------- */
+	/* Memory Bank x (nothingness) initialization 1GB+64MEG */
+	/* used as temporary stack pointer for stage0  */
+	/*----------------------------------------------------------------------- */
 	li	r4,PBxAP
 	mtdcr	ebccfga,r4
 	lis	r4,0x0380
@@ -332,23 +332,23 @@ _start:
 	ori	r4,r4,0xa000
 	mtdcr	ebccfgd,r4
 
-	// turn on data chache for this region
+	/* turn on data chache for this region */
 	addis	r4,r0,0x0080
 	addi	r4,r4,0x0000
 	mtdccr	r4
 
-	// set stack pointer and clear stack to known value
+	/* set stack pointer and clear stack to known value */
 	
 	lis	r1,CFG_INIT_RAM_ADDR@h
         ori     r1,r1,CFG_INIT_SP_OFFSET
 
-	li	r4,2048                 // we store 2048 words to stack
+	li	r4,2048                 /* we store 2048 words to stack */
 	mtctr	r4
 
-	lis	r2,CFG_INIT_RAM_ADDR@h		// we also clear data area
-	ori	r2,r2,CFG_INIT_RAM_END 	// so cant copy value from r1
+	lis	r2,CFG_INIT_RAM_ADDR@h		/* we also clear data area */
+	ori	r2,r2,CFG_INIT_RAM_END 	/* so cant copy value from r1 */
 
-	lis	r4,0xdead		// we store 0xdeaddead in the stack
+	lis	r4,0xdead		/* we store 0xdeaddead in the stack */
 	ori	r4,r4,0xdead
 
 stackloop:
@@ -430,7 +430,60 @@ ProgramCheck:
 	STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
 	STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
 
-	STD_EXCEPTION(0xc00, SystemCall, UnknownException)
+	. = 0xc00
+/*
+ * r0 - SYSCALL number
+ * r3-... arguments
+ */
+SystemCall:
+	addis	r11,r0,0		/* get functions table addr */
+	ori	r11,r11,0		/* Note: this code is patched in trap_init */
+	addis	r12,r0,0		/* get number of functions */
+	ori	r12,r12,0
+
+	cmplw	0, r0, r12
+	bge	1f
+	
+	rlwinm	r0,r0,2,0,31		/* fn_addr = fn_tbl[r0] */
+	add	r11,r11,r0
+	lwz	r11,0(r11)
+
+	li	r12,0xd00-4*3		/* save LR & SRRx */
+	mflr	r0
+	stw	r0,0(r12)
+	mfspr	r0,SRR0
+	stw	r0,4(r12)
+	mfspr	r0,SRR1
+	stw	r0,8(r12)
+
+	li	r12,0xc00+_back-SystemCall
+	mtlr	r12
+	mtspr	SRR0,r11
+
+1:	SYNC
+	rfi
+
+_back:
+
+	mfmsr	r11			/* Disable interrupts */
+	li	r12,0
+	ori	r12,r12,MSR_EE
+	andc	r11,r11,r12
+	SYNC				/* Some chip revs need this... */
+	mtmsr	r11
+	SYNC
+
+	li	r12,0xd00-4*3		/* restore regs */
+	lwz	r11,0(r12)
+	mtlr	r11
+	lwz	r11,4(r12)
+	mtspr	SRR0,r11
+	lwz	r11,8(r12)
+	mtspr	SRR1,r11
+
+	SYNC
+	rfi
+
 	STD_EXCEPTION(0xd00, SingleStep, UnknownException)
 
 	STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
@@ -575,45 +628,45 @@ crit_return:
 /* Cache functions.
 */
 invalidate_icache:
-	iccci	r0,r0			// for 405, iccci invalidates the
-	blr				//   entire I cache
+	iccci	r0,r0			/* for 405, iccci invalidates the */
+	blr				/*   entire I cache */
 
 invalidate_dcache:
-	addi	r6,0,0x0000		// clear GPR 6
-	addi	r7,r0, 128		// do loop for # of dcache lines
-					// NOTE: dccci invalidates both
-	mtctr	r7			// ways in the D cache
+	addi	r6,0,0x0000		/* clear GPR 6 */
+	addi	r7,r0, 128		/* do loop for # of dcache lines */
+					/* NOTE: dccci invalidates both */
+	mtctr	r7			/* ways in the D cache */
 ..dcloop:
-	dccci	0,r6			// invalidate line
-	addi	r6,r6, 32		// bump to next line
+	dccci	0,r6			/* invalidate line */
+	addi	r6,r6, 32		/* bump to next line */
 	bdnz	..dcloop
 	blr
 
 flush_dcache:
-	addis	r9,r0,0x0002		// set mask for EE and CE msr bits
+	addis	r9,r0,0x0002		/* set mask for EE and CE msr bits */
 	ori	r9,r9,0x8000
-	mfmsr	r12			// save msr
+	mfmsr	r12			/* save msr */
 	andc	r9,r12,r9
-	mtmsr	r9			// disable EE and CE
-	addi	r10,r0,0x0001		// enable data cache for unused memory
-	mfdccr	r9			// region 0xF8000000-0xFFFFFFFF via
-	or	r10,r10,r9		// bit 31 in dccr
+	mtmsr	r9			/* disable EE and CE */
+	addi	r10,r0,0x0001		/* enable data cache for unused memory */
+	mfdccr	r9			/* region 0xF8000000-0xFFFFFFFF via */
+	or	r10,r10,r9		/* bit 31 in dccr */
 	mtdccr	r10
-	addi	r10,r0,128		// do loop for # of lines
-	addi	r11,r0,4096		// D cache set size=4K
+	addi	r10,r0,128		/* do loop for # of lines */
+	addi	r11,r0,4096		/* D cache set size=4K */
 	mtctr	r10
-	addi	r10,r0,(0xE000-0x10000)	// start at 0xFFFFE000
-	add	r11,r10,r11		// add to get to other side of cache line
+	addi	r10,r0,(0xE000-0x10000)	/* start at 0xFFFFE000 */
+	add	r11,r10,r11		/* add to get to other side of cache line */
 ..flush_dcache_loop:
-	lwz	r3,0(r10)		// least recently used side
-	lwz	r3,0(r11)		// the other side
-	dccci	r0,r11			// invalidate both sides
-	addi	r10,r10,0x0020		// bump to next line (32 bytes)
-	addi	r11,r11,0x0020		// bump to next line (32 bytes)
+	lwz	r3,0(r10)		/* least recently used side */
+	lwz	r3,0(r11)		/* the other side */
+	dccci	r0,r11			/* invalidate both sides */
+	addi	r10,r10,0x0020		/* bump to next line (32 bytes) */
+	addi	r11,r11,0x0020		/* bump to next line (32 bytes) */
 	bdnz	..flush_dcache_loop
-	sync				// allow memory access to complete
-	mtdccr	r9			// restore dccr
-	mtmsr	r12			// restore msr
+	sync				/* allow memory access to complete */
+	mtdccr	r9			/* restore dccr */
+	mtmsr	r12			/* restore msr */
 	blr
 
 	.globl	icache_enable
@@ -679,124 +732,124 @@ wr_tcr:
 	mtspr	tcr, r3
 	blr
 
-//-------------------------------------------------------------------------------
-// Function:	 in8
-// Description:	 Input 8 bits
-//-------------------------------------------------------------------------------
+/*------------------------------------------------------------------------------- */
+/* Function:	 in8 */
+/* Description:	 Input 8 bits */
+/*------------------------------------------------------------------------------- */
 	.globl	in8
 in8:
 	lbz	r3,0x0000(r3)
 	blr
 
-//-------------------------------------------------------------------------------
-// Function:	 out8
-// Description:	 Output 8 bits
-//-------------------------------------------------------------------------------
+/*------------------------------------------------------------------------------- */
+/* Function:	 out8 */
+/* Description:	 Output 8 bits */
+/*------------------------------------------------------------------------------- */
 	.globl	out8
 out8:
 	stb	r4,0x0000(r3)
 	blr
 
-//-------------------------------------------------------------------------------
-// Function:	 out16
-// Description:	 Output 16 bits
-//-------------------------------------------------------------------------------
+/*------------------------------------------------------------------------------- */
+/* Function:	 out16 */
+/* Description:	 Output 16 bits */
+/*------------------------------------------------------------------------------- */
 	.globl	out16
 out16:
 	sth	r4,0x0000(r3)
 	blr
 
-//-------------------------------------------------------------------------------
-// Function:	 out16r
-// Description:	 Byte reverse and output 16 bits
-//-------------------------------------------------------------------------------
+/*------------------------------------------------------------------------------- */
+/* Function:	 out16r */
+/* Description:	 Byte reverse and output 16 bits */
+/*------------------------------------------------------------------------------- */
 	.globl	out16r
 out16r:
 	sthbrx	r4,r0,r3
 	blr
 
-//-------------------------------------------------------------------------------
-// Function:	 out32
-// Description:	 Output 32 bits
-//-------------------------------------------------------------------------------
+/*------------------------------------------------------------------------------- */
+/* Function:	 out32 */
+/* Description:	 Output 32 bits */
+/*------------------------------------------------------------------------------- */
 	.globl	out32
 out32:
 	stw	r4,0x0000(r3)
 	blr
 
-//-------------------------------------------------------------------------------
-// Function:	 out32r
-// Description:	 Byte reverse and output 32 bits
-//-------------------------------------------------------------------------------
+/*------------------------------------------------------------------------------- */
+/* Function:	 out32r */
+/* Description:	 Byte reverse and output 32 bits */
+/*------------------------------------------------------------------------------- */
 	.globl	out32r
 out32r:
 	stwbrx	r4,r0,r3
 	blr
 
-//-------------------------------------------------------------------------------
-// Function:	 in16
-// Description:	 Input 16 bits
-//-------------------------------------------------------------------------------
+/*------------------------------------------------------------------------------- */
+/* Function:	 in16 */
+/* Description:	 Input 16 bits */
+/*------------------------------------------------------------------------------- */
 	.globl	in16
 in16:
 	lhz	r3,0x0000(r3)
 	blr
 
-//-------------------------------------------------------------------------------
-// Function:	 in16r
-// Description:	 Input 16 bits and byte reverse
-//-------------------------------------------------------------------------------
+/*------------------------------------------------------------------------------- */
+/* Function:	 in16r */
+/* Description:	 Input 16 bits and byte reverse */
+/*------------------------------------------------------------------------------- */
 	.globl	in16r
 in16r:
 	lhbrx	r3,r0,r3
 	blr
 
-//-------------------------------------------------------------------------------
-// Function:	 in32
-// Description:	 Input 32 bits
-//-------------------------------------------------------------------------------
+/*------------------------------------------------------------------------------- */
+/* Function:	 in32 */
+/* Description:	 Input 32 bits */
+/*------------------------------------------------------------------------------- */
 	.globl	in32
 in32:
 	lwz	3,0x0000(3)
 	blr
 
-//-------------------------------------------------------------------------------
-// Function:	 in32r
-// Description:	 Input 32 bits and byte reverse
-//-------------------------------------------------------------------------------
+/*------------------------------------------------------------------------------- */
+/* Function:	 in32r */
+/* Description:	 Input 32 bits and byte reverse */
+/*------------------------------------------------------------------------------- */
 	.globl	in32r
 in32r:
 	lwbrx	r3,r0,r3
 	blr
 
-//-------------------------------------------------------------------------------
-// Function:	 ppcDcbf
-// Description:	 Data Cache block flush
-// Input:	 r3 = effective address
-// Output:	 none.
-//-------------------------------------------------------------------------------
+/*------------------------------------------------------------------------------- */
+/* Function:	 ppcDcbf */
+/* Description:	 Data Cache block flush */
+/* Input:	 r3 = effective address */
+/* Output:	 none. */
+/*------------------------------------------------------------------------------- */
 	.globl	ppcDcbf
 ppcDcbf:
 	dcbf	r0,r3
 	blr
 
-//-------------------------------------------------------------------------------
-// Function:	 ppcDcbi
-// Description:	 Data Cache block Invalidate
-// Input:	 r3 = effective address
-// Output:	 none.
-//-------------------------------------------------------------------------------
+/*------------------------------------------------------------------------------- */
+/* Function:	 ppcDcbi */
+/* Description:	 Data Cache block Invalidate */
+/* Input:	 r3 = effective address */
+/* Output:	 none. */
+/*------------------------------------------------------------------------------- */
 	.globl	ppcDcbi
 ppcDcbi:
 	dcbi	r0,r3
 	blr
 
-//-------------------------------------------------------------------------------
-// Function:	 ppcSync
-// Description:	 Processor Synchronize
-// Input:	 none.
-// Output:	 none.
-//-------------------------------------------------------------------------------
+/*------------------------------------------------------------------------------- */
+/* Function:	 ppcSync */
+/* Description:	 Processor Synchronize */
+/* Input:	 none. */
+/* Output:	 none. */
+/*------------------------------------------------------------------------------- */
 	.globl	ppcSync
 ppcSync:
 	sync
@@ -1007,12 +1060,20 @@ trap_init:
 	bl	trap_reloc
 
 	li	r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
-	li	r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
+	li	r8, SystemCall - _start + EXC_OFF_SYS_RESET
 3:
 	bl	trap_reloc
 	addi	r7, r7, 0x100		/* next exception vector	*/
 	cmplw	0, r7, r8
 	blt	3b
+	
+	li	r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
+	li	r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
+4:
+	bl	trap_reloc
+	addi	r7, r7, 0x100		/* next exception vector	*/
+	cmplw	0, r7, r8
+	blt	4b
 
 	mtlr	r4			/* restore link register	*/
 	blr
diff --git a/examples/Makefile b/examples/Makefile
index 599425c..75f8375 100644
--- a/examples/Makefile
+++ b/examples/Makefile
@@ -34,20 +34,27 @@ endif
 
 OBJS	= $(SREC:.srec=.o)
 
+LIB		= libsyscall.a
+LIBAOBJS= syscall.o
+LIBCOBJS=
+LIBOBJS	= $(LIBAOBJS) $(LIBCOBJS)
+
 CPPFLAGS += -I..
 
-all:	.depend $(SREC)
+all:	.depend $(LIB) $(SREC)
 
 #########################################################################
+$(LIB): .depend $(LIBOBJS)
+	$(AR) crv $@ $(LIBOBJS)
 
-%.srec:	%.o
-	$(LD) -g -Ttext $(LOAD_ADDR) -o $(<:.o=) -e $(<:.o=) $<
+%.srec:	%.o $(LIB)
+	$(LD) -g -Ttext $(LOAD_ADDR) -o $(<:.o=) -e $(<:.o=) $< $(LIB)
 	$(OBJCOPY) -O srec $(<:.o=) $@
 
 #########################################################################
 
-.depend:	Makefile $(OBJS:.o=.c)
-		$(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
+.depend:	Makefile $(OBJS:.o=.c) $(LIBCOBJS:.o=.c) $(LIBAOBJS:.o=.S)
+		$(CC) -M $(CFLAGS) $(OBJS:.o=.c) $(LIBCOBJS:.o=.c) $(LIBAOBJS:.o=.S) > $@
 
 sinclude .depend
 
diff --git a/examples/hello_world.c b/examples/hello_world.c
index 1a701b0..6991bb7 100644
--- a/examples/hello_world.c
+++ b/examples/hello_world.c
@@ -22,36 +22,28 @@
  */
 
 #include <ppcboot.h>
-
-#define	MON_PRINT(fmt,args...)	\
-	(*(void (*)(const char *, ...))(bd->bi_mon_fnc->printf)) (fmt ,##args)
-
-#define MON_GETC		\
-	(*(int (*)(void))(bd->bi_mon_fnc->getc))
-
-#define MON_TSTC		\
-	(*(int (*)(void))(bd->bi_mon_fnc->tstc))
+#include <syscall.h>
 
 int hello_world (bd_t *bd, int argc, char *argv[])
 {
 	int i;
-
-	MON_PRINT ("Hello World\n");
-
-	MON_PRINT ("argc = %d\n", argc);
+	
+	mon_printf ("Hello World\n");
+	
+	mon_printf ("argc = %d\n", argc);
 
 	for (i=0; i<=argc; ++i) {
-		MON_PRINT ("argv[%d] = \"%s\"\n",
+		mon_printf ("argv[%d] = \"%s\"\n",
 			i,
 			argv[i] ? argv[i] : "<NULL>");
 	}
 
-	MON_PRINT ("Hit any key to exit ... ");
-	while (!MON_TSTC())
+	mon_printf ("Hit any key to exit ... ");
+	while (!mon_tstc())
 		;
 	/* consume input */
-	(void) MON_GETC();
+	(void) mon_getc();
 
-	MON_PRINT ("\n\n");
+	mon_printf ("\n\n");
 	return (0);
 }
diff --git a/examples/syscall.S b/examples/syscall.S
new file mode 100644
index 0000000..01dd110
--- /dev/null
+++ b/examples/syscall.S
@@ -0,0 +1,27 @@
+#include <ppc_asm.tmpl>
+#include <ppc_defs.h>
+#include <syscall.h>
+
+#define SYSCALL(name,n) \
+	.globl name		; \
+name:				; \
+	li r0,n			; \
+	sc			; \
+	blr
+
+	.text
+
+	/*
+         * Make sure these functions are in the same order as they
+         * appear in the "include/syscall.h" header file !!!
+	 */
+
+	SYSCALL(mon_getc,SYSCALL_GETC)
+	SYSCALL(mon_tstc,SYSCALL_TSTC)
+	SYSCALL(mon_putc,SYSCALL_PUTC)
+	SYSCALL(mon_puts,SYSCALL_PUTS)
+	SYSCALL(mon_printf,SYSCALL_PRINTF)
+	SYSCALL(mon_install_hdlr,SYSCALL_INSTALL_HDLR)
+	SYSCALL(mon_free_hdlr,SYSCALL_FREE_HDLR)
+	SYSCALL(mon_malloc,SYSCALL_MALLOC)
+	SYSCALL(mon_free,SYSCALL_FREE)
diff --git a/examples/timer.c b/examples/timer.c
index 0e53e69..d427ded 100644
--- a/examples/timer.c
+++ b/examples/timer.c
@@ -24,6 +24,7 @@
 #include <ppcboot.h>
 #include <commproc.h>
 #include <mpc8xx_irq.h>
+#include <syscall.h>
 
 #undef	DEBUG
 
@@ -110,22 +111,6 @@ typedef struct tid_8xx_cpmtimer_s {
  */
 #define	TID_TIMER_ID	0	/* use CPM timer 1		*/
 
-
-#define	MON_PRINT(fmt,args...)	\
-	(*(void (*)(const char *, ...))(bd->bi_mon_fnc->printf)) (fmt ,##args)
-
-#define MON_GETC		\
-	(*(int (*)(void))(bd->bi_mon_fnc->getc))
-
-#define MON_TSTC		\
-	(*(int (*)(void))(bd->bi_mon_fnc->tstc))
-
-#define MON_INSTALL_HANDLER	\
-	(*(int (*)(int, void (*)(void *), void *))(bd->bi_mon_fnc->install_hdlr))
-
-#define MON_FREE_HANDLER	\
-	(*(int (*)(int))(bd->bi_mon_fnc->free_hdlr))
-
 void setPeriod (bd_t * bd, tid_8xx_cpmtimer_t *hwp, ulong interval);
 
 static char *usage = "\n[q, b, e, ?] ";
@@ -140,7 +125,7 @@ int timer (bd_t * bd, int argc, char *argv[])
 	/* Pointer to CPM Timer structure */
 	cpmtimerp = &((immap_t *) bd->bi_immr_base)->im_cpmtimer;
 
-	MON_PRINT ("TIMERS=0x%x\n", (unsigned) cpmtimerp);
+	mon_printf ("TIMERS=0x%x\n", (unsigned) cpmtimerp);
 
 	hwp->bd = bd;
 
@@ -182,7 +167,7 @@ int timer (bd_t * bd, int argc, char *argv[])
 
 	hwp->tgcrp = &cpmtimerp->cpmt_tgcr;
 
-	MON_PRINT ("Using timer %d\n"
+	mon_printf ("Using timer %d\n"
 			"tgcr @ 0x%x, tmr @ 0x%x, trr @ 0x%x,"
 			" tcr @ 0x%x, tcn @ 0x%x, ter @ 0x%x\n",
 			TID_TIMER_ID + 1,
@@ -200,22 +185,22 @@ int timer (bd_t * bd, int argc, char *argv[])
 	/* clear all events */
 	*hwp->terp = (CPMT_EVENT_CAP | CPMT_EVENT_REF);
 
-	MON_PRINT(usage);
-	while ((c = MON_GETC()) != 'q') {
+	mon_printf (usage);
+	while ((c = mon_getc()) != 'q') {
 	    if (c == 'b') {
 
 		setPeriod (bd, hwp, TIMER_PERIOD);	/* Set period and start ticking */
 
 		/* Install interrupt handler (enable timer in CIMR) */
-		MON_INSTALL_HANDLER (hwp->cpm_vec, timer_handler, hwp);
+		mon_install_hdlr (hwp->cpm_vec, timer_handler, hwp);
 
-		MON_PRINT ("Enabling timer\n");
+		mon_printf ("Enabling timer\n");
 
 		/* enable timer */
 		*hwp->tgcrp |= (CPMT_GCR_RST << TID_TIMER_ID);
 
 #ifdef	DEBUG
-		MON_PRINT ("tgcr=0x%x, tmr=0x%x, trr=0x%x,"
+		mon_printf ("tgcr=0x%x, tmr=0x%x, trr=0x%x,"
 			" tcr=0x%x, tcn=0x%x, ter=0x%x\n",
 				*hwp->tgcrp, *hwp->tmrp, *hwp->trrp,
 				*hwp->tcrp,  *hwp->tcnp, *hwp->terp
@@ -223,19 +208,19 @@ int timer (bd_t * bd, int argc, char *argv[])
 #endif
 	    } else if (c == 'e') {
 
-		MON_PRINT ("Stopping timer\n");
+		mon_printf ("Stopping timer\n");
 
 		*hwp->tgcrp &= ~(CPMT_GCR_MASK << TID_TIMER_ID);
 
 #ifdef	DEBUG
-		MON_PRINT ("tgcr=0x%x, tmr=0x%x, trr=0x%x,"
+		mon_printf ("tgcr=0x%x, tmr=0x%x, trr=0x%x,"
 			" tcr=0x%x, tcn=0x%x, ter=0x%x\n",
 				*hwp->tgcrp, *hwp->tmrp, *hwp->trrp,
 				*hwp->tcrp,  *hwp->tcnp, *hwp->terp
 			);
 #endif
 		/* Uninstall interrupt handler */
-		MON_FREE_HANDLER (hwp->cpm_vec);
+		mon_free_hdlr (hwp->cpm_vec);
 
 	    } else if (c == '?') {
 #ifdef	DEBUG
@@ -243,13 +228,13 @@ int timer (bd_t * bd, int argc, char *argv[])
 		sysconf8xx_t *siup = &((immap_t *) bd->bi_immr_base)->im_siu_conf;
 #endif
 
-		MON_PRINT ("\ntgcr=0x%x, tmr=0x%x, trr=0x%x,"
+		mon_printf ("\ntgcr=0x%x, tmr=0x%x, trr=0x%x,"
 			" tcr=0x%x, tcn=0x%x, ter=0x%x\n",
 				*hwp->tgcrp, *hwp->tmrp, *hwp->trrp,
 				*hwp->tcrp,  *hwp->tcnp, *hwp->terp
 			);
 #ifdef	DEBUG
-		MON_PRINT ("SIUMCR=0x%08lx, SYPCR=0x%08lx,"
+		mon_printf ("SIUMCR=0x%08lx, SYPCR=0x%08lx,"
 			" SIMASK=0x%08lx, SIPEND=0x%08lx\n",
 				siup->sc_siumcr,
 				siup->sc_sypcr,
@@ -257,16 +242,16 @@ int timer (bd_t * bd, int argc, char *argv[])
 				siup->sc_sipend
 			);
 
-		MON_PRINT ("CIMR=0x%08lx, CICR=0x%08lx, CIPR=0x%08lx\n",
+		mon_printf ("CIMR=0x%08lx, CICR=0x%08lx, CIPR=0x%08lx\n",
 			cpm_icp->cpic_cimr,
 			cpm_icp->cpic_cicr,
 			cpm_icp->cpic_cipr
 			);
 #endif
 	    } else {
-	    	MON_PRINT ("\nEnter: q - quit, b - start timer, e - stop timer, ? - get status\n");
+	    	mon_printf ("\nEnter: q - quit, b - start timer, e - stop timer, ? - get status\n");
 	    }
-	    MON_PRINT(usage);
+	    mon_printf (usage);
 	}
 	return (0);
 }
@@ -281,11 +266,11 @@ void setPeriod (bd_t * bd, tid_8xx_cpmtimer_t *hwp, ulong interval)
 	unsigned short prescaler;
 	unsigned long ticks;
 
-	MON_PRINT ("Set interval %ld us\n", interval);
+	mon_printf ("Set interval %ld us\n", interval);
 
 	/* Warn if requesting longer period than possible */
 	if (interval > CPMT_MAX_INTERVAL) {
-		MON_PRINT ("Truncate interval %ld to maximum (%d)\n",
+		mon_printf ("Truncate interval %ld to maximum (%d)\n",
 				interval, CPMT_MAX_INTERVAL);
 		interval = CPMT_MAX_INTERVAL;
 	}
@@ -310,7 +295,7 @@ void setPeriod (bd_t * bd, tid_8xx_cpmtimer_t *hwp, ulong interval)
 	}
 
 #ifdef	DEBUG
-	MON_PRINT ("clock/%d, prescale factor %d, reference %ld, ticks %ld\n",
+	mon_printf ("clock/%d, prescale factor %d, reference %ld, ticks %ld\n",
 			(ticks > CPMT_MAX_TICKS) ? CPMT_CLOCK_DIV : 1,
 			CPMT_PRESCALER,
 			(ticks / CPMT_PRESCALER),
@@ -328,7 +313,7 @@ void setPeriod (bd_t * bd, tid_8xx_cpmtimer_t *hwp, ulong interval)
 	*hwp->trrp = (unsigned short) (ticks / CPMT_PRESCALER);
 
 #ifdef	DEBUG
-	MON_PRINT ("tgcr=0x%x, tmr=0x%x, trr=0x%x,"
+	mon_printf ("tgcr=0x%x, tmr=0x%x, trr=0x%x,"
 		" tcr=0x%x, tcn=0x%x, ter=0x%x\n",
 			*hwp->tgcrp, *hwp->tmrp, *hwp->trrp,
 			*hwp->tcrp,  *hwp->tcnp, *hwp->terp
@@ -343,12 +328,11 @@ static
 void timer_handler (void *arg)
 {
 	tid_8xx_cpmtimer_t *hwp = (tid_8xx_cpmtimer_t *)arg;
-	bd_t *bd = hwp->bd;
 
 	/* printf ("** TER1=%04x ** ", *hwp->terp); */
 
 	/* just for demonstration */
-	MON_PRINT (".");
+	mon_printf (".");
 
 	/* clear all possible events: Ref. and Cap. */
 	*hwp->terp = (CPMT_EVENT_CAP | CPMT_EVENT_REF);
diff --git a/include/config_Sandpoint8240.h b/include/config_Sandpoint8240.h
index 20d3992..b945324 100644
--- a/include/config_Sandpoint8240.h
+++ b/include/config_Sandpoint8240.h
@@ -48,7 +48,10 @@
 #define CONFIG_BAUDRATE		9600
 #define CONFIG_DRAM_SPEED	100		/* MHz				*/
 
-#define CONFIG_COMMANDS		(CONFIG_CMD_DFL | CFG_CMD_ELF)
+#define CONFIG_COMMANDS		( CONFIG_CMD_DFL | \
+				  CFG_CMD_ELF    | \
+				  CFG_CMD_I2C 	 | \
+				  CFG_CMD_EEPROM )
 
 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any)	*/
 #include <cmd_confdefs.h>
@@ -72,8 +75,12 @@
  */
 #define CONFIG_PCI				/* include pci support		*/
 
-#define PCI_ENET_IOADDR		0x80000000
-#define PCI_ENET_MEMADDR	0x80000000
+#define CONFIG_NET_MULTI			/* Multi ethernet cards support */
+
+#define PCI_ENET0_IOADDR	0x80000000
+#define PCI_ENET0_MEMADDR	0x80000000
+#define	PCI_ENET1_IOADDR	0x81000000
+#define	PCI_ENET1_MEMADDR	0x81000000 
 
 
 /*-----------------------------------------------------------------------
@@ -134,6 +141,10 @@
 #define FLASH_BASE0_PRELIM	0xFFF00000	/* sandpoint flash		*/
 #define FLASH_BASE1_PRELIM	0xFF000000	/* PMC onboard flash		*/
 
+#define CONFIG_I2C		1		/* To enable I2C support	*/
+
+#define CFG_I2C_EEPROM_ADDR	0x57		/* EEPROM IS24C02		*/
+
 #define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
 #define CFG_FLASH_BANKS		{ FLASH_BASE0_PRELIM , FLASH_BASE1_PRELIM }
 
diff --git a/include/config_Sandpoint8245.h b/include/config_Sandpoint8245.h
index 1259a61..2d85bab 100644
--- a/include/config_Sandpoint8245.h
+++ b/include/config_Sandpoint8245.h
@@ -48,7 +48,10 @@
 #define CONFIG_BAUDRATE		9600
 #define CONFIG_DRAM_SPEED	100		/* MHz				*/
 
-#define CONFIG_COMMANDS		(CONFIG_CMD_DFL)
+#define CONFIG_COMMANDS		( CONFIG_CMD_DFL | \
+				  CFG_CMD_ELF    | \
+				  CFG_CMD_I2C 	 | \
+				  CFG_CMD_EEPROM )
 
 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any)	*/
 #include <cmd_confdefs.h>
@@ -72,8 +75,12 @@
  */
 #define CONFIG_PCI				/* include pci support		*/
 
-#define PCI_ENET_IOADDR		0x80000000
-#define PCI_ENET_MEMADDR	0x80000000
+#define CONFIG_NET_MULTI			/* Multi ethernet cards support */
+
+#define PCI_ENET0_IOADDR	0x80000000
+#define PCI_ENET0_MEMADDR	0x80000000
+#define	PCI_ENET1_IOADDR	0x81000000
+#define	PCI_ENET1_MEMADDR	0x81000000 
 
 
 /*-----------------------------------------------------------------------
@@ -84,6 +91,8 @@
 #define CFG_SDRAM_BASE		0x00000000
 #define CFG_MAX_RAM_SIZE	0x10000000
 
+#define CFG_RESET_ADDRESS	0xFFF00100
+
 #if defined (USE_DINK32)
 #define CFG_MONITOR_LEN		0x00030000
 #define CFG_MONITOR_BASE	0x00090000
@@ -132,6 +141,10 @@
 #define FLASH_BASE0_PRELIM	0xFFF00000	/* sandpoint flash		*/
 #define FLASH_BASE1_PRELIM	0xFF000000	/* PMC onboard flash		*/
 
+#define CONFIG_I2C		1		/* To enable I2C support	*/
+
+#define CFG_I2C_EEPROM_ADDR	0x57		/* EEPROM IS24C02		*/
+
 #define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
 #define CFG_FLASH_BANKS		{ FLASH_BASE0_PRELIM , FLASH_BASE1_PRELIM }
 
diff --git a/include/i2c.h b/include/i2c.h
index 45b8caf..a3ba922 100644
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -11,7 +11,25 @@
 
 int  i2c_read  (uchar *addr, int alen, uchar *buffer, int len);
 int  i2c_write (uchar *addr, int alen, uchar *buffer, int len);
+#if defined(CONFIG_MPC824X)
+uchar i2c_reg_read  (uchar i2c_addr, uchar reg);
+void  i2c_reg_write (uchar i2c_addr, uchar reg, uchar val);
+
+/* initialize i2c usage */
+void i2c_init(void);
+
+/* schedule a send operation (uses 1 tx bd) */
+int i2c_send(unsigned char address,
+		unsigned char secondary_address,
+		unsigned short size,
+		unsigned char *dataout);
 
+/* schedule a receive operation (uses 1 tx bd, 1 rx bd) */
+int i2c_receive(unsigned char address,
+		unsigned char secondary_address,
+		unsigned short size_to_expect,
+		unsigned char *datain);
+#endif
 #if defined(CONFIG_4xx) || defined(CONFIG_IOP480)
 
 void i2c_init(void);
@@ -20,8 +38,9 @@ int  i2c_receive(unsigned char address,
 int  i2c_send(unsigned char address,
 		 unsigned short size_to_send, unsigned char dataout[] );
 int i2c_write_page(uchar *addr, int alen, uchar *data, int dlen, int dsize);
+#endif
 
-#else	/* !( CONFIG_4xx || CONFIG_IOP480) */
+#if !defined(CONFIG_MPC824X) && !defined(CONFIG_4xx) && !defined(CONFIG_IOP480)/* !( CONFIG_4xx || CONFIG_IOP480) */
 
 uchar i2c_reg_read  (uchar i2c_addr, uchar reg);
 void  i2c_reg_write (uchar i2c_addr, uchar reg, uchar val);
diff --git a/include/net.h b/include/net.h
index 81fa76f..0a65b15 100644
--- a/include/net.h
+++ b/include/net.h
@@ -54,8 +54,9 @@ extern int eth_init(bd_t *bis);			/* Initialize the device	*/
 extern int eth_send(volatile void *packet, int length);	   /* Send a packet	*/
 extern int eth_rx(void);			/* Check for received packets	*/
 extern void eth_halt(void);			/* stop SCC			*/
-
-
+#ifdef CONFIG_NET_MULTI
+extern void eth_try_another(void);		/* Change the device		*/
+#endif
 
 
 /**********************************************************************/
diff --git a/include/ppcboot.h b/include/ppcboot.h
index 8d3ae43..b6e944c 100644
--- a/include/ppcboot.h
+++ b/include/ppcboot.h
@@ -62,18 +62,6 @@ typedef volatile unsigned char	vu_char;
 
 typedef	void (interrupt_handler_t)(void *);
 
-typedef struct monitor_functions {
-	int	(*getc)(void);
-	int	(*tstc)(void);
-	void	(*putc)(const char c);
-	void	(*puts)(const char *s);
-	void	(*printf)(const char *fmt, ...);
-	void	(*install_hdlr)(int, interrupt_handler_t *, void *);
-	void	(*free_hdlr)(int);
-	void	*(*malloc)(size_t);
-	void	(*free)(void *);
-} mon_fnc_t;
-
 /* A Board Information structure that is given to a program when
  * ppcboot starts it up.
  */
@@ -120,7 +108,6 @@ typedef struct bd_info {
 #if defined(CONFIG_NX823)
 	unsigned char	bi_sernum[8];
 #endif
-	mon_fnc_t	*bi_mon_fnc;	/* Pointer to monitor functions		*/
 } bd_t;
 
 /* The following data structure is placed in DPRAM to allow for a
@@ -147,7 +134,6 @@ typedef	struct	init_data {
 	unsigned long	env_valid;	/* Checksum of Environment valid?	*/
 	unsigned long	relocated;	/* Relocat. offset when running in RAM 	*/
 	unsigned long	have_console;	/* serial_init() was called		*/
-	mon_fnc_t	bi_mon_fnc;	/* Monitor functions			*/
 #if defined(CFG_ALLOC_DPRAM) || defined(CONFIG_8260)
 	unsigned int	dp_alloc_base;
 	unsigned int	dp_alloc_top;
@@ -498,6 +484,7 @@ ulong crc32_no_comp (ulong, const unsigned char *, uint);
 
 /* common/console.c */
 bd_t	*bd_ptr ;
+void	**syscall_tbl;
 
 void	console_init_f(void);	/* Before relocation; uses the serial  stuff	*/
 void	console_init_r(ulong);	/* After  relocation; uses the console stuff	*/
diff --git a/include/syscall.h b/include/syscall.h
new file mode 100644
index 0000000..b7960eb
--- /dev/null
+++ b/include/syscall.h
@@ -0,0 +1,37 @@
+#ifndef __MON_SYS_CALL_H__
+#define __MON_SYS_CALL_H__
+
+#ifndef __ASSEMBLY__
+
+#include <ppcboot.h>
+
+/* These are declarations of system calls available in C code */
+int  mon_getc(void);
+int  mon_tstc(void);
+void mon_putc(const char);
+void mon_puts(const char*);
+void mon_printf(const char* fmt, ...);
+void mon_install_hdlr(int, interrupt_handler_t*, void*);
+void mon_free_hdlr(int);
+void *mon_malloc(size_t);
+void mon_free(void*);
+
+#endif    /* ifndef __ASSEMBLY__ */
+
+#define NR_SYSCALLS            9        /* number of syscalls */
+
+/*
+ * Make sure these functions are in the same order as they
+ * appear in the "examples/syscall.S" file !!!
+ */
+#define SYSCALL_GETC           0
+#define SYSCALL_TSTC           1
+#define SYSCALL_PUTC           2
+#define SYSCALL_PUTS           3
+#define SYSCALL_PRINTF         4
+#define SYSCALL_INSTALL_HDLR   5
+#define SYSCALL_FREE_HDLR      6
+#define SYSCALL_MALLOC         7
+#define SYSCALL_FREE           8
+
+#endif
diff --git a/net/arp.c b/net/arp.c
index ae37960..80be24c 100644
--- a/net/arp.c
+++ b/net/arp.c
@@ -31,6 +31,7 @@
 #if (CONFIG_COMMANDS & CFG_CMD_NET)
 
 #define TIMEOUT		5		/* Seconds before trying ARP again */
+#define TIMEOUT_COUNT	10		/* # of timeouts before giving up  */
 
 static void ArpHandler(uchar *pkt, unsigned dest, unsigned src, unsigned len);
 static void ArpTimeout(void);
@@ -54,12 +55,18 @@ ArpHandler(uchar *pkt, unsigned dest, unsigned src, unsigned len)
 
 
 /*
- *	Timeout on ARP request.  Try again, forever.
+ *	Timeout on ARP request.
  */
 static void
 ArpTimeout(void)
 {
-	ArpRequest ();
+	if (ArpTry >= TIMEOUT_COUNT) {
+		puts ("\nRetry count exceeded; starting again\n");
+		NetStartAgain ();
+	} else {
+		NetSetTimeout (TIMEOUT * CFG_HZ, ArpTimeout);
+		ArpRequest ();
+	}
 }
 
 
diff --git a/net/bootp.c b/net/bootp.c
index eb24fd2..695209c 100644
--- a/net/bootp.c
+++ b/net/bootp.c
@@ -33,6 +33,7 @@
 #if (CONFIG_COMMANDS & CFG_CMD_NET)
 
 #define TIMEOUT		5		/* Seconds before trying BOOTP again	*/
+#define TIMEOUT_COUNT	10		/* # of timeouts before giving up	*/
 
 #define PORT_BOOTPS	67		/* BOOTP server UDP port		*/
 #define PORT_BOOTPC	68		/* BOOTP client UDP port		*/
@@ -327,12 +328,18 @@ BootpHandler(uchar * pkt, unsigned dest, unsigned src, unsigned len)
 #endif	/* !CFG_CMD_DHCP */
 
 /*
- *	Timeout on BOOTP/DHCP request.  Try again, forever.
+ *	Timeout on BOOTP/DHCP request.
  */
 static void
 BootpTimeout(void)
 {
-	BootpRequest ();
+	if (BootpTry >= TIMEOUT_COUNT) {
+		puts ("\nRetry count exceeded; starting again\n");
+		NetStartAgain ();
+	} else {
+		NetSetTimeout (TIMEOUT * CFG_HZ, BootpTimeout);
+		BootpRequest ();
+	}
 }
 
 /*
diff --git a/net/net.c b/net/net.c
index 15202c8..c1dd003 100644
--- a/net/net.c
+++ b/net/net.c
@@ -135,9 +135,9 @@ NetLoop(bd_t *bis, proto_t protocol)
 	eth_halt();
 	eth_init(bis);
 
+restart:
 	NetCopyEther(NetOurEther, bis->bi_enetaddr);
 
-restart:
 	NetState = NETLOOP_CONTINUE;
 
 	/*
@@ -235,6 +235,11 @@ restart:
 		switch (NetState) {
 
 		case NETLOOP_RESTART:
+#ifdef CONFIG_NET_MULTI
+			eth_halt();
+			eth_try_another();
+			eth_init(bis);
+#endif
 			goto restart;
 
 		case NETLOOP_SUCCESS:
diff --git a/net/rarp.c b/net/rarp.c
index cb43baa..5742b9b 100644
--- a/net/rarp.c
+++ b/net/rarp.c
@@ -31,6 +31,7 @@
 #if (CONFIG_COMMANDS & CFG_CMD_NET)
 
 #define TIMEOUT		5		/* Seconds before trying BOOTP again */
+#define TIMEOUT_COUNT	10		/* # of timeouts before giving up    */
 
 
 int		RarpTry;
@@ -49,12 +50,18 @@ RarpHandler(uchar * dummi0, unsigned dummi1, unsigned dummi2, unsigned dummi3)
 
 
 /*
- *	Timeout on BOOTP request.  Try again, forever.
+ *	Timeout on BOOTP request.
  */
 static void
 RarpTimeout(void)
 {
-	RarpRequest ();
+	if (RarpTry >= TIMEOUT_COUNT) {
+		puts ("\nRetry count exceeded; starting again\n");
+		NetStartAgain ();
+	} else {
+		NetSetTimeout (TIMEOUT * CFG_HZ, RarpTimeout);
+		RarpRequest ();
+	}
 }