From: Alain Volmat Date: Thu, 12 Dec 2024 09:17:36 +0000 (+0100) Subject: dt-bindings: media: add the stm32mp25 compatible of DCMIPP X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=923b428c49fb8ef50b2c6ae8ca9f322568a3882a;p=users%2Fjedix%2Flinux-maple.git dt-bindings: media: add the stm32mp25 compatible of DCMIPP Add the stm32mp25 compatible for the DCMIPP. The stm32mp25 distinguish with the stm32mp13 by the fact that: - supports also csi inputs in addition to parallel inputs - requires an addition csi clock to be present Add also access-controllers, an optional property that allows a peripheral to refer to one or more domain access controller(s). Reviewed-by: Krzysztof Kozlowski Signed-off-by: Alain Volmat Signed-off-by: Hans Verkuil --- diff --git a/Documentation/devicetree/bindings/media/st,stm32-dcmipp.yaml b/Documentation/devicetree/bindings/media/st,stm32-dcmipp.yaml index 87731f3ce7bd5..7b03a77adbce8 100644 --- a/Documentation/devicetree/bindings/media/st,stm32-dcmipp.yaml +++ b/Documentation/devicetree/bindings/media/st,stm32-dcmipp.yaml @@ -12,7 +12,9 @@ maintainers: properties: compatible: - const: st,stm32mp13-dcmipp + enum: + - st,stm32mp13-dcmipp + - st,stm32mp25-dcmipp reg: maxItems: 1 @@ -21,11 +23,24 @@ properties: maxItems: 1 clocks: - maxItems: 1 + items: + - description: bus clock + - description: csi clock + minItems: 1 + + clock-names: + items: + - const: kclk + - const: mclk + minItems: 1 resets: maxItems: 1 + access-controllers: + minItems: 1 + maxItems: 2 + port: $ref: /schemas/graph.yaml#/$defs/port-base unevaluatedProperties: false @@ -39,7 +54,7 @@ properties: properties: bus-type: - enum: [5, 6] + enum: [4, 5, 6] default: 5 bus-width: @@ -50,9 +65,6 @@ properties: hsync-active: true vsync-active: true - required: - - pclk-sample - required: - compatible - reg @@ -61,6 +73,35 @@ required: - resets - port +allOf: + - if: + properties: + compatible: + contains: + enum: + - st,stm32mp13-dcmipp + then: + properties: + clocks: + maxItems: 1 + + clock-names: + maxItems: 1 + + port: + properties: + endpoint: + properties: + bus-type: + enum: [5, 6] + else: + properties: + clocks: + minItems: 2 + + clock-names: + minItems: 2 + additionalProperties: false examples: