From: Pankaj Dev Date: Tue, 7 Jul 2015 07:40:50 +0000 (+0200) Subject: drivers: clk: st: Incorrect register offset used for lock_status X-Git-Tag: v4.1.5~67 X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=8cc9a81362527fcd4a7249cbec8feb244b83772a;p=users%2Fjedix%2Flinux-maple.git drivers: clk: st: Incorrect register offset used for lock_status commit 56551da9255f20ffd3a9711728a1a3ad4b7100af upstream. Incorrect register offset used for sthi407 clockgenC Signed-off-by: Pankaj Dev Signed-off-by: Gabriel Fernandez Fixes: 51306d56ba81 ("clk: st: STiH407: Support for clockgenC0") Signed-off-by: Stephen Boyd Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/clk/st/clkgen-fsyn.c b/drivers/clk/st/clkgen-fsyn.c index a917c4c7eaa9c..6ae068ab07c85 100644 --- a/drivers/clk/st/clkgen-fsyn.c +++ b/drivers/clk/st/clkgen-fsyn.c @@ -340,7 +340,7 @@ static const struct clkgen_quadfs_data st_fs660c32_C_407 = { CLKGEN_FIELD(0x30c, 0xf, 20), CLKGEN_FIELD(0x310, 0xf, 20) }, .lockstatus_present = true, - .lock_status = CLKGEN_FIELD(0x2A0, 0x1, 24), + .lock_status = CLKGEN_FIELD(0x2f0, 0x1, 24), .powerup_polarity = 1, .standby_polarity = 1, .pll_ops = &st_quadfs_pll_c32_ops,