From: Mark Brown <broonie@kernel.org>
Date: Fri, 10 Jan 2025 15:01:33 +0000 (+0000)
Subject: spi-nand/spi-mem DTR support
X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=89b37e49929653b7c350aac7fb2b96a052533015;p=users%2Fjedix%2Flinux-maple.git

spi-nand/spi-mem DTR support

Merge series from Miquel Raynal <miquel.raynal@bootlin.com>:

Here is a (big) series supposed to bring DTR support in SPI-NAND.
---

89b37e49929653b7c350aac7fb2b96a052533015
diff --cc drivers/spi/spi-rockchip-sfc.c
index 59de351499a0,0cf0e1d3fbae..f3fe10eddb6a
--- a/drivers/spi/spi-rockchip-sfc.c
+++ b/drivers/spi/spi-rockchip-sfc.c
@@@ -526,22 -491,14 +526,22 @@@ static int rockchip_sfc_exec_mem_op(str
  	struct rockchip_sfc *sfc = spi_controller_get_devdata(mem->spi->controller);
  	u32 len = op->data.nbytes;
  	int ret;
 +	u8 cs = spi_get_chipselect(mem->spi, 0);
  
 -	if (unlikely(op->max_freq != sfc->frequency)) {
 -		ret = clk_set_rate(sfc->clk, op->max_freq);
 +	ret = pm_runtime_get_sync(sfc->dev);
 +	if (ret < 0) {
 +		pm_runtime_put_noidle(sfc->dev);
 +		return ret;
 +	}
 +
- 	if (unlikely(mem->spi->max_speed_hz != sfc->speed[cs]) &&
++	if (unlikely(op->max_freq != sfc->speed[cs]) &&
 +	    !has_acpi_companion(sfc->dev)) {
- 		ret = rockchip_sfc_clk_set_rate(sfc, mem->spi->max_speed_hz);
++		ret = rockchip_sfc_clk_set_rate(sfc, op->max_freq);
  		if (ret)
 -			return ret;
 -		sfc->frequency = op->max_freq;
 +			goto out;
- 		sfc->speed[cs] = mem->spi->max_speed_hz;
++		sfc->speed[cs] = op->max_freq;
  		dev_dbg(sfc->dev, "set_freq=%dHz real_freq=%ldHz\n",
 -			sfc->frequency, clk_get_rate(sfc->clk));
 +			sfc->speed[cs], rockchip_sfc_clk_get_rate(sfc));
  	}
  
  	rockchip_sfc_adjust_op_work((struct spi_mem_op *)op);