From: robertkaiser Date: Fri, 11 Oct 2002 15:07:51 +0000 (+0000) Subject: * Patch by Rolf Offermanns X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=83062c4fc508f487680c742fa1cdc8a612918650;p=users%2Frw%2Farmboot.git * Patch by Rolf Offermanns - Added support for flash & stand-alone boot on DNP1110 --- diff --git a/CHANGELOG b/CHANGELOG index 4fa7670..4134ca9 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,10 @@ Recent Modifications ====================================================================== +* Patch by Rolf Offermanns + + - Added support for flash & stand-alone boot on DNP1110 + * Patch by Robert Kaiser : - Changed the various serial_putc()'s to output - on diff --git a/Makefile b/Makefile index 0ab1d4c..a886195 100644 --- a/Makefile +++ b/Makefile @@ -232,6 +232,7 @@ clean: rm -f tools/img2srec tools/mkimage tools/envcrc tools/gen_eth_addr rm -f tools/easylogo/easylogo rm -f tools/gdb/astest tools/gdb/gdbcont tools/gdb/gdbsend + rm -rf LOG clobber: clean rm -f $(OBJS) *.bak tags TAGS diff --git a/README b/README index 41c8712..a986bf0 100644 --- a/README +++ b/README @@ -98,9 +98,8 @@ Supported Hardware Board Configuration Notes -------------------------------------------------------------------------- LART lart_config "Linux ARM Radio Terminal" -SSV DNP1110 dnp1110_config SSV DilNET PC (no flash support) -Shannon shannon_config Tuxscreen (no support for - IrDA keyboard, LCD screen) +SSV DNP1110 dnp1110_config SSV DilNET PC +Shannon shannon_config Tuxscreen implementa impA7 impa7_config EP7211 based CLEP7312 ep7312_config Cirrus Logic EP7312 Dev. Board S3C2400X samsung_config Samsung S3C2400X diff --git a/board/dnp1110/Makefile b/board/dnp1110/Makefile index 67bbfbf..a985447 100644 --- a/board/dnp1110/Makefile +++ b/board/dnp1110/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB = lib$(BOARD).a -OBJS := dnp1110.o flash.o env.o +OBJS := dnp1110.o flash.o env.o mac_addr.o SOBJS := memsetup.o $(LIB): $(OBJS) $(SOBJS) diff --git a/board/dnp1110/dnp1110.c b/board/dnp1110/dnp1110.c index 67974c4..fe22f67 100644 --- a/board/dnp1110/dnp1110.c +++ b/board/dnp1110/dnp1110.c @@ -23,6 +23,7 @@ */ #include "armboot.h" +#include "SA-1100.h" /* ------------------------------------------------------------------------- */ @@ -42,6 +43,10 @@ int board_init(bd_t *bd) /* adress of boot parameters */ bd->bi_boot_params = 0xc0000100; + /* flash vpp on */ + PPDR |= 0x80; // assumes LCD controller is off + PPSR |= 0x80; + return 1; } diff --git a/board/dnp1110/flash.c b/board/dnp1110/flash.c index 732bded..9110e23 100644 --- a/board/dnp1110/flash.c +++ b/board/dnp1110/flash.c @@ -1,7 +1,7 @@ /* * (C) Copyright 2002 * Sysgo Real-Time Solutions, GmbH - * Rolf Offermanns + * Marius Groeger * * See file CREDITS for list of people who contributed to this * project. @@ -24,48 +24,12 @@ #include "armboot.h" -ulong myflush(void); - - -#define FLASH_BANK_SIZE 0x800000 +#define FLASH_BANK_SIZE 0x1000000 #define MAIN_SECT_SIZE 0x20000 -#define PARAM_SECT_SIZE 0x4000 - -/* puzzle magic for lart - * data_*_flash are def'd in flashasm.S - */ - -extern u32 data_from_flash(u32); -extern u32 data_to_flash(u32); - -#define PUZZLE_FROM_FLASH(x) (x) -#define PUZZLE_TO_FLASH(x) (x) flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; -#define CMD_READ_ARRAY 0x00FF00FF -#define CMD_IDENTIFY 0x00900090 -#define CMD_ERASE_SETUP 0x00200020 -#define CMD_ERASE_CONFIRM 0x00D000D0 -#define CMD_PROGRAM 0x00400040 -#define CMD_RESUME 0x00D000D0 -#define CMD_SUSPEND 0x00B000B0 -#define CMD_STATUS_READ 0x00700070 -#define CMD_STATUS_RESET 0x00500050 - -#define BIT_BUSY 0x00800080 -#define BIT_ERASE_SUSPEND 0x00400040 -#define BIT_ERASE_ERROR 0x00200020 -#define BIT_PROGRAM_ERROR 0x00100010 -#define BIT_VPP_RANGE_ERROR 0x00080008 -#define BIT_PROGRAM_SUSPEND 0x00040004 -#define BIT_PROTECT_ERROR 0x00020002 -#define BIT_UNDEFINED 0x00010001 - -#define BIT_SEQUENCE_ERROR 0x00300030 -#define BIT_TIMEOUT 0x80000000 - /*----------------------------------------------------------------------- */ @@ -73,13 +37,13 @@ ulong flash_init(bd_t *bd) { int i, j; ulong size = 0; - + for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { ulong flashbase = 0; - flash_info[i].flash_id = - (INTEL_MANUFACT & FLASH_VENDMASK) | - (INTEL_ID_28F160F3B & FLASH_TYPEMASK); + flash_info[i].flash_id = + (INTEL_MANUFACT & FLASH_VENDMASK) | + (INTEL_ID_28F128J3 & FLASH_TYPEMASK); flash_info[i].size = FLASH_BANK_SIZE; flash_info[i].sector_count = CFG_MAX_FLASH_SECT; memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT); @@ -89,25 +53,18 @@ ulong flash_init(bd_t *bd) panic("configured to many flash banks!\n"); for (j = 0; j < flash_info[i].sector_count; j++) { - if (j <= 7) - { - flash_info[i].start[j] = flashbase + j * PARAM_SECT_SIZE; - } - else - { - flash_info[i].start[j] = flashbase + (j - 7)*MAIN_SECT_SIZE; - } + flash_info[i].start[j] = flashbase + j*MAIN_SECT_SIZE; } size += flash_info[i].size; } - + /* Protect monitor and environment sectors */ flash_protect(FLAG_PROTECT_SET, CFG_FLASH_BASE, CFG_FLASH_BASE + _armboot_end - _armboot_start, &flash_info[0]); - + flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR, CFG_ENV_ADDR + CFG_ENV_SIZE - 1, @@ -131,21 +88,21 @@ void flash_print_info (flash_info_t *info) printf("Unknown Vendor "); break; } - + switch (info->flash_id & FLASH_TYPEMASK) { - case (INTEL_ID_28F160F3B & FLASH_TYPEMASK): - printf("2x 28F160F3B (16Mbit)\n"); + case (INTEL_ID_28F128J3 & FLASH_TYPEMASK): + printf("28F128J3 (128Mbit)\n"); break; default: printf("Unknown Chip Type\n"); goto Done; break; } - + printf(" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count); - + printf(" Sector Start Addresses:"); for (i = 0; i < info->sector_count; i++) { @@ -157,101 +114,18 @@ void flash_print_info (flash_info_t *info) info->protect[i] ? " (RO)" : " "); } printf ("\n"); - + Done: } -/*----------------------------------------------------------------------- - */ - -int flash_error (ulong code) -{ - /* Check bit patterns */ - /* SR.7=0 is busy, SR.7=1 is ready */ - /* all other flags indicate error on 1 */ - /* SR.0 is undefined */ - /* Timeout is our faked flag */ - - /* sequence is described in Intel 290644-005 document */ - - /* check Timeout */ - if (code & BIT_TIMEOUT) - { - printf ("Timeout\n"); - return ERR_TIMOUT; - } - - /* check Busy, SR.7 */ - if (~code & BIT_BUSY) - { - printf ("Busy\n"); - return ERR_PROG_ERROR; - } - - /* check Vpp low, SR.3 */ - if (code & BIT_VPP_RANGE_ERROR) - { - printf ("Vpp range error\n"); - return ERR_PROG_ERROR; - } - - /* check Device Protect Error, SR.1 */ - if (code & BIT_PROTECT_ERROR) - { - printf ("Device protect error\n"); - return ERR_PROG_ERROR; - } - - /* check Command Seq Error, SR.4 & SR.5 */ - if (code & BIT_SEQUENCE_ERROR) - { - printf ("Command seqence error\n"); - return ERR_PROG_ERROR; - } - - /* check Block Erase Error, SR.5 */ - if (code & BIT_ERASE_ERROR) - { - printf ("Block erase error\n"); - return ERR_PROG_ERROR; - } - - /* check Program Error, SR.4 */ - if (code & BIT_PROGRAM_ERROR) - { - printf ("Program error\n"); - return ERR_PROG_ERROR; - } - - /* check Block Erase Suspended, SR.6 */ - if (code & BIT_ERASE_SUSPEND) - { - printf ("Block erase suspended\n"); - return ERR_PROG_ERROR; - } - - /* check Program Suspended, SR.2 */ - if (code & BIT_PROGRAM_SUSPEND) - { - printf ("Program suspended\n"); - return ERR_PROG_ERROR; - } - - /* OK, no error */ - return ERR_OK; -} - /*----------------------------------------------------------------------- */ int flash_erase (flash_info_t *info, int s_first, int s_last) { - ulong result; - int iflag, cflag, prot, sect; + int flag, prot, sect; int rc = ERR_OK; - - /* first look for protection bits */ - + if (info->flash_id == FLASH_UNKNOWN) return ERR_UNKNOWN_FLASH_TYPE; @@ -273,73 +147,56 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) if (prot) return ERR_PROTECTED; - /* + /* * Disable interrupts which might cause a timeout * here. Remember that our exception vectors are * at address 0 in the flash, and we don't want a * (ticker) exception to happen while the flash * chip is in programming mode. */ - cflag = icache_status(); - icache_disable(); - iflag = disable_interrupts(); + flag = disable_interrupts(); /* Start erase on unprotected sectors */ - for (sect = s_first; sect<=s_last && !ctrlc(); sect++) - { + for (sect = s_first; sect<=s_last && !ctrlc(); sect++) { + printf("Erasing sector %2d ... ", sect); /* arm simple, non interrupt dependent timer */ reset_timer_masked(); - - if (info->protect[sect] == 0) - { /* not protected */ - vulong *addr = (vulong *)(info->start[sect]); - - *addr = PUZZLE_TO_FLASH(CMD_STATUS_RESET); - *addr = PUZZLE_TO_FLASH(CMD_ERASE_SETUP); - *addr = PUZZLE_TO_FLASH(CMD_ERASE_CONFIRM); - - /* wait until flash is ready */ - do - { - /* check timeout */ - if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) - { - *addr = PUZZLE_TO_FLASH(CMD_SUSPEND); - result = BIT_TIMEOUT; - break; + + if (info->protect[sect] == 0) { /* not protected */ + vushort *addr = (vushort *)(info->start[sect]); + + *addr = 0x20; /* erase setup */ + *addr = 0xD0; /* erase confirm */ + + while ((*addr & 0x80) != 0x80) { + if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) { + *addr = 0xB0; /* suspend erase */ + *addr = 0xFF; /* reset to read mode */ + rc = ERR_TIMOUT; + goto outahere; } - - result = PUZZLE_FROM_FLASH(*addr); - } while (~result & BIT_BUSY); - - *addr = PUZZLE_TO_FLASH(CMD_READ_ARRAY); - - if ((rc = flash_error(result)) != ERR_OK) - goto outahere; - - printf("ok.\n"); - } - else /* it was protected */ - { - printf("protected!\n"); + } + + /* clear status register command */ + *addr = 0x50; + /* reset to read mode */ + *addr = 0xFF; } + printf("ok.\n"); } - if (ctrlc()) printf("User Interrupt!\n"); outahere: + /* allow flash to settle - wait 10 ms */ udelay_masked(10000); - - if (iflag) + + if (flag) enable_interrupts(); - - if (cflag) - icache_enable(); - + return rc; } @@ -347,61 +204,78 @@ outahere: * Copy memory to flash */ -volatile static int write_word (flash_info_t *info, ulong dest, ulong data) +static int write_word (flash_info_t *info, ulong dest, ushort data) { - vulong *addr = (vulong *)dest; - ulong result; + vushort *addr = (vushort *)dest, val; int rc = ERR_OK; - int cflag, iflag; + int flag; /* Check if Flash is (sufficiently) erased */ - result = PUZZLE_FROM_FLASH(*addr); - if ((result & data) != data) + if ((*addr & data) != data) return ERR_NOT_ERASED; - - /* + + /* * Disable interrupts which might cause a timeout * here. Remember that our exception vectors are * at address 0 in the flash, and we don't want a * (ticker) exception to happen while the flash * chip is in programming mode. */ - cflag = icache_status(); - icache_disable(); - iflag = disable_interrupts(); + flag = disable_interrupts(); + + /* clear status register command */ + *addr = 0x50; + + /* program set-up command */ + *addr = 0x40; - *addr = PUZZLE_TO_FLASH(CMD_STATUS_RESET); - *addr = PUZZLE_TO_FLASH(CMD_PROGRAM); + /* latch address/data */ *addr = data; /* arm simple, non interrupt dependent timer */ reset_timer_masked(); - /* wait until flash is ready */ - do + /* wait while polling the status register */ + while(((val = *addr) & 0x80) != 0x80) { - /* check timeout */ - if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) - { - *addr = PUZZLE_TO_FLASH(CMD_SUSPEND); - result = BIT_TIMEOUT; - break; + if (get_timer_masked() > CFG_FLASH_WRITE_TOUT) { + rc = ERR_TIMOUT; + /* suspend program command */ + *addr = 0xB0; + goto outahere; } + } + + if(val & 0x1A) { /* check for error */ + printf("\nFlash write error %02x at address %08lx\n", + (int)val, (unsigned long)dest); + if(val & (1<<3)) { + printf("Voltage range error.\n"); + rc = ERR_PROG_ERROR; + goto outahere; + } + if(val & (1<<1)) { + printf("Device protect error.\n"); + rc = ERR_PROTECTED; + goto outahere; + } + if(val & (1<<4)) { + printf("Programming error.\n"); + rc = ERR_PROG_ERROR; + goto outahere; + } + rc = ERR_PROG_ERROR; + goto outahere; + } + +outahere: + /* read array command */ + *addr = 0xFF; - result = PUZZLE_FROM_FLASH(*addr); - } while (~result & BIT_BUSY); - - *addr = PUZZLE_TO_FLASH(CMD_READ_ARRAY); - - rc = flash_error(result); - - if (iflag) + if (flag) enable_interrupts(); - if (cflag) - icache_enable(); - return rc; } @@ -411,11 +285,12 @@ volatile static int write_word (flash_info_t *info, ulong dest, ulong data) int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) { - ulong cp, wp, data; + ulong cp, wp; + ushort data; int l; int i, rc; - wp = (addr & ~3); /* get lower word aligned address */ + wp = (addr & ~1); /* get lower word aligned address */ /* * handle unaligned start bytes @@ -423,36 +298,36 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) if ((l = addr - wp) != 0) { data = 0; for (i=0, cp=wp; i> 8) | (*(uchar *)cp << 24); + data = (data >> 8) | (*(uchar *)cp << 8); } - for (; i<4 && cnt>0; ++i) { - data = (data >> 8) | (*src++ << 24); + for (; i<2 && cnt>0; ++i) { + data = (data >> 8) | (*src++ << 8); --cnt; ++cp; } - for (; cnt==0 && i<4; ++i, ++cp) { - data = (data >> 8) | (*(uchar *)cp << 24); + for (; cnt==0 && i<2; ++i, ++cp) { + data = (data >> 8) | (*(uchar *)cp << 8); } - + if ((rc = write_word(info, wp, data)) != 0) { return (rc); } - wp += 4; + wp += 2; } /* * handle word aligned part */ - while (cnt >= 4) { - data = *((vulong*)src); + while (cnt >= 2) { + data = *((vushort*)src); if ((rc = write_word(info, wp, data)) != 0) { return (rc); } - src += 4; - wp += 4; - cnt -= 4; + src += 2; + wp += 2; + cnt -= 2; } - + if (cnt == 0) { return ERR_OK; } @@ -461,12 +336,12 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) * handle unaligned tail bytes */ data = 0; - for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { - data = (data >> 8) | (*src++ << 24); + for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) { + data = (data >> 8) | (*src++ << 8); --cnt; } - for (; i<4; ++i, ++cp) { - data = (data >> 8) | (*(uchar *)cp << 24); + for (; i<2; ++i, ++cp) { + data = (data >> 8) | (*(uchar *)cp << 8); } return write_word(info, wp, data); diff --git a/board/dnp1110/memsetup.S b/board/dnp1110/memsetup.S index 0c98f5a..7e0f6df 100644 --- a/board/dnp1110/memsetup.S +++ b/board/dnp1110/memsetup.S @@ -34,63 +34,103 @@ MEM_BASE: .long 0xa0000000 MEM_START: .long 0xc0000000 -#define MDCNFG 0x00 -#define MDCAS0 0x04 -#define MDCAS1 0x08 -#define MDCAS2 0x0c -#define MSC0 0x10 -#define MSC1 0x14 -#define MECR 0x18 - -mdcas0: .long 0xc71c703f -mdcas1: .long 0xffc71c71 -mdcas2: .long 0xffffffff -// mdcnfg: .long 0x0bb2bcbf -mdcnfg: .long 0x0334b22f @ alt -// mcs0: .long 0xfff8fff8 -msc0: .long 0xad8c4888 @ alt -mecr: .long 0x00060006 -// mecr: .long 0x994a994a @ alt +#define MDCNFG 0x00 +#define MDCAS00 0x04 //; CAS waveform rotate reg 0 +#define MDCAS01 0x08 //; CAS waveform rotate reg 1 bank +#define MDCAS02 0x0C //; CAS waveform rotate reg 2 bank +#define MDREFR 0x1C //; DRAM refresh control reg +#define MDCAS20 0x20 //; CAS waveform rotate reg 0 bank +#define MDCAS21 0x24 //; CAS waveform rotate reg 1 bank +#define MDCAS22 0x28 //; CAS waveform rotate reg 2 bank +#define MECR 0x18 //; Expansion memory (PCMCIA) bus configuration register +#define MSC0 0x10 //; static memory control reg 0 +#define MSC1 0x14 //; static memory control reg 1 +#define MSC2 0x2C //; static memory control reg 2 +#define SMCNFG 0x30 //; SMROM configuration reg + +mdcas00: .long 0x5555557F +mdcas01: .long 0x55555555 +mdcas02: .long 0x55555555 +mdcas20: .long 0x5555557F +mdcas21: .long 0x55555555 +mdcas22: .long 0x55555555 +mdcnfg: .long 0x0000B25C +mdrefr: .long 0x007000C1 +mecr: .long 0x10841084 +msc0: .long 0x00004774 +msc1: .long 0x00000000 +msc2: .long 0x00000000 +smcnfg: .long 0x00000000 /* setting up the memory */ .globl memsetup memsetup: - ldr r0, MEM_BASE - /* Setup the flash memory */ - ldr r1, msc0 - str r1, [r0, #MSC0] + ldr r0, MEM_BASE /* Set up the DRAM */ - /* MDCAS0 */ - ldr r1, mdcas0 - str r1, [r0, #MDCAS0] + /* MDCAS00 */ + ldr r1, mdcas00 + str r1, [r0, #MDCAS00] - /* MDCAS1 */ - ldr r1, mdcas1 - str r1, [r0, #MDCAS1] + /* MDCAS01 */ + ldr r1, mdcas01 + str r1, [r0, #MDCAS01] - /* MDCAS2 */ - ldr r1, mdcas2 - str r1, [r0, #MDCAS2] + /* MDCAS02 */ + ldr r1, mdcas02 + str r1, [r0, #MDCAS02] - /* MDCNFG */ - ldr r1, mdcnfg - str r1, [r0, #MDCNFG] + /* MDCAS20 */ + ldr r1, mdcas20 + str r1, [r0, #MDCAS20] + + /* MDCAS21 */ + ldr r1, mdcas21 + str r1, [r0, #MDCAS21] + + /* MDCAS22 */ + ldr r1, mdcas22 + str r1, [r0, #MDCAS22] + + /* MDREFR */ + ldr r1, mdrefr + str r1, [r0, #MDREFR] /* Set up PCMCIA space */ ldr r1, mecr str r1, [r0, #MECR] - /* Load something to activate bank */ - ldr r1, MEM_START + /* Setup the flash memory and other */ + ldr r1, msc0 + str r1, [r0, #MSC0] + ldr r1, msc1 + str r1, [r0, #MSC1] + + ldr r1, msc2 + str r1, [r0, #MSC2] + + ldr r1, smcnfg + str r1, [r0, #SMCNFG] + + /* MDCNFG */ + ldr r1, mdcnfg + bic r1, r1, #0x00000001 + str r1, [r0, #MDCNFG] + + /* Load something to activate bank */ + ldr r2, MEM_START .rept 8 - ldr r0, [r1] + ldr r1, [r2] .endr + /* MDCNFG */ + ldr r1, mdcnfg + orr r1, r1, #0x00000001 + str r1, [r0, #MDCNFG] + /* everything is fine now */ mov pc, lr - diff --git a/board/epxa1db/mac_addr.c b/board/epxa1db/mac_addr.c index 6c674bc..5930ef4 100644 --- a/board/epxa1db/mac_addr.c +++ b/board/epxa1db/mac_addr.c @@ -58,7 +58,7 @@ void epxa1db_set_mac_addr(bd_t* bd){ s = getenv(bd, "ethaddr"); - if (s) { + if (s) { for (i=0; i<6; i++) { addr[i] = s ? simple_strtoul(s, &e, 16) : 0; if (s) s = (*e) ? e+1 : e; diff --git a/common/board.c b/common/board.c index d1d502f..d5de306 100644 --- a/common/board.c +++ b/common/board.c @@ -38,6 +38,11 @@ extern void cs8900_get_enetaddr(uchar *addr); extern void epxa1db_set_mac_addr(bd_t* bd); #endif +#ifdef CONFIG_DNP1110 +extern void dnp1110_set_mac_addr(bd_t* bd); +#endif + + /* * Begin and End of memory area for malloc(), and current "brk" */ @@ -137,7 +142,6 @@ void start_armboot(void) * FIXME: this should probably be rationalised into a standard call for * each board, e.g. enet_mac_init() - but this'll do for now. */ - #ifdef CONFIG_DRIVER_CS8900 if (!getenv(&bd,"ethaddr") ) { cs8900_get_enetaddr(bd.bi_enetaddr); @@ -147,7 +151,11 @@ void start_armboot(void) #ifdef CONFIG_EPXA1DB_MAC_ADDR epxa1db_set_mac_addr(&bd); #endif - + +#ifdef CONFIG_DNP1110 + dnp1110_set_mac_addr(&bd); +#endif + #ifdef BOARD_POST_INIT board_post_init(&bd); #endif diff --git a/cpu/arm920t/cpu.c b/cpu/arm920t/cpu.c index 6eeadc1..a72f543 100644 --- a/cpu/arm920t/cpu.c +++ b/cpu/arm920t/cpu.c @@ -180,4 +180,17 @@ int dcache_status(void) { return (read_p15_c1() & C1_DC) != 0; } -#endif +#else +/* I don't know if this is the right solution for + . the samsung board. + . Otherwise one would have to #ifdef the "flush_all_caches()" + . function in common/cmd_boot.c + */ +void icache_enable(void) {} +void icache_disable(void) {} +int icache_status(void) {} +void dcache_enable(void) {} +void dcache_disable(void) {} +int dcache_status(void) {} + +#endif /* USE_920T_MMU */ diff --git a/cpu/sa1100/serial.c b/cpu/sa1100/serial.c index 5d1b33c..ad7e694 100644 --- a/cpu/sa1100/serial.c +++ b/cpu/sa1100/serial.c @@ -41,6 +41,9 @@ void serial_setbrg(bd_t *bd, int baudrate) else hang(); #ifdef CONFIG_SERIAL1 + // SA1110 uart function + Ser1SDCR0 |= SDCR0_SUS; + // Wait until port is ready ... while(Ser1UTSR1 & UTSR1_TBY) {} diff --git a/drivers/smc91111.c b/drivers/smc91111.c index e0b7e48..d2b8603 100644 --- a/drivers/smc91111.c +++ b/drivers/smc91111.c @@ -207,7 +207,7 @@ static int smc_rcv(void); ------------------------------------------------------------ */ -static char smc_mac_addr[] = {0x02, 0x80, 0xad, 0x20, 0x31, 0xb8}; +static char smc_mac_addr[] = {0xde, 0xad, 0xbe, 0xef, 0xff, 0xff}; /* * This function must be called before smc_open() if you want to override @@ -1355,7 +1355,15 @@ static void print_packet( byte * buf, int length ) #endif int eth_init(bd_t *bd) { + int i; smc_open(); + + printf("smc91111 mac addr: "); + for (i = 0; i < 6; i++) { + printf("%x", smc_mac_addr[i]); + if (i != 5) printf(":"); + } + printf("\n"); return 0; } diff --git a/include/configs/config_dnp1110.h b/include/configs/config_dnp1110.h index 5ecc5a8..f917561 100644 --- a/include/configs/config_dnp1110.h +++ b/include/configs/config_dnp1110.h @@ -31,7 +31,7 @@ * If we are developing, we might want to start armboot from ram * so we MUST NOT initialize critical regs like mem-timing ... */ -#define CONFIG_INIT_CRITICAL /* undef for developing */ +//#define CONFIG_INIT_CRITICAL /* undef for developing */ #undef CONFIG_INIT_CRITICAL /* undef for developing */ /* @@ -70,14 +70,14 @@ /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include -#define CONFIG_BOOTDELAY 3 -#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,115200" -#define CONFIG_ETHADDR 02:80:ad:20:31:b8 -#define CONFIG_NETMASK 255.255.0.0 -#define CONFIG_IPADDR 172.22.2.23 -#define CONFIG_SERVERIP 172.22.2.22 -#define CONFIG_BOOTFILE "elinos-dnp1110" -#define CONFIG_BOOTCOMMAND "tftp; bootm" +#define CONFIG_BOOTDELAY 5 +#define CONFIG_BOOTARGS "root=/dev/nfs rw nfsroot=/tftpboot/%s ip=auto devfs=mount" +//#define CONFIG_ETHADDR 02:80:ad:20:31:b8 +//#define CONFIG_NETMASK 255.255.0.0 +//#define CONFIG_IPADDR 172.22.2.23 +//#define CONFIG_SERVERIP 172.22.2.22 +//#define CONFIG_BOOTFILE "elinos-dnp1110" +#define CONFIG_BOOTCOMMAND "bootp; bootm" #if (CONFIG_COMMANDS & CFG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ @@ -161,7 +161,7 @@ struct bd_info_ext #define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */ #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */ -#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */ -#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ +#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x40000) /* Addr of Environment Sector */ +#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */ #endif /* __CONFIG_H */