From: wdenk Date: Fri, 18 Aug 2000 15:31:57 +0000 (+0000) Subject: more 8xx cleanup, start adding 4xx support (provided by Stefan Roese) X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=7135c3a36d7d56ccf36f07d3256ab3b1c75c8142;p=users%2Frw%2Fppcboot.git more 8xx cleanup, start adding 4xx support (provided by Stefan Roese) --- diff --git a/Makefile b/Makefile index d54019c..b429237 100644 --- a/Makefile +++ b/Makefile @@ -54,6 +54,10 @@ OBJS = $(CPU)/start.o \ $(CPU)/lib$(CPU).a \ $(ARCH)/lib$(ARCH).a +ifeq ($(CPU),ppc4xx) +OBJS += $(CPU)/resetvec.o +endif + all: ppcboot.srec install: all @@ -63,6 +67,9 @@ install: all ppcboot.srec: ppcboot $(OBJCOPY) -O srec $< $@ +ppcboot.bin: ppcboot + $(OBJCOPY) -O binary $< $@ + ppcboot: depend $(SUBDIRS) $(OBJS) $(LDSCRIPT) $(LD) $(LDFLAGS) $(OBJS) -Map ppcboot.map -o ppcboot @@ -112,6 +119,22 @@ FADS_config: unconfig echo "CPU = mpc8xx" >>config.mk ; \ echo "#include " >config.h +CPCI405_config: unconfig + @echo "Configuring for $(@:_config=) Board..." ; \ + cd include ; \ + echo "ARCH = ppc" > config.mk ; \ + echo "BOARD = cpci405" >>config.mk ; \ + echo "CPU = ppc4xx" >>config.mk ; \ + echo "#include " >config.h + +ADCIOP_config: unconfig + @echo "Configuring for $(@:_config=) Board..." ; \ + cd include ; \ + echo "ARCH = ppc" > config.mk ; \ + echo "BOARD = adciop" >>config.mk ; \ + echo "CPU = ppc4xx" >>config.mk ; \ + echo "#include " >config.h + ######################################################################### clean: diff --git a/config.mk b/config.mk index 7c758a1..dc178e7 100644 --- a/config.mk +++ b/config.mk @@ -74,6 +74,10 @@ ifeq ($(CPU),mpc8xx) CPPFLAGS += -mcpu=860 -DCONFIG_8xx endif +ifeq ($(CPU),ppc4xx) +CPPFLAGS += -mcpu=403 -DCONFIG_4xx +endif + CFLAGS := $(CPPFLAGS) -Wall -Wno-uninitialized -Wstrict-prototypes AFLAGS := -D__ASSEMBLY__ $(CPPFLAGS) diff --git a/examples/Makefile b/examples/Makefile index 3f74045..d22ffce 100644 --- a/examples/Makefile +++ b/examples/Makefile @@ -25,7 +25,12 @@ LOAD_ADDR = 0x40000 include $(TOPDIR)/config.mk -SREC = hello_world.srec timer.srec +SREC = hello_world.srec + +# The following example is pretty 8xx specific... +ifeq ($(CPU),mpc8xx) +SREC += timer.srec +endif OBJS = $(SREC:.srec=.o) diff --git a/include/config_ADCIOP.h b/include/config_ADCIOP.h new file mode 100644 index 0000000..ab3901b --- /dev/null +++ b/include/config_ADCIOP.h @@ -0,0 +1,126 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * board/config.h - configuration options, board specific + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + * (easy to change) + */ + +#define CONFIG_IOP480 1 /* This is a IOP480 CPU */ +#define CONFIG_ADCIOP 1 /* ...on a ADCIOP board */ + +#define CONFIG_PPC4XX 1 /* define for IBM 4xx PPC */ + +#define CONFIG_CPUCLOCK 66 +#define CONFIG_BUSCLOCK (CONFIG_CPUCLOCK) + +#define CONFIG_BAUDRATE 9600 +#if 0 +#define CONFIG_BOOTDELAY -1 /* autoboot disabled */ +#else +#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ +#endif +#define CONFIG_BOOTCOMMAND "bootm ffc00000" /* autoboot command */ + +#define CONFIG_BOOTARGS "root=/dev/nfs rw " \ + "nfsroot=10.0.0.2:/LinuxPPC " \ + "nfsaddrs=10.0.0.99:10.0.0.2" + +#define CONFIG_DRAM_SPEED (CONFIG_BUSCLOCK) /* MHz */ + +/* + * Miscellaneous configurable options + */ +#define CFG_LONGHELP /* undef to save memory */ +#define CFG_PROMPT "=> " /* Monitor Command Prompt */ +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ +#define CFG_MAXARGS 8 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ + +#define CFG_MEMTEST_START 0x0400000 /* memtest works on */ +#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ + +#define CFG_BAUDRATE_MIN 300 /* lowest possible baudrate */ +#define CFG_BAUDRATE_MAX 115200 /* highest possible baudrate */ +#define CFG_BAUDRATE_DEFAULT CONFIG_BAUDRATE /* default baudrate */ + +/*----------------------------------------------------------------------- + * Start addresses for the final memory configuration + * (Set up by the startup code) + * Please note that CFG_SDRAM_BASE _must_ start at 0 + */ +#define CFG_SDRAM_BASE 0x00000000 +#define CFG_FLASH_BASE 0xFFFE0000 +#define CFG_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */ +#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ +/*----------------------------------------------------------------------- + * FLASH organization + */ +#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ +#define CFG_MAX_FLASH_SECT 245 /* max number of sectors on one chip */ + +#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ +#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ + +#define CFG_FLASH_ENV_OFFSET 0x8000 /* Offset of Environment Sector */ +#define CFG_FLASH_ENV_SIZE 0x2000 /* Total Size of Environment Sector */ + +/*----------------------------------------------------------------------- + * Cache Configuration + */ +#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */ + +/* + * Init Memory Controller: + * + * BR0/1 and OR0/1 (FLASH) + */ + +#define FLASH_BASE0_PRELIM 0xFFC00000 /* FLASH bank #0 */ +#define FLASH_BASE1_PRELIM 0xFFE00000 /* FLASH bank #1 */ + + +/* + * Internal Definitions + * + * Boot Flags + */ +#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ +#define BOOTFLAG_WARM 0x02 /* Software reboot */ + +#endif /* __CONFIG_H */ diff --git a/include/config_CPCI405.h b/include/config_CPCI405.h new file mode 100644 index 0000000..b22cf05 --- /dev/null +++ b/include/config_CPCI405.h @@ -0,0 +1,130 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * board/config.h - configuration options, board specific + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + * (easy to change) + */ + +#define CONFIG_PPC405GP 1 /* This is a PPC405 CPU */ +#define CONFIG_CPCI405 1 /* ...on a CPCI405 board */ + +#define CONFIG_PPC4XX 1 /* define for IBM 4xx PPC */ + +#define CONFIG_CPUCLOCK 200 +#define CONFIG_BUSCLOCK 100 + +#define CONFIG_BAUDRATE 9600 +#if 0 +#define CONFIG_BOOTDELAY -1 /* autoboot disabled */ +#else +#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ +#endif +#define CONFIG_BOOTCOMMAND "bootm ffc00000" /* autoboot command */ + +#define CONFIG_BOOTARGS "root=/dev/nfs rw " \ + "nfsroot=10.0.0.2:/LinuxPPC " \ + "nfsaddrs=10.0.0.99:10.0.0.2" + +#define CONFIG_DRAM_SPEED (CONFIG_BUSCLOCK) /* MHz */ + +/* + * Miscellaneous configurable options + */ +#define CFG_LONGHELP /* undef to save memory */ +#define CFG_PROMPT "=> " /* Monitor Command Prompt */ +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ +#define CFG_MAXARGS 8 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ + +#define CFG_MEMTEST_START 0x0400000 /* memtest works on */ +#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ + +#define CFG_BAUDRATE_MIN 300 /* lowest possible baudrate */ +#define CFG_BAUDRATE_MAX 115200 /* highest possible baudrate */ +#define CFG_BAUDRATE_DEFAULT CONFIG_BAUDRATE /* default baudrate */ + +/*----------------------------------------------------------------------- + * Start addresses for the final memory configuration + * (Set up by the startup code) + * Please note that CFG_SDRAM_BASE _must_ start at 0 + */ +#define CFG_SDRAM_BASE 0x00000000 +#if 0 +#define CFG_FLASH_BASE 0xFFFE0000 +#else +#define CFG_FLASH_BASE 0x00FE0000 +#endif +#define CFG_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */ +#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ +/*----------------------------------------------------------------------- + * FLASH organization + */ +#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ +#define CFG_MAX_FLASH_SECT 245 /* max number of sectors on one chip */ + +#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ +#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ + +#define CFG_FLASH_ENV_OFFSET 0x8000 /* Offset of Environment Sector */ +#define CFG_FLASH_ENV_SIZE 0x2000 /* Total Size of Environment Sector */ + +/*----------------------------------------------------------------------- + * Cache Configuration + */ +#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */ + +/* + * Init Memory Controller: + * + * BR0/1 and OR0/1 (FLASH) + */ + +#define FLASH_BASE0_PRELIM 0xFFC00000 /* FLASH bank #0 */ +#define FLASH_BASE1_PRELIM 0xFFE00000 /* FLASH bank #1 */ + + +/* + * Internal Definitions + * + * Boot Flags + */ +#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ +#define BOOTFLAG_WARM 0x02 /* Software reboot */ + +#endif /* __CONFIG_H */ diff --git a/include/ppc_asm.tmpl b/include/ppc_asm.tmpl index e533725..e1916a4 100644 --- a/include/ppc_asm.tmpl +++ b/include/ppc_asm.tmpl @@ -130,6 +130,21 @@ #define LCTRL2 157 /* Load/Store Support (37-41) */ #define ICTRL 158 +/* special: IBM PPC405 */ + +#define pit 0x3DB +#define tcr 0x3DA + +#define sgr 0x3B9 +#define dcwr 0x3BA +#define cntrl0 0x0B1 +#define ocmdsarc 0x01A +#define ocmdscntl 0x01B + +#define OCM_DATA_ADDR 0xF8000000 + +/* special: PLX IOP480 */ +#define esr 0x3D4 /* Registers in the processor's internal memory map that we use. diff --git a/include/ppcboot.h b/include/ppcboot.h index 4fecfe7..8d02581 100644 --- a/include/ppcboot.h +++ b/include/ppcboot.h @@ -24,8 +24,6 @@ #ifndef _PPCBOOT_H_ #define _PPCBOOT_H_ 1 -#define CONFIG_8xx 1 /* needed for Linux kernel header files */ - #undef _LINUX_CONFIG_H #define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */ @@ -164,6 +162,9 @@ ulong get_bus_freq (ulong); #ifdef CONFIG_8xx void cpu_init_f (volatile immap_t *immr); #endif +#ifdef CONFIG_4xx +void cpu_init_f (void); +#endif void cpu_init_r (bd_t *bd); /* $(CPU)/interrupts.c */